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Move muxpack from passes/techmap to passes/opt
[yosys.git]
/
tests
/
techmap
/
2016-07-08
Clifford Wolf
Merge branch 'yosys-0.5-vtr' of https://github.com...
tree
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commitdiff
2015-12-07
Clifford Wolf
Merge pull request #108 from cseed/master
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commitdiff
2015-09-25
Clifford Wolf
Added read-enable to memory model
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commitdiff
2015-04-03
Ahmed Irfan
Merge branch 'master' of https://github.com/cliffordwol...
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commitdiff
2015-02-14
Clifford Wolf
Added $meminit support to "memory" command
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commitdiff
2014-09-22
Ahmed Irfan
Merge branch 'master' of https://github.com/cliffordwol...
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commitdiff
2014-07-16
Clifford Wolf
Merged new $mem/$memwr WR_EN interface
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commitdiff
2014-07-16
Clifford Wolf
Changed tests/techmap/mem_simple_4x1_map for new $mem...
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commitdiff
2014-03-11
Siesh1oo
Rebase to cliffordwolf repo HEAD finished.
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commitdiff
2014-03-11
Clifford Wolf
Fixed yosys path in tests/techmap/mem_simple_4x1_runtest.sh
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commitdiff
2014-03-11
Clifford Wolf
Use "verilog -noattr" in tests/techmap/mem_simple_4x1...
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commitdiff
2014-02-21
Clifford Wolf
Use private namespace in mem_simple_4x1_map
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commitdiff
2014-02-21
Clifford Wolf
Added tests/techmap/mem_simple_4x1
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