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Merge pull request #1778 from rswarbrick/sv-defines
[yosys.git]
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sv_defines_too_few.ys
2020-03-30
N. Engelhardt
Merge pull request #1778 from rswarbrick/sv-defines
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2020-03-27
Rupert Swarbrick
Add support for SystemVerilog-style `define to Verilog...
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