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2022-01-19 Miodrag MilanovićMerge pull request #3120 from Icenowy/anlogic-bram
2022-01-17 N. EngelhardtMerge pull request #3145 from nakengelhardt/advertise_s...
2022-01-08 Zachary Snowsv: auto add nosync to certain always_comb local vars
2022-01-08 Zachary Snowsv: fix size cast internal expression extension
2022-01-04 Zachary Snowlogger: fix unmatched expected warnings and errors
2022-01-03 Zachary Snowfix iverilog compatibility for new case expr tests
2022-01-03 Zachary Snowfixup verilog doubleslash test
2022-01-03 Zachary Snowsv: fix size cast clipping expression width
2021-12-25 CatherineMerge pull request #3127 from whitequark/cxxrtl-no...
2021-12-20 Marcelina Kościelnickamemory_share: Fix SAT-based sharing for wide ports.
2021-12-18 Zachary Snowfix width detection of array querying function in case...
2021-12-17 Icenowy Zhenganlogic: support BRAM mapping
2021-12-16 CatherineMerge pull request #3115 from whitequark/issue-3112
2021-12-16 CatherineMerge pull request #3114 from whitequark/issue-3113
2021-12-16 Thomas Sailerpreprocessor: do not destroy double slash escaped ident...
2021-12-10 Miodrag MilanovićMerge pull request #3097 from YosysHQ/modport
2021-12-10 Claire XenMerge pull request #3099 from YosysHQ/claire/readargs
2021-12-09 Claire Xenia WolfFix the tests we just broke
2021-12-03 Miodrag MilanovicAdd gitignore for gatemate
2021-11-25 Loftysta: very crude static timing analysis pass
2021-11-16 Kamil RakoczySupport parameters using struct as a wiretype (#3050)
2021-11-13 Patrick Urbansynth_gatemate: Update pass
2021-11-13 Patrick Urbansynth_gatemate: Apply new test practice with assert-max
2021-11-13 Patrick Urbansynth_gatemate: Fix fsm test
2021-11-13 Patrick UrbanAllow initial blocks to be disabled during tests
2021-11-13 Patrick Urbansynth_gatemate: Initial implementation
2021-11-10 Claire XenMerge pull request #3077 from YosysHQ/claire/genlib
2021-11-09 Marcelina Kościelnickaiopadmap: Add native support for negative-polarity...
2021-10-27 Marcelina Kościelnickadfflegalize: Add tests for aldff lowering.
2021-10-27 Marcelina Kościelnickadfflegalize: Add tests targetting aldff.
2021-10-27 Marcelina Kościelnickadfflegalize: Refactor, add aldff support.
2021-10-26 Zachary Snowverilog: use derived module info to elaborate cell...
2021-10-21 Marcelina Kościelnickaextract_reduce: Refactor and fix input signal construction.
2021-10-19 Miodrag MilanovićMerge pull request #3045 from galibert/master
2021-10-19 Claire Xenia WolfFixes in vcdcd.pl for newer Perl versions
2021-10-11 Claire XenMerge pull request #3039 from YosysHQ/claire/verific_aldff
2021-10-08 Marcelina KościelnickaFix a regression from #3035.
2021-10-07 Marcelina KościelnickaFfData: some refactoring.
2021-09-24 Claire XenMerge pull request #3014 from YosysHQ/claire/fix-vgtest
2021-09-23 Claire Xenia WolfFix "make vgtest" so it runs to the end (but now it...
2021-09-21 Zachary Snowsv: support wand and wor of data types
2021-09-21 Zachary Snowverilog: fix multiple AST_PREFIX scope resolution issues
2021-09-09 Eddie Hungabc9: make re-entrant (#2993)
2021-09-09 Eddie Hungabc9: holes module to instantiate cells with NEW_ID...
2021-09-09 Eddie Hungabc9: replace cell type/parameters if derived type...
2021-08-31 Zachary Snowsv: support declaration in generate for initialization
2021-08-30 Zachary Snowsv: support declaration in procedural for initialization
2021-08-22 Marcelina Kościelnickaopt_clean: Make the init attribute follow the FF's Q.
2021-08-20 Pepijn de VosGowin: deal with active-low tristate (#2971)
2021-08-14 Marcelina Kościelnickaproc_prune: Make assign removal and promotion per-bit...
2021-08-13 Marcelina KościelnickaAdd opt_mem_widen pass.
2021-08-13 Marcelina Kościelnickamemory_share: Add -nosat and -nowiden options.
2021-08-13 Marcelina Kościelnickamemory_dff: Recognize soft transparency logic.
2021-08-13 Marcelina KościelnickaAdd new opt_mem_priority pass.
2021-08-13 Miodrag MilanovićMerge pull request #2932 from YosysHQ/mwk/logger-check...
2021-08-13 Brett Witherspoonsv: improve support for wire and var with user-defined...
2021-08-11 Marcelina Kościelnickatest/arch/{ecp5,ice40}/memories.ys: Use read_verilog...
2021-08-11 Marcelina Kościelnickamemory_dff: Recognize read ports with reset / initial...
2021-08-11 Marcelina Kościelnickaproc_memwr: Use the v2 memwr cell.
2021-08-11 Marcelina KościelnickaAdd v2 memory cells.
2021-08-07 Marcelina Kościelnickaopt_merge: Use FfInitVals.
2021-07-30 Zachary Snowproc_rmdead: use explicit pattern set when there are...
2021-07-30 Zachary Snowgenrtlil: add width detection for AST_PREFIX nodes
2021-07-29 Marcelina Kościelnickaopt_lut: Allow more than one -dlogic per cell type.
2021-07-29 Zachary Snowverilog: save and restore overwritten macro arguments
2021-07-28 Marcelina Kościelnickaverilog: Emit $meminit_v2 cell.
2021-07-27 Marcelina Kościelnickaopt_expr: Propagate constants to port connections.
2021-07-17 whitequarkMerge pull request #2879 from whitequark/cxxrtl-fix...
2021-07-16 Rupert SwarbrickAdd support for parsing the SystemVerilog 'bind' construct
2021-07-16 whitequarkMerge pull request #2870 from whitequark/cxxrtl-fix...
2021-07-15 Zachary Snowsv: fix two struct access bugs
2021-07-15 Rupert SwarbrickAdd a test for interfaces on modules loaded on-demand
2021-07-05 Claire XenMerge pull request #2835 from YosysHQ/verific_command
2021-06-18 Miodrag MilanovićMerge pull request #2836 from YosysHQ/gatecat/pyosys...
2021-06-17 Zachary Snowsv: fix up end label checking
2021-06-11 Marcelina KościelnickaAdd regression test for #2824.
2021-06-09 Claire XenMerge pull request #2817 from YosysHQ/claire/fixemails
2021-06-09 Claire Xenia WolfMore deadname stuff
2021-06-09 Claire Xenia WolfMore deadname stuff
2021-06-09 Claire Xenia WolfUse HTTPS for website links, gatecat email
2021-06-09 Claire Xenia WolfFix files with CRLF line endings
2021-06-08 Zachary Snowverilog: check for module scope identifiers during...
2021-06-08 Zachary Snowmem2reg: tolerate out of bounds constant accesses
2021-06-07 Claire Xenia WolfFixing old e-mail addresses and deadnames
2021-06-01 Zachary Snowsv: support tasks and functions within packages
2021-05-31 Marcelina Kościelnickamemory_map: Improve start_offset handling.
2021-05-25 Marcelina Kościelnickamemory_bram: Reuse extract_rdff helper for make_outreg.
2021-05-25 Zachary Snowverilog: fix case expression sign and width handling
2021-05-25 Zachary Snowsv: support remaining assignment operators
2021-05-25 Marcelina Kościelnickaopt_mem_feedback: Respect write port priority.
2021-05-24 Marcelina Kościelnickaopt_mem_feedback: Rewrite feedback path finding logic.
2021-05-23 Marcelina KościelnickaAdd new helper class for merging FFs into cells, use...
2021-05-23 Marcelina Kościelnickaopt_mem: Remove write ports with const-0 EN.
2021-05-20 Marcelina Kościelnickatests/blif: Add missing gitignore
2021-05-15 gatecatintel_alm: Fix illegal carry chains
2021-05-15 gatecatintel_alm: Add global buffer insertion
2021-05-15 gatecatintel_alm: Add IO buffer insertion
2021-05-10 Zachary Snowsv: check validity of package end label
2021-05-08 Marcelina Kościelnickablif: Use library cells' start_offset and upto for...
2021-05-04 Marcelina Kościelnickaopt_dff: Fix NOT gates wired in reverse.
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