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More xsthammer improvements
[yosys.git]
/
tests
/
2013-06-10
Clifford Wolf
More xsthammer improvements
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commitdiff
2013-06-10
Clifford Wolf
Progress xsthammer scripts
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commitdiff
2013-06-10
Clifford Wolf
Progress in xsthammer: working proof for cell models
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2013-06-10
Clifford Wolf
Progress on xsthammer
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2013-06-09
Clifford Wolf
Added first xsthammer scripts
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2013-05-24
Clifford Wolf
Fixed undef behavior in tests/asicworld/code_verilog_tu...
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2013-05-17
Clifford Wolf
Removed test cases that have been moved to yosys-test.
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2013-05-16
Clifford Wolf
Merge branch 'master' of github.com:cliffordwolf/yosys
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2013-05-16
Clifford Wolf
Merge branch 'bugfix'
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2013-05-14
Clifford Wolf
Improved vcdcd.pl (added -d option)
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commitdiff
2013-05-14
Clifford Wolf
Some improvements in vcdcd.pl
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commitdiff
2013-04-13
Clifford Wolf
Fixed a bug in AST frontend for cases with non-blocking...
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commitdiff
2013-03-31
Clifford Wolf
Now only use value from "initial" when no matching...
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2013-03-31
Clifford Wolf
Added test cases from 2012 paper on comparison of foss...
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2013-03-31
Clifford Wolf
Added k68 (m68k compatible cpu) test case from verilator
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2013-03-24
Clifford Wolf
Renamed hansimem.v test case to mem_arst.v
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2013-03-24
Clifford Wolf
Added hansimem testcase (memory with async reset)
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2013-03-17
Clifford Wolf
Merge branch 'hansi'
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2013-03-17
Clifford Wolf
Set execute bit on tests/openmsp430/run-synth.sh for...
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2013-03-17
Johann Glaser
set executable flags to run-synth.sh, added .gitignore
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2013-03-17
Johann Glaser
added ckeck for Icarus Verilog, otherwise the tests...
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commitdiff
2013-01-05
Clifford Wolf
added more .gitignore files (make test)
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2013-01-05
Clifford Wolf
initial import
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