Merge branch 'master' of https://github.com/Siesh1oo/yosys
[yosys.git] / tests /
2014-03-11 Siesh1ooRebase to cliffordwolf repo HEAD finished.
2014-03-11 Clifford WolfFixed yosys path in tests/techmap/mem_simple_4x1_runtest.sh
2014-03-11 Clifford WolfUse "verilog -noattr" in tests/techmap/mem_simple_4x1...
2014-02-21 Clifford WolfUse private namespace in mem_simple_4x1_map
2014-02-21 Clifford WolfAdded tests/techmap/mem_simple_4x1
2014-02-19 Clifford WolfAdded vcd2txt.pl and txt2tikztiming.py (tests/tools...
2014-02-15 Clifford WolfAdded frontend (-f) option to autotest.sh
2014-02-13 Clifford WolfMerge branch 'master' of github.com:cliffordwolf/yosys
2014-02-13 Clifford WolfUpdated ABC and some related changes
2014-02-12 Clifford WolfMerge pull request #26 from ahmedirfan1983/btor
2014-02-12 Clifford WolfMerge branch 'master' of github.com:cliffordwolf/yosys
2014-02-12 Clifford WolfDisabled "abc -dff" in "make test" for now (waiting...
2014-02-08 Clifford WolfAdded test cases for expose -evert-dff
2014-02-07 Clifford WolfAdded splice command
2014-02-06 Clifford WolfAdded counters sat test case
2014-02-05 Clifford WolfRemoved old unused files from tests/
2014-02-04 Clifford WolfAdded test cases for sat command
2014-02-03 Clifford WolfAdded TRANSPARENT parameter to $memrd (and RD_TRANSPARE...
2014-02-03 Clifford WolfReplaced isim with xsim in tests/tools/autotest.sh...
2014-01-30 Clifford WolfBugfix in name resolution with generate blocks
2014-01-03 Ahmed IrfanMerge branch 'master' of https://github.com/cliffordwol...
2014-01-02 Clifford WolfAdded correct handling of $memwr priority
2014-01-02 Clifford WolfAdded autotest.sh -p option
2013-12-31 Clifford WolfUse "abc -dff" in "make test"
2013-12-31 Clifford WolfFixed commented out techmap call in tests/tools/autotest.sh
2013-12-27 Clifford WolfAdded proper === and !== support in constant expressions
2013-12-18 Clifford WolfAdded multiplier test case from eda playground
2013-12-18 Clifford WolfAdded elsif preproc support
2013-12-18 Clifford WolfAdded support for macro arguments
2013-12-04 Clifford WolfVarious improvements in support for generate statements
2013-12-04 Clifford WolfReplaced RTLIL::Const::str with generic decoder method
2013-12-04 Clifford WolfFix in sincos testbench gen
2013-12-04 Clifford WolfAdded sincos test case
2013-11-24 Clifford WolfRenamed stdcells_sim.v to simcells.v and fixed blackbox.v
2013-11-24 Clifford WolfRemoved now obsolete test cases
2013-11-24 Clifford WolfImplemented correct handling of signed module parameters
2013-11-24 Clifford WolfAdded modelsim support to autotest
2013-11-20 Clifford WolfAnother name resolution bugfix for generate blocks
2013-11-20 Clifford WolfImplemented indexed part selects
2013-11-20 Clifford WolfImplemented part/bit select on memory read
2013-11-18 Clifford WolfAdded additional mem2reg testcase
2013-11-18 Clifford WolfFixed parsing of default cases when not last case
2013-11-07 Clifford WolfFixed handling of power operator
2013-11-03 Clifford WolfMerge branch 'master' of github.com:cliffordwolf/yosys
2013-11-02 Clifford WolfBehavior should be identical now to rev. 0b4a64ac6adbd6...
2013-11-02 Clifford WolfVarious ast changes for early expression width detectio...
2013-10-24 Clifford WolfAdded support for complex set-reset flip-flops in proc_dff
2013-10-21 Clifford WolfImproved handling of dff with async resets
2013-09-15 Clifford WolfMoved common techlib files to techlibs/common
2013-08-12 Clifford WolfAdded support for "2**n" shifter encoding
2013-08-09 Clifford WolfAdded $div and $mod technology mapping
2013-07-12 Clifford WolfMore fixes in ternary op sign handling
2013-07-11 Clifford WolfFixed sign handling in ternary operator
2013-07-11 Clifford WolfAnother vloghammer related bugfix
2013-07-09 Clifford WolfMore fixes in ast expression sign/width handling
2013-07-09 Clifford WolfMerge branch 'master' of github.com:cliffordwolf/yosys
2013-07-09 Clifford WolfFixed shift ops with large right hand side
2013-07-09 Clifford WolfMajor redesign of expr width/sign detecion (verilog...
2013-07-07 Clifford WolfFixed another bug found using vloghammer
2013-07-07 Clifford WolfRemoved tests/xsthammer
2013-07-05 Clifford WolfFixed vivado related xsthammer bugs
2013-07-05 Clifford WolfVarious improvements in xsthammer report generator
2013-07-05 Clifford WolfAdded work-around to isim bug in xsthammer report script
2013-07-05 Clifford WolfAdded CARRY4 Xilinx cell to xsthammer cell lib
2013-07-05 Clifford WolfAdded xsthammer report generator
2013-07-04 Clifford WolfImproved xsthammer quartus support
2013-07-04 Clifford WolfAdded Altera Cyclon III cell library to xsthammer
2013-07-04 Clifford WolfAdded defparam support to Verilog/AST frontend
2013-07-03 Clifford WolfAdded Altera Quartus support to xsthammer
2013-07-03 Clifford WolfProgress in xsthammer
2013-06-26 Clifford WolfAdded vivado support to xsthammer
2013-06-20 Clifford WolfMerge branch 'master' of github.com:cliffordwolf/yosys
2013-06-20 Clifford WolfAdded timout functionality to SAT solver
2013-06-19 Clifford WolfAdded "eval" pass
2013-06-17 Clifford WolfAdded more stuff to xsthammer, found first xst bug
2013-06-15 Clifford WolfAdded ternary op and concat op to xsthammer
2013-06-13 Clifford WolfAdded consteval testing to xsthammer and fixed bugs
2013-06-13 Clifford WolfMore xsthammer improvements (using xst 14.5 now)
2013-06-12 Clifford WolfMerge branch 'master' of github.com:cliffordwolf/yosys
2013-06-12 Clifford WolfAnother fix for a bug found using xsthammer
2013-06-11 Clifford WolfFurther improved and extended xsthammer
2013-06-10 Clifford WolfMore xsthammer improvements
2013-06-10 Clifford WolfProgress xsthammer scripts
2013-06-10 Clifford WolfProgress in xsthammer: working proof for cell models
2013-06-10 Clifford WolfProgress on xsthammer
2013-06-09 Clifford WolfAdded first xsthammer scripts
2013-05-24 Clifford WolfFixed undef behavior in tests/asicworld/code_verilog_tu...
2013-05-17 Clifford WolfRemoved test cases that have been moved to yosys-test.
2013-05-16 Clifford WolfMerge branch 'master' of github.com:cliffordwolf/yosys
2013-05-16 Clifford WolfMerge branch 'bugfix'
2013-05-14 Clifford WolfImproved vcdcd.pl (added -d option)
2013-05-14 Clifford WolfSome improvements in vcdcd.pl
2013-04-13 Clifford WolfFixed a bug in AST frontend for cases with non-blocking...
2013-03-31 Clifford WolfNow only use value from "initial" when no matching...
2013-03-31 Clifford WolfAdded test cases from 2012 paper on comparison of foss...
2013-03-31 Clifford WolfAdded k68 (m68k compatible cpu) test case from verilator
2013-03-24 Clifford WolfRenamed hansimem.v test case to mem_arst.v
2013-03-24 Clifford WolfAdded hansimem testcase (memory with async reset)
2013-03-17 Clifford WolfMerge branch 'hansi'
2013-03-17 Clifford WolfSet execute bit on tests/openmsp430/run-synth.sh for...
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