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Forgot to remove dissasembly file.
[microwatt.git]
/
wishbone_bram_wrapper.vhdl
2022-01-01
Luke Kenneth Casso...
gotten over the logic-dyslexia of what in/out mean...
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2021-12-30
Luke Kenneth Casso...
bring bram signals out to top_level, initially for...
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2020-01-21
Anton Blanchard
Merge pull request #134 from paulusmack/master
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2020-01-19
Anton Blanchard
Merge pull request #139 from antonblanchard/reduce-mem
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2020-01-19
Anton Blanchard
Add log2ceil and use it in bram code
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2019-11-15
Anton Blanchard
Merge pull request #118 from antonblanchard/bus-pipeline
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2019-10-30
Benjamin Herrenschmidt
ram: Ack stores early
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2019-10-30
Benjamin Herrenschmidt
ram: Rework main RAM interface
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