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gem5.git
2012-05-03 Jayneel GandhiConfig: Fix help msg for option --mem-size | commitdiff
2012-05-01 Andreas HanssonMEM: Separate requests and responses for timing accesses | commitdiff
2012-04-30 Nilay VaishRegression: Stats update for X86 Ruby FS test | commitdiff
2012-04-29 Gabe BlackX86: Fix the IMUL_R_P_I macroop. | commitdiff
2012-04-29 Vince WeaverX86: Fix up the open system call's flags. | commitdiff
2012-04-29 Vince WeaverX86: Make gem5 ignore a bunch of syscalls. | commitdiff
2012-04-28 Nilay VaishGarnet: Correct computation of link utilization | commitdiff
2012-04-27 Nilay Vaishutil/regress: Add the missing comma in the list of... | commitdiff
2012-04-26 Nilay VaishRegression: Add a test for x86 timing full system ruby... | commitdiff
2012-04-25 Nilay VaishRuby: Remove extra statements from Sequencer | commitdiff
2012-04-25 Andreas HanssonMEM: Use base class Master/SlavePort pointers in the bus | commitdiff
2012-04-25 Andreas HanssonMEM: Add the PortId type and a corresponding id field... | commitdiff
2012-04-25 Andreas Hanssonclang/gcc: Use STL hash function for int64_t and uint64_t | commitdiff
2012-04-24 Gabe BlackX86: Update stats for the slightly changed TLB behavior. | commitdiff
2012-04-24 Gabe BlackX86: Clear out duplicate TLB entries when adding a... | commitdiff
2012-04-23 Gabe BlackISA: Put parser generated files in a "generated" directory. | commitdiff
2012-04-23 Steve Reinhardtscons: update minimum SWIG version to 1.3.34 | commitdiff
2012-04-22 Gabe Blackbase: Include cassert in trie.hh. | commitdiff
2012-04-21 Gabe BlackX86: Report an error if there's no kernel object, don... | commitdiff
2012-04-17 Jayneel GandhiSE Config: Changed se.py to support multithreaded mode | commitdiff
2012-04-16 Jayneel GandhiConfig: Add command line options for disk image and... | commitdiff
2012-04-15 Gabe BlackCPU: Tidy up some formatting and a DPRINTF in the simpl... | commitdiff
2012-04-15 Gabe BlackX86: Fix a tiny typo in the load/store microop constructor. | commitdiff
2012-04-15 Gabe BlackX86: Use the AddrTrie class to implement the TLB. | commitdiff
2012-04-15 Gabe Blacksim: Update some comments in trie.hh that were meant... | commitdiff
2012-04-15 Gabe Blacksim: A trie data structure specifically to speed up... | commitdiff
2012-04-14 Andreas HanssonRuby: Use MasterPort base-class pointers where possible | commitdiff
2012-04-14 Andreas HanssonMEM: Remove the Broadcast destination from the packet | commitdiff
2012-04-14 Andreas HanssonMEM: Separate snoops and normal memory requests/responses | commitdiff
2012-04-14 Andreas HanssonRegression: Add ANSI colours to highlight test status | commitdiff
2012-04-14 Andreas Hanssonclang/gcc: Fix compilation issues with clang 3.0 and... | commitdiff
2012-04-13 Steve ReinhardtSCons: restore Werror option in src/SConscript | commitdiff
2012-04-12 Andreas HanssonStats: Update with use of std::map for ordered iteratio... | commitdiff
2012-04-12 Andreas HanssonRuby: Ensure order-dependent iteration uses an ordered map | commitdiff
2012-04-10 Gabe Blacktests: Fix building unit tests. | commitdiff
2012-04-07 Brad Beckmannrubytest: remove spurious printf | commitdiff
2012-04-06 Brad Beckmannregress: ruby random tester and hammer stats updates | commitdiff
2012-04-06 Brad Beckmannruby: set SimpleTiming as the default cpu | commitdiff
2012-04-06 Lisa Hsuslicc: Controllers attached to Sequencers no longer... | commitdiff
2012-04-06 Brad Beckmannsim-ruby: checkpointing fixes and dependent eventq... | commitdiff
2012-04-06 Brad Beckmannslicc: fixed error message when the type has no inheritance | commitdiff
2012-04-06 Brad BeckmannMOESI_hammer: tbe allocation and dependent wakeup fixes | commitdiff
2012-04-06 Brad Beckmannpython: added __nonzero__ function to SimObject Bool... | commitdiff
2012-04-06 Brad BeckmannMOESI_hammer: fixed bug with single cpu + flushes,... | commitdiff
2012-04-06 Brad Beckmannrubytest: seperated read and write ports. | commitdiff
2012-04-06 Andreas HanssonMEM: Enable multiple distributed generalized memories | commitdiff
2012-04-05 Tushar KrishnaNetworkTest: remove unnecessary memory allocation | commitdiff
2012-04-05 Nilay VaishConfig: corrects the way Ruby attaches to the DMA ports | commitdiff
2012-04-05 Andreas HanssonRuby: Fix the example configurations option parsing | commitdiff
2012-04-05 Andreas HanssonPython: Make the All proxy traverse SimObject children... | commitdiff
2012-04-03 Andreas HanssonAtomic: Remove the physmem_port and access memory directly | commitdiff
2012-03-31 Gabe BlackX86: Fix address size handling so real mode works properly. | commitdiff
2012-03-30 Andreas HanssonMEM: Remove legacy DRAM in preparation for memory updates | commitdiff
2012-03-30 Andreas HanssonRuby: Remove the physMemPort and instead access memory... | commitdiff
2012-03-30 William WangMEM: Introduce the master/slave port sub-classes in C++ | commitdiff
2012-03-30 Andreas HanssonCPU: Unify initMemProxies across CPUs and simulation... | commitdiff
2012-03-28 Nilay VaishConfig: Change the way options are added | commitdiff
2012-03-27 Nilay VaishConfig: Move setWorkCountOptions() to Simulation.py | commitdiff
2012-03-26 Andreas Hanssonrange_map: Enable const find and iteration | commitdiff
2012-03-26 Andreas HanssonPower: Change bitfield name to avoid conflicts with... | commitdiff
2012-03-23 Andreas HanssonRuby: Fix Set::print for 32-bit hosts | commitdiff
2012-03-22 Andreas HanssonMEM: Unify bus access methods and prepare for master... | commitdiff
2012-03-22 Andreas HanssonMEM: Split SimpleTimingPort into PacketQueue and ports | commitdiff
2012-03-22 Andreas HanssonScons: Remove Werror=False in SConscript files | commitdiff
2012-03-21 Andreas HanssonPython: Fix a conditional expression that requires... | commitdiff
2012-03-21 Ali SaidiARM: Update stats for IT and conditional branch changes | commitdiff
2012-03-21 Nathanael PremillieuARM: Fix case where cond/uncond control is mis-specified | commitdiff
2012-03-21 Ali SaidiARM: Clean up condCodes in IT blocks. | commitdiff
2012-03-21 Geoffrey BlakeARM: IT doesn't need to be serializing. | commitdiff
2012-03-21 Andrew LukefahrO3: Fix sizing of decode to rename skid buffer. | commitdiff
2012-03-21 Koan-Sin TanARM: Add RTC to PBX System | commitdiff
2012-03-21 Brian GraysonO3: Fix size of skid buffer between fetch and decode... | commitdiff
2012-03-21 Ali SaidiARM: Fix uninitialized value in ARM RTC model. | commitdiff
2012-03-19 Tushar KrishnaGarnet: Stats at vnet granularity + code cleanup | commitdiff
2012-03-19 Andreas Hanssongcc: Clean-up of non-C++0x compliant code, first steps | commitdiff
2012-03-19 Andreas Hanssonclang: Fix recently introduced clang compilation errors | commitdiff
2012-03-19 Andreas Hanssonscripts: Fix to ensure that port connection count is... | commitdiff
2012-03-16 Nilay Vaishruby_fs.py: Add call to createInterruptController() | commitdiff
2012-03-16 Nilay VaishFSConfig.py: fix a typo makeLinuxAlphaRubySystem | commitdiff
2012-03-16 Marc Orrbuild: remove implicit-cache setting of scons from... | commitdiff
2012-03-11 Nilay Vaishse.py: Changes to ruby portion due to SE/FS merge | commitdiff
2012-03-11 Brian GraysonO3: Add fatal when fetchWidth > Impl::MaxWidth. | commitdiff
2012-03-09 Ali SaidiARM: Fix memory starting at non-zero address and exceed... | commitdiff
2012-03-09 Ali SaidiARM: Update stats for CBNZ fix. | commitdiff
2012-03-09 Brian GraysonARM: Fix branch prediction issue with CB(N)Z instruction | commitdiff
2012-03-09 Ali SaidiARM: Update stats for valgrind fix and replace config... | commitdiff
2012-03-09 Geoffrey BlakeO3/Ozone: Eliminate dead code counting software prefetc... | commitdiff
2012-03-09 Geoffrey BlakeCheckerCPU: Make some basic regression tests for CheckerCPU | commitdiff
2012-03-09 Geoffrey BlakeCheckerCPU: Add function stubs to non-ARM ISA source... | commitdiff
2012-03-09 Geoffrey BlakeCheckerCPU: Make CheckerCPU runtime selectable instead... | commitdiff
2012-03-09 Ali SaidiARM: Don't reset CPUs that are going to be switched in. | commitdiff
2012-03-09 Ali SaidiSystem: Move code in initState() back into constructor... | commitdiff
2012-03-09 Ali SaidiARM: Fix valgrind reported error on O3 that was causing... | commitdiff
2012-03-09 Ali Saidicache: Allow main memory to be at disjoint address... | commitdiff
2012-03-08 Gabe BlackFix the SPARC fs regression by adding a call to createI... | commitdiff
2012-03-07 Marc Orrbuild scripts: Made minor modifications to reduce build... | commitdiff
2012-03-06 Andreas HanssonStats: Update stats for changeset 8868 | commitdiff
2012-03-02 Steve ReinhardtSConstruct: rename and document AddM5Option | commitdiff
2012-03-02 Steve ReinhardtSConstruct: update comments & doc strings | commitdiff
2012-03-02 Steve ReinhardtDynInst: get rid of dead MyHash code. | commitdiff
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