mesa: Add extension table entry for OES_shader_image_atomic.

v2: No need for extension enable bits (Ilia).

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

nvc0: rename 3d binding points to NVC0_BIND_3D_XXX

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

nvc0: rename 3d dirty flags to NVC0_NEW_3D_XXX

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

nvc0: prefix compute macros with _CP_ instead of _COMPUTE_

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

nvc0: rename NVXX_COMPUTE to NVXX_CP

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

nvc0: rename nvc0_context::dirty to nvc0_context::dirty_3d

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

nvc0/ir: add missing emission of locked load predicate

Like unlocked store on shared memory, locked store can fail and the
second dest which is a predicate must be emitted.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org

nvc0/ir: add ld lock/st unlock emission on GK104

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

nv50/ir: restore OP_SELP to be a regular instruction

Actually OP_SELP doesn't need to be a compare instruction. Instead we
just need to set the NOT modifier when building the instruction.
While we are at it, fix the dst register type and use a GPR.

Suggested by Ilia Mirkin.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

svga: unbind index buffer when drawing non-indexed primitives

Silences a warning reported by the svga3d device.

v2: also null-out the index buffer pointer

Reviewed-by: Sinclair Yeh <syeh@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>

mesa: add GL_EXT_texture_border_clamp support

This extension is identical to GL_OES_texture_border_clamp. But dEQP has
tests that want the EXT variant.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>

mesa: add GL_OES_texture_border_clamp support

Only minor differences to the existing ARB_texture_border_clamp support.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>

mesa: bump version

11.2 has been branched, we're on 11.3 now.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

nouveau: update the Makefile.sources list

Reflect the nv50->g80 change and the new gm107_texture header.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

radeonsi: implement binary shaders & shader cache in memory (v2)

v2: handle _mesa_hash_table_insert failure
    other cosmetic changes

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

gallium/radeon: remove unused radeon_shader_binary_free_* functions

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: make radeon_shader_reloc name string fixed-sized

This will simplify implementations of binary shaders.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: move some struct si_shader members to new struct si_shader_info

This will be part of shader binaries.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: use smaller types for some si_shader members

in order to decrease the shader size for a shader cache.

v2: add & use SI_MAX_VS_OUTPUTS

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: enable compiling one variant per shader

Shader stats from VERDE:

Default scheduler:

Totals:
SGPRS: 491272 -> 488672 (-0.53 %)
VGPRS: 289980 -> 311093 (7.28 %)
Code Size: 11091656 -> 11219948 (1.16 %) bytes
LDS: 97 -> 97 (0.00 %) blocks
Scratch: 1732608 -> 2246656 (29.67 %) bytes per wave
Max Waves: 78063 -> 77352 (-0.91 %)
Wait states: 0 -> 0 (0.00 %)

Looking at some of the worst regressions, I get:
- The VGPR increase seems to be caused by the fact that if PS has used less
  than 16 VGPRs, now it will always use 16 VGPRs and sometimes even 20.
  However, the wave count remains at 10 if VGPRs <= 24, so no harm there.
- The scratch increase seems to be caused by SGPR spilling.
  The unnecessary SGPR spilling has been an ongoing issue with the compiler
  and it's completely fixable by rematerializing s_loads or reordering
  instructions.

SI scheduler:

Totals:
SGPRS: 374848 -> 374576 (-0.07 %)
VGPRS: 284456 -> 307515 (8.11 %)
Code Size: 11433068 -> 11535452 (0.90 %) bytes
LDS: 97 -> 97 (0.00 %) blocks
Scratch: 509952 -> 522240 (2.41 %) bytes per wave
Max Waves: 79456 -> 78217 (-1.56 %)
Wait states: 0 -> 0 (0.00 %)

VGPRs - same story as before. The SI scheduler doesn't spill SGPRs so much
and generally spills way less than the default scheduler.
(522240 spills vs 2246656 spills)

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: print full shader name before disassembly

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: compile non-GS middle parts of shaders immediately if enabled

Still disabled.

Only prologs & epilogs are compiled in draw calls, but each variant of those
is compiled only once per process.

VS is always compiled as hw VS.
TES is always compiled as hw VS.

LS and ES stages are always compiled on demand.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: rework polygon stippling for PS prolog

Don't use the pstipple module.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: add PS prolog

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: add PS epilog

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: add TCS epilog

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: add VS epilog

It only exports the primitive ID.
Also used by TES when it's compiled as VS.

The VS input location of the primitive ID input is v2.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: add VS prolog

This is disabled with use_monolithic_shaders = true.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: first bits for non-monolithic shaders

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: add code for dumping all shader parts together (v2)

v2: unify some code into si_get_shader_binary_size

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

radeonsi: add code for combining and uploading shaders from 3 shader parts

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: fail compilation if non-GS non-CS shaders have rodata

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: separate 2 pieces of code from create_function

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: add samplemask parameter to si_export_mrt_color

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: add start_instance parameter to get_instance_index_for_fetch

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: separate out shader key bits for prologs & epilogs

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: compute how many input VGPRs fragment shaders have

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: compute how many input SGPRs and VGPRs shaders have

Prologs (shader binaries inserted before the API shader binary) need to
know this, so that they won't change the input registers unintentionally.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

gallium/radeon: add basic code for setting shader return values

LLVMBuildInsertValue will be used on return_value.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

nvc0: enable compute shaders on Fermi

Kepler compute support is really different than Fermi and it's not
ready yet.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

nv50/ir: add atomics support on shared memory for Fermi

Changes from v3:
 - move the previous OP_SELP change to the previous commit

Changes from v2:
 - make sure the op is OP_SELP when emitting the predicate and add one
   assert
 - use bld.getSSA() for mkOp2()
 - add cross edge between tryLockAndSetBB and joinBB

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>

nv50/ir: make OP_SELP a compare instruction

This OP_SELP insn will be used to handle compare and swap subops.

Changes from v2:
 - fix logic for GK110+

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

nv50/ir: add lock/unlock subops for load/store

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

nv50/ir: use s[] addr space for shared buffers

Shared memory address space (FILE_MEMORY_SHARED) must be used instead
of global memory when a shared memory area is declared.

Changes from v2:
 - oops, do not remove TGSI_FILE_BUFFER in a switch in
   nv50_ir_from_tgsi.cpp

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

nvc0: reduce likelihood of collision for real buffers on Fermi

Reduce likelihood of collision with real buffers by placing the
hole at the top of the 4G area. This fixes some indirect draw+compute
tests with large buffers.

Suggested by Ilia Mirkin.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

nvc0: invalidate compute state when switching pipe contexts

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

nvc0: add support for indirect compute on Fermi

When indirect compute is used, the size of the grid (in blocks) is
stored as three integers inside a buffer. This requires a macro to
set up GRIDDIM_YX and GRIDDIM_Z.

Changes from v2:
 - do not launch the grid if the number of groups for a dimension is 0

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

nvc0: bind textures/samplers for compute on Fermi

Textures and samplers don't seem to be aliased between COMPUTE and 3D.

Changes from v2:
 - refactor the code to share (almost) the same logic between 3d and
   compute

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

nvc0: bind shader buffers for compute on Fermi

This is loosely based on 3D. Shader buffers are bound on c15 (the
driver constbuf) at offset 0x200.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

nvc0: bind driver constbuf for compute on Fermi

Changes from v3:
 - add new validation state for COMPUTE driver constbuf

Changes from v2:
 - always bind the driver consts even if user params come in via clover

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

nvc0: add a new validation state for 3D driver constbuf

This will be used to invalidate 3D driver constbuf when using COMPUTE
and vice-versa. This is needed because this CB contains a bunch of
useful information like the addrs of shader buffers.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

nvc0: bind constant buffers for compute on Fermi

Loosely based on 3D.

Changs from v3:
 - invalidate COMPUTE CBs after validating 3D CBs because they are
   aliased

Changes from v2:
 - get rid of the 's' param to nvc0_cb_bo_push() because it doesn't
   matter to upload constbufs for compute using the 3d chan

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

nvc0: allocate an area for compute user constbufs

For compute shaders, we might need to upload uniforms.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

nv50: do not advertise about compute shaders

Compute shaders are totally unsupported. This avoids Clover to
report that OpenCL is supported on Tesla because it's a lie.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Pierre Moreau <pierre.morrow@free.fr>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

docs: Correct typo in LLVMpipe envvar description

Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>

st/mesa: force depth mode to GL_RED for sized depth/stencil formats

See commit 9db2098d for the i965 version of this.

This fixes depth in a bunch of dEQP EXT_texture_border_clamp tests. And
probably other ones as well.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: mesa-stable@lists.freedesktop.org

egl_dri2: set correct error code if swapbuffers fails

A return value of '-1' means that there was error during swap with a
window drawable, in this case we set error as EGL_BAD_NATIVE_WINDOW.

v2: coding style cleanup, better commit message

Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Cc: "11.0 11.1" <mesa-stable@lists.freedesktop.org
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

egl: move Null check to eglGetSyncAttribKHR to prevent Segfault

Null-check on "*value" is currently done in _eglGetSyncAttrib, which is
after eglGetSyncAttribKHR dereferences it.

Move the check a layer up (in the beginning of eglGetSyncAttribKHR) to
avoid segfaults.

Cc: "11.0 11.1" <mesa-stable@lists.freedesktop.org
Signed-off-by: Dongwon Kim <dongwon.kim@intel.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
[Emil Velikov: tweak commit message, add stable tag]
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

meta/copy_image: use precomputed dst_internal_format to avoid segfault

If the destination is a renderbuffer, dst_tex_image will be NULL. This
fixes the *to_renderbuffer dEQP copy image tests.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Cc: mesa-stable@lists.freedesktop.org

mesa: add GL_OES_texture_stencil8 support

It's basically the same thing as GL_ARB_texture_stencil8 except that
glCopyTexImage isn't supported, so add STENCIL_INDEX to the list of
invalid GLES formats for glCopyTexImage.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Eduardo Lima Mitev <elima@igalia.com>

st/mesa: fix pbo uploads

 - LOD must be provided in .w for TXF (even for buffer textures)
 - User buffer must be valid at draw time
 - Must have a sampler associated with the sampler view

This makes PBO uploads work again on nouveau.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

mesa: check fbo completeness based on internal format, not driver format

The base format is a function of the user-requested format, while the
driver format is not. So we should use the base format instead.

The driver format can be anything. Specifically in the stencil-only
case, it might be a depth/stencil format. However we still want to
refuse such an attachment when bound to GL_DEPTH.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Brian Paul <brianp@vmware.com>

mesa: small optimization of _mesa_expand_bitmap()

Avoid a per-pixel multiply.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

mesa: add special case ubyte[4] / BGRA conversion function

This reduces a glTexImage(GL_RGBA, GL_UNSIGNED_BYTE) hot spot in when
storing the texture as BGRA.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>

st/mesa: implement a simple cache for glDrawPixels

Instead of discarding the texture we created, keep it around in case
the next glDrawPixels draws the same image again.  This is intended
to help application which draw the same image several times in a row,
either within a frame or subsequent frames.

Reviewed-by: Charmaine Lee <charmainel@vmware.com>

llvmpipe: add a few const qualifiers

Reviewed-by: Roland Scheidegger <sroland@vmware.com>

trace: assorted whitespace and formatting fixes

Reviewed-by: Eduardo Lima Mitev <elima@igalia.com>

trace: remove unneeded inline qualifiers

Reviewed-by: Eduardo Lima Mitev <elima@igalia.com>

glsl: fix emit_inline_matrix_constructor for doubles

Specifically, for the case where we initialize a dmat with a source
matrix that has fewer columns/rows.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

glsl: Mark float constants as such

So we don't generate double to float conversion code

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

glsl: fix indentation in emit_inline_matrix_constructor

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

glsl: fix standalone compiler

Need to set some non-zero limits for MaxCombinedUniformComponents,
otherwise we hit an "Too many <type> shader uniform components" error
in the linker.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>

st/mesa: disable depth/stencil/alpha tests in PBO upload

Noticed by Brian Paul.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

svga: allow non-contiguous VS input declarations

This fixes a glDrawPixels regression since b63fe0552b5f.  The new
quad-drawing utility code uses 3 vertex attributes (xyz, rgba, st).
For glDrawPixels path we don't use the rgba attribute so there's a
gap in the TGSI VS input declarations (INPUT[0] = pos, INPUT[2] =
texcoord).  The TGSI->VGPU10 translations code did not handle this
correctly.  I missed this because my VM was configured for HWv11
while testing.

Another way to fix this would be to change the tgsi_scan.c code so
that the tgsi_shader_info::num_inputs (and num_outputs) included
the unused inputs/outputs.  These counts would then actually be
"max input register index + 1" rather than "number of used inputs".
But that change could impact all drivers so put it off for now.

No regressions found with piglit or typical GL apps.

v2: also update alloc_system_value_index() to use info.file_max[]

Reviewed-by: Charmaine Lee <charmainel@vmware.com>

gallivm: Check whether to stop disassemble only for x86

Because the if statement that checks whether we have a return
statement is valid only on x86, surround it with X86 or X86-64
arch defines

Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>

gallivm: use sstream for dissasembling

Currently, disassemble() directly prints to stdout. This has broke the
profiling support for llvmpipe JIT code.

This patch redirects the output to an sstream object, which is then
either gets printed to stdout (for assembly debugging) or gets written
to a file in /tmp/ (for profiling support).

Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>

trace: fix new gcc6 warnings

src/gallium/drivers/trace/tr_context.c:1713:39: warning: ‘rbug_blocker_flags’ defined but not used [-Wunused-const-variable]
 static const struct debug_named_value rbug_blocker_flags[] = {
                                       ^~~~~~~~~~~~~~~~~~

Note that use of rbug_blocker_flags was removed in:

commit 5494332128da0b2826e85df5eeaa878bb5c30a4e
Author: Jakob Bornecrantz <jakob@vmware.com>
Date:   Wed May 12 19:26:19 2010 +0100

    trace: Remove rbug from trace

Signed-off-by: Rob Clark <robdclark@gmail.com>

gallium/auxiliary: fix new gcc6 warnings

src/gallium/auxiliary/pipebuffer/pb_bufmgr_mm.c: In function ‘mm_bufmgr_create_from_buffer’:
src/gallium/auxiliary/pipebuffer/pb_bufmgr_mm.c:288:4:
warning: statement is indented as if it were guarded by... [-Wmisleading-indentation]
    if(mm->map)
    ^~
src/gallium/auxiliary/pipebuffer/pb_bufmgr_mm.c:286:1: note:
...this ‘if’ clause, but it is not
 if(mm->heap)
 ^~

Signed-off-by: Rob Clark <robdclark@gmail.com>

gallium/hud: fix new gcc6 warnings

src/gallium/auxiliary/hud/font.c:234:22: warning: ‘Fixed8x13_Character_159’ defined but not used [-Wunused-const-variable]
 static const GLubyte Fixed8x13_Character_159[] = {  9,  0,  0,  0,  0, 0,  0,170,  0,  0,  0,130,  0,  0,  0,130,  0,  0,  0,130,  0,  0, 0,170,  0,  0,  0,  0,  0};
                      ^~~~~~~~~~~~~~~~~~~~~~~
.... many more..

These are simply unused, just #if 0 them out for now, in case someone
wants to use them in the future.

Signed-off-by: Rob Clark <robdclark@gmail.com>

mesa: fix new gcc6 warnings

src/mesa/main/texstore.c:92:22: warning: ‘map_1032’ defined but not used [-Wunused-const-variable]
 static const GLubyte map_1032[6] = { 1, 0, 3, 2, ZERO, ONE };
                      ^~~~~~~~
src/mesa/main/texstore.c:91:22: warning: ‘map_3210’ defined but not used [-Wunused-const-variable]
 static const GLubyte map_3210[6] = { 3, 2, 1, 0, ZERO, ONE };
                      ^~~~~~~~
src/mesa/main/texstore.c:90:22: warning: ‘map_identity’ defined but not used [-Wunused-const-variable]
 static const GLubyte map_identity[6] = { 0, 1, 2, 3, ZERO, ONE };
                      ^~~~~~~~~~~~

These appear to be unused since:

commit 8ec6534b266549cdc2798e2523bf6753924f6cde
Author:     Iago Toral Quiroga <itoral@igalia.com>
AuthorDate: Wed Oct 15 13:42:11 2014 +0200

    mesa: Use _mesa_format_convert to implement texstore_rgba.

Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

glsl: fix new gcc6 warnings

src/compiler/glsl/lower_discard_flow.cpp:79:1: warning: ‘ir_visitor_status {anonymous}::lower_discard_flow_visitor::visit_enter(ir_loop_jump*)’ defined but not used [-Wunused-function]
 lower_discard_flow_visitor::visit_enter(ir_loop_jump *ir)
 ^~~~~~~~~~~~~~~~~~~~~~~~~~

The base class method that was intended to be overridden was
'visit(ir_loop_jump *ir)', not visit_enter().

Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

glsl: fix new gcc6 warnings

src/compiler/glsl/ast_to_hir.cpp: In function ‘unsigned int ast_process_struct_or_iface_block_members(exec_list*, _mesa_glsl_parse_state*, exec_list*, glsl_struct_field**, bool, glsl_matrix_layout, bool, ir_variable_mode, ast_type_qualifier*,
unsigned int, unsigned int)’:
src/compiler/glsl/ast_to_hir.cpp:6339:52: warning: ‘first_member_has_explicit_location’ may be used uninitialized in this function [-Wmaybe-uninitialized]
             if (!layout->flags.q.explicit_location &&
                 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~
                 ((first_member_has_explicit_location &&
                 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
                   !qual->flags.q.explicit_location) ||
                   ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
                  (!first_member_has_explicit_location &&
                  ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
                   qual->flags.q.explicit_location))) {
                   ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

i965: fix new gcc6 warnings

src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp:244:1: warning:
‘void {anonymous}::fs_copy_prop_dataflow::dump_block_data() const’ defined but not used [-Wunused-function]
 fs_copy_prop_dataflow::dump_block_data() const
 ^~~~~~~~~~~~~~~~~~~~~

From looking at git history, it looks like this is intended to be unused
(ie. just for adding on-demand debug prints)

Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

util: fix new gcc6 warnings

src/util/hash_table.h:111:23: warning: ‘_mesa_fnv32_1a_offset_bias’ defined but not used [-Wunused-const-variable]
 static const uint32_t _mesa_fnv32_1a_offset_bias = 2166136261u;
                       ^~~~~~~~~~~~~~~~~~~~~~~~~~

Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

glcpp: Disallow "defined" as a macro name.

Both GCC and Clang disallow this, and glslang has recently started
disallowing it as well.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94188
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

gallium/cso: only enable compute shaders when TGSI is supported

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94186
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

Android: disable unused-parameter warning

Android builds with -Wunused-parameter enabled which results in spewing
lots of warnings. Disable it so more meaningful warnings are more visible.

Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

Android: enable building on arm64

Use the LOCAL_CFLAGS_{32/64} instead of arch specific variants to define
the DEFAULT_DRIVER_DIR. This enables building for arm64.

Cc: Chih-Wei Huang <cwhuang@android-x86.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

Android: Fix building secondary arch in mixed 32/64-bit builds

TARGET_CC is not defined for the secondary arch on combined 32/64-bit
builds. The build system uses 2ND_TARGET_CC instead and it is not meant
to be used in module makefiles. LOCAL_CC was used to provide C only
flags as -std=c99 is not valid for C++ files. Since Android 4.4,
LOCAL_CONLYFLAGS was added to set compiler flags on C files only, so it
can be used now instead of LOCAL_CC.

This will break on pre-4.4 versions of Android, but it unlikely anyone
is using current Mesa with such an old version of Android.

Cc: Chih-Wei Huang <cwhuang@android-x86.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

egl: android: clean-up config attribute setting

Pass the additional config attributes to dri2_add_config to set them
instead of open coding them. This is in preparation to add more attributes.

Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

egl: android: fix visuals declaration

Signed-off-by: Varad Gautam <varadgautam@gmail.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

Android: fix build break in libmesa_program

Commit 5fd848f6c9ee ("program: Use _mesa_geometric_samples to calculate
gl_NumSamples") broken Android builds. Add the missing include path "main"
to framebuffer.h like other includes in prog_statevars.c.

Cc: Neil Roberts <neil@linux.intel.com>
Cc: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Neil Roberts <neil@linux.intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

mesa: gl_NumSamples should always be at least one

From ARB_sample_shading:

    "gl_NumSamples is the total number of samples in the framebuffer,
     or one if rendering to a non-multisample framebuffer"

So make sure to always pass in at least 1.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Edward O`Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Neil Roberts <neil@linux.intel.com>

compiler/glsl: Fix uniform location counting.

This patch moves the calculation of current uniforms to
link_uniforms, which makes use of UniformRemapTable which
stores all the reserved uniform locations.

Location assignment for implicit uniforms now tries to use
any gaps left in the table after the location assignment
for explicit uniforms. This gives us more space to store more
uniforms.

Patch is based on earlier patch with following changes/additions:

   1: Move the counting of explicit locations to
      check_explicit_uniform_locations and then pass
      the number to link_assign_uniform_locations.
   2: Count the number of empty slots in UniformRemapTable
      and store them in a list_head.
   3: Try to find an empty slot for implicit locations from
      the list, if that fails resize UniformRemapTable.

Fixes following CTS tests:
   ES31-CTS.explicit_uniform_location.uniform-loc-mix-with-implicit-max
   ES31-CTS.explicit_uniform_location.uniform-loc-mix-with-implicit-max-array

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Signed-off-by: Plamena Manolova <plamena.manolova@intel.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93696

gallivm, tgsi: provide fake sample_i_ms implementations

Just like the rest of the msaa "implementation" it's just fake for now...

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>

st/mesa: new st_DrawAtlasBitmaps() function for drawing bitmap text

This basically saves the current pipeline state, sets up state for
rendering, constructs a set of textured quads, renders, then restores
the previous pipeline state.

It shouldn't be hard to implement a similar function for non-gallium
drives.  With some code refactoring, the vertex definition code could
probably be shared.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

mesa: implement a display list / glBitmap texture atlas

This improves the performance of applications which use glXUseXFont()
or wglUseFontBitmaps() and glCallLists() to draw bitmap text.

Basically, we collect all the glBitmap images from the display lists
and put them into a texture atlas.  To render the bitmaps for a
glCallLists() command, we render a set of textured quads where each
quad is textured with one bitmap image.  Actually, the rendering part
has to be done by the Mesa driver or Mesa/gallium state tracker.

Note that GLUT demos that use glutBitmapCharacter() don't benefit
from this.

v2, per Nicolai Hähnle:
- check the max tex rect size is at least 1024.
- add comment in dd.h that texture_rectangle is required.
- in _mesa_DeleteLists(), try to delete the atlas before the list(s)

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

st/mesa: apply DepthMode swizzle to stencil texturing as well

Gallium doesn't present these as GL_RED-style. A swizzle is necessary to
present the proper data in the unused components.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>

i965/skl: Update Skylake renderer strings

Also adds some of the Iris/Pro parts which we previously didn't have named.

v2: 0x192d is gt3, not gt4
Adding some 'e' tags for eDRAM parts

Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
Acked-by: Michał Winiarski <michal.winiarski@intel.com>

i965/skl: Add two missing device IDs

The Iris part is left unbranded because we did not have these with original SKL.

v2: 0x192d is gt3, not gt4

v3: Forgot to update the temporary brand string when I did v2.

Cc: "11.0 11.1" <mesa-stable@lists.freedesktop.org
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
Acked-by: Michał Winiarski <michal.winiarski@intel.com>