Learn CFG cleanup to transform single case switches to gcond.

2017-09-05  Martin Liska  <mliska@suse.cz>

PR tree-optimization/82032
* tree-cfg.c (generate_range_test): New function.
* tree-cfg.h (generate_range_test): Declared here.
* tree-cfgcleanup.c (convert_single_case_switch): New function.
(cleanup_control_expr_graph): Use it.
* tree-switch-conversion.c (try_switch_expansion): Remove
assert.
(emit_case_nodes): Use generate_range_test.
2017-09-05  Martin Liska  <mliska@suse.cz>

PR tree-optimization/82032
* g++.dg/other/pr82032.C: New test.
* gcc.dg/tree-ssa/pr68198.c: Update scanned pattern.
* gcc.dg/tree-ssa/vrp34.c: Likewise.
* gcc.dg/switch-10.c: Likewise.

From-SVN: r251690

Daily bump.

From-SVN: r251689

mpx-os-support.h: New file.

* gcc.target/i386/mpx/mpx-os-support.h: New file.
* gcc.target/i386/mpx/mpx-check.h: Include mpx-os-support.h.

From-SVN: r251683

re PR target/82098 (internal compiler error: in elimination_costs_in_insn, at reload1.c:3616, -march=i686)

PR target/82098
* config/i386/i386.md (*<btsc><mode>_mask): Add
TARGET_USE_BT to insn constraint.
(*btr<mode>_mask): Ditto.

From-SVN: r251682

Fix ldrd offsets

Fix the ldrd offsets of Thumb-2 - for TARGET_LDRD the range is +-1020,
without -252..4096.  This reduces the number of addressing instructions
when using DI mode operations (such as in PR77308).

    gcc/
* config/arm/arm.c (arm_legitimate_index_p): Add comment.
(thumb2_legitimate_index_p): Use correct range for DI/DF mode.

From-SVN: r251681

PR libstdc++/79162 implement LWG 2946 and LWG 2758

2017-09-04  Daniel Kruegler  <daniel.kruegler@gmail.com>

PR libstdc++/79162
Implement LWG 2946, LWG 2758's resolution missed further corrections
* include/bits/basic_string.h (basic_string::compare): Add missing
required noexcept specifications.
(basic_string): Introduce internal _S_to_string_view and __sv_wrapper
for implicit string_view conversion.
(basic_string::basic_string): Fix explicit string_view conversion by
implicit conversion using _S_to_string_view and __sv_wrapper.
(basic_string): Introduce internal basic_string(__sv_wrapper, Alloc)
constructor.
(basic_string): Fix operator=(T) template by operator=(const T&)
template for uncopyable types (PR 79162).
(basic_string::operator+=, basic_string::append, basic_string::assign)
(basic_string::insert, basic_string::replace, basic_string::find)
(basic_string::rfind, basic_string::find_first_of)
(basic_string::find_last_of, basic_string::find_first_not_of)
(basic_string::find_last_not_of, basic_string::compare): Replace
__sv_type argument by template const T& (LWG 2946) and correct
documentation describing __sv_type argument.
(basic_string::find, basic_string::rfind, basic_string::find_first_of)
(basic_string::find_last_of, basic_string::find_first_not_of)
(basic_string::find_last_not_of, basic_string::compare): Replace
unconditional noexcept specification by conditional noexcept
specification to partially balance the removal of noexcept by LWG 2946.
* testsuite/21_strings/basic_string/79162.cc: New.
* testsuite/21_strings/basic_string/lwg2946.cc: New.

From-SVN: r251664

re PR target/77308 (surprisingly large stack usage for sha512 on arm)

2017-09-04  Bernd Edlinger  <bernd.edlinger@hotmail.de>

        PR target/77308
        * config/arm/arm.md (*arm_adddi3, *arm_subdi3): Split early except for
        TARGET_NEON and TARGET_IWMMXT.
        (anddi3, iordi3, xordi3, one_cmpldi2): Split while expanding except for
        TARGET_NEON and TARGET_IWMMXT.
        (*one_cmpldi2_insn): Moved the body of one_cmpldi2 here.

testsuite:
2017-09-04  Bernd Edlinger  <bernd.edlinger@hotmail.de>

        PR target/77308
        * gcc.target/arm/pr77308-1.c: New test.

From-SVN: r251663

* config/i386/i386-protos.h (ix86_tls_address_pattern_p) New prototype.

(ix86_rewrite_tls_address): Ditto.
* config/i386/i386.c (ix86_tls_address_pattern_p) New function.
(ix86_rewrite_tls_address_1): Ditto.
(ix86_rewrite_tls_address): Ditto.
* config/i386/predicates.md (tls_address_pattern): New predicate.
* config/i386/i386.md (TLS address splitter): New splitter.

From-SVN: r251662

re PR c++/82084 (ICE: constructing wstring with -O3)

2017-09-04  Richard Biener  <rguenther@suse.de>

PR tree-optimization/82084
* fold-const.h (can_native_encode_string_p): Declare.
* fold-const.c (can_native_encode_string_p): Factor out from ...
(native_encode_string): ... here.
* tree-vect-stmts.c (vectorizable_store): Call it to avoid
vectorizing stores from constants we later cannot handle.

* g++.dg/torture/pr82084.C: New testcase.

From-SVN: r251661

re PR c/81783 (-Wtautological-compare could do better)

PR c/81783
* c-warn.c (warn_tautological_bitwise_comparison): New function.
(warn_tautological_cmp): Call it.

* doc/invoke.texi: Update -Wtautological-compare documentation.

* c-c++-common/Wtautological-compare-5.c: New test.

From-SVN: r251660

re PR tree-optimization/64910 (tree reassociation results in poor code)

2017-09-03  Jeff Law  <law@redhat.com>

PR tree-optimization/64910
* tree-ssa-reassoc.c (reassociate_bb): For bitwise binary ops,
swap the first and last operand if the last is a constant.

PR tree-optimization/64910
* gcc.dg/tree-ssa/pr64910-2.c: New test.

From-SVN: r251659

re PR sanitizer/82072 (sanitizer does not detect an overflow from LLONG_MIN)

PR sanitizer/82072
* convert.c (do_narrow): When sanitizing signed integer overflows,
bail out for signed types.
(convert_to_integer_1) <case NEGATE_EXPR>: Likewise.

* c-c++-common/ubsan/pr82072.c: New test.

From-SVN: r251651

re PR tree-optimization/82060 (ICE in refs_may_alias_p_1 with devirtualization enabled)

2017-09-04  Richard Biener  <rguenther@suse.de>

PR tree-optimization/82060
* tree-ssa-pre.c (eliminate_dom_walker::before_dom_children):
Move devirtualization after stmt folding and before EH/AB/noreturn
cleanup to get the stmt refs canonicalized.  Use a bool instead
of gimple_modified_p since that doesn't work for NOPs.  Schedule
NOPs generated by folding for removal.

* g++.dg/torture/pr82060.C: New testcase.

From-SVN: r251650

Turn FUNCTION_ARG_PADDING into a target hook

This involved renaming the rather general-sounding "enum direction" to
"enum pad_direction" to avoid a conflict with the Fortran frontend.

2017-09-04  Richard Sandiford  <richard.sandiford@linaro.org>
    Alan Hayward  <alan.hayward@arm.com>
    David Sherwood  <david.sherwood@arm.com>

gcc/
* coretypes.h (pad_direction): New enum.
* defaults.h (DEFAULT_FUNCTION_ARG_PADDING): Delete.
(FUNCTION_ARG_PADDING): Likewise.
* target.def (function_arg_padding): New hook.
* targhooks.h (default_function_arg_padding): Declare.
* targhooks.c (default_function_arg_padding): New function.
* doc/tm.texi.in (FUNCTION_ARG_PADDING): Replace with...
(TARGET_FUNCTION_ARG_PADDING): ...this.
* doc/tm.texi: Regenerate.
* calls.c (store_unaligned_arguments_into_pseudos): Use pad_direction
instead of direction.
(compute_argument_addresses): Likewise.
(load_register_parameters): Likewise.
(emit_library_call_value_1): Likewise.
(store_one_arg): Use targetm.calls.function_arg_padding instead
of FUNCTION_ARG_PADDING.
(must_pass_in_stack_var_size_or_pad): Likewise.
* expr.c (emit_group_load_1): Use pad_direction instead of direction.
(emit_group_store): Likewise.
(emit_single_push_insn_1): Use targetm.calls.function_arg_padding
instead of FUNCTION_ARG_PADDING.
(emit_push_insn): Likewise, and propagate enum change throughout
function.
* function.h (direction): Delete.
(locate_and_pad_arg_data::where_pad): Use pad_direction instead
of direction.
* function.c (assign_parm_find_stack_rtl): Likewise.
(assign_parm_setup_block_p): Likewise.
(assign_parm_setup_block): Likewise.
(gimplify_parameters): Likewise.
(locate_and_pad_parm): Use targetm.calls.function_arg_padding
instead of FUNCTION_ARG_PADDING, and propagate enum change throughout
function.
* config/aarch64/aarch64.h (FUNCTION_ARG_PADDING): Delete.
(BLOCK_REG_PADDING): Use pad_direction instead of direction.
* config/aarch64/aarch64-protos.h (aarch64_pad_arg_upward): Delete.
* config/aarch64/aarch64.c (aarch64_pad_arg_upward): Replace with...
(aarch64_function_arg_padding): ...this new function.
(aarch64_gimplify_va_arg_expr): Use pad_direction instead of direction.
(TARGET_FUNCTION_ARG_PADDING): Redefine.
* config/arm/arm.h (FUNCTION_ARG_PADDING): Delete.
(BLOCK_REG_PADDING): Use pad_direction instead of direction.
* config/arm/arm-protos.h (arm_pad_arg_upward): Delete.
* config/arm/arm.c (TARGET_FUNCTION_ARG_PADDING): Redefine.
(arm_pad_arg_upward): Replace with...
(arm_function_arg_padding): ...this new function.
* config/c6x/c6x.h (BLOCK_REG_PADDING): Use pad_direction instead
of direction.
* config/ia64/hpux.h (FUNCTION_ARG_PADDING): Delete.
* config/ia64/ia64-protos.h (ia64_hpux_function_arg_padding): Delete.
* config/ia64/ia64.c (TARGET_FUNCTION_ARG_PADDING): Redefine.
(ia64_hpux_function_arg_padding): Replace with...
(ia64_function_arg_padding): ...this new function.  Use pad_direction
instead of direction.  Check for TARGET_HPUX.
* config/iq2000/iq2000.h (FUNCTION_ARG_PADDING): Delete.
* config/iq2000/iq2000.c (TARGET_FUNCTION_ARG_PADDING): Redefine.
(iq2000_function_arg_padding): New function.
* config/mips/mips-protos.h (mips_pad_arg_upward): Delete.
* config/mips/mips.c (mips_pad_arg_upward): Replace with...
(mips_function_arg_padding): ...this new function.
(mips_pad_reg_upward): Update accordingly.
(TARGET_FUNCTION_ARG_PADDING): Redefine.
* config/mips/mips.h (PAD_VARARGS_DOWN): Use
targetm.calls.function_arg_padding.
(FUNCTION_ARG_PADDING): Delete.
(BLOCK_REG_PADDING): Use pad_direction instead of direction.
* config/nios2/nios2.h (FUNCTION_ARG_PADDING): Delete.
(PAD_VARARGS_DOWN): Use targetm.calls.function_arg_padding.
* config/nios2/nios2-protos.h (nios2_function_arg_padding): Delete.
(nios2_block_reg_padding): Return pad_direction instead of direction.
* config/nios2/nios2.c (nios2_block_reg_padding): Return pad_direction
instead of direction.
(nios2_function_arg_padding): Likewise.  Make static.
(TARGET_FUNCTION_ARG_PADDING): Redefine.
* config/pa/pa.h (FUNCTION_ARG_PADDING): Delete.
(BLOCK_REG_PADDING): Use targetm.calls.function_arg_padding.
* config/pa/pa-protos.h (pa_function_arg_padding): Delete.
* config/pa/pa.c (TARGET_FUNCTION_ARG_PADDING): Redefine.
(pa_function_arg_padding): Make static.  Return pad_direction instead
of direction.
* config/powerpcspe/powerpcspe.h (FUNCTION_ARG_PADDING): Delete.
(PAD_VARARGS_DOWN): Use targetm.calls.function_arg_padding.
* config/powerpcspe/aix.h (BLOCK_REG_PADDING): Use pad_direction
instead of direction.  Use targetm.calls.function_arg_padding.
* config/powerpcspe/darwin.h (BLOCK_REG_PADDING): Likewise.
* config/powerpcspe/freebsd64.h (BLOCK_REG_PADDING): Likewise.
* config/powerpcspe/linux64.h (BLOCK_REG_PADDING): Likewise.
* config/powerpcspe/powerpcspe-protos.h (function_arg_padding): Delete.
* config/powerpcspe/powerpcspe.c (TARGET_FUNCTION_ARG_PADDING):
Redefine.
(function_arg_padding): Rename to...
(rs6000_function_arg_padding): ...this.  Make static.  Return
pad_direction instead of direction.
(rs6000_return_in_msb): Use rs6000_function_arg_padding.
* config/rs6000/rs6000.h (FUNCTION_ARG_PADDING): Delete.
(PAD_VARARGS_DOWN): Use targetm.calls.function_arg_padding.
* config/rs6000/aix.h (BLOCK_REG_PADDING): Use pad_direction
instead of direction.  Use targetm.calls.function_arg_padding.
* config/rs6000/darwin.h (BLOCK_REG_PADDING): Likewise.
* config/rs6000/freebsd64.h (BLOCK_REG_PADDING): Likewise.
* config/rs6000/linux64.h (BLOCK_REG_PADDING): Likewise.
* config/rs6000/rs6000-protos.h (function_arg_padding): Delete.
* config/rs6000/rs6000.c (TARGET_FUNCTION_ARG_PADDING): Redefine.
(function_arg_padding): Rename to...
(rs6000_function_arg_padding): ...this.  Make static.  Return
pad_direction instead of direction.
(rs6000_return_in_msb): Use rs6000_function_arg_padding.
* config/s390/s390.h (FUNCTION_ARG_PADDING): Delete.
* config/s390/s390.c (s390_function_arg_padding): New function.
(TARGET_FUNCTION_ARG_PADDING): Redefine.
* config/sparc/sparc.h (FUNCTION_ARG_PADDING): Delete.
* config/sparc/sparc-protos.h (function_arg_padding): Delete.
* config/sparc/sparc.c (TARGET_FUNCTION_ARG_PADDING): Redefine.
(function_arg_padding): Rename to...
(sparc_function_arg_padding): ...this.  Make static.  Return
pad_direction instead of direction.
* config/spu/spu.h (FUNCTION_ARG_PADDING): Delete.
* config/spu/spu.c (spu_function_arg_padding): New function.
(TARGET_FUNCTION_ARG_PADDING): Redefine.
* system.h (FUNCTION_ARG_PADDING): Poison.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251648

Turn MODES_TIEABLE_P into a target hook

2017-09-04  Richard Sandiford  <richard.sandiford@linaro.org>
    Alan Hayward  <alan.hayward@arm.com>
    David Sherwood  <david.sherwood@arm.com>

gcc/
* target.def (modes_tieable_p): New hook.
* doc/tm.texi (MODES_TIEABLE_P): Replace with...
(TARGET_MODES_TIEABLE_P): ...this.
* doc/tm.texi.in: Regenerate.
* hooks.h (hook_bool_mode_mode_true): Declare.
* hooks.c (hook_bool_mode_mode_true): New function.
* combine.c (subst): Use targetm.modes_tieable_p instead of
MODES_TIEABLE_P.
* dse.c (find_shift_sequence): Likewise.
* expmed.c (extract_low_bits): Likewise.
* lower-subreg.c: Include target.h.
(find_decomposable_subregs): Use targetm.modes_tieable_p instead of
MODES_TIEABLE_P.
* rtlanal.c (rtx_cost): Likewise.
* config/aarch64/aarch64.h (MODES_TIEABLE_P): Delete.
* config/aarch64/aarch64-protos.h (aarch64_modes_tieable_p): Delete.
* config/aarch64/aarch64.c (aarch64_modes_tieable_p): Make static.
(TARGET_MODES_TIEABLE_P): Redefine.
* config/alpha/alpha.h (MODES_TIEABLE_P): Delete.
* config/alpha/alpha.c (alpha_modes_tieable_p): New function.
(TARGET_MODES_TIEABLE_P): Redefine.
* config/arc/arc.h (MODES_TIEABLE_P): Delete.
* config/arc/arc.c (TARGET_MODES_TIEABLE_P): Redefine.
(arc_modes_tieable_p): New function.
* config/arm/arm.h (MODES_TIEABLE_P): Delete.
* config/arm/arm-protos.h (arm_modes_tieable_p): Delete.
* config/arm/arm.c (TARGET_MODES_TIEABLE_P): Redefine.
(arm_modes_tieable_p): Make static.
* config/avr/avr.h (MODES_TIEABLE_P): Delete.
* config/bfin/bfin.h (MODES_TIEABLE_P): Delete.
* config/bfin/bfin.c (bfin_modes_tieable_p): New function.
(TARGET_MODES_TIEABLE_P): Redefine.
* config/c6x/c6x.h (MODES_TIEABLE_P): Delete.
* config/c6x/c6x.c (c6x_modes_tieable_p): New function.
(TARGET_MODES_TIEABLE_P): Redefine.
* config/cr16/cr16.h (MODES_TIEABLE_P): Delete.
* config/cr16/cr16.c (TARGET_MODES_TIEABLE_P): Redefine.
(cr16_modes_tieable_p): New function.
* config/cris/cris.h (MODES_TIEABLE_P): Delete.
* config/epiphany/epiphany.h (MODES_TIEABLE_P): Delete.
* config/fr30/fr30.h (MODES_TIEABLE_P): Delete.
(TRULY_NOOP_TRUNCATION): Update comment.
* config/frv/frv.h (MODES_TIEABLE_P): Delete.
(TRULY_NOOP_TRUNCATION): Update comment.
* config/frv/frv.c (TARGET_MODES_TIEABLE_P): Redefine.
(frv_modes_tieable_p): New function.
* config/ft32/ft32.h (MODES_TIEABLE_P): Delete.
* config/h8300/h8300.h (MODES_TIEABLE_P): Delete.
* config/h8300/h8300.c (h8300_modes_tieable_p): New function.
(TARGET_MODES_TIEABLE_P): Redefine.
* config/i386/i386.h (MODES_TIEABLE_P): Delete.
* config/i386/i386-protos.h (ix86_modes_tieable_p): Delete.
* config/i386/i386.c (ix86_modes_tieable_p): Make static.
(TARGET_MODES_TIEABLE_P): Redefine.
* config/ia64/ia64.h (MODES_TIEABLE_P): Delete.
* config/ia64/ia64.c (TARGET_MODES_TIEABLE_P): Redefine.
(ia64_modes_tieable_p): New function.
* config/iq2000/iq2000.h (MODES_TIEABLE_P): Delete.
* config/iq2000/iq2000.c (TARGET_MODES_TIEABLE_P): Redefine.
(iq2000_modes_tieable_p): New function.
* config/lm32/lm32.h (MODES_TIEABLE_P): Delete.
* config/lm32/lm32.c (TARGET_MODES_TIEABLE_P): Redefine.
(lm32_modes_tieable_p): New function.
* config/m32c/m32c.h (MODES_TIEABLE_P): Delete.
* config/m32c/m32c-protos.h (m32c_modes_tieable_p): Delete.
* config/m32c/m32c.c (m32c_modes_tieable_p): Make static.
(TARGET_MODES_TIEABLE_P): Redefine.
* config/m32r/m32r.h (MODES_TIEABLE_P): Delete.
* config/m32r/m32r.c (TARGET_MODES_TIEABLE_P): Redefine.
(m32r_modes_tieable_p): New function.
* config/m68k/m68k.h (MODES_TIEABLE_P): Delete.
* config/m68k/m68k.c (TARGET_MODES_TIEABLE_P): Redefine.
(m68k_modes_tieable_p): New function.
* config/mcore/mcore.h (MODES_TIEABLE_P): Delete.
* config/mcore/mcore.c (TARGET_MODES_TIEABLE_P): Redefine.
(mcore_modes_tieable_p): New function.
* config/microblaze/microblaze.h (MODES_TIEABLE_P): Delete.
* config/microblaze/microblaze.c (microblaze_modes_tieable_p): New
function.
(TARGET_MODES_TIEABLE_P): Redefine.
* config/mips/mips.h (MODES_TIEABLE_P): Delete.
* config/mips/mips-protos.h (mips_modes_tieable_p): Delete.
* config/mips/mips.c (mips_modes_tieable_p): Make static.
(TARGET_MODES_TIEABLE_P): Redefine.
* config/mmix/mmix.h (MODES_TIEABLE_P): Delete.
* config/mn10300/mn10300.h (MODES_TIEABLE_P): Delete.
* config/mn10300/mn10300-protos.h (mn10300_modes_tieable): Delete.
* config/mn10300/mn10300.c (mn10300_modes_tieable): Rename to...
(mn10300_modes_tieable_p): ...this and make static.
(TARGET_MODES_TIEABLE_P): Redefine.
* config/moxie/moxie.h (MODES_TIEABLE_P): Delete.
* config/msp430/msp430.h (MODES_TIEABLE_P): Delete.
* config/msp430/msp430-protos.h (msp430_modes_tieable_p): Delete.
* config/msp430/msp430.c (TARGET_MODES_TIEABLE_P): Redefine.
(msp430_modes_tieable_p): Make static.
* config/nds32/nds32.h (MODES_TIEABLE_P): Delete.
* config/nds32/nds32.c (nds32_modes_tieable_p): New function.
(TARGET_MODES_TIEABLE_P): Redefine.
* config/nios2/nios2.h (MODES_TIEABLE_P): Delete.
* config/nvptx/nvptx.h (MODES_TIEABLE_P): Delete.
* config/nvptx/nvptx.c (nvptx_modes_tieable_p): New function.
(TARGET_MODES_TIEABLE_P): Redefine.
* config/pa/pa.h (MODES_TIEABLE_P): Delete.
* config/pa/pa-protos.h (pa_modes_tieable_p): Delete.
* config/pa/pa.c (pa_modes_tieable_p): Make static.
(TARGET_MODES_TIEABLE_P): Redefine.
* config/pdp11/pdp11.h (MODES_TIEABLE_P): Delete.
* config/pdp11/pdp11.c (TARGET_MODES_TIEABLE_P): Redefine.
(pdp11_modes_tieable_p): New function.
* config/powerpcspe/powerpcspe.h (MODES_TIEABLE_P): Delete.
* config/powerpcspe/powerpcspe.c (TARGET_MODES_TIEABLE_P): Redefine.
(rs6000_modes_tieable_p): New function.
(rs6000_debug_reg_global): Use it instead of MODES_TIEABLE_P.
* config/powerpcspe/powerpcspe.md: Update comment.
* config/riscv/riscv.h (MODES_TIEABLE_P): Delete.
* config/riscv/riscv.c (riscv_modes_tieable_p): New function.
(TARGET_MODES_TIEABLE_P): Redefine.
* config/rl78/rl78.h (MODES_TIEABLE_P): Delete.
* config/rl78/rl78.c (TARGET_MODES_TIEABLE_P): Redefine.
(rl78_modes_tieable_p): New function.
* config/rs6000/rs6000.h (MODES_TIEABLE_P): Delete.
* config/rs6000/rs6000.c (TARGET_MODES_TIEABLE_P): Redefine.
(rs6000_modes_tieable_p): New function.
(rs6000_debug_reg_global): Use it instead of MODES_TIEABLE_P.
* config/rs6000/rs6000.md: Update comment.
* config/rx/rx.h (MODES_TIEABLE_P): Delete.
* config/rx/rx.c (rx_modes_tieable_p): New function.
(TARGET_MODES_TIEABLE_P): Redefine.
* config/s390/s390.h (MODES_TIEABLE_P): Delete.
* config/s390/s390.c (s390_modes_tieable_p): New function.
(TARGET_MODES_TIEABLE_P): Redefine.
* config/sh/sh.h (MODES_TIEABLE_P): Delete.
* config/sh/sh.c (TARGET_MODES_TIEABLE_P): Redefine.
(sh_modes_tieable_p): New function.
* config/sparc/sparc.h (MODES_TIEABLE_P): Delete.
* config/sparc/sparc-protos.h (sparc_modes_tieable_p): Delete.
* config/sparc/sparc.c (TARGET_MODES_TIEABLE_P): Redefine.
(sparc_modes_tieable_p): Make static.
* config/spu/spu.h (MODES_TIEABLE_P): Delete.
* config/spu/spu.c (spu_modes_tieable_p): New function.
(TARGET_MODES_TIEABLE_P): Redefine.
* config/stormy16/stormy16.h (MODES_TIEABLE_P): Delete.
* config/stormy16/stormy16.c (xstormy16_modes_tieable_p): New function.
(TARGET_MODES_TIEABLE_P): Redefine.
* config/tilegx/tilegx.h (MODES_TIEABLE_P): Delete.
* config/tilepro/tilepro.h (MODES_TIEABLE_P): Delete.
* config/v850/v850.h (MODES_TIEABLE_P): Delete.
* config/v850/v850.c (v850_modes_tieable_p): New function.
(TARGET_MODES_TIEABLE_P): Redefine.
* config/vax/vax.h (MODES_TIEABLE_P): Delete.
* config/visium/visium.h (MODES_TIEABLE_P): Delete.
* config/visium/visium.c (TARGET_MODES_TIEABLE_P): Redefine.
(visium_modes_tieable_p): New function.
* config/xtensa/xtensa.h (MODES_TIEABLE_P): Delete.
* config/xtensa/xtensa.c (TARGET_MODES_TIEABLE_P): Redefine.
(xtensa_modes_tieable_p): New function.
* system.h (MODES_TIEABLE_P): Poison.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251647

Turn HARD_REGNO_MODE_OK into a target hook

2017-09-04  Richard Sandiford  <richard.sandiford@linaro.org>
    Alan Hayward  <alan.hayward@arm.com>
    David Sherwood  <david.sherwood@arm.com>

gcc/
* target.def (hard_regno_mode_ok): New hook.
* doc/tm.texi (HARD_REGNO_MODE_OK): Replace with...
(TARGET_HARD_REGNO_MODE_OK): ...this.
* doc/tm.texi.in: Regenerate.
* hooks.h (hook_bool_uint_mode_true): Declare.
* hooks.c (hook_bool_uint_mode_true): New function.
* doc/md.texi: Refer to targetm.hard_regno_mode_ok instead of
HARD_REGNO_MODE_OK.
* genpreds.c (write_insn_preds_c): Add an include of target.h.
* alias.c (init_alias_target): Use targetm.hard_regno_mode_ok
instead of HARD_REGNO_MODE_OK.
* caller-save.c: Include target.h.
(reg_save_code): Use targetm.hard_regno_mode_ok instead of
HARD_REGNO_MODE_OK.
* combine.c (can_combine_p): Likewise.
(combinable_i3pat): Likewise.
(can_change_dest_mode): Likewise.
* expr.c (init_expr_target): Likewise.
(convert_move): Likewise.
(convert_modes): Likewise.
* ira.c (setup_prohibited_class_mode_regs): Likewise.
(setup_prohibited_mode_move_regs): Likewise.
* ira.h (target_ira): Likewise.
* lra-assigns.c (find_hard_regno_for_1): Likewise.
* lra-constraints.c (process_alt_operands): Likewise.
(split_reg): Likewise.
* recog.c (peep2_find_free_register): Likewise.
* ree.c (combine_reaching_defs): Likewise.
* regcprop.c (maybe_mode_change): Likewise.
* reginfo.c (init_reg_sets_1): Likewise.
(choose_hard_reg_mode): Likewise.
(simplifiable_subregs): Likewise.
* regrename.c (check_new_reg_p): Likewise.
* reload.c (find_valid_class): Likewise.
(find_valid_class_1): Likewise.
(reload_inner_reg_of_subreg): Likewise.
(push_reload): Likewise.
(combine_reloads): Likewise.
(find_dummy_reload): Likewise.
(find_reloads): Likewise.
* reload1.c (find_reg): Likewise.
(set_reload_reg): Likewise.
(allocate_reload_reg): Likewise.
(choose_reload_regs): Likewise.
(reload_adjust_reg_for_temp): Likewise.
* rtlanal.c (subreg_size_offset_from_lsb): Likewise.
(simplify_subreg_regno): Likewise.
* sel-sched.c (init_regs_for_mode): Likewise.
* varasm.c (make_decl_rtl): Likewise.
* config/aarch64/aarch64.h (HARD_REGNO_MODE_OK): Delete.
(MODES_TIEABLE_P): Use targetm.hard_regno_mode_ok instead of
HARD_REGNO_MODE_OK.
* config/aarch64/aarch64-protos.h (aarch64_hard_regno_mode_ok): Delete.
* config/aarch64/aarch64.c (aarch64_hard_regno_mode_ok): Make static.
(TARGET_HARD_REGNO_MODE_OK): Redefine.
* config/alpha/alpha.h (HARD_REGNO_MODE_OK): Delete.
* config/alpha/alpha.c (alpha_hard_regno_mode_ok): New function.
(TARGET_HARD_REGNO_MODE_OK): Redefine.
* config/arc/arc.h (arc_hard_regno_mode_ok): Delete.
(arc_mode_class): Delete.
(HARD_REGNO_MODE_OK): Delete.
* config/arc/arc.c (TARGET_HARD_REGNO_MODE_OK): Redefine.
(arc_hard_regno_mode_ok): Rename old array to...
(arc_hard_regno_mode_ok_modes): ...this.
(arc_conditional_register_usage): Update accordingly.
(arc_mode_class): Make static.
(arc_hard_regno_mode_ok): New function.
* config/arm/arm.h (HARD_REGNO_MODE_OK): Delete.
* config/arm/arm-protos.h (arm_hard_regno_mode_ok): Delete.
* config/arm/arm.c (TARGET_HARD_REGNO_MODE_OK): Redefine.
(arm_hard_regno_mode_ok): Make static.
* config/arm/arm.md (movdi): Use targetm.hard_regno_mode_ok instead of
HARD_REGNO_MODE_OK.
* config/avr/avr-protos.h (avr_hard_regno_mode_ok): Delete.
* config/avr/avr.h (HARD_REGNO_MODE_OK): Delete.
* config/avr/avr.c (avr_hard_regno_mode_ok): Make static and
return a bool.
(TARGET_HARD_REGNO_MODE_OK): Redefine.
* config/bfin/bfin-protos.h (hard_regno_mode_ok): Delete.
* config/bfin/bfin.h (HARD_REGNO_MODE_OK): Delete.
* config/bfin/bfin.c (hard_regno_mode_ok): Rename to...
(bfin_hard_regno_mode_ok): ...this.  Make static and return a bool.
(TARGET_HARD_REGNO_MODE_OK): Redefine.
* config/bfin/predicates.md (valid_reg_operand): Use
targetm.hard_regno_mode_ok instead of HARD_REGNO_MODE_OK.
* config/c6x/c6x.h (HARD_REGNO_MODE_OK): Delete.
* config/c6x/c6x.c (c6x_hard_regno_mode_ok): New function.
(TARGET_HARD_REGNO_MODE_OK): Redefine.
* config/cr16/cr16.h (HARD_REGNO_MODE_OK): Delete.
* config/cr16/cr16-protos.h (cr16_hard_regno_mode_ok): Delete.
* config/cr16/cr16.c (TARGET_HARD_REGNO_MODE_OK): Redefine.
(cr16_hard_regno_mode_ok): Make static and return a bool.
* config/cris/cris.h (HARD_REGNO_MODE_OK): Delete.
* config/cris/cris.c (TARGET_HARD_REGNO_MODE_OK): Redefine.
(cris_hard_regno_mode_ok): New function.
* config/epiphany/epiphany.h (epiphany_hard_regno_mode_ok): Delete.
(epiphany_mode_class): Delete.
(HARD_REGNO_MODE_OK): Delete.
* config/epiphany/epiphany-protos.h (hard_regno_mode_ok): Delete.
* config/epiphany/epiphany.c (TARGET_HARD_REGNO_MODE_OK): Redefine.
(hard_regno_mode_ok): Rename to...
(epiphany_hard_regno_mode_ok): ...this.  Make static and return a bool.
* config/fr30/fr30.h (HARD_REGNO_MODE_OK): Delete.
* config/fr30/fr30.md: Refer to targetm.hard_regno_mode_ok instead of
HARD_REGNO_MODE_OK.
* config/frv/frv.h (HARD_REGNO_MODE_OK): Delete.
* config/frv/frv-protos.h (frv_hard_regno_mode_ok): Delete.
* config/frv/frv.c (TARGET_HARD_REGNO_MODE_OK): Redefine.
(frv_hard_regno_mode_ok): Make static and return a bool.
* config/frv/frv.md: Refer to targetm.hard_regno_mode_ok instead of
HARD_REGNO_MODE_OK.
* config/ft32/ft32.h (HARD_REGNO_MODE_OK): Delete.
* config/h8300/h8300.h (HARD_REGNO_MODE_OK): Delete.
* config/h8300/h8300-protos.h (h8300_hard_regno_mode_ok): Delete.
* config/h8300/h8300.c (h8300_hard_regno_mode_ok): Make static
and return a bool.
(TARGET_HARD_REGNO_MODE_OK): Redefine.
* config/i386/i386.h (HARD_REGNO_MODE_OK): Delete.
* config/i386/i386-protos.h (ix86_hard_regno_mode_ok): Delete.
* config/i386/i386.c (ix86_hard_regno_mode_ok): Make static and
return a bool.
(TARGET_HARD_REGNO_MODE_OK): Redefine.
* config/ia64/ia64.h (HARD_REGNO_MODE_OK): Delete.
* config/ia64/ia64.c (TARGET_HARD_REGNO_MODE_OK): Redefine.
(ia64_hard_regno_mode_ok): New function.
* config/iq2000/iq2000.h (HARD_REGNO_MODE_OK): Delete.
* config/iq2000/iq2000.c (TARGET_HARD_REGNO_MODE_OK): Redefine.
(iq2000_hard_regno_mode_ok): New function.
* config/lm32/lm32.h (HARD_REGNO_MODE_OK): Delete.
* config/lm32/lm32.c (TARGET_HARD_REGNO_MODE_OK): Redefine.
(lm32_hard_regno_mode_ok): New function.
* config/m32c/m32c.h (HARD_REGNO_MODE_OK): Delete.
* config/m32c/m32c-protos.h (m32c_hard_regno_ok): Delete.
* config/m32c/m32c.c (class_can_hold_mode): Use m32c_hard_regno_mode_ok
instead of HARD_REGNO_MODE_OK.
(m32c_hard_regno_ok): Rename to...
(m32c_hard_regno_mode_ok): ...this.  Make static and return a bool.
(m32c_cannot_change_mode_class): Update accordingly.
(TARGET_HARD_REGNO_MODE_OK): Redefine.
* config/m32r/m32r.h (m32r_hard_regno_mode_ok): Delete.
(m32r_mode_class): Delete.
(HARD_REGNO_MODE_OK): Delete.
* config/m32r/m32r.c (TARGET_HARD_REGNO_MODE_OK): Redefine.
(m32r_hard_regno_mode_ok): Rename to...
(m32r_hard_regno_modes): ...this.
(m32r_mode_class): Make static.
(m32r_hard_regno_mode_ok): New function.
* config/m68k/m68k.h (HARD_REGNO_MODE_OK): Delete.
* config/m68k/m68k-protos.h (m68k_regno_mode_ok): Delete.
* config/m68k/m68k.c (TARGET_HARD_REGNO_MODE_OK): Redefine.
(m68k_hard_regno_mode_ok): Make static.
* config/mcore/mcore.h (HARD_REGNO_MODE_OK): Delete.
* config/mcore/mcore.c (TARGET_HARD_REGNO_MODE_OK): Redefine.
(mcore_hard_regno_mode_ok): New function.
* config/microblaze/microblaze.h (microblaze_hard_regno_mode_ok)
(HARD_REGNO_MODE_OK): Delete.
* config/microblaze/microblaze.c (microblaze_hard_regno_mode_ok):
Rename to...
(microblaze_hard_regno_mode_ok_p): ...this and make static.
(microblaze_hard_regno_mode_ok): New function.
(TARGET_HARD_REGNO_MODE_OK): Redefine.
* config/mips/mips.h (HARD_REGNO_MODE_OK): Delete.
(mips_hard_regno_mode_ok): Delete.
* config/mips/mips.c (mips_hard_regno_mode_ok): Rename to...
(mips_hard_regno_mode_ok_p): ...this and make static.
(mips_hard_regno_mode_ok_p): Rename to...
(mips_hard_regno_mode_ok_uncached): ...this.
(mips_hard_regno_mode_ok): New function.
(mips_class_max_nregs): Use mips_hard_regno_mode_ok instead
of HARD_REGNO_MODE_OK.
(mips_option_override): Update after above name changes.
(TARGET_HARD_REGNO_MODE_OK): Redefine.
* config/mmix/mmix.h (HARD_REGNO_MODE_OK): Delete.
* config/mn10300/mn10300.h (HARD_REGNO_MODE_OK): Delete.
* config/mn10300/mn10300-protos.h (mn10300_hard_regno_mode_ok): Delete.
* config/mn10300/mn10300.c (mn10300_hard_regno_mode_ok): Make static.
(TARGET_HARD_REGNO_MODE_OK): Redefine.
* config/moxie/moxie.h (HARD_REGNO_MODE_OK): Delete.
* config/msp430/msp430.h (HARD_REGNO_MODE_OK): Delete.
* config/msp430/msp430-protos.h (msp430_hard_regno_mode_ok): Delete.
* config/msp430/msp430.c (TARGET_HARD_REGNO_MODE_OK): Redefine.
(msp430_hard_regno_mode_ok): Make static and return a bool.
* config/nds32/nds32.h (HARD_REGNO_MODE_OK): Delete.
* config/nds32/nds32-protos.h (nds32_hard_regno_mode_ok): Delete.
* config/nds32/nds32.c (nds32_hard_regno_mode_ok): Make static
and return a bool.
(TARGET_HARD_REGNO_MODE_OK): Redefine.
* config/nios2/nios2.h (HARD_REGNO_MODE_OK): Delete.
* config/nvptx/nvptx.h (HARD_REGNO_MODE_OK): Delete.
* config/pa/pa.h (MODES_TIEABLE_P): Update commentary.
* config/pa/pa32-regs.h (HARD_REGNO_MODE_OK): Rename to...
(PA_HARD_REGNO_MODE_OK): ...this
* config/pa/pa64-regs.h (HARD_REGNO_MODE_OK): Rename to...
(PA_HARD_REGNO_MODE_OK): ...this.
* config/pa/pa.c (TARGET_HARD_REGNO_MODE_OK): Redefine.
(pa_hard_regno_mode_ok): New function.
* config/pdp11/pdp11.h (HARD_REGNO_MODE_OK): Delete.
* config/pdp11/pdp11.c (TARGET_HARD_REGNO_MODE_OK): Redefine.
(pdp11_hard_regno_mode_ok): New function.
* config/powerpcspe/powerpcspe.h (HARD_REGNO_MODE_OK): Delete.
* config/powerpcspe/powerpcspe-protos.h (rs6000_hard_regno_mode_ok_p):
Delete.
* config/powerpcspe/powerpcspe.c (rs6000_hard_regno_mode_ok_p):
Make static.
(TARGET_HARD_REGNO_MODE_OK): Redefine.
(rs6000_hard_regno_mode_ok): Rename to...
(rs6000_hard_regno_mode_ok_uncached): ...this.
(rs6000_init_hard_regno_mode_ok): Update accordingly.
(rs6000_hard_regno_mode_ok): New function.
* config/riscv/riscv.h (HARD_REGNO_MODE_OK): Delete.
* config/riscv/riscv-protos.h (riscv_hard_regno_mode_ok_p): Delete.
* config/riscv/riscv.c (riscv_hard_regno_mode_ok_p): Rename to...
(riscv_hard_regno_mode_ok): ...this and make static.
(TARGET_HARD_REGNO_MODE_OK): Redefine.
* config/rl78/rl78.h (HARD_REGNO_MODE_OK): Delete.
* config/rl78/rl78-protos.h (rl78_hard_regno_mode_ok): Delete.
* config/rl78/rl78.c (TARGET_HARD_REGNO_MODE_OK): Redefine.
(rl78_hard_regno_mode_ok): Make static and return bool.
* config/rs6000/rs6000.h (HARD_REGNO_MODE_OK): Delete.
* config/rs6000/rs6000-protos.h (rs6000_hard_regno_mode_ok_p):
Delete.
* config/rs6000/rs6000.c (rs6000_hard_regno_mode_ok_p): Make static.
(TARGET_HARD_REGNO_MODE_OK): Redefine.
(rs6000_hard_regno_mode_ok): Rename to...
(rs6000_hard_regno_mode_ok_uncached): ...this.
(rs6000_init_hard_regno_mode_ok): Update accordingly.
(rs6000_hard_regno_mode_ok): New function.
* config/rx/rx.h (HARD_REGNO_MODE_OK): Delete.
* config/rx/rx.c (rx_hard_regno_mode_ok): New function.
(TARGET_HARD_REGNO_MODE_OK): Redefine.
* config/s390/s390.h (HARD_REGNO_MODE_OK): Delete.
* config/s390/s390-protos.h (s390_hard_regno_mode_ok): Delete.
* config/s390/s390.c (s390_hard_regno_mode_ok): Make static.
(TARGET_HARD_REGNO_MODE_OK): Redefine.
* config/sh/sh.h (HARD_REGNO_MODE_OK): Delete.
* config/sh/sh-protos.h (sh_hard_regno_mode_ok): Delete.
* config/sh/sh.c (TARGET_HARD_REGNO_MODE_OK): Redefine.
(sh_hard_regno_mode_ok): Make static.
* config/sparc/constraints.md: Refer to targetm.hard_regno_mode_ok
instead of HARD_REGNO_MODE_OK.
* config/sparc/sparc.h (hard_regno_mode_classes): Delete.
(sparc_mode_class): Delete.
(HARD_REGNO_MODE_OK): Delete.
* config/sparc/sparc.c (TARGET_HARD_REGNO_MODE_OK): Redefine.
(hard_regno_mode_classes): Make static.
(sparc_mode_class): Likewise.
(sparc_hard_regno_mode_ok): New function.
* config/spu/spu.h (HARD_REGNO_MODE_OK): Delete.
* config/stormy16/stormy16.h (HARD_REGNO_MODE_OK): Delete.
* config/stormy16/stormy16.c (xstormy16_hard_regno_mode_ok): New
function.
(TARGET_HARD_REGNO_MODE_OK): Redefine.
* config/tilegx/tilegx.h (HARD_REGNO_MODE_OK): Delete.
* config/tilepro/tilepro.h (HARD_REGNO_MODE_OK): Delete.
* config/v850/v850.h (HARD_REGNO_MODE_OK): Delete.
* config/v850/v850.c (v850_hard_regno_mode_ok): New function.
(TARGET_HARD_REGNO_MODE_OK): Redefine.
* config/vax/vax.h (HARD_REGNO_MODE_OK): Delete.
* config/visium/visium.h (HARD_REGNO_MODE_OK): Delete.
* config/visium/visium.c (TARGET_HARD_REGNO_MODE_OK): Redefine.
(visium_hard_regno_mode_ok): New function.
* config/visium/visium.md: Refer to targetm.hard_regno_mode_ok
instead of HARD_REGNO_MODE_OK.
* config/xtensa/xtensa.h (xtensa_hard_regno_mode_ok): Delete.
(HARD_REGNO_MODE_OK): Delete.
* config/xtensa/xtensa.c (xtensa_hard_regno_mode_ok): Rename to...
(xtensa_hard_regno_mode_ok_p): ...this and make static.
(xtensa_option_override): Update accordingly.
(TARGET_HARD_REGNO_MODE_OK): Redefine.
(xtensa_hard_regno_mode_ok): New function.
* system.h (HARD_REGNO_MODE_OK): Poison.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251646

Turn HARD_REGNO_CALL_PART_CLOBBERED into a target hook

The SVE patches change the size of a machine_mode from a compile-time
constant to a runtime invariant.  However, target-specific code can
continue to treat the modes as constant-sized if the target only has
constant-sized modes.

The main snag with this approach is that target-independent code still
uses macros from the target .h file.  This patch is one of several that
converts a target macro to a hook.

2017-09-04  Richard Sandiford  <richard.sandiford@linaro.org>
    Alan Hayward  <alan.hayward@arm.com>
    David Sherwood  <david.sherwood@arm.com>

gcc/
* target.def (hard_regno_call_part_clobbered): New hook.
* doc/tm.texi.in (HARD_REGNO_CALL_PART_CLOBBERED): Replace with...
(TARGET_HARD_REGNO_CALL_PART_CLOBBERED): ...this hook.
* doc/tm.texi: Regenerate.
* hooks.h (hook_bool_uint_mode_false): Declare.
* hooks.c (hook_bool_uint_mode_false): New function.
* regs.h (HARD_REGNO_CALL_PART_CLOBBERED): Delete.
* cselib.c (cselib_process_insn): Use
targetm.hard_regno_call_part_clobbered instead of
HARD_REGNO_CALL_PART_CLOBBERED.
* ira-conflicts.c (ira_build_conflicts): Likewise.
* ira-costs.c (ira_tune_allocno_costs): Likewise.
* lra-constraints.c (need_for_call_save_p): Likewise.
* lra-lives.c: Include target.h.
(check_pseudos_live_through_calls): Use
targetm.hard_regno_call_part_clobbered instead of
HARD_REGNO_CALL_PART_CLOBBERED.
* regcprop.c: Include target.h.
(copyprop_hardreg_forward_1): Use
targetm.hard_regno_call_part_clobbered instead of
HARD_REGNO_CALL_PART_CLOBBERED.
* reginfo.c (choose_hard_reg_mode): Likewise.
* regrename.c (check_new_reg_p): Likewise.
* reload.c (find_equiv_reg): Likewise.
* reload1.c (emit_reload_insns): Likewise.
* sched-deps.c (deps_analyze_insn): Likewise.
* sel-sched.c (init_regs_for_mode): Likewise.
(mark_unavailable_hard_regs): Likewise.
* targhooks.c (default_dwarf_frame_reg_mode): Likewise.
* config/aarch64/aarch64.h (HARD_REGNO_CALL_PART_CLOBBERED): Delete.
* config/aarch64/aarch64.c (aarch64_hard_regno_call_part_clobbered):
New function.
(TARGET_HARD_REGNO_CALL_PART_CLOBBERED): Redefine.
* config/avr/avr.h (HARD_REGNO_CALL_PART_CLOBBERED): Delete.
* config/avr/avr-protos.h (avr_hard_regno_call_part_clobbered):
Delete.
* config/avr/avr.c (avr_hard_regno_call_part_clobbered): Make static
and return a bool.
(TARGET_HARD_REGNO_CALL_PART_CLOBBERED): Redefine.
* config/i386/i386.h (HARD_REGNO_CALL_PART_CLOBBERED): Delete.
* config/i386/i386.c (ix86_hard_regno_call_part_clobbered): New
function.
(TARGET_HARD_REGNO_CALL_PART_CLOBBERED): Redefine.
* config/mips/mips.h (HARD_REGNO_CALL_PART_CLOBBERED): Delete.
* config/mips/mips.c (mips_hard_regno_call_part_clobbered): New
function.
(TARGET_HARD_REGNO_CALL_PART_CLOBBERED): Redefine.
* config/powerpcspe/powerpcspe.h (HARD_REGNO_CALL_PART_CLOBBERED):
Delete.
* config/powerpcspe/powerpcspe.c
(rs6000_hard_regno_call_part_clobbered): New function.
(TARGET_HARD_REGNO_CALL_PART_CLOBBERED): Redefine.
* config/rs6000/rs6000.h (HARD_REGNO_CALL_PART_CLOBBERED): Delete.
* config/rs6000/rs6000.c (rs6000_hard_regno_call_part_clobbered):
New function.
(TARGET_HARD_REGNO_CALL_PART_CLOBBERED): Redefine.
* config/s390/s390.h (HARD_REGNO_CALL_PART_CLOBBERED): Delete.
* config/s390/s390.c (s390_hard_regno_call_part_clobbered): New
function.
(TARGET_HARD_REGNO_CALL_PART_CLOBBERED): Redefine.
* config/sh/sh.h (HARD_REGNO_CALL_PART_CLOBBERED): Delete.
* system.h (HARD_REGNO_CALL_PART_CLOBBERED): Poison.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251645

Add subreg_memory_offset helper functions

This patch adds routines for converting a SUBREG_BYTE offset into a
memory address offset.  The two only differ for paradoxical subregs,
where SUBREG_BYTE is always 0 but the memory address offset can be
negative.

2017-09-04  Richard Sandiford  <richard.sandiford@linaro.org>
    Alan Hayward  <alan.hayward@arm.com>
    David Sherwood  <david.sherwood@arm.com>

gcc/
* rtl.h (subreg_memory_offset): Declare.
* emit-rtl.c (subreg_memory_offset): New function.
* expmed.c (store_bit_field_1): Use it.
* expr.c (undefined_operand_subword_p): Likewise.
* simplify-rtx.c (simplify_subreg): Likewise.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251644

optabs: ensure atomic_load/stores have compiler barriers

PR rtl-optimization/57448
PR target/67458
PR target/81316
* optabs.c (expand_atomic_load): Place compiler memory barriers if
using atomic_load pattern.
(expand_atomic_store): Likewise.
testsuite/
* gcc.dg/atomic/pr80640-2.c: New testcase.
* gcc.dg/atomic/pr81316.c: New testcase.

From-SVN: r251643

Fix call arguments mismatch in gcc.c-torture/compile/pr82052.c

2017-09-04  Tom de Vries  <tom@codesourcery.com>

PR tree-optimization/82052
* gcc.c-torture/compile/pr82052.c (fn2): Add parameters corresponding to
call in fn11.

From-SVN: r251642

re PR sanitizer/81981 (-fsanitize=undefined makes a -Wmaybe-uninitialized warning disappear)

PR sanitizer/81981
* gimple-fold.c (gimple_fold_call): Optimize away useless UBSAN_PTR
and UBSAN_BOUNDS internal calls.  Clean up IFN_UBSAN_OBJECT_SIZE
handling.  Use replace_call_with_value with NULL instead of
gsi_replace, unlink_stmt_vdef and release_defs.

* gcc.dg/ubsan/pr81981.c: New test.

From-SVN: r251641

gdbhooks.py (OptMachineModePrinter.to_string): Use 8 spaces instead of tab.

* gdbhooks.py (OptMachineModePrinter.to_string): Use 8 spaces
instead of tab.

From-SVN: r251640

* lra-remat.c (reg_overlap_for_remat_p): Fix a pasto.

From-SVN: r251639

re PR tree-optimization/70043 (The compiler hangs in a fortran test-case with -Ofast -g -march=haswell)

PR tree-optimization/70043
PR testsuite/82093
* gfortran.dg/vect/pr70043.f90 (fn1): Start loop from 1 instead of 0.

From-SVN: r251638

PR82045: Avoid passing machine modes through "..."

PR82045 is about a bootstrap failure on sparc-sun-solaris2.11.
The problem was that we were passing the new machine_mode wrapper
classes through "..."  to emit_library_call(_value), which then
read them back as ints instead.

The simplest fix seemed to be replace "..." with an array of
rtx_mode_ts, then provide wrappers for the common cases.  This
bulks out rtl.h a bit, but it does make things a bit more typesafe.

2017-09-04  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
PR bootstrap/82045
* rtl.h (emit_library_call_value_1): Declare.
(emit_library_call): Replace declaration with a series of overloads.
Remove the parameter count argument.
(emit_library_call_value): Likewise.
* calls.c (emit_library_call_value_1): Make global.  Replace varargs
with an "rtx_mode_t *".
(emit_library_call_value): Delete.
(emit_library_call): Likewise.
* asan.c (asan_emit_stack_protection): Update calls accordingly.
(asan_emit_allocas_unpoison): Likewise.
* builtins.c (expand_builtin_powi): Likewise.
(expand_asan_emit_allocas_unpoison): Likewise.
* cfgexpand.c (expand_main_function): Likewise.
* config/aarch64/aarch64.c (aarch64_trampoline_init): Likewise.
* config/aarch64/aarch64.h (PROFILE_HOOK): Likewise.
* config/alpha/alpha.c (alpha_trampoline_init): Likewise.
* config/arm/arm.c (arm_trampoline_init): Likewise.
(arm_call_tls_get_addr): Likewise.
(arm_expand_divmod_libfunc): Likewise.
* config/bfin/bfin.md (umulsi3_highpart): Likewise.
(smulsi3_highpart): Likewise.
* config/c6x/c6x.c (c6x_initialize_trampoline): Likewise.
(c6x_expand_compare): Likewise.
(c6x_expand_movmem): Likewise.
* config/frv/frv.c (frv_trampoline_init): Likewise.
* config/i386/i386.c (ix86_trampoline_init): Likewise.
(ix86_expand_divmod_libfunc): Likewise.
* config/ia64/ia64.c (ia64_expand_tls_address): Likewise.
(ia64_expand_compare): Likewise.
(ia64_profile_hook): Likewise.
* config/ia64/ia64.md (save_stack_nonlocal): Likewise.
(nonlocal_goto): Likewise.
(restore_stack_nonlocal): Likewise.
* config/m32r/m32r.c (block_move_call): Likewise.
(m32r_trampoline_init): Likewise.
* config/m68k/linux.h (FINALIZE_TRAMPOLINE): Likewise.
* config/m68k/m68k.c (m68k_call_tls_get_addr): Likewise.
(m68k_call_m68k_read_tp): Likewise.
* config/microblaze/microblaze.c (microblaze_call_tls_get_addr)
(microblaze_expand_divide): Likewise.
* config/mips/mips.h (mips_args): Likewise.
* config/mips/sdemtk.h (mips_sync_icache): Likewise.
(MIPS_ICACHE_SYNC): Likewise.
* config/nios2/nios2.c (nios2_emit_expensive_div): Likewise.
(nios2_trampoline_init): Likewise.
* config/pa/pa.c (hppa_tls_call): Likewise.
(pa_trampoline_init): Likewise.
* config/pa/pa.md (canonicalize_funcptr_for_compare): Likewise.
* config/powerpcspe/powerpcspe.c (rs6000_legitimize_tls_address)
(expand_strn_compare): Likewise.
(rs6000_generate_compare): Likewise.
(rs6000_expand_float128_convert): Likewise.
(output_profile_hook): Likewise.
(rs6000_trampoline_init): Likewise.
* config/powerpcspe/powerpcspe.md (neg<mode>2): Likewise.
* config/riscv/riscv.h (PROFILE_HOOK): Likewise.
* config/rs6000/rs6000-string.c (expand_strn_compare): Likewise.
* config/rs6000/rs6000.c (rs6000_legitimize_tls_address): Likewise.
(rs6000_generate_compare): Likewise.
(rs6000_expand_float128_convert): Likewise.
(output_profile_hook): Likewise.
(rs6000_trampoline_init): Likewise.
* config/rs6000/rs6000.md (neg<mode>2): Likewise.
* config/sh/sh.c (sh_trampoline_init): Likewise.
* config/sparc/sparc.c (emit_soft_tfmode_libcall): Likewise.
(sparc_emit_float_lib_cmp): Likewise.
(sparc32_initialize_trampoline): Likewise.
(sparc64_initialize_trampoline): Likewise.
(sparc_profile_hook): Likewise.
* config/spu/spu.c (ea_load_store): Likewise.
* config/spu/spu.md (floatunssidf2): Likewise.
* config/tilegx/tilegx.c (tilegx_trampoline_init): Likewise.
* config/tilepro/tilepro.c (tilepro_trampoline_init): Likewise.
* config/visium/visium.c (expand_block_move_4): Likewise.
(expand_block_move_2): Likewise.
(expand_block_move_1): Likewise.
(expand_block_set_4): Likewise.
(expand_block_set_2): Likewise.
(expand_block_set_1): Likewise.
(visium_trampoline_init): Likewise.
(visium_profile_hook): Likewise.
* config/xtensa/xtensa.c (xtensa_expand_nonlocal_goto): Likewise.
(xtensa_setup_frame_addresses): Likewise.
(xtensa_trampoline_init): Likewise.
* except.c (sjlj_emit_function_enter): Likewise.
(sjlj_emit_function_exit): Likewise.
* explow.c (allocate_dynamic_stack_space): Likewise.
(probe_stack_range): Likewise.
* expr.c (convert_mode_scalar): Likewise.
* optabs.c (expand_binop): Likewise.
(expand_twoval_binop_libfunc): Likewise.
(expand_unop): Likewise.
(prepare_cmp_insn): Likewise.
(prepare_float_lib_cmp): Likewise.
(expand_float): Likewise.
(expand_fix): Likewise.
(expand_fixed_convert): Likewise.
(maybe_emit_sync_lock_test_and_set): Likewise.
(expand_atomic_compare_and_swap): Likewise.
(expand_mem_thread_fence): Likewise.
(expand_atomic_fetch_op): Likewise.

From-SVN: r251637

Daily bump.

From-SVN: r251633

adx-check.h (main): Use __get_cpuid_count.

* gcc.target/i386/adx-check.h (main): Use __get_cpuid_count.
* gcc.target/i386/bmi-check.h (main): Ditto.
* gcc.target/i386/bmi2-check.h (main): Ditto.
* gcc.target/i386/rtm-check.h (main): Ditto.
* gcc.target/i386/sha-check.h (main): Ditto.
* gcc.target/i386/avx2-check.h (check_osxsave): New function.
(main): Use __get_cpuid_count.  Use check_osxsave.
* gcc.target/i386/avx512-check.h (check_osxsave): New function.
(main): Use __get_cpuid_count.  Use check_osxsave.  Reorder conditions.
* gcc.target/i386/mpx/mpx-check.h (check_osxsave): New function.
(main): Use check_osxsave.

From-SVN: r251629

mpx-check.h (main): Use __get_cpuid_count and return NORUNRES on failure.

* gcc.target/i386/mpx/mpx-check.h (main): Use __get_cpuid_count
and return NORUNRES on failure.
* gcc.target/i386/mpx/va-arg-pack-1-lbv.c (foo1): Use
__builtin_va_arg_pack instead of __va_arg_pack.
* gcc.target/i386/mpx/va-arg-pack-1-nov.c (foo1): Ditto.
* gcc.target/i386/mpx/va-arg-pack-1-ubv.c (foo1): Ditto.
* gcc.target/i386/mpx/va-arg-pack-2-lbv.c (foo1): Ditto.
* gcc.target/i386/mpx/va-arg-pack-2-nov.c (foo1): Ditto.
* gcc.target/i386/mpx/va-arg-pack-2-ubv.c (foo1): Ditto.

From-SVN: r251627

generic.texi (OpenACC): Adjust URL.

* doc/generic.texi (OpenACC): Adjust URL.
* doc/invoke.texi (C Dialect Options): Ditto.

From-SVN: r251626

i386.md (*bt<mode>): Use nonimmediate_operand predicate for operand 1.

* config/i386/i386.md (*bt<mode>): Use nonimmediate_operand
predicate for operand 1.  Add (m,<S>) constraint.
(*jcc_bt<mode>): Use nonimmediate_operand predicate for operand 1.
Prevent memory operand 1 with register operand 2.

From-SVN: r251625

Daily bump.

From-SVN: r251624

Daily bump.

From-SVN: r251617

re PR libquadmath/81848 (Add PowerPC support to libquadmath)

2017-09-01  Michael Meissner  <meissner@linux.vnet.ibm.com>

PR libquadmath/81848
* configure.ac (powerpc*-linux*): Use attribute mode KC to create
complex __float128 on PowerPC instead of attribute mode TC.
* quadmath.h (__complex128): Likewise.
* configure: Regenerate.
* math/cbrtq.c (CBRT2): Use __float128 not long double.
(CBRT4): Likewise.
(CBRT2I): Likewise.
(CBRT4I): Likewise.
* math/j0q.c (U0): Likewise.
* math/sqrtq.c (sqrtq): Don't depend on implicit conversion
between __float128, instead explicitly convert the __float128
value to long double because the PowerPC does not allow __float128
and long double in the same expression.

From-SVN: r251613

cp-tree.h (resort_type_method_vec): Move declaration to ...

* cp-tree.h (resort_type_method_vec): Move declaration to ...
* name-lookup.h (resort_type_method_vec): ... here.
(set_class_bindings): Lose 2nd arg.
* class.c (finish_struct_1, finish_struct): Adjust
set_class_bindings call.  Don't call finish_struct_methods.
(resort_data, method_name_cmp, resort_method_name_cmp,
resort_type_method_vec, finish_struct_methods): Move to ...
* name-lookup.c (resort_data, method_name_cmp,
resort_method_name_cmp, resort_type_method_vec): ... here.
(set_class_bindings): Lose fields arg.  Swallow finish_struct_methods.

From-SVN: r251609

class.c (finish_struct): Call set_class_bindings for the template case too.

* class.c (finish_struct): Call set_class_bindings for the
template case too.

From-SVN: r251608

combine: Fix for PR82024

With the testcase in the PR, with all the command line options mentioned
there, a (comparison) instruction becomes dead in fwprop1 but is not
deleted until all the way in rtl_dce.

Before combine this insn look like:

20: flags:CC=cmp(r106:DI,0xffffffffffffffff)
      REG_DEAD r106:DI
      REG_UNUSED flags:CC
      REG_EQUAL cmp(0,0xffffffffffffffff)

(note the only output is unused).

Combining some earlier insns gives

13: r106:DI=0
14: r105:DI=r101:DI+r103:DI

14+13+20 then gives

(parallel [
        (set (reg:CC 17 flags)
            (compare:CC (const_int 0 [0])
                (const_int -1 [0xffffffffffffffff])))
        (set (reg:DI 105)
            (plus:DI (reg/v:DI 101 [ e ])
                (reg:DI 103)))
    ])

which doesn't match; but the set of flags is dead, so combine makes the
set of r105 the whole new instruction, which it then places at i3.  But
that is wrong, because r105 is used after i2 but before i3!  We forget
to check for that in this case.

This patch fixes it.

PR rtl-optimization/82024
* combine.c (try_combine): If the combination result is a PARALLEL,
and we only need to retain the SET in there that would be placed
at I2, check that we can place that at I3 instead, before doing so.

From-SVN: r251607

re PR target/81766 (ICE in maybe_add_or_update_dep_1, at sched-deps.c:924 caused by r250815)

PR target/81766
* config/i386/i386.c (ix86_init_large_pic_reg): Return label instead of void.
(ix86_init_pic_reg): Remember label from ix86_init_large_pic_reg, if non-NULL
and preceded by NOTE_INSN_BASIC_BLOCK, swap the note and label.

* gcc.target/i386/pr81766.c: New test.

From-SVN: r251606

c-opts.c (c_common_finish): Write dependency information even if there are errors.

* c-opts.c (c_common_finish): Write dependency information even if
there are errors.

From-SVN: r251605

class.c (finish_struct_methods): Done clear DECL_IN_AGGR_P here.

* class.c (finish_struct_methods): Done clear DECL_IN_AGGR_P here.
Don't call maybe_warn_about_overly_private_class here.
(warn_hidden): Cleanup declarations and comments.
(type_has_user_provided_constructor): No need to check
CLASSTYPE_METHOD_VEC.
(type_has_user_provided_or_explicit_constructor): Likewise.
(classtype_has_move_assign_or_move_ctor_p): Likewise.
(check_bases_and_members): Don't call finish_struct_methods here.
(finish_struct_1): Call finish_struct_methods and
set_class_bindings immediately after layout.  Clear DECL_IN_AGGR_P
here.
(finish_struct): For templates process USING_DECLS and clear
DECL_IN_AGGR_P before calling finish_struct_methods. Call
maybe_warn_about_overly_private_class here.

From-SVN: r251604

Fix excess precision handling of compound assignments (PR c/82071).

PR c/82071 reports how compound assignment operators such as += handle
excess precision inconsistently with the same operation done with a
plain assignment and binary operator.

There were (at least) two problems with how compound assignments
handled excess precision.  The EXCESS_PRECISION_EXPR for an argument
with excess precision was removed too early, resulting in
build_binary_op being called with an rhs operand whose type reflected
the evaluation format, so not having sufficient information to achieve
the intended semantics in all cases, and then the code called
c_fully_fold on the results of build_binary_op without allowing for
the possibility of an EXCESS_PRECISION_EXPR as the result, so leading
to double rounding of the result (first to its semantic type, then to
the type of the LHS of the assignment) instead of the intended single
rounding.

This patch fixes those problems by keeping EXCESS_PRECISION_EXPRs
further through build_modify_expr (and build_atomic_assign which it
calls) and only removing them locally where appropriate.

Note that while this patch should achieve *consistency*, that's
consistency with the understanding of C99 semantics that I originally
intended to implement.  For the particular case in the testcase, C11
semantics (from N1531) differ from that understanding of C99
semantics, in that an implicit conversion of an integer to floating
point can have excess precision.  I intend to implement those C11
semantics separately (conditional on flag_isoc11) (which will also
mean that building conditional expressions can produce a result with
excess precision even when the arguments lack excess precision, where
previously it could not), and not to close the bug until that is also
done.

Tested for x86_64-pc-linux-gnu.

PR c/82071
gcc/c:
* c-typeck.c (build_atomic_assign): Handle argument with excess
precision.  Ensure any EXCESS_PRECISION_EXPR is present in
argument passed to build_binary_op and convert_for_assignment but
not for call to c_fully_fold.
(build_modify_expr): Do not remove EXCESS_PRECISION_EXPR early.
Ensure build_binary_op is called with argument with original
semantic type.  Avoid calling c_fully_fold with an
EXCESS_PRECISION_EXPR from build_binary_op.

gcc/testsuite:
* gcc.target/i386/excess-precision-7.c: New test.

From-SVN: r251603

varasm.c (bss_initializer_p): Do not put constants into .bss

* varasm.c (bss_initializer_p): Do not put constants into .bss
(categorize_decl_for_section): Handle bss_initializer_p returning
false when DECL_INITIAL is NULL.

* gcc.target/i386/const-in-bss.c: New test.

From-SVN: r251602

S/390: PR82012: Implement CAN_INLINE_P target hook.

TARGET_CAN_INLINE_P must be implemented when supporting target
attributes.

gcc/ChangeLog:

2017-09-01  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>

PR target/82012
* config/s390/s390.c (s390_can_inline_p): New function.

gcc/testsuite/ChangeLog:

2017-09-01  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>

PR target/82012
* gcc.target/s390/target-attribute/pr82012.c: New test.

From-SVN: r251601

re PR tree-optimization/82052 (ICE with "-O3 -m32" on x86_64-linux-gnu (internal compiler error: in pop_to_marker, at tree-ssa-scopedtables.c:71))

PR tree-optimization/82052
* tree-ssa-scopedtables.c (avail_exprs_stack::lookup_avail_expr):
Always initialize the returned slot after a hash table miss
when INSERT is true.

PR tree-optimization/82052
* gcc.c-torture/compile/pr82052.c: New test.

From-SVN: r251600

retire mem_signal_fence pattern

* config/s390/s390.md (mem_signal_fence): Remove.
* doc/md.texi (mem_signal_fence): Remove.
* optabs.c (expand_mem_signal_fence): Remove uses of mem_signal_fence.
Update comments.
* target-insns.def (mem_signal_fence): Remove.

From-SVN: r251597

re PR sanitizer/81902 (new -fsanitize=pointer-overflow option undocumented)

PR sanitizer/81902
* doc/invoke.texi: Document -fsanitize=pointer-overflow.

From-SVN: r251596

re PR sanitizer/81923 ([ASAN] gcc emites wrong odr asan instrumentation for glibc)

PR sanitizer/81923
* asan.c (create_odr_indicator): Strip name encoding from assembler
name before appending it after __odr_asan_.

* gcc.dg/asan/pr81923.c: New test.

From-SVN: r251595

config.host (*-*-vxworks7): Widen scope to vxworks7*.

2017-09-01  Olivier Hainque  <hainque@adacore.com>

libgcc/
* config.host (*-*-vxworks7): Widen scope to vxworks7*.

From-SVN: r251594

Revert 2017-08-28 Nathan Sidwell <nathan@acm.org> Restore sorted_fields vector.

Revert 2017-08-28  Nathan Sidwell  <nathan@acm.org>
Restore sorted_fields vector.
* cp-tree.h (lang_type): Restore sorted_fields vector.
(CLASSTYPE_SORTED_FIELDS): Restore.
(CLASSTYPE_BINDINGS): Delete.
* name-lookup.c (lookup_field_1): Restore binary search.
(sorted_fields_type_new, count_fields,
add_fields_to_record_type, add_enum_fields_to_record_type): Restore
(set_class_bindings): Revert.
(insert_late_enum_def_binding): Restore field_vec insertion.

From-SVN: r251592

Fix profile update in tree-ssa-isolate-paths.c (PR tree-optimization/82059).

2017-09-01  Martin Liska  <mliska@suse.cz>

PR tree-optimization/82059
* gimple-ssa-isolate-paths.c (isolate_path): Add profile and
frequency only when an edge is redirected.
2017-09-01  Martin Liska  <mliska@suse.cz>

PR tree-optimization/82059
* gcc.dg/tree-ssa/pr82059.c: New test.

From-SVN: r251591

[ARC] Reimplement ZOL support.

2017-05-22  Claudiu Zissulescu <claziss@synopsys.com>

* config/arc/arc-c.c (__ARC_LPC_WIDTH__): Add builtin define.
* config/arc/arc.c (ARC_MAX_LOOP_LENGTH): Define.
(arc_conditional_register_usage): Remove ARC600 lp_count
exception.
(arc_file_start): Emit Tag_ARC_CPU_variation.
(arc_can_use_doloop_p): New conditions to use ZOLs.
(hwloop_fail): New function.
(hwloop_optimize): Likewise.
(hwloop_pattern_reg): Likewise.
(arc_doloop_hooks): New struct, to be used with reorg_loops.
(arc_reorg_loops): New function, calls reorg_loops.
(arc_reorg): Call arc_reorg_loops.  Remove old ZOL handling.
(arc600_corereg_hazard): Remove ZOL checking, case handled by
hwloop_optimize.
(arc_loop_hazard): Remove function, functionality moved into
hwloop_optimize.
(arc_hazard): Remove arc_loop_hazard call.
(arc_adjust_insn_length): Remove ZOL handling, functionality moved
into hwloop_optimize.
(arc_label_align): Remove ZOL handling.
* config/arc/arc.h (LOOP_ALIGN): Changed to 0.
* config/arc/arc.md (doloop_begin): Remove pattern.
(doloop_begin_i): Likewise.
(doloop_end_i): Likewise.
(doloop_fallback): Likewise.
(doloop_fallback_m): Likewise.
(doloop_end): Reimplement expand.
(arc_lp): New pattern for LP instruction.
(loop_end): New pattern.
(loop_fail): Likewise.
(decrement_and_branch_until_zero): Likewise.
* config/arc/arc.opt (mlpc-width): New option.
* doc/invoke.texi (mlpc-width): Document option.

testsuite/
2017-05-22  Claudiu Zissulescu <claziss@synopsys.com>

      * gcc.target/arc/loop-1.c: Deleted.

From-SVN: r251589

[ARC] Fix errors in arc_ifcvt.

The arc_ifcvt procedure is removing a label even when it is used by
another jump.  This patch fixes dg.exp/pr31507-1.c.

gcc/
2017-07-10  Claudiu Zissulescu  <claziss@synopsys.com>

* config/arc/arc.c (arc_ifcvt): Remove use of merge_blocks call.
(arc_ccfsm_advance): Fix checking for delay slots.
(arc_reorg): Add rtl dump after each call to arc_ifcvt

From-SVN: r251588

[ARC] Update various patterns

gcc/
2017-04-25  Claudiu Zissulescu  <claziss@synopsys.com>

* config/arc/arc.md (movqi_insn): Add stores to save constant long
immediates.
(movhi_insn): Update store instruction constraint which are saving
6-bit short immediates.
(movsi_insn): Consider also short scaled load operations.
(zero_extendhisi2_i): Use Usd constraint instead of T.
(extendhisi2_i): Add q constraint.
(arc_clzsi2): Add type and length attributes.
(arc_ctzsi2): Likewise.
* config/arc/constraints.md (Usc): Update constraint, the
assembler can parse two relocations for a single instruction.

gcc/testsuite/
2017-04-25  Claudiu Zissulescu  <claziss@synopsys.com>

* gcc.target/arc/arc.exp: Test also cpp files.
* gcc.target/arc/tdelay_slots.cpp: New test.

From-SVN: r251587

[ARC] Use TARGET_USE_ANCHORS_FOR_SYMBOL_P.

We don't want to use anchors for small data: the GP register acts as an anchor in that
case.  We also don't want to use them for PC-relative accesses,
where the PC acts as an anchor.  TLS symbols require special accesses as well, don't use
anchors for such symbols.

gcc/
2017-04-28  Claudiu Zissulescu  <claziss@synopsys.com>

* config/arc/arc.c (arc_use_anchors_for_symbol_p): New function.
(TARGET_USE_ANCHORS_FOR_SYMBOL_P): Define.

gcc/testsuite
2017-04-28  Claudiu Zissulescu  <claziss@synopsys.com>

* gcc.target/arc/pr9001184797.c: New test.

From-SVN: r251586

re PR c/81887 (pragma omp ordered simd ignored under -fopenmp-simd)

PR c/81887
c-family/
* c-pragma.c (omp_pragmas): Move "ordered" entry from here to ...
(omp_pragmas_simd): ... here.
* c-omp.c (c_finish_omp_ordered): If clauses isn't simd clause alone,
create new clauses list containing just simd clause.
c/
* c-parser.c (c_parser_omp_ordered): Handle -fopenmp-simd.
cp/
* parser.c (cp_parser_omp_ordered): Handle -fopenmp-simd.
fortran/
* parse.c (decode_omp_directive): Use matchs instead of matcho for
end ordered and ordered directives, except for ordered depend.  For
-fopenmp-simd and ordered depend, reject the stmt.
* trans-openmp.c (gfc_trans_omp_ordered): For -fopenmp-simd ignore
threads clause and if simd clause isn't present, just translate the
body.
testsuite/
* c-c++-common/gomp/pr81887.c: New test.
* gfortran.dg/gomp/pr81887.f90: New test.

From-SVN: r251585

Fix warning for simple-object-elf.c.

2017-09-01  Martin Liska  <mliska@suse.cz>

* simple-object-elf.c (simple_object_elf_copy_lto_debug_sections):
Remove duplicite declaration.

From-SVN: r251584

re PR c++/82040 (ICE with -Wbool-operation and ~)

PR c++/82040
* typeck.c (cp_build_unary_op): Avoid re-entering reporting routines.

* g++.dg/warn/Wbool-operation-1.C: New test.

From-SVN: r251581

Daily bump.

From-SVN: r251580

mksysinfo: fix in6_addr in mld_hdr_t for Solaris

    Patch by Rainer Orth.

    Reviewed-on: https://go-review.googlesource.com/60732

From-SVN: r251574

config.gcc (powerpc-wrs-vxworks|vxworksae|vxworksmils): Now match as powerpc-wrs-vxworks*.

2017-08-31  Olivier Hainque  <hainque@adacore.com>

       gcc/
       * config.gcc (powerpc-wrs-vxworks|vxworksae|vxworksmils): Now
match as powerpc-wrs-vxworks*.

       libgcc/
       * config.host: Likewise.

From-SVN: r251573

PR c++/82039 suppress -Wzero-as-null-pointer-constant warning

PR c++/82039
* include/ext/new_allocator.h (__gnu_cxx::new_allocator::allocate):
Adjust null pointer constant to avoid warning.

From-SVN: r251570

[AArch64 obvious] Fix register constraints for aarch64_ml[as]_elt_merge<mode>

The MLA by-element instructions have the same restriction as other by-element
instructions whereby the forms operating on vectors of 16-bit integer data
may only use registers v0-v15. We have an iterator for that, applied to the
other patterns generating this instruction, so use that.

gcc/

* config/aarch64/aarch64-simd.md (aarch64_mla_elt_merge<mode>): Fix
register constraint for by-element operand.
(aarch64_mls_elt_merge<mode>): Likewise.

From-SVN: r251568

PR c++/82029 - __PRETTY_FUNCTION__ in lambda in template

* pt.c (enclosing_instantiation_of, lambda_fn_in_template_p)
(regenerated_lambda_fn_p): New.
(tsubst_decl) [VAR_DECL]: Use enclosing_instantiation_of.
(tsubst_copy) [VAR_DECL]: Likewise.

From-SVN: r251567

[ARC] Update can_follow_jump hook helper.

Short branches cannot be used to jump between hot/cold
sections. Update the hook.

gcc/
2017-04-26  Claudiu Zissulescu  <claziss@synopsys.com>

* config/arc/arc.c (arc_can_follow_jump): Check for short
branches.

From-SVN: r251566

[ARC] Use -G option to control sdata behavior

gcc/
2017-04-24  Claudiu Zissulescu  <claziss@synopsys.com>

* config.gcc: Use g.opt for arc.
* config/arc/arc.c (LEGITIMATE_SCALED_ADDRESS_P): Deleted,
functionality moved to ...
(legitimate_scaled_address_p): New function, ...here.
(LEGITIMATE_SMALL_DATA_OFFSET_P): New define.
(LEGITIMATE_SMALL_DATA_ADDRESS_P): Use the above define.
(legitimate_offset_address_p): Delete TARGET_NO_SDATA_SET
condition.
(arc_override_options): Handle G option.
(arc_output_pic_addr_const): Correct function definition.
(arc_legitimate_address_p): Use legitimate_scaled_address_p.
(arc_decl_anon_ns_mem_p): Delete.
(arc_in_small_data_p): Overhaul this function to take into
consideration the value given via G option.
(arc_rewrite_small_data_1): Renamed and corrected old
arc_rewrite_small_data function.
(arc_rewrite_small_data): New function.
(small_data_pattern): Don't use pic_offset_table_rtx.
* config/arc/arc.h (CC1_SPEC): Recognize G option.
* config/arc/simdext.md (movmisalignv2hi): Use
prepare_move_operands function.
(mov*): Likewise.
(movmisalign*): Likewise.

gcc/testsuite/
2017-04-24  Claudiu Zissulescu  <claziss@synopsys.com>

* gcc.target/arc/sdata-5.c: New test.
* gcc.target/arc/arc700-stld-hazard.c: Update test options.

Fix test

From-SVN: r251564

[ARC] Improves and fixes for small data support.

Add alignment check for short load/store instructions used for sdata,
as they request 32-bit aligned short immediate.  Use sdata symbol
alignment information and emit scalled loads/stores whenever is
possible. The scalled address will extend the access range for sdata
symbols.  Allow 64-bit datum into small data section, if double
load/store instructions are present.

gcc/
2017-04-12  Claudiu Zissulescu  <claziss@synopsys.com>

* config/arc/arc-protos.h (compact_sda_memory_operand): Update
prototype.
* config/arc/arc.c (arc_print_operand): Output scalled address for
sdata whenever is possible.
(arc_in_small_data_p): Allow sdata for 64bit datum when double
load/stores are available.
(compact_sda_memory_operand): Check for the alignment required by
code density instructions.
* config/arc/arc.md (movsi_insn): Use newly introduced Us0
constraint.
* config/arc/constraints.md (Usd): Update constraint.
(Us0): New constraint.
(Usc): Update constraint.

gcc/testsuite/
2017-04-12  Claudiu Zissulescu  <claziss@synopsys.com>

* gcc.target/arc/sdata-3.c: New file.

From-SVN: r251562

re PR lto/81968 (early lto debug objects make Solaris ld SEGV)

2017-08-31  Richard Biener  <rguenther@suse.de>

PR lto/81968
* simple-object-elf.c (simple_object_elf_copy_lto_debug_section):
Keep names of removed global symbols.

From-SVN: r251560

re PR c++/82054 (ICE in add_dwarf_attr with -fopenmp and -g)

2017-08-31  Richard Biener  <rguenther@suse.de>

PR middle-end/82054
* dwarf2out.c (dwarf2out_early_global_decl): Process each
function only once.

* g++.dg/gomp/pr82054.C: New testcase.

From-SVN: r251559

aarch64-builtins.c (aarch64_init_simd_builtins): Resize type_signature.

2017-08-31  Tamar Christina  <tamar.christina@arm.com>

* config/aarch64/aarch64-builtins.c (aarch64_init_simd_builtins):
Resize type_signature.

From-SVN: r251558

[AArch64] Tighten address register subreg checks

Previously we allowed subregs of non-GPR modes to be base and index
registers in non-strict mode.  In practice such subregs will always
require a reload, so we get better code by disallowing them.

2017-08-31  Richard Sandiford  <richard.sandiford@linaro.org>
    Alan Hayward  <alan.hayward@arm.com>
    David Sherwood  <david.sherwood@arm.com>

gcc/
* config/aarch64/aarch64.c (aarch64_base_register_rtx_p): Only allow
subregs whose inner modes can be stored in GPRs.
(aarch64_classify_index): Likewise.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251557

[AArch64] Rename cmp_result iterator

The comparison results provided by the V_cmp_result/v_cmp_result
attribute were simply the corresponding integer vector.  We'd also
like to have easy access to the integer vector for SVE, but using
"cmp_result" would be confusing because SVE comparisons return
predicates instead of vectors.  This patch therefore renames the
attributes to the more general V_INT_EQUIV/v_int_equiv instead.

As to the capitalisation: there are already many iterators that use
all lowercase vs. all uppercase names to distinguish all lowercase
vs. all uppercase expansions (e.g. fcvt_target and FCVT_TARGET).
It's also the convention used for the built-in mode/MODE/code/CODE/etc.
attributes.  IMO those names are easier to read at a glance, rather than
relying on a single letter's difference.

2017-08-22  Richard Sandiford  <richard.sandiford@linaro.org>
    Alan Hayward  <alan.hayward@arm.com>
    David Sherwood  <david.sherwood@arm.com>

gcc/
* config/aarch64/iterators.md (V_cmp_result): Rename to...
(V_INT_EQUIV): ...this.
(v_cmp_result): Rename to...
(v_int_equiv): ...this.
* config/aarch64/aarch64.md (xorsign<mode>3): Update accordingly.
* config/aarch64/aarch64-simd.md (xorsign<mode>3): Likewise.
(copysign<mode>3): Likewise.
(aarch64_simd_bsl<mode>_internal): Likewise.
(aarch64_simd_bsl<mode>): Likewise.
(vec_cmp<mode><mode>): Likewise.
(vcond<mode><mode>): Likewise.
(vcond<v_cmp_mixed><mode>): Likewise.
(vcondu<mode><v_cmp_mixed>): Likewise.
(aarch64_cm<optab><mode>): Likewise.
(aarch64_cmtst<mode>): Likewise.
(aarch64_fac<optab><mode>): Likewise.
(vec_perm_const<mode>): Likewise.
(vcond_mask_<mode><v_cmp_result>): Rename to...
(vcond_mask_<mode><v_int_equiv>): ...this.
(vec_cmp<mode><v_cmp_result>): Rename to...
(vec_cmp<mode><v_int_equiv>): ...this.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251556

[AArch64] Remove use of wider vector modes

The AArch64 port defined x2, x3 and x4 vector modes that were only used
in the rtl for the AdvSIMD LD{2,3,4} patterns.  It seems unlikely that
this rtl would have led to any valid simplifications, since the values
involved were unspecs that had a different number of operands from the
non-dreg versions.  (The dreg UNSPEC_LD2 had a single operand, while
the qreg one had two operands.)

As it happened, the patterns led to invalid simplifications on big-
endian targets due to a mix-up in the operand order, see Tamar's fix
in r240271.

This patch therefore replaces the rtl patterns with dedicated unspecs.
This allows the x2, x3 and x4 modes to be removed, avoiding a clash
with 256-bit and 512-bit SVE.

2017-08-22  Richard Sandiford  <richard.sandiford@linaro.org>
    Alan Hayward  <alan.hayward@arm.com>
    David Sherwood  <david.sherwood@arm.com>

gcc/
* config/aarch64/aarch64-modes.def: Remove 32-, 48- and 64-byte
vector modes.
* config/aarch64/iterators.md (VRL2, VRL3, VRL4): Delete.
* config/aarch64/aarch64.md (UNSPEC_LD2_DREG, UNSPEC_LD3_DREG)
(UNSPEC_LD4_DREG): New unspecs.
* config/aarch64/aarch64-simd.md (aarch64_ld2<mode>_dreg_le)
(aarch64_ld2<mode>_dreg_be): Replace with...
(aarch64_ld2<mode>_dreg): ...this pattern and use the new DREG
unspec.
(aarch64_ld3<mode>_dreg_le)
(aarch64_ld3<mode>_dreg_be): Replace with...
(aarch64_ld3<mode>_dreg): ...this pattern and use the new DREG
unspec.
(aarch64_ld4<mode>_dreg_le)
(aarch64_ld4<mode>_dreg_be): Replace with...
(aarch64_ld4<mode>_dreg): ...this pattern and use the new DREG
unspec.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251555

[TESTSUITE]Use memcpy instead of strcpy in testsuite/gcc.dg/memcmp-1.c

strcpy will keep reading and writing memory if the string is not terminated
with null character. In this case, it may visit memory beyond the boundary.

gcc/testsuite/

2017-08-31  Renlin Li  <renlin.li@arm.com>
    Aaron Sawdey  <acsawdey@linux.vnet.ibm.com>

* gcc.dg/memcmp-1.c (test_strncmp): Use memcpy instead of strcpy.

Co-Authored-By: Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
From-SVN: r251554

Daily bump.

From-SVN: r251553

PR c++/82030 - ICE inheriting from multiple lambdas

PR c++/80767
* call.c (compare_ics): Handle null candidate.

From-SVN: r251549

Make taking the address of an overloaded function a non-deduced context

cp/

* pt.c (unify_overload_resolution_failure): Remove.
(unify_one_argument): Adjust.

testsuite/

* g++.dg/overload/template6.C: New.

From-SVN: r251548

re PR tree-optimization/81987 (ICE in verify_ssa with -O3 -march=skylake-avx512)

[gcc]

2017-08-30  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

PR tree-optimization/81987
* gimple-ssa-strength-reduction.c (insert_initializers): Don't
insert an initializer in a location not dominated by the stride
definition.

[gcc/testsuite]

2017-08-30  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

PR tree-optimization/81987
* g++.dg/torture/pr81987.C: New file.

From-SVN: r251547

tree-eh.c (lower_try_finally_switch): Set the location of the finally on the entire header of the finally block in...

* tree-eh.c (lower_try_finally_switch): Set the location of the finally
on the entire header of the finally block in the fallthru case.

From-SVN: r251546

* varasm.c (decode_addr_const): Deal with INDIRECT_REF <INTEGER_CST>.

From-SVN: r251545

rs6000.c (rs6000_emit_prologue_move_from_cr): Rename from rs6000_emit_move_from_cr and call renamed function.

* config/rs6000/rs6000.c (rs6000_emit_prologue_move_from_cr): Rename from
rs6000_emit_move_from_cr and call renamed function.
(rs6000_emit_prologue): Call renamed functions.
* config/rs6000/rs6000.md (prologue_movesi_from_cr): Rename from
movesi_from_cr, remove volatile CRs.

* gcc.target/powerpc/cr_shrink-wrap.c: New.

From-SVN: r251543

Fix e-mail address.

From-SVN: r251541

configure.ac: Substitute GOC_FOR_TARGET and GCC_FOR_TARGET.

* configure.ac: Substitute GOC_FOR_TARGET and GCC_FOR_TARGET.
* Makefile.am (MOSTLYCLEANFILES): Add check-gcc.
(check-gccgo): Create via a temporary file.
(check-gcc): New target.
(CHECK_ENV): Set CC.
(ECHO_ENV): Report CC.
(check-go-tool): Depend on check-gcc.
(check-runtime, check-cgo-test, check-carchive-test): Likewise.
* configure, Makefile.in: Rebuild.

From-SVN: r251540

re PR target/82015 (PowerPC should check if 2nd argument to __builtin_unpackv1ti and similar functions is 0 or 1)

2017-08-30  Michael Meissner  <meissner@linux.vnet.ibm.com>

PR target/82015
* gcc.target/powerpc/pr82015.c: Fix up error message.

From-SVN: r251539

tree-vect-patterns.c (vect_pattern_recog_1): Use VECTOR_TYPE_P instead of VECTOR_MODE_P check.

* tree-vect-patterns.c (vect_pattern_recog_1): Use VECTOR_TYPE_P instead
of VECTOR_MODE_P check.
* tree-vect-stmts.c (get_vectype_for_scalar_type_and_size): Allow single
element vector types.

Co-Authored-By: Richard Biener <rguenther@suse.de>
From-SVN: r251538

Drop df_ from df_read_modify_subreg_p

...it's really a general RTL predicate, rather than something that depends
on the DF state.  Thanks to Segher for the suggestion.

2017-08-30  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
* df.h (df_read_modify_subreg_p): Remove in favor of...
* rtl.h (read_modify_subreg_p): ...this new function.  Take a
const_rtx instead of an rtx.
* cprop.c (local_cprop_find_used_regs): Update accordingly.
* df-problems.c (df_word_lr_mark_ref): Likewise.
* ira-lives.c (mark_pseudo_reg_live): Likewise.
(mark_pseudo_reg_dead): Likewise.
(mark_ref_dead): Likewise.
* reginfo.c (init_subregs_of_mode): Likewise.
* sched-deps.c (sched_analyze_1): Likewise.
* df-scan.c (df_def_record_1): Likewise.
(df_uses_record): Likewise.
(df_read_modify_subreg_p): Remove in favor of...
* rtlanal.c (read_modify_subreg_p): ...this new function.  Take a
const_rtx instead of an rtx.

From-SVN: r251537

Add a partial_subreg_p predicate

This patch adds a partial_subreg_p predicate to go alongside
paradoxical_subreg_p.

Like the paradoxical_subreg_p patch, this one replaces some tests that
were based on GET_MODE_SIZE rather than GET_MODE_PRECISION.  In each
case the change should be a no-op or an improvement.

The regcprop.c patch prevents some replacements of the 82-bit RFmode
with the 80-bit XFmode on ia64.  I don't understand the target details
here particularly well, but from the way the modes are described in
ia64-modes.def, it isn't valid to assume that an XFmode can carry an
RFmode payload.  A comparison of the testsuite assembly output for one
target per CPU showed no other differences.

Some of the places changed here are tracking the widest access mode
found for a register.  The series tries to standardise on:

  if (partial_subreg_p (widest_seen, new_mode))
    widest_seen = new_mode;

rather than:

  if (paradoxical_subreg_p (new_mode, widest_seen))
    widest_seen = new_mode;

Either would have been OK.

2017-08-30  Richard Sandiford  <richard.sandiford@linaro.org>
    Alan Hayward  <alan.hayward@arm.com>
    David Sherwood  <david.sherwood@arm.com>

gcc/
* rtl.h (partial_subreg_p): New function.
* caller-save.c (save_call_clobbered_regs): Use it.
* calls.c (expand_call): Likewise.
* combine.c (combinable_i3pat): Likewise.
(simplify_set): Likewise.
(make_extraction): Likewise.
(make_compound_operation_int): Likewise.
(gen_lowpart_or_truncate): Likewise.
(force_to_mode): Likewise.
(make_field_assignment): Likewise.
(reg_truncated_to_mode): Likewise.
(record_truncated_value): Likewise.
(move_deaths): Likewise.
* cse.c (record_jump_cond): Likewise.
(cse_insn): Likewise.
* cselib.c (cselib_lookup_1): Likewise.
* expmed.c (extract_bit_field_using_extv): Likewise.
* function.c (assign_parm_setup_reg): Likewise.
* ifcvt.c (noce_convert_multiple_sets): Likewise.
* ira-build.c (create_insn_allocnos): Likewise.
* lra-coalesce.c (merge_pseudos): Likewise.
* lra-constraints.c (match_reload): Likewise.
(simplify_operand_subreg): Likewise.
(curr_insn_transform): Likewise.
* lra-lives.c (process_bb_lives): Likewise.
* lra.c (new_insn_reg): Likewise.
(lra_substitute_pseudo): Likewise.
* regcprop.c (mode_change_ok): Likewise.
(maybe_mode_change): Likewise.
(copyprop_hardreg_forward_1): Likewise.
* reload.c (push_reload): Likewise.
(find_reloads): Likewise.
(find_reloads_subreg_address): Likewise.
* reload1.c (alter_reg): Likewise.
(eliminate_regs_1): Likewise.
* simplify-rtx.c (simplify_unary_operation_1): Likewise.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251536

rs6000.c (rs6000_expand_binop_builtin): Revert back to if statements, including unpack.

        * config/rs6000/rs6000.c (rs6000_expand_binop_builtin): Revert
        back to if statements, including unpack.

From-SVN: r251535

simple-object-xcoff.c (simple_object_xcoff_find_sections): Improve .go_export csect handling.

* simple-object-xcoff.c (simple_object_xcoff_find_sections):
Improve .go_export csect handling.  Don't make assumptions
on containing section or number of auxiliary entries.

From-SVN: r251533

Fix IPA ICF with ASM statements (PR inline-asm/82001).

2017-08-30  Martin Liska  <mliska@suse.cz>

PR inline-asm/82001
* ipa-icf-gimple.c (func_checker::compare_tree_list_operand):
Rename to ...
(func_checker::compare_asm_inputs_outputs): ... this function.
(func_checker::compare_gimple_asm): Use the function to compare
also ASM constrains.
* ipa-icf-gimple.h: Rename the function.
2017-08-30  Martin Liska  <mliska@suse.cz>

PR inline-asm/82001
* gcc.dg/ipa/pr82001.c: New test.

From-SVN: r251530

Add some changelog entries that went astray during the machmode commits

From-SVN: r251529

[77/77] Add a complex_mode class

This patch adds another machine_mode wrapper for modes that are
known to be COMPLEX_MODE_P.  There aren't yet many places that make
use of it, but that might change in future.

2017-08-30  Richard Sandiford  <richard.sandiford@linaro.org>
    Alan Hayward  <alan.hayward@arm.com>
    David Sherwood  <david.sherwood@arm.com>

gcc/
* coretypes.h (complex_mode): New type.
* gdbhooks.py (build_pretty_printer): Handle it.
* machmode.h (complex_mode): New class.
(complex_mode::includes_p): New function.
(is_complex_int_mode): Likewise.
(is_complex_float_mode): Likewise.
* genmodes.c (get_mode_class): Handle complex mode classes.
* function.c (expand_function_end): Use is_complex_int_mode.

gcc/go/
* go-lang.c (go_langhook_type_for_mode): Use is_complex_float_mode.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251527

[76/77] Add a scalar_mode_pod class

This patch adds a scalar_mode_pod class and uses it to
replace the machine_mode in fixed_value.

2017-08-30  Richard Sandiford  <richard.sandiford@linaro.org>
    Alan Hayward  <alan.hayward@arm.com>
    David Sherwood  <david.sherwood@arm.com>

gcc/
* coretypes.h (scalar_mode_pod): New typedef.
* gdbhooks.py (build_pretty_printer): Handle it.
* machmode.h (gt_ggc_mx, gt_pch_nx): New functions.
* fixed-value.h (fixed_value::mode): Change type to scalar_mode_pod.
* fold-const.c (fold_convert_const_int_from_fixed): Use scalar_mode.
* tree-streamer-in.c (unpack_ts_fixed_cst_value_fields): Use
as_a <scalar_mode>.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251526

[74/77] Various small scalar_mode changes

This patch uses scalar_mode in a few miscellaneous places:

- Previous patches mean mode_to_vector can take a scalar_mode without
  further changes.

- Implicit promotion is limited to scalar types (affects promote_mode
  and sdbout_parms)

2017-08-30  Richard Sandiford  <richard.sandiford@linaro.org>
    Alan Hayward  <alan.hayward@arm.com>
    David Sherwood  <david.sherwood@arm.com>

gcc/
* machmode.h (mode_for_vector): Take a scalar_mode instead
of a machine_mode.
* stor-layout.c (mode_for_vector): Likewise.
* explow.c (promote_mode): Use as_a <scalar_mode>.
* sdbout.c (sdbout_parms): Use is_a <scalar_mode>.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251525

[73/77] Pass scalar_mode to scalar_mode_supported_p

This patch makes the preferred_simd_mode target hook take a scalar_mode
rather than a machine_mode.

2017-08-30  Richard Sandiford  <richard.sandiford@linaro.org>
    Alan Hayward  <alan.hayward@arm.com>
    David Sherwood  <david.sherwood@arm.com>

gcc/
* target.def (preferred_simd_mode): Take a scalar_mode
instead of a machine_mode.
* targhooks.h (default_preferred_simd_mode): Likewise.
* targhooks.c (default_preferred_simd_mode): Likewise.
* config/arc/arc.c (arc_preferred_simd_mode): Likewise.
* config/arm/arm.c (arm_preferred_simd_mode): Likewise.
* config/c6x/c6x.c (c6x_preferred_simd_mode): Likewise.
* config/epiphany/epiphany.c (epiphany_preferred_simd_mode): Likewise.
* config/i386/i386.c (ix86_preferred_simd_mode): Likewise.
* config/mips/mips.c (mips_preferred_simd_mode): Likewise.
* config/nvptx/nvptx.c (nvptx_preferred_simd_mode): Likewise.
* config/powerpcspe/powerpcspe.c (rs6000_preferred_simd_mode):
Likewise.
* config/rs6000/rs6000.c (rs6000_preferred_simd_mode): Likewise.
* config/s390/s390.c (s390_preferred_simd_mode): Likewise.
* config/sparc/sparc.c (sparc_preferred_simd_mode): Likewise.
* config/aarch64/aarch64.c (aarch64_preferred_simd_mode): Likewise.
(aarch64_simd_scalar_immediate_valid_for_move): Update accordingly.
* doc/tm.texi: Regenerate.
* optabs-query.c (can_vec_mask_load_store_p): Return false for
non-scalar modes.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251524

[72/77] Pass scalar_mode to scalar_mode_supported_p

This patch makes the scalar_mode_supported_p target hook take a
scalar_mode rather than a machine_mode.

2017-08-30  Richard Sandiford  <richard.sandiford@linaro.org>
    Alan Hayward  <alan.hayward@arm.com>
    David Sherwood  <david.sherwood@arm.com>

gcc/
* target.def (scalar_mode_supported_p): Take a scalar_mode
instead of a machine_mode.
* targhooks.h (default_scalar_mode_supported_p): Likewise.
* targhooks.c (default_scalar_mode_supported_p): Likewise.
* config/aarch64/aarch64.c (aarch64_scalar_mode_supported_p): Likewise.
* config/alpha/alpha.c (alpha_scalar_mode_supported_p): Likewise.
* config/arm/arm.c (arm_scalar_mode_supported_p): Likewise.
* config/avr/avr.c (avr_scalar_mode_supported_p): Likewise.
* config/c6x/c6x.c (c6x_scalar_mode_supported_p): Likewise.
* config/i386/i386.c (ix86_scalar_mode_supported_p): Likewise.
* config/ia64/ia64.c (ia64_scalar_mode_supported_p): Likewise.
* config/mips/mips.c (mips_scalar_mode_supported_p): Likewise.
* config/msp430/msp430.c (msp430_scalar_mode_supported_p): Likewise.
* config/pa/pa.c (pa_scalar_mode_supported_p): Likewise.
* config/pdp11/pdp11.c (pdp11_scalar_mode_supported_p): Likewise.
* config/powerpcspe/powerpcspe.c (rs6000_scalar_mode_supported_p):
Likewise.
* config/rs6000/rs6000.c (rs6000_scalar_mode_supported_p): Likewise.
* config/s390/s390.c (s390_scalar_mode_supported_p): Likewise.
* config/spu/spu.c (spu_scalar_mode_supported_p): Likewise.
* config/tilegx/tilegx.c (tilegx_scalar_mode_supported_p): Likewise.
* config/tilepro/tilepro.c (tilepro_scalar_mode_supported_p):
Likewise.
* doc/tm.texi: Regenerate.

gcc/c-family/
* c-attribs.c (vector_mode_valid_p) Fold GET_MODE_INNER call
into scalar_mode_supported_p call.
(handle_mode_attribute): Update call to scalar_mode_supported_p.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251523

[71/77] Use opt_scalar_mode for mode iterators

This patch uses opt_scalar_mode when iterating over scalar modes.

2017-08-30  Richard Sandiford  <richard.sandiford@linaro.org>
    Alan Hayward  <alan.hayward@arm.com>
    David Sherwood  <david.sherwood@arm.com>

gcc/
* coretypes.h (opt_scalar_mode): New typedef.
* gdbhooks.py (build_pretty_printers): Handle it.
* machmode.h (mode_iterator::get_2xwider): Add overload for
opt_mode<T>.
* emit-rtl.c (init_emit_once): Use opt_scalar_mode when iterating
over scalar modes.
* expr.c (convert_mode_scalar): Likewise.
* omp-low.c (omp_clause_aligned_alignment): Likewise.
* optabs.c (expand_float): Likewise.
(expand_fix): Likewise.
* tree-vect-stmts.c (vectorizable_conversion): Likewise.

gcc/c-family/
* c-common.c (c_common_fixed_point_type_for_size): Use opt_scalar_mode
for the mode iterator.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251522

[70/77] Make expand_fix/float check for scalar modes

The expand_float code:

  /* Unsigned integer, and no way to convert directly.  Convert as signed,
     then unconditionally adjust the result.  */

and the expand_fix code:

  /* For an unsigned conversion, there is one more way to do it.
     If we have a signed conversion, we generate code that compares
     the real value to the largest representable positive number.  If if
     is smaller, the conversion is done normally.  Otherwise, subtract
     one plus the highest signed number, convert, and add it back.

are restricted to scalars, since the expansion branches on a
comparison of the value.  This patch makes that explicit.

2017-08-30  Richard Sandiford  <richard.sandiford@linaro.org>
    Alan Hayward  <alan.hayward@arm.com>
    David Sherwood  <david.sherwood@arm.com>

gcc/
* optabs.c (expand_float): Explicitly check for scalars before
using a branching expansion.
(expand_fix): Likewise.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251521

[69/77] Split scalar-only part out of convert_mode

This patch splits the final scalar-only part of convert_mode out
into its own subroutine and treats the modes as scalar_modes there.

2017-08-30  Richard Sandiford  <richard.sandiford@linaro.org>
    Alan Hayward  <alan.hayward@arm.com>
    David Sherwood  <david.sherwood@arm.com>

gcc/
* expr.c (convert_mode): Split scalar handling out into...
(convert_mode_scalar): ...this new function.  Treat the modes
as scalar_modes.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251520

[68/77] Use scalar_mode for is_int_mode/is_float_mode pairs

This patch uses scalar_mode for code that operates only on MODE_INT
and MODE_FLOAT.

2017-08-30  Richard Sandiford  <richard.sandiford@linaro.org>
    Alan Hayward  <alan.hayward@arm.com>
    David Sherwood  <david.sherwood@arm.com>

gcc/
* omp-expand.c (expand_omp_atomic): Use is_int_mode, is_float_mode
and scalar_mode.
* tree-vect-stmts.c (get_vectype_for_scalar_type_and_size): Likewise.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251519

[67/77] Use scalar_mode in fixed-value.*

This patch makes the fixed-value.* routines use scalar_mode.
It would be possible to define special classes for these modes, as for
scalar_int_mode and scalar_float_mode, but at the moment nothing would
benefit from them.  In particular, there's no use case that would help
select between one class for all fixed-point modes versus one class for
fractional modes and one class for accumulator modes.

2017-08-30  Richard Sandiford  <richard.sandiford@linaro.org>
    Alan Hayward  <alan.hayward@arm.com>
    David Sherwood  <david.sherwood@arm.com>

gcc/
* fixed-value.h (fixed_from_double_int): Take a scalar_mode
rather than a machine_mode.
(fixed_from_string): Likewise.
(fixed_convert): Likewise.
(fixed_convert_from_int): Likewise.
(fixed_convert_from_real): Likewise.
(real_convert_from_fixed): Likewise.
* fixed-value.c (fixed_from_double_int): Likewise.
(fixed_from_string): Likewise.
(fixed_convert): Likewise.
(fixed_convert_from_int): Likewise.
(fixed_convert_from_real): Likewise.
(real_convert_from_fixed): Likewise.
* config/avr/avr.c (avr_out_round): Use as_a <scalar_mode>.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251518

[66/77] Use scalar_mode for constant integers

This patch treats the mode associated with an integer constant as a
scalar_mode.  We can't use the more natural-sounding scalar_int_mode
because we also use (const_int 0) for bounds-checking modes.  (It might
be worth adding a bounds-specific code instead, but that's for another
day.)

This exposes a latent bug in simplify_immed_subreg, which for
vectors of CONST_WIDE_INTs would pass the vector mode rather than
the element mode to rtx_mode_t.

I think the:

  /* We can get a 0 for an error mark.  */
  || GET_MODE_CLASS (mode) == MODE_VECTOR_INT
  || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT

in immed_double_const is dead.  trunc_int_mode (via gen_int_mode)
would go on to ICE if the mode fitted in a HWI, and surely plenty
of other code would be confused to see a const_int be interpreted
as a vector.  We should instead be using CONST0_RTX (mode) if we
need a safe constant for a particular mode.

We didn't try to make these functions take scalar_mode arguments
because in many cases that would be too invasive at this stage.
Maybe it would become feasible in future.  Also, the long-term
direction should probably be to add modes to constant integers
rather than have then as VOIDmode odd-ones-out.  That would remove
the need for rtx_mode_t and thus remove the question whether they
should use scalar_int_mode, scalar_mode or machine_mode.

The patch also uses scalar_mode for the CONST_DOUBLE handling
in loc_descriptor.  In that case the mode can legitimately be
either floating-point or integral.

2017-08-30  Richard Sandiford  <richard.sandiford@linaro.org>
    Alan Hayward  <alan.hayward@arm.com>
    David Sherwood  <david.sherwood@arm.com>

gcc/
* emit-rtl.c (immed_double_const): Use is_a <scalar_mode> instead
of separate mode class checks.  Do not allow vector modes here.
(immed_wide_int_const): Use as_a <scalar_mode>.
* explow.c (trunc_int_for_mode): Likewise.
* rtl.h (wi::int_traits<rtx_mode_t>::get_precision): Likewise.
(wi::shwi): Likewise.
(wi::min_value): Likewise.
(wi::max_value): Likewise.
* dwarf2out.c (loc_descriptor): Likewise.
* simplify-rtx.c (simplify_immed_subreg): Fix rtx_mode_t argument
for CONST_WIDE_INT.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251517