Alyssa Rosenzweig [Tue, 3 Mar 2020 19:27:05 +0000 (14:27 -0500)]
pan/bi: Add quirks system
Modeled after the Midgard system. Already we know of two
compiler-visible differences between G52 and G71, so let's keep track so
we can eventually port the compiler to other Bifrost systems.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
Alyssa Rosenzweig [Tue, 3 Mar 2020 18:55:33 +0000 (13:55 -0500)]
pan/bi: Add high-latency property for classes
This is required to know how to schedule legally, and also influences
some issues relating to RA.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
Alyssa Rosenzweig [Thu, 5 Mar 2020 12:46:00 +0000 (07:46 -0500)]
pan/bi: Add CSEL condition
Along with src_types, this is enough to represent CSEL.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
Alyssa Rosenzweig [Tue, 3 Mar 2020 18:48:13 +0000 (13:48 -0500)]
pan/bi: Add bi_branch data
For BI_BRANCH, of course. Meshes well with the cfg.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
Alyssa Rosenzweig [Tue, 3 Mar 2020 18:47:49 +0000 (13:47 -0500)]
pan/bi: Extract bifrost_branch structure
It's in the disassembler as bitfields, let's extract to a proper
structure so we can see what's there.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
Alyssa Rosenzweig [Tue, 3 Mar 2020 18:47:13 +0000 (13:47 -0500)]
pan/bi: Add pred/successors to build CFG
We'll want this for analysis passes or something, probably.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
Alyssa Rosenzweig [Tue, 3 Mar 2020 18:01:41 +0000 (13:01 -0500)]
pan/bi: Add constants to bi_clause
Scheduling will have to pay attention to this.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
Alyssa Rosenzweig [Tue, 3 Mar 2020 13:57:03 +0000 (08:57 -0500)]
pan/bi: Add EXTRACT, MAKE_VEC synthetic ops
These allow translating between the vector I/O and scalar ALUs,
facilitated by an RA dance to ensured contiguous registers are used.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
Alyssa Rosenzweig [Tue, 3 Mar 2020 13:37:15 +0000 (08:37 -0500)]
pan/bi: Add source type for conversions
We should now be able to unambiguously represent conversions.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
Alyssa Rosenzweig [Tue, 3 Mar 2020 13:35:51 +0000 (08:35 -0500)]
pan/bi: Add swizzles
Requires a new field on bifrost_instruction, as well as a new class
property and a new class for the dedicated swizzle ops.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
Alyssa Rosenzweig [Tue, 3 Mar 2020 13:16:50 +0000 (08:16 -0500)]
pan/bi: Clarify special op scheduling
They're encoded on ADD but eat the full cycle.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
Alyssa Rosenzweig [Tue, 3 Mar 2020 13:09:18 +0000 (08:09 -0500)]
pan/bi: Add clause header fields to bi_clause
These will be filled out during scheduling (and possibly RA), to be used
when emitting code.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
Alyssa Rosenzweig [Tue, 3 Mar 2020 12:58:05 +0000 (07:58 -0500)]
pan/bi: Add class-specific ops
For disambiguating things like min and max within the MINMAX class.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
Alyssa Rosenzweig [Tue, 3 Mar 2020 12:47:29 +0000 (07:47 -0500)]
pan/bi: Add constant field to bi_instruction
Now that we can index it.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
Alyssa Rosenzweig [Tue, 3 Mar 2020 12:45:33 +0000 (07:45 -0500)]
pan/bi: Add special indices
For fixed registers, uniforms, and constants, which bypass the usual SSA
mechanism to map well to the ISA.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
Alyssa Rosenzweig [Tue, 3 Mar 2020 03:03:05 +0000 (22:03 -0500)]
pan/bi: Add dest_type field to bifrost_instruction
A number of opcodes within a class are disambiguated by type/size, and
whether modifiers make sense or not depends on whether the instruction
acts like a float.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
Alyssa Rosenzweig [Tue, 3 Mar 2020 03:00:07 +0000 (22:00 -0500)]
pan/bi: Add bi_clause, bi_bundle abstractions
These will be used during and after scheduling.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
Alyssa Rosenzweig [Tue, 3 Mar 2020 02:53:13 +0000 (21:53 -0500)]
pan/bi: Add PAN_SCHED_* flags
Class (mostly) determines scheduling options.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
Alyssa Rosenzweig [Tue, 3 Mar 2020 02:48:51 +0000 (21:48 -0500)]
pan/bi: Add bi_load_vary structure
For ld_vary in the IR.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
Alyssa Rosenzweig [Tue, 3 Mar 2020 02:45:47 +0000 (21:45 -0500)]
pan/bi: Pull out bifrost_load_var
We're not using this structure yet but we want everything in the ISA
ready for us.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
Alyssa Rosenzweig [Tue, 3 Mar 2020 02:19:16 +0000 (21:19 -0500)]
pan/bi: Add bi_load structure
Fills out the class for LD_ATTR, LD_VAR_ADDR
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
Alyssa Rosenzweig [Tue, 3 Mar 2020 01:53:47 +0000 (20:53 -0500)]
pan/bi: Add bifrost_minmax_mode field
We'll open up a union for class specific data, since this is interesting
only to BI_MINMAX. (And even then...)
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
Alyssa Rosenzweig [Tue, 3 Mar 2020 01:52:36 +0000 (20:52 -0500)]
pan/bi: Add a bifrost_roundmode field
And a class property signaling it's okay to use.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
Alyssa Rosenzweig [Tue, 3 Mar 2020 01:51:03 +0000 (20:51 -0500)]
pan/bi: Factor out enum bifrost_minmax_mode
We'll want it from the compiler-side.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
Alyssa Rosenzweig [Tue, 3 Mar 2020 01:46:37 +0000 (20:46 -0500)]
pan/bi: Add BI_GENERIC property
I don't want to have 20 class-specific structures floating around. So
let's derive them all from a common generic ALU type.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
Alyssa Rosenzweig [Tue, 3 Mar 2020 01:40:52 +0000 (20:40 -0500)]
pan/bi: Add modifiers to bi_instruction
Now that we can check if we support them via the class.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
Alyssa Rosenzweig [Tue, 3 Mar 2020 01:38:26 +0000 (20:38 -0500)]
pan/bi: Add class properties
We need to keep track of what specific classes support. For now just
track floating point modifiers.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
Alyssa Rosenzweig [Tue, 3 Mar 2020 01:24:03 +0000 (20:24 -0500)]
pan/bi: Add src/dest fields to bifrost_instruction
...along with some helpers to generate indices. The indexing scheme is
mostly a copypaste from Midgard, except we specifically reserve 0 as the
sentinel (midgard uses ~0 for this which has always been a pain point).
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
Alyssa Rosenzweig [Tue, 3 Mar 2020 01:06:34 +0000 (20:06 -0500)]
pan/bi: Add the control flow graph
We're starting to build up the IR data structures in preparation to get
everything piped through.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
Alyssa Rosenzweig [Tue, 3 Mar 2020 00:47:11 +0000 (19:47 -0500)]
pan/bi: Stub out new compiler
Just enough to pipe in the NIR shader.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
Alyssa Rosenzweig [Tue, 3 Mar 2020 00:30:11 +0000 (19:30 -0500)]
pan/bi: Gut old compiler
We're making some pretty dramatic design pivots so this early on it'll
be easier to start from scratch, I think.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
Alyssa Rosenzweig [Tue, 3 Mar 2020 02:32:31 +0000 (21:32 -0500)]
panfrost: Add note about preloaded varyings
There's a magic bit in preload_regs which controls this. It doesn't
appear to be supported on G71 but it is on G52. I'd guess G72 supports
it too but I don't have a way to check this.
Needless to say, we'll need a quirks database for this.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
Samuel Pitoiset [Thu, 5 Mar 2020 10:32:06 +0000 (11:32 +0100)]
aco: fix image load/store with lod and 1D images
Make sure to add the lod value if non-null as the 2nd operand.
Fixes dEQP-VK.image.load_store_lod.with_format.1d.* on all gens
except GFX9.
Fixes: 4d49a7ac737 ("aco: handle nir_intrinsic_image_deref_{load,store} with lod")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4060>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4060>
Michel Dänzer [Thu, 27 Feb 2020 17:27:56 +0000 (18:27 +0100)]
gitlab-ci: Distribute jobs across more stages
The stages and mapping of jobs to them are somewhat arbitrary; the goal
is to avoid having to scroll through large numbers of jobs.
v2: (Pierre-Eric Pelloux-Prayer)
* Use even more stages for test jobs
* Give somewhat meaningful names to stages
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3995>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3995>
Michel Dänzer [Tue, 3 Mar 2020 17:17:12 +0000 (18:17 +0100)]
gitlab-ci: Drop "test-" prefix from llvmpipe/softpipe job names
Redundant.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3995>
Marek Olšák [Fri, 14 Feb 2020 19:18:45 +0000 (14:18 -0500)]
vbo: merge draws even when begin==0 or end==0
Reviewed-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4052>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4052>
Marek Olšák [Fri, 14 Feb 2020 04:22:44 +0000 (23:22 -0500)]
vbo: merge more primitive types for glBegin/End (v2)
v2: clean it up more
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4052>
Marek Olšák [Fri, 14 Feb 2020 19:29:32 +0000 (14:29 -0500)]
mesa: deduplicate draw indirect functions
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4052>
Marek Olšák [Tue, 3 Mar 2020 20:08:09 +0000 (15:08 -0500)]
mesa: optimize get_index_size
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4052>
Marek Olšák [Tue, 3 Mar 2020 20:03:28 +0000 (15:03 -0500)]
mesa: remove _mesa_index_buffer::index_size in favor of index_size_shift
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Suggested-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4052>
Marek Olšák [Thu, 27 Feb 2020 21:06:47 +0000 (16:06 -0500)]
Revert "mesa: check for z=0 in _mesa_Vertex3dv()"
This reverts commit
f04d7439a0ad6e13ff2912ff824553b6bcf511a4.
It no longer helps performance and the current vbo implementation is
faster anyway.
The app that hit this was a CAD program called Spazio3D. It made pretty
terrible use of the OpenGL API and we sent them some tips for improvements.
I'm assuming they've fixed this by now.
Reviewed-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4052>
Marek Olšák [Thu, 27 Feb 2020 20:43:55 +0000 (15:43 -0500)]
vbo: fold code from vbo_exec_fixup_vertex to vbo_exec_wrap_upgrade_vertex
Reviewed-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4052>
Marek Olšák [Thu, 27 Feb 2020 20:30:08 +0000 (15:30 -0500)]
vbo: clean up conditional blocks in ATTR_UNION
Move the A != 0 code to the first block.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4052>
Marek Olšák [Wed, 19 Feb 2020 00:38:33 +0000 (19:38 -0500)]
vbo: handle GS and tess primitive types when splitting Begin/End
Reviewed-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4052>
Marek Olšák [Wed, 19 Feb 2020 00:05:17 +0000 (19:05 -0500)]
vbo: clean up vbo_copy_vertices
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4052>
Marek Olšák [Tue, 18 Feb 2020 23:37:36 +0000 (18:37 -0500)]
vbo: deduplicate copy_vertices functions
There are some differences in exec, but those look like bug fixes not ported
to vbo_save.
Reviewed-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4052>
Marek Olšák [Fri, 14 Feb 2020 04:15:47 +0000 (23:15 -0500)]
vbo: don't look at the second draw's count when merging 2 glBegin/End draws
Only the first count needs to be aligned.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4052>
Marek Olšák [Thu, 13 Feb 2020 20:29:22 +0000 (15:29 -0500)]
mesa: replace some index_size multiplications and divisions with shifts
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4052>
Marek Olšák [Wed, 12 Feb 2020 23:02:24 +0000 (18:02 -0500)]
mesa: add index_size_shift = log2(index_size) into _mesa_index_buffer
for faster division
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Ian Romanick <ian.d.romanic@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4052>
Mauro Rossi [Sat, 22 Feb 2020 15:20:10 +0000 (16:20 +0100)]
android: r600/sfn: Add GDS instructions
Fixes the following building errors:
external/mesa/src/gallium/drivers/r600/sfn/sfn_emitssboinstruction.cpp:59: error: undefined reference to 'r600::GDSInstr::GDSInstr(r600::ESDOp, r600::GPRVector const&, std::__1::shared_ptr<r600::Value> const&, std::__1::shared_ptr<r600::Value> const&, std::__1::shared_ptr<r600::Value> const&, int)'
...
external/mesa/src/gallium/drivers/r600/sfn/sfn_emitssboinstruction.cpp:256: error: undefined reference to 'r600::RatInstruction::RatInstruction(r600::ECFOpCode, r600::RatInstruction::ERatOp, r600::GPRVector const&, r600::GPRVector const&, int, std::__1::shared_ptr<r600::Value> const&, int, int, int, bool)'
Fixes: 32d3435a ("r600/sfn: Add GDS instructions")
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Mauro Rossi [Sat, 22 Feb 2020 15:20:10 +0000 (16:20 +0100)]
android: r600/sfn: fix includes and libmesa_nir dependency
Fixes the following building errors:
In file included from external/mesa/src/gallium/drivers/r600/sfn/sfn_debug.cpp:28:
In file included from external/mesa/src/gallium/drivers/r600/sfn/sfn_debug.h:34:
In file included from external/mesa/src/compiler/nir/nir.h:41:
In file included from external/mesa/src/compiler/nir_types.h:36:
external/mesa/src/compiler/glsl_types.h:38:10: fatal error: 'main/config.h' file not found
#include "main/config.h"
^~~~~~~~~~~~~~~
1 error generated.
In file included from external/mesa/src/gallium/drivers/r600/sfn/sfn_debug.cpp:28:
In file included from external/mesa/src/gallium/drivers/r600/sfn/sfn_debug.h:34:
external/mesa/src/compiler/nir/nir.h:50:10: fatal error: 'nir_opcodes.h' file not found
#include "nir_opcodes.h"
^~~~~~~~~~~~~~~
1 error generated.
Fixes: f718ac62 ("r600/sfn: Add a basic nir shader backend")
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Mauro Rossi [Sat, 22 Feb 2020 15:20:10 +0000 (16:20 +0100)]
android: aco: fix PIPE_FORMAT related building errors
Fixes the following building errors:
In file included from external/mesa/src/amd/compiler/aco_dead_code_analysis.cpp:25:
In file included from external/mesa/src/amd/compiler/aco_ir.h:33:
In file included from external/mesa/src/compiler/nir/nir.h:40:
external/mesa/src/util/format/u_format.h:33:10: fatal error: 'pipe/p_format.h' file not found
#include "pipe/p_format.h"
^~~~~~~~~~~~~~~~~
...
In file included from external/mesa/src/amd/compiler/aco_dominance.cpp:31:
In file included from external/mesa/src/amd/compiler/aco_ir.h:33:
In file included from external/mesa/src/compiler/nir/nir.h:40:
external/mesa/src/util/format/u_format.h:33:10: fatal error: 'pipe/p_format.h' file not found
#include "pipe/p_format.h"
^~~~~~~~~~~~~~~~~
...
In file included from external/mesa/src/amd/compiler/aco_instruction_selection.cpp:31:
In file included from external/mesa/src/amd/common/ac_shader_util.h:32:
In file included from external/mesa/src/compiler/nir/nir.h:40:
external/mesa/src/util/format/u_format.h:33:10: fatal error: 'pipe/p_format.h' file not found
#include "pipe/p_format.h"
^~~~~~~~~~~~~~~~~
3 errors generated.
Fixes: 8d07d661 ("glsl,nir: Switch the enum representing shader image formats to PIPE_FORMAT.")
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Jason Ekstrand [Thu, 27 Feb 2020 19:58:34 +0000 (13:58 -0600)]
nir: Flush to zero with OOB low exponents in ldexp
Reviewed-by: Arcady Goldmints-Orlov <agoldmints@igalia.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Duncan Hopkins [Wed, 4 Mar 2020 11:24:24 +0000 (11:24 +0000)]
zink. Added storage CISto descriptor pool.
Added storage in descriptor pool for combined image samplers as well as uniform buffers.
Stops some shaders from running through a pools storage faster than zinks internal tracking.
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4045>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4045>
Andres Gomez [Thu, 20 Feb 2020 16:26:30 +0000 (18:26 +0200)]
gitlab-ci: Add jobs to be able to test Vulkan
Also, adds an example job for radv.
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Andres Gomez [Wed, 12 Feb 2020 21:21:07 +0000 (23:21 +0200)]
gitlab-ci: Add gfxreconstruct traces support
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Andres Gomez [Thu, 20 Feb 2020 15:32:08 +0000 (17:32 +0200)]
gitlab-ci: Change devices format to <api-vendor-deviceId>
In preparation to having "vk" (Vulkan) along "gl" (OpenGL/ES).
This is so it is clearer which traces belong to which API and also for
the build jobs.
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Andres Gomez [Thu, 20 Feb 2020 15:09:03 +0000 (17:09 +0200)]
gitlab-ci: build VulkanTools into the Vulkan testing container
In preparation for having automated testing with Vulkan traces.
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Andres Gomez [Thu, 20 Feb 2020 12:18:54 +0000 (14:18 +0200)]
gitlab-ci: build gfxreconstruct into the Vulkan testing container
In preparation for having automated testing with Vulkan traces.
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Andres Gomez [Thu, 20 Feb 2020 13:30:36 +0000 (15:30 +0200)]
gitlab-ci: add missing popd to the build-deqp-vk.sh script
Since we are at it, replace "cd" with pushd / popd and homogenize how
VK-GL-CTS is built in comparison with other build scripts.
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Andres Gomez [Thu, 20 Feb 2020 11:45:21 +0000 (13:45 +0200)]
tracie: correct typo
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Christian Gmeiner [Fri, 17 Jan 2020 09:32:33 +0000 (10:32 +0100)]
etnaviv: fix alpha test on GC3000
Store ref_value in PE_STENCIL_CONFIG_EXT as done by blob.
Fixes following piglits:
spec@ext_framebuffer_object@fbo-alphatest-formats
spec@ext_packed_float@fbo-alphatest-formats
spec@ext_texture_srgb@fbo-alphatest-formats
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4028>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4028>
Christian Gmeiner [Tue, 28 Jan 2020 04:43:06 +0000 (05:43 +0100)]
etnaviv: update headers from rnndb
Update to etna_viv commit
3bc187a.
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4028>
Daniel Stone [Tue, 3 Mar 2020 10:52:32 +0000 (10:52 +0000)]
egl/wayland: Don't invalidate buffers on no-op resize
The Wayland platform's resize_callback is invoked from libwayland-egl
when wl_egl_window_resize() is called. The resize call is the only place
for the application to insert dx/dy arguments to wl_surface_attach().
When modifying the cursor hotspot (as in wayland/wayland#148), we want
to set dx/dy, but leave the surface size the same. If we get
wl_egl_window_resize() with the same width and height argument as we
already have, we do not need to invalidate our existing drawable.
Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4030>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4030>
Andrii Simiklit [Wed, 15 Jan 2020 10:34:38 +0000 (12:34 +0200)]
Revert "glx: convert glx_config_create_list to one big calloc"
This reverts commit
35fc7bdf0e6ad6547e39099e7060a3d89539b56d.
Unfortunately mentioned commit introduced a memory leak because
`driwindowsMapConfigs` and `createDriMode` functions allocate
small memory portions for each element:
21,576 (232 direct, 21,344 indirect) bytes in 1 blocks are definitely lost in loss record 1,411 of 1,414
at 0x483A7F3: malloc (in /usr/lib/x86_64-linux-gnu/valgrind/vgpreload_memcheck-amd64-linux.so)
by 0x5D4AA09: createDriMode (dri_common.c:291)
by 0x5D4ABF5: driConvertConfigs (dri_common.c:310)
by 0x5D58414: dri3_create_screen (dri3_glx.c:945)
by 0x5D39829: AllocAndFetchScreenConfigs (glxext.c:815)
by 0x5D39C57: __glXInitialize (glxext.c:941)
by 0x5D3290A: GetGLXPrivScreenConfig (glxcmds.c:174)
by 0x5D34F38: glXQueryExtensionsString (glxcmds.c:1307)
by 0x4F83038: glXQueryExtensionsString (in /usr/local/lib/libGL.so.1.7.0)
by 0x4F2EA6B: ??? (in /usr/lib/x86_64-linux-gnu/libwaffle-1.so.0.6.0)
by 0x4F2A0D7: waffle_display_connect (in /usr/lib/x86_64-linux-gnu/libwaffle-1.so.0.6.0)
by 0x498F42A: wfl_checked_display_connect (piglit-util-waffle.h:74)
There is one more thing which disallow us to easily fix it are different element sizes
for instance: `glx_config_create_list` allocates memory just for `glx_config`,
`driwindowsMapConfigs` for `driwindows_config` and
`createDriMode` for `__GLXDRIconfigPrivate`.
Yes it is possible but size of such fix
will be more big and complex than original one.
So it make sense only if the malloc overhead
really is a big problem there.
Acked-by: Eric Engestrom <eric@engestrom.ch>
Signed-off-by: Andrii Simiklit <andrii.simiklit@globallogic.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3406>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3406>
Vilya Harvey [Tue, 3 Mar 2020 16:19:29 +0000 (16:19 +0000)]
zink. Don't set incorrect sType in VkImportMemoryFdInfoKHR struct
imfi.sType was being set to an invalid value, triggering a warning in Clang. The only valid value for imfi.sType is VK_STRUCTURE_TYPE_IMPORT_MEMORY_FD_INFO_KHR which is the value it is being given at initialisation time, a few lines earlier. The incorrect value, VK_EXTERNAL_MEMORY_HANDLE_TYPE_OPAQUE_FD_BIT, is supposed to be used in imfi.handleType instead - and indeed, handleType *is* being set to this value a few lines later.
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4034>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4034>
Hyunjun Ko [Tue, 25 Feb 2020 06:35:01 +0000 (06:35 +0000)]
turnip: support indirect draw
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3976>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3976>
Mauro Rossi [Sat, 29 Feb 2020 10:33:49 +0000 (11:33 +0100)]
android: gallium/auxiliary: fix "Unused source files" in tesselator
Avoids the following Android Build System error:
FAILED:
build/make/core/binary.mk:1245: error: external/mesa/src/gallium/auxiliary/Android.mk: libmesa_gallium: Unused source files: tessellator/tessellator.hpp
10:24:30 ckati failed with: exit status 1
Fixes: bd0188f ("gallium/auxiliary: add the microsoft tessellator and a pipe wrapper.")
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Acked-by: Dave Airlie <airlied@redhat.com>
Eric Anholt [Tue, 3 Mar 2020 19:44:45 +0000 (11:44 -0800)]
ci: Flip db410c back to docker mode.
Turns out there's corporate policy to not deploy AGPL software, so I
have to take down the LAVA lab until we sort out how to do it without
a local server.
Reviewed-by: Daniel Stone <daniels@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4038>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4038>
Rafael Antognolli [Tue, 3 Mar 2020 16:07:32 +0000 (08:07 -0800)]
intel/gen12+: Disable mid thread preemption.
Fixes a GPU hang in Car Chase.
Cc: mesa-stable@lists.freedesktop.org
v2: Add comment explaining why (Jason).
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4035>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4035>
Krzysztof Raszkowski [Tue, 3 Mar 2020 15:02:20 +0000 (15:02 +0000)]
Revert "gallium/swr: Fix min/max range index draw"
This reverts commit
5e9a2c603f38308f7027d6a5e4575e5fc24c1bd5
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4032>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4032>
Chris Lord [Fri, 28 Feb 2020 15:18:14 +0000 (15:18 +0000)]
vc4: fix vc4_yuv_blit overwriting fragment constant buffer slot 0
vc4_yuv_blit calls util_blitter_restore_constant_buffer_state without
first calling util_blitter_save_fragment_constant_buffer_slot. This causes
subsequent crashes in vc4_write_uniforms when using fragment shaders that
reference YUV textures.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2581
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3997>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3997>
Rhys Perry [Fri, 21 Feb 2020 12:02:06 +0000 (12:02 +0000)]
aco: handle v_add_co_u32_e64 in parse_base_offset()
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3902>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3902>
Rhys Perry [Fri, 21 Feb 2020 12:00:38 +0000 (12:00 +0000)]
aco: fix carry-out size for wave32 v_add_co_u32_e64
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Fixes: e0bcefc3a0a ('aco/wave32: Use lane mask regclass for exec/vcc.')
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3902>
Jan Zielinski [Thu, 27 Feb 2020 16:22:05 +0000 (17:22 +0100)]
gallium/swr: fix corruptions in Unigine Heaven
Few changes to fix the last corruptions in Heaven:
- fix indirect TCS input when vertex/attribute
index is not the same for each patch
- use the correct functions to build loops in shader
- fix using vmask for writting TCS output
Reviewed-by: Krzysztof Raszkowski <krzysztof.raszkowski@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3980>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3980>
Satyajit Sahu [Thu, 20 Feb 2020 08:35:32 +0000 (14:05 +0530)]
st/va: GetConfigAttributes: check profile and entrypoint combination
Added check if profile is supported or not for the entrypoint in
GetConfigAttributes.
Signed-off-by: Satyajit Sahu <satyajit.sahu@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3889>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3889>
Rafael Antognolli [Fri, 21 Feb 2020 20:03:05 +0000 (12:03 -0800)]
intel/isl: Implement D16_UNORM workarounds.
GEN:BUG:
14010455700 (lineage
1808121037):
"To avoid sporadic corruptions “Set 0x7010[9] when Depth Buffer
Surface Format is D16_UNORM , surface type is not NULL & 1X_MSAA"
Required for fixing ttps://gitlab.freedesktop.org/mesa/mesa/issues/2501.
GEN:BUG:
1806527549:
"Set HIZ_CHICKEN (7018h) bit 13 = 1 when depth buffer is D16_UNORM."
This one could fix a GPU hang in some workloads.
v2: Implement WA in isl and add another similar WA (Jason).
v3: Add flushes before changing chicken registers (Jason)
v4: Depth flush and stall + end of pipe sync when changing registers
(Jason).
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3801>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3801>
Rhys Perry [Tue, 11 Feb 2020 16:52:20 +0000 (16:52 +0000)]
aco: keep track of which events are used in a barrier
And properly handle unordered events so that they always wait for 0.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Fixes: 93c8ebfa780 ('aco: Initial commit of independent AMD compiler')
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3774>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3774>
Thong Thai [Fri, 28 Feb 2020 15:56:49 +0000 (10:56 -0500)]
st/va/postproc: reallocate interlaced destination buffer
When the source buffer is progressive source, re-allocate the
destination buffer as progressive if it isn't already - otherwise
transcoding will fail.
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1418
Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4001>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4001>
Louis-Francis Ratté-Boulianne [Sat, 12 Oct 2019 07:04:22 +0000 (03:04 -0400)]
panfrost: fix transform feedback
Fix different use cases for transform feedback by setting:
- PIPE_CAP_PACKED_STREAM_OUTPUT=0
- PIPE_CAP_VIEWPORT_TRANSFORM_LOWERED=1
- PIPE_CAP_PSIZ_CLAMPED=1
This is enough for all dEQP xfb-related test cases to run
successfully.
Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com> (Update dEQP expectations)
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2433>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2433>
Louis-Francis Ratté-Boulianne [Sat, 12 Oct 2019 07:01:59 +0000 (03:01 -0400)]
gallium: add PIPE_CAP_PSIZ_CLAMPED
This new capability indicates that the point size has been clamped.
This also means that the gl_PointSize has been modified and that
its value should be lowered for transform feedback, if needed.
Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2433>
Louis-Francis Ratté-Boulianne [Sat, 12 Oct 2019 06:59:53 +0000 (02:59 -0400)]
gallium: add PIPE_CAP_VIEWPORT_TRANSFORM_LOWERED
This new capability indicates that the nir_lower_viewport_transform
pass is enabled. This also means that the gl_Position value is
modified and should be lowered for transform feedback, if needed.
Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2433>
Louis-Francis Ratté-Boulianne [Sat, 12 Oct 2019 06:46:48 +0000 (02:46 -0400)]
gallium: add PIPE_CAP_PACKED_STREAM_OUTPUT
Setting this cap to 0 (default is 1) should disable packing
optimization for stream output (e.g. GL transform feedback captured
variables).
Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2433>
Louis-Francis Ratté-Boulianne [Sat, 12 Oct 2019 05:13:54 +0000 (01:13 -0400)]
glsl/linker: add xfb workaround for modified built-in variables
Some lowering passes modify the value of built-in variables in
order for drivers to work properly. However, modifying such values
will also break transform feedback as the captured value won't
match what's expected.
For example, on some hardware, the vertex shaders are expected to
output gl_Position in screen space. However, the transform
feedback captured value is still supposed to be the world-space
coordinates (see nir_lower_viewport_transform).
To fix that, we create a new variable that contains the
pre-transformation value and use it for transform feedback instead
of the built-in one.
Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2433>
Louis-Francis Ratté-Boulianne [Sat, 12 Oct 2019 04:19:50 +0000 (00:19 -0400)]
glsl/linker: handle array/struct members for DisableXfbPacking
When varying packing is disabled for transform feedback and a xfb
declaration points to an array element or structure member, the
element/member should be aligned to the start of a slot as well.
If that's not the case, a new varying is created and the
element/member value is copied.
There might a way to further optimize the number of slots allocated
or the number of copies necessary if the performance cost is
problematic. For example, in cases where simply padding the top
level variable might correctly align all the captured values.
Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2433>
Louis-Francis Ratté-Boulianne [Sat, 12 Oct 2019 04:05:03 +0000 (00:05 -0400)]
glsl/linker: add DisableTransformFeedbackPacking workaround
Some drivers (e.g. Panfrost) don't support packing of varyings when
used for transform feedback. This new constant ensures that any
varying used for xfb is aligned at the start of a slot and won't be
packed with other varyings.
Scenarios where transform feedback declarations are related to an
array element or a struct member will be handled in a subsequent
patch.
Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com> (Fix order of arguments to varying_matches())
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2433>
Rhys Perry [Fri, 28 Feb 2020 19:31:22 +0000 (19:31 +0000)]
spirv: fix memory_barrier_tcs_patch emission
Shouldn't affect any driver, since all currently implement
memory_barrier_tcs_patch as a no-op. It also looks like optimizations are
fine
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4003>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4003>
Rhys Perry [Mon, 2 Mar 2020 13:56:50 +0000 (13:56 +0000)]
spirv: improve creation of memory_barrier
It shouldn't check for atomic counters or return in case we also need to
create a TCS output barrier.
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4003>
Vasily Khoruzhick [Tue, 3 Mar 2020 05:42:48 +0000 (21:42 -0800)]
lima: don't disable tiling if there's linear modifier in list
Instead we should disable it if tiling modifier is not here and we
already do that.
Reviewed-by: Daniel Stone <daniels@collabora.com>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4029>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4029>
Samuel Pitoiset [Mon, 2 Mar 2020 08:07:52 +0000 (09:07 +0100)]
ac: rename min_vgpr_alloc to min_wave64_vgpr_alloc
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3975>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3975>
Samuel Pitoiset [Thu, 27 Feb 2020 07:47:54 +0000 (08:47 +0100)]
ac: rename vgpr_alloc_granularity to wave64_vgpr_alloc_granularity
And update the value.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3975>
Samuel Pitoiset [Thu, 27 Feb 2020 07:45:46 +0000 (08:45 +0100)]
ac: rename lds_size_per_cu to lds_size_per_workgroup
It's more accurate.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3975>
Brian Ho [Thu, 27 Feb 2020 23:48:43 +0000 (18:48 -0500)]
turnip: Execute main cs for secondary command buffers
Previously, we only added the secondary command buffer's draw and
draw epilogue command streams to the primary command buffer on
vkCmdExecuteCommands. However, we also need to merge the primary cs
for non-draw operations like vkCmdCopyBuffer and vkCmdBeginQuery.
Fixes dEQP-VK.memory.pipeline_barrier.host_write_transfer_src.*
and various other tests in dEQP-VK.api.command_buffers.*.
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3988>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3988>
Brian Ho [Fri, 28 Feb 2020 15:33:34 +0000 (10:33 -0500)]
turnip: Promote tu_cs_get_size/is_empty to header
These will be used in tu_cmd_buffer.c.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3988>
Ilia Mirkin [Mon, 2 Mar 2020 03:08:20 +0000 (22:08 -0500)]
nvc0: enable EXT_texture_shadow_lod
This passes all the CTS tests for this extension.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4014>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4014>
Ilia Mirkin [Mon, 2 Mar 2020 02:55:59 +0000 (21:55 -0500)]
st/mesa: allow TXB2/TXL2 to work with cube array shadow textures
It's a bit asymmetric, but it's such a contrived use-case, and not a lot
of drivers will support it.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4014>
Ilia Mirkin [Mon, 2 Mar 2020 00:14:02 +0000 (19:14 -0500)]
nv50,nvc0: add newly added PIPE_CAP's to list
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4014>
Paulo Zanoni [Sat, 29 Feb 2020 00:03:02 +0000 (16:03 -0800)]
anv: multiply the scratch space by 4 on gen9-10 like iris and i965
My understanding is that there's no reason for the scratch space
allocation to be different between iris, i965 and anv. Let's make all
the functions behave the same.
I don't know if this fixes any specific gen9 bugs, it it might since
it increases the scratch space.
v2: Rebase.
v3: Rebase.
v4: Remove redundant gen 11 check (Jason).
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4006>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4006>
Paulo Zanoni [Fri, 24 Jan 2020 22:41:25 +0000 (14:41 -0800)]
intel/device: bdw_gt1 actually has 6 eus per subslice
Found by inspection, I'm not aware of any bugs caused by this typo.
According to Lionel, it seems we only use this to generate masks
of available EUs for perfromance queries, and it's only used when we
can't query the fused parts of the GPU through DRM_IOCTL_I915_QUERY.
So this patch should help for the corner case where the Kernel is too
old to support the query ioctl.
v2: improve commit message, cc stable (Lionel).
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4006>
Paulo Zanoni [Fri, 28 Feb 2020 23:16:07 +0000 (15:16 -0800)]
intel: fix the gen 12 compute shader scratch IDs
This is the same idea as "intel: fix the gen 11 compute shader scratch
IDs".
The number of EUs on TGL is not the same as ICL, but the
MEDIA_VFE_STATE restrictions stay the same, so adapt the code to it.
Also, consider the base configuration instead of what we read from the
Kernel.
According to Mark, this fixes the following piglit tests on TGL:
piglit.spec.arb_compute_shader.execution.shared-atomicmax-uint.tglm64
piglit.spec.arb_compute_shader.execution.shared-atomicmax-int.tglm64
piglit.spec.intel_shader_atomic_float_minmax.execution.shared-atomicmax-float.tglm64
v2: s/ICL+/Gen11+/ (Jason).
Cc: mesa-stable@lists.freedesktop.org
Tested-by: Mark Janes <mark.a.janes@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4006>
projects / mesa.git / log