mesa.git
10 years agoegl_dri2: Remove the unused swap_interval member of dri2_egl_surface
Neil Roberts [Wed, 11 Sep 2013 18:28:32 +0000 (19:28 +0100)]
egl_dri2: Remove the unused swap_interval member of dri2_egl_surface

The _EGLSurface struct which is embedded into dri2_egl_surface also contains a
swap interval member so the other member is redundant. Nothing was using it as
far as I can tell.

10 years agoi965: Replace OUT_RELOC_FENCED with OUT_RELOC.
Kenneth Graunke [Mon, 25 Nov 2013 21:53:33 +0000 (13:53 -0800)]
i965: Replace OUT_RELOC_FENCED with OUT_RELOC.

On Gen4+, OUT_RELOC_FENCED is equivalent to OUT_RELOC; libdrm silently
ignores the fenced flag:

        /* We never use HW fences for rendering on 965+ */
        if (bufmgr_gem->gen >= 4)
                need_fence = false;

Thanks to Eric for noticing this.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
10 years agoglsl/loops: Get rid of lower_bounded_loops and ir_loop::normative_bound.
Paul Berry [Fri, 29 Nov 2013 08:52:11 +0000 (00:52 -0800)]
glsl/loops: Get rid of lower_bounded_loops and ir_loop::normative_bound.

Now that loop_controls no longer creates normatively bound loops,
there is no need for ir_loop::normative_bound or the
lower_bounded_loops pass.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
10 years agoglsl/loops: Stop creating normatively bound loops in loop_controls.
Paul Berry [Fri, 29 Nov 2013 08:16:43 +0000 (00:16 -0800)]
glsl/loops: Stop creating normatively bound loops in loop_controls.

Previously, when loop_controls analyzed a loop and found that it had a
fixed bound (known at compile time), it would remove all of the loop
terminators and instead set the loop's normative_bound field to force
the loop to execute the correct number of times.

This made loop unrolling easy, but it had a serious disadvantage.
Since most GPU's don't have a native mechanism for executing a loop a
fixed number of times, in order to implement the normative bound, the
back-ends would have to synthesize a new loop induction variable.  As
a result, many loops wound up having two induction variables instead
of one.  This caused extra register pressure and unnecessary
instructions.

This patch modifies loop_controls so that it doesn't set the loop's
normative_bound anymore.  Instead it leaves one of the terminators in
the loop (the limiting terminator), so the back-end doesn't have to go
to any extra work to ensure the loop terminates at the right time.

This complicates loop unrolling slightly: when deciding whether a loop
can be unrolled, we have to account for the presence of the limiting
terminator.  And when we do unroll the loop, we have to remove the
limiting terminator first.

For an example of how this results in more efficient back end code,
consider the loop:

    for (int i = 0; i < 100; i++) {
      total += i;
    }

Previous to this patch, on i965, this loop would compile down to this
(vec4) native code:

          mov(8)       g4<1>.xD 0D
          mov(8)       g8<1>.xD 0D
    loop:
          cmp.ge.f0(8) null     g8<4;4,1>.xD 100D
    (+f0) if(8)
          break(8)
          endif(8)
          add(8)       g5<1>.xD g5<4;4,1>.xD g4<4;4,1>.xD
          add(8)       g8<1>.xD g8<4;4,1>.xD 1D
          add(8)       g4<1>.xD g4<4;4,1>.xD 1D
          while(8) loop

(notice that both g8 and g4 are loop induction variables; one is used
to terminate the loop, and the other is used to accumulate the total).

After this patch, the same loop compiles to:

          mov(8)       g4<1>.xD 0D
    loop:
          cmp.ge.f0(8) null     g4<4;4,1>.xD 100D
    (+f0) if(8)
          break(8)
          endif(8)
          add(8)       g5<1>.xD g5<4;4,1>.xD g4<4;4,1>.xD
          add(8)       g4<1>.xD g4<4;4,1>.xD 1D
          while(8) loop

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
10 years agoglsl/loops: Get rid of loop_variable_state::max_iterations.
Paul Berry [Fri, 29 Nov 2013 08:11:12 +0000 (00:11 -0800)]
glsl/loops: Get rid of loop_variable_state::max_iterations.

This value is now redundant with
loop_variable_state::limiting_terminator->iterations and
ir_loop::normative_bound.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
10 years agoglsl/loops: Simplify loop unrolling logic by breaking into functions.
Paul Berry [Fri, 29 Nov 2013 06:12:08 +0000 (22:12 -0800)]
glsl/loops: Simplify loop unrolling logic by breaking into functions.

The old logic of loop_unroll_visitor::visit_leave(ir_loop *) was:

    heuristics to skip unrolling in various circumstances;
    if (loop contains more than one jump)
      return;
    else if (loop contains one jump) {
      if (the jump is an unconditional "break" at the end of the loop) {
        remove the break and set iteration count to 1;
        fall through to simple loop unrolling code;
      } else {
        for (each "if" statement in the loop body)
          see if the jump is a "break" at the end of one of its forks;
        if (the "break" wasn't found)
          return;
        splice the remainder of the loop into the other fork of the "if";
        remove the "break";
        complex loop unrolling code;
        return;
      }
    }
    simple loop unrolling code;
    return;

These tasks have been moved to their own functions:
- splice the remainder of the loop into the other fork of the "if"
- simple loop unrolling code
- complex loop unrolling code

And the logic has been flattened to:

    heuristics to skip unrolling in various circumstances;
    if (loop contains more than one jump)
      return;
    if (loop contains no jumps) {
      simple loop unroll;
      return;
    }
    if (the jump is an unconditional "break" at the end of the loop) {
      remove the break;
      simple loop unroll with iteration count of 1;
      return;
    }
    for (each "if" statement in the loop body) {
      if (the jump is a "break" at the end of one of its forks) {
        splice the remainder of the loop into the other fork of the "if";
        remove the "break";
        complex loop unroll;
        return;
      }
    }

This will make it easier to modify the loop unrolling algorithm in a
future patch.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
10 years agoglsl/loops: Move some analysis from loop_controls to loop_analysis.
Paul Berry [Thu, 28 Nov 2013 22:40:19 +0000 (14:40 -0800)]
glsl/loops: Move some analysis from loop_controls to loop_analysis.

Previously, the sole responsibility of loop_analysis was to find all
the variables referenced in the loop that are either loop constant or
induction variables, and find all of the simple if statements that
might terminate the loop.  The remainder of the analysis necessary to
determine how many times a loop executed was performed by
loop_controls.

This patch makes loop_analysis also responsible for determining the
number of iterations after which each loop terminator will terminate
the loop, and for figuring out which terminator will terminate the
loop first (I'm calling this the "limiting terminator").

This will allow loop unrolling to make use of information that was
previously only visible from loop_controls, namely the identity of the
limiting terminator.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
10 years agoglsl/loops: Allocate loop_terminator using new(mem_ctx) syntax.
Paul Berry [Thu, 28 Nov 2013 22:46:38 +0000 (14:46 -0800)]
glsl/loops: Allocate loop_terminator using new(mem_ctx) syntax.

Patches to follow will introduce code into the loop_terminator
constructor.  Allocating loop_terminator using new(mem_ctx) syntax
will ensure that the constructor runs.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
10 years agoglsl/loops: Remove unnecessary list walk from loop_control_visitor.
Paul Berry [Thu, 28 Nov 2013 20:44:53 +0000 (12:44 -0800)]
glsl/loops: Remove unnecessary list walk from loop_control_visitor.

When loop_control_visitor::visit_leave(ir_loop *) is analyzing a loop
terminator that acts on a certain ir_variable, it doesn't need to walk
the list of induction variables to find the loop_variable entry
corresponding to the variable.  It can just look it up in the
loop_variable_state hashtable and verify that the loop_variable entry
represents an induction variable.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
10 years agoglsl/loops: Remove unused fields iv_scale and biv from loop_variable class.
Paul Berry [Thu, 28 Nov 2013 20:17:54 +0000 (12:17 -0800)]
glsl/loops: Remove unused fields iv_scale and biv from loop_variable class.

These fields were part of some planned optimizations that never
materialized.  Remove them for now to simplify things; if we ever get
round to adding the optimizations that would require them, we can
always re-introduce them.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
10 years agoglsl/loops: replace loop controls with a normative bound.
Paul Berry [Thu, 28 Nov 2013 16:13:41 +0000 (08:13 -0800)]
glsl/loops: replace loop controls with a normative bound.

This patch replaces the ir_loop fields "from", "to", "increment",
"counter", and "cmp" with a single integer ("normative_bound") that
serves the same purpose.

I've used the name "normative_bound" to emphasize the fact that the
back-end is required to emit code to prevent the loop from running
more than normative_bound times.  (By contrast, an "informative" bound
would be a bound that is informational only).

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
10 years agoglsl/loops: consolidate bounded loop handling into a lowering pass.
Paul Berry [Thu, 28 Nov 2013 01:57:19 +0000 (17:57 -0800)]
glsl/loops: consolidate bounded loop handling into a lowering pass.

Previously, all of the back-ends (ir_to_mesa, st_glsl_to_tgsi, and the
i965 fs and vec4 visitors) had nearly identical logic for handling
bounded loops.  This replaces the duplicate logic with an equivalent
lowering pass that is used by all the back-ends.

Note: on i965, there is a slight increase in instruction count.  For
example, a loop like this:

    for (int i = 0; i < 100; i++) {
      total += i;
    }

would previously compile down to this (vec4) native code:

          mov(8)       g4<1>.xD 0D
          mov(8)       g8<1>.xD 0D
    loop:
          cmp.ge.f0(8) null     g8<4;4,1>.xD 100D
    (+f0) break(8)
          add(8)       g5<1>.xD g5<4;4,1>.xD g4<4;4,1>.xD
          add(8)       g8<1>.xD g8<4;4,1>.xD 1D
          add(8)       g4<1>.xD g4<4;4,1>.xD 1D
          while(8) loop

After this patch, the "(+f0) break(8)" turns into:

    (+f0) if(8)
          break(8)
          endif(8)

because the back-end isn't smart enough to recognize that "if
(condition) break;" can be done using a conditional break instruction.
However, it should be relatively easy for a future peephole
optimization to properly optimize this.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
10 years agoglsl: In loop analysis, handle unconditional second assignment.
Paul Berry [Thu, 28 Nov 2013 19:11:17 +0000 (11:11 -0800)]
glsl: In loop analysis, handle unconditional second assignment.

Previously, loop analysis would set
this->conditional_or_nested_assignment based on the most recently
visited assignment to the variable.  As a result, if a vaiable was
assigned to more than once in a loop, the flag might be set
incorrectly.  For example, in a loop like this:

    int x;
    for (int i = 0; i < 3; i++) {
      if (i == 0)
        x = 10;
      ...
      x = 20;
      ...
    }

loop analysis would have incorrectly concluded that all assignments to
x were unconditional.

In practice this was a benign bug, because
conditional_or_nested_assignment is only used to disqualify variables
from being considered as loop induction variables or loop constant
variables, and having multiple assignments also disqualifies a
variable from being considered as either of those things.

Still, we should get the analysis correct to avoid future confusion.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
10 years agoglsl: Fix handling of function calls inside nested loops.
Paul Berry [Thu, 28 Nov 2013 19:06:43 +0000 (11:06 -0800)]
glsl: Fix handling of function calls inside nested loops.

Previously, when visiting an ir_call, loop analysis would only mark
the innermost enclosing loop as containing a call.  As a result, when
encountering a loop like this:

    for (i = 0; i < 3; i++) {
      for (int j = 0; j < 3; j++) {
        foo();
      }
    }

it would incorrectly conclude that the outer loop ran three times.
(This is not certain; if foo() modifies i, then the outer loop might
run more or fewer times).

Fixes piglit test "vs-call-in-nested-loop.shader_test".

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
10 years agoglsl: Fix loop analysis of nested loops.
Paul Berry [Thu, 28 Nov 2013 18:48:37 +0000 (10:48 -0800)]
glsl: Fix loop analysis of nested loops.

Previously, when visiting a variable dereference, loop analysis would
only consider its effect on the innermost enclosing loop.  As a
result, when encountering a loop like this:

    for (int i = 0; i < 3; i++) {
      for (int j = 0; j < 3; j++) {
        ...
        i = 2;
      }
    }

it would incorrectly conclude that the outer loop ran three times.

Fixes piglit test "vs-inner-loop-modifies-outer-loop-var.shader_test".

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
10 years agoglsl: Extract functions from loop_analysis::visit(ir_dereference_variable *).
Paul Berry [Thu, 28 Nov 2013 18:42:01 +0000 (10:42 -0800)]
glsl: Extract functions from loop_analysis::visit(ir_dereference_variable *).

This function is about to get more complex.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
10 years agoi965/gen7+: Implement fast color clears for MSAA buffers.
Paul Berry [Tue, 3 Dec 2013 20:00:49 +0000 (12:00 -0800)]
i965/gen7+: Implement fast color clears for MSAA buffers.

Fast color clears of MSAA buffers work just like fast color clears
with non-MSAA buffers, except that the alignment and scaledown
requirements are different.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
10 years agoi965/blorp: Refactor code for computing fast clear align/scaledown factors.
Paul Berry [Tue, 3 Dec 2013 19:40:23 +0000 (11:40 -0800)]
i965/blorp: Refactor code for computing fast clear align/scaledown factors.

This will make it easier to add fast color clear support to MSAA
buffers, since they have different alignment and scaling requirements.

Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
10 years agoi965/blorp: allow multisample blorp clears
Paul Berry [Tue, 3 Dec 2013 16:48:41 +0000 (08:48 -0800)]
i965/blorp: allow multisample blorp clears

Previously, we didn't do multisample blorp clears because we couldn't
figure out how to get them to work.  The reason for this was because
we weren't setting the brw_blorp_params num_samples field consistently
with dst.num_samples.  Now that those two fields have been collapsed
down into one, we can do multisample blorp clears.

However, we need to do a few other pieces of bookkeeping to make them
work correctly in all circumstances:

- Since blorp clears may now operate on multisampled window system
  framebuffers, they need to call
  intel_renderbuffer_set_needs_downsample() to ensure that a
  downsample happens before buffer swap (or glReadPixels()).

- When clearing a layered multisample buffer attachment using UMS or
  CMS layout, we need to advance layer by multiples of num_samples
  (since each logical layer is associated with num_samples physical
  layers).

Note: we still don't do multisample fast color clears; more work needs
to be done to enable those.

Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
10 years agoi965/blorp: Get rid of redundant num_samples blorp param.
Paul Berry [Tue, 3 Dec 2013 17:44:46 +0000 (09:44 -0800)]
i965/blorp: Get rid of redundant num_samples blorp param.

Previously, brw_blorp_params contained two fields for determining
sample count: num_samples (which determined the multisample
configuration of the rendering pipeline) and dst.num_samples (which
determined the multisample configuration of the render target
surface).  This was redundant, since both fields had to be set to the
same value to avoid rendering errors.

This patch eliminates num_samples to avoid future confusion.

Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
10 years agoi965/gen7+: Disentangle MSAA layout from fast clear state.
Paul Berry [Tue, 3 Dec 2013 16:33:41 +0000 (08:33 -0800)]
i965/gen7+: Disentangle MSAA layout from fast clear state.

This patch renames the enum that's used to keep track of fast clear
state from "mcs_state" to "fast_clear_state", and it removes the enum
value INTEL_MCS_STATE_MSAA (which previously meant, "this is an MSAA
buffer, so we're not keeping track of fast clear state").  The only
real purpose that enum value was serving was to prevent us from trying
to do fast clear resolves on MSAA buffers, and it's just as easy to
prevent that by checking the buffer's msaa_layout.

This paves the way for implementing fast clears of MSAA buffers.

Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
10 years agoi965: Don't try to use HW blitter for glCopyPixels() when multisampled.
Paul Berry [Tue, 3 Dec 2013 23:41:14 +0000 (15:41 -0800)]
i965: Don't try to use HW blitter for glCopyPixels() when multisampled.

The hardware blitter doesn't understand multisampled layouts, so
there's no way this could possibly succeed.

Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
10 years agoi965: Document conventions for counting layers in 2D multisample buffers.
Paul Berry [Wed, 4 Dec 2013 05:15:47 +0000 (21:15 -0800)]
i965: Document conventions for counting layers in 2D multisample buffers.

The "layer" parameters used in blorp, and the
intel_renderbuffer::mt_layer field, represent a physical layer rather
than a logical layer.  This is important for 2D multisample arrays on
Gen7+ because the UMS and CMS multisample layouts use N physical
layers to represent each logical layer, where N is the number of
samples.

Also add an assertion to blorp to help catch bugs if we fail to follow
these conventions.

Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
10 years agoi965/blorp: Improve fast color clear comment.
Paul Berry [Thu, 5 Dec 2013 12:34:42 +0000 (04:34 -0800)]
i965/blorp: Improve fast color clear comment.

Clarify the fact that we only optimize full buffer clears using fast
color clear, and why.

Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
10 years agor300/compiler/tests: Fix line length check in test parser
Tom Stellard [Tue, 3 Dec 2013 02:04:58 +0000 (21:04 -0500)]
r300/compiler/tests: Fix line length check in test parser

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
CC: "9.2" "10.0" <mesa-stable@lists.freedesktop.org>
10 years agor300/compiler/tests: Fix segfault
Tom Stellard [Tue, 3 Dec 2013 02:04:42 +0000 (21:04 -0500)]
r300/compiler/tests: Fix segfault

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
CC: "9.2" "10.0" <mesa-stable@lists.freedesktop.org>
10 years agonouveau/video: update a few more h264 picparm field names
Ilia Mirkin [Sat, 7 Dec 2013 17:59:25 +0000 (12:59 -0500)]
nouveau/video: update a few more h264 picparm field names

Based on comments by Benjamin Morris <bmorris@nvidia.com> in
http://lists.freedesktop.org/archives/nouveau/2013-December/015328.html

This adds setting of is_long_term, and updates a few field names we were
unclear about.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.0" <mesa-stable@lists.freedesktop.org>
10 years agonouveau/video: update h264 picparm field names based on usage
Ilia Mirkin [Sat, 7 Dec 2013 17:00:47 +0000 (12:00 -0500)]
nouveau/video: update h264 picparm field names based on usage

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.0" <mesa-stable@lists.freedesktop.org>
10 years agonv50: enable h264 and mpeg4 for nv98+ (vp3, vp4.0)
Ilia Mirkin [Sat, 7 Dec 2013 04:30:04 +0000 (23:30 -0500)]
nv50: enable h264 and mpeg4 for nv98+ (vp3, vp4.0)

Create the ref_bo without any storage type flags set for now. The issue
probably arises from our use of the additional buffer space at the end
of the ref_bo. It should probably be split up in the future.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Tested-by: Martin Peres <martin.peres@labri.fr>
Cc: "10.0" <mesa-stable@lists.freedesktop.org>
10 years agonvc0: make sure nvd7 gets NVC8_3D_CLASS as well
Ilia Mirkin [Fri, 6 Dec 2013 02:43:07 +0000 (21:43 -0500)]
nvc0: make sure nvd7 gets NVC8_3D_CLASS as well

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
10 years agonv50: TXF already has integer arguments, don't try to convert from f32
Ilia Mirkin [Fri, 29 Nov 2013 06:18:57 +0000 (01:18 -0500)]
nv50: TXF already has integer arguments, don't try to convert from f32

Fixes the texelFetch piglit tests

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
10 years agollvmpipe: clamp fragment shader depth write to the current viewport depth range.
Matthew McClure [Tue, 26 Nov 2013 18:50:27 +0000 (10:50 -0800)]
llvmpipe: clamp fragment shader depth write to the current viewport depth range.

With this patch, generate_fs_loop will clamp any fragment shader depth writes
to the viewport's min and max depth values. Viewport selection is determined
by the geometry shader output for the viewport array index. If no index is
specified, then the default viewport index is zero. Semantics for this path
can be found in draw_clamp_viewport_idx and lp_clamp_viewport_idx.

lp_jit_viewport was created to store viewport information visible to JIT code,
and is validated when the LP_NEW_VIEWPORT dirty flag is set.

lp_rast_shader_inputs is responsible for passing the viewport_index through
the rasterizer stage to fragment stage (via lp_jit_thread_data).

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: José Fonseca <jfonseca@vmware.com>
10 years agowayland: Add support for eglSwapInterval
Neil Roberts [Fri, 15 Nov 2013 13:50:50 +0000 (13:50 +0000)]
wayland: Add support for eglSwapInterval

The Wayland EGL platform now respects the eglSwapInterval value. The value is
clamped to either 0 or 1 because it is difficult (and probably not useful) to
sync to more than 1 redraw.

The main change is that if the swap interval is 0 then Mesa won't install a
frame callback so that eglSwapBuffers can be executed as often as necessary.
Instead it will do a sync request after the swap buffers. It will block for
sync complete event in get_back_bo instead of the frame callback. The
compositor is likely to send a release event while processing the new buffer
attach and this makes sure we will receive that before deciding whether to
allocate a new buffer.

If there are no buffers available then instead of returning with an error,
get_back_bo will now poll the compositor by repeatedly sending sync requests
every 10ms. This is a last resort and in theory this shouldn't happen because
there should be no reason for the compositor to hold on to more than three
buffers. That means whenever we attach the fourth buffer we should always get
an immediate release event which should come in with the notification for the
first sync request that we are throttled to.

When the compositor is directly scanning out from the application's buffer it
may end up holding on to three buffers. These are the one that is is currently
scanning out from, one that has been given to DRM as the next buffer to flip
to, and one that has been attached and will be given to DRM as soon as the
previous flip completes. When we attach a fourth buffer to the compositor it
should replace that third buffer so we should get a release event immediately
after that. This patch therefore also changes the number of buffer slots to 4
so that we can accomodate that situation.

If DRM eventually gets a way to cancel a pending page flip then the compositors
can be changed to only need to hold on to two buffers and this value can be
put back to 3.

This also moves the vblank configuration defines from platform_x11.c to the
common egl_dri2.h header so they can be shared by both platforms.

10 years agowayland: Block for the frame callback in get_back_bo not dri2_swap_buffers
Neil Roberts [Fri, 15 Nov 2013 13:50:49 +0000 (13:50 +0000)]
wayland: Block for the frame callback in get_back_bo not dri2_swap_buffers

Consider a typical game-style main loop which might be like this:

while (1) {
draw_something();
eglSwapBuffers();
}

In this case the game is relying on eglSwapBuffers to throttle to a sensible
frame rate. Previously this game would end up using three buffers even though
it should only need two. This is because Mesa decides whether to allocate a
new buffer in get_back_bo which would be before it has tried to read any
events from the compositor so it wouldn't have seen any buffer release events
yet.

This patch just moves the block for the frame callback to get_back_bo.
Typically the compositor will send a release event immediately after one of
the attaches so if we block for the frame callback here then we can be sure to
have completed at least one roundtrip and received that release event after
attaching the previous buffer before deciding whether to allocate a new one.

dri2_swap_buffers always calls get_back_bo so even if the client doesn't
render anything we will still be sure to block to the frame callback. The code
to create the new frame callback has been moved to after this call so that we
can be sure to have cleared the previous frame callback before requesting a
new one.

10 years agoglapi: Do not include dlfcn.h on Windows.
Vinson Lee [Fri, 11 Oct 2013 01:13:25 +0000 (18:13 -0700)]
glapi: Do not include dlfcn.h on Windows.

This patch fixes this MinGW build error.

  CC     glapi_gentable.lo
glapi_gentable.c:47:19: fatal error: dlfcn.h: No such file or directory

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Brian Paul <brianp@vmware.com>
10 years agor600/llvm: Allow arbitrary amount of temps in tgsi to llvm
Vincent Lejeune [Sun, 1 Dec 2013 23:54:44 +0000 (00:54 +0100)]
r600/llvm: Allow arbitrary amount of temps in tgsi to llvm

10 years agofreedreno/a3xx: add adreno 330 support
Rob Clark [Sat, 7 Dec 2013 13:47:10 +0000 (08:47 -0500)]
freedreno/a3xx: add adreno 330 support

Signed-off-by: Rob Clark <robclark@freedesktop.org>
10 years agofreedreno/a3xx/compiler: add ROUND
Rob Clark [Sat, 7 Dec 2013 13:01:29 +0000 (08:01 -0500)]
freedreno/a3xx/compiler: add ROUND

Signed-off-by: Rob Clark <robclark@freedesktop.org>
10 years agomesa: Require per-sample shading if the `sample` qualifier is used.
Chris Forbes [Fri, 29 Nov 2013 08:44:13 +0000 (21:44 +1300)]
mesa: Require per-sample shading if the `sample` qualifier is used.

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
10 years agoglsl: Populate gl_fragment_program::IsSample bitfield
Chris Forbes [Fri, 29 Nov 2013 08:30:58 +0000 (21:30 +1300)]
glsl: Populate gl_fragment_program::IsSample bitfield

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
10 years agomesa: add IsSample bitfield to gl_fragment_program
Chris Forbes [Fri, 29 Nov 2013 08:30:00 +0000 (21:30 +1300)]
mesa: add IsSample bitfield to gl_fragment_program

Drivers will need to look at this to decide if they need to do
per-sample fragment shader dispatch.

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
10 years agoglsl: Put `sample`-qualified varyings in their own packing classes
Chris Forbes [Fri, 29 Nov 2013 08:28:32 +0000 (21:28 +1300)]
glsl: Put `sample`-qualified varyings in their own packing classes

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
10 years agoglsl: Add ir support for `sample` qualifier; adjust compiler and linker
Chris Forbes [Fri, 29 Nov 2013 08:26:10 +0000 (21:26 +1300)]
glsl: Add ir support for `sample` qualifier; adjust compiler and linker

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
10 years agoglsl: Add frontend support for `sample` auxiliary storage qualifier
Chris Forbes [Fri, 29 Nov 2013 08:21:56 +0000 (21:21 +1300)]
glsl: Add frontend support for `sample` auxiliary storage qualifier

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
10 years agoi965: Don't flag gather quirks for Gen8+
Chris Forbes [Fri, 29 Nov 2013 09:04:58 +0000 (22:04 +1300)]
i965: Don't flag gather quirks for Gen8+

My understanding is that Broadwell retains the same SCS mechanism
that Haswell has, so even if the underlying issue with this format
is not fixed, the w/a will be applied in SCS rather than needing
shader code.

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Cc: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
10 years agoi965/Gen7: Allow CMS layout for multisample textures
Chris Forbes [Fri, 29 Nov 2013 21:03:10 +0000 (10:03 +1300)]
i965/Gen7: Allow CMS layout for multisample textures

Now that all the pieces are in place, this should provide
a nice performance boost for apps using multisample textures.

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
10 years agoi965/vs: Sample from MCS surface when required
Chris Forbes [Sat, 30 Nov 2013 00:49:50 +0000 (13:49 +1300)]
i965/vs: Sample from MCS surface when required

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
10 years agoi965/fs: Sample from MCS surface when required
Chris Forbes [Fri, 29 Nov 2013 22:16:38 +0000 (11:16 +1300)]
i965/fs: Sample from MCS surface when required

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
10 years agoi965: Add shader opcode for sampling MCS surface
Chris Forbes [Fri, 29 Nov 2013 21:32:16 +0000 (10:32 +1300)]
i965: Add shader opcode for sampling MCS surface

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
10 years agoi965/Gen7: Include bitfield in the sampler key for CMS layout
Chris Forbes [Fri, 29 Nov 2013 21:01:12 +0000 (10:01 +1300)]
i965/Gen7: Include bitfield in the sampler key for CMS layout

We need to emit extra shader code in this case to sample the
MCS surface first; we can't just blindly do this all the time
since IVB will sometimes try to access the MCS surface even if
disabled.

V3: Use actual MSAA layout from the texture's mt, rather
then computing what would have been used based on the format.
This is simpler and less fragile - there's at least one case where
we might want to have a texture's MSAA layout change based on what
the app does (CMS SINT falling back to UMS if the app ever attempts
to render to it with a channel disabled.)

This also obsoletes V2's 1/10 -- compute_msaa_layout can now remain
an implementation detail of the miptree code.

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
10 years agoi965/Gen7: Move decision to allocate MCS surface into intel_mipmap_create
Chris Forbes [Sat, 30 Nov 2013 22:44:39 +0000 (11:44 +1300)]
i965/Gen7: Move decision to allocate MCS surface into intel_mipmap_create

This gives us correct behavior for both renderbuffers (which previously
worked) and multisample textures (which would never get an MCS surface
allocated, even if CMS layout was selected)

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
10 years agoi965/Gen7: emit mcs info for multisample textures
Chris Forbes [Sat, 30 Nov 2013 22:30:45 +0000 (11:30 +1300)]
i965/Gen7: emit mcs info for multisample textures

Previously this was only done for render targets.

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
10 years agoi965/wm: Set copy of sample mask in 3DSTATE_PS correctly for Haswell
Chris Forbes [Sat, 30 Nov 2013 22:07:46 +0000 (11:07 +1300)]
i965/wm: Set copy of sample mask in 3DSTATE_PS correctly for Haswell

The bspec says:

"SW must program the sample mask value in this field so that it matches
with 3DSTATE_SAMPLE_MASK"

I haven't observed this to actually fix anything, but stumbled across it
while adding the rest of the support for CMS layout for multisample
   textures.

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
10 years agoi965: refactor sample mask calculation
Chris Forbes [Sat, 30 Nov 2013 22:03:41 +0000 (11:03 +1300)]
i965: refactor sample mask calculation

Haswell needs a copy of the sample mask in 3DSTATE_PS; this makes that
convenient.

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
10 years agoglsl: Don't emit empty declaration warning for a struct specifier
Ian Romanick [Wed, 27 Nov 2013 19:22:27 +0000 (11:22 -0800)]
glsl: Don't emit empty declaration warning for a struct specifier

The intention is that things like

   int;

will generate a warning.  However, we were also accidentally emitting
the same warning for things like

  struct Foo { int x; };

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=68838
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: Aras Pranckevicius <aras@unity3d.com>
Cc: "9.2 10.0" <mesa-stable@lists.freedesktop.org>
10 years agost/xa: Bump major version number to 2
Thomas Hellstrom [Thu, 5 Dec 2013 11:55:43 +0000 (03:55 -0800)]
st/xa: Bump major version number to 2

For some reason this was left out when the version was changed...

Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Jakob Bornecrantz <jakob@vmware.com>
10 years agonvc0: fixup gk110 and up not being listed in various switch statements
Ben Skeggs [Thu, 5 Dec 2013 23:09:42 +0000 (09:09 +1000)]
nvc0: fixup gk110 and up not being listed in various switch statements

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
10 years agoi965: Replace non-standard INLINE macro with "inline".
Kenneth Graunke [Mon, 2 Dec 2013 21:39:40 +0000 (13:39 -0800)]
i965: Replace non-standard INLINE macro with "inline".

These are identical: main/compiler.h defines INLINE to "inline".

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
10 years agoi965: Don't use GL types in files shared with intel-gpu-tools.
Kenneth Graunke [Mon, 25 Nov 2013 23:51:24 +0000 (15:51 -0800)]
i965: Don't use GL types in files shared with intel-gpu-tools.

sed -i -e 's/GLuint/unsigned/g' -e 's/GLint/int/g' \
       -e 's/GLfloat/float/g' -e 's/GLubyte/uint8_t/g' \
       -e 's/GLshort/int16_t/g' \
       brw_eu* brw_disasm.c brw_structs.h

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
10 years agoi965: Drop trailing whitespace from the rest of the driver.
Kenneth Graunke [Mon, 25 Nov 2013 23:46:34 +0000 (15:46 -0800)]
i965: Drop trailing whitespace from the rest of the driver.

Performed via:
$ for file in *; do sed -i 's/  *//g'; done

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
10 years agoi965: Drop trailing whitespace from files shared with intel-gpu-tools.
Kenneth Graunke [Mon, 25 Nov 2013 23:39:03 +0000 (15:39 -0800)]
i965: Drop trailing whitespace from files shared with intel-gpu-tools.

Performed via s/  *$//g.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
10 years agotools/trace: More tweaks to state dumping.
José Fonseca [Thu, 5 Dec 2013 13:29:29 +0000 (13:29 +0000)]
tools/trace: More tweaks to state dumping.

- Ignore buffer format (it is totally arbitrary)
- Initialize state.
- Handle begin/end_query statements.

10 years agotrace: Reorder dumping of pipe_rasterizer_state.
José Fonseca [Thu, 5 Dec 2013 13:25:38 +0000 (13:25 +0000)]
trace: Reorder dumping of pipe_rasterizer_state.

Such that it matches the pipe_rasterizer_state declaration, making it
easier to double-check that all state is being actually dumped.

Trivial.

10 years agotrace: Dump pipe_sampler_state::seamless_cube_map.
José Fonseca [Thu, 5 Dec 2013 13:24:59 +0000 (13:24 +0000)]
trace: Dump pipe_sampler_state::seamless_cube_map.

Trivial.

10 years agoradeonsi: Remove some stale XXX / FIXME comments
Michel Dänzer [Wed, 4 Dec 2013 04:37:07 +0000 (13:37 +0900)]
radeonsi: Remove some stale XXX / FIXME comments

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
10 years agoi965: Emit better code for ir_unop_sign.
Matt Turner [Mon, 25 Nov 2013 06:44:32 +0000 (22:44 -0800)]
i965: Emit better code for ir_unop_sign.

total instructions in shared programs: 1550449 -> 1550048 (-0.03%)
instructions in affected programs:     15207 -> 14806 (-2.64%)

Reviewed-by: Paul Berry <stereotype441@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
10 years agoi965/fs: New peephole optimization to flatten IF/BREAK/ENDIF.
Matt Turner [Wed, 23 Oct 2013 00:51:28 +0000 (17:51 -0700)]
i965/fs: New peephole optimization to flatten IF/BREAK/ENDIF.

total instructions in shared programs: 1550713 -> 1550449 (-0.02%)
instructions in affected programs:     7931 -> 7667 (-3.33%)

Reviewed-by: Paul Berry <stereotype441@gmail.com>
10 years agoi965/fs: Emit a MOV instead of a SEL if the sources are the same.
Matt Turner [Mon, 28 Oct 2013 00:09:41 +0000 (17:09 -0700)]
i965/fs: Emit a MOV instead of a SEL if the sources are the same.

One program affected.

instructions in affected programs:     436 -> 428 (-1.83%)

Reviewed-by: Paul Berry <stereotype441@gmail.com>
10 years agoi965/fs: Extend SEL peephole to handle only matching MOVs.
Matt Turner [Wed, 30 Oct 2013 04:39:52 +0000 (21:39 -0700)]
i965/fs: Extend SEL peephole to handle only matching MOVs.

Before this patch, the following code would not be optimized even though
the first two instructions were common to the then and else blocks:

   (+f0) IF
   MOV dst0 ...
   MOV dst1 ...
   MOV dst2 ...
   ELSE
   MOV dst0 ...
   MOV dst1 ...
   MOV dst3 ...
   ENDIF

This commit extends the peephole to handle this case.

No shader-db changes.

Reviewed-by: Paul Berry <stereotype441@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
10 years agoi965/fs: New peephole optimization to generate SEL.
Matt Turner [Wed, 23 Oct 2013 00:51:28 +0000 (17:51 -0700)]
i965/fs: New peephole optimization to generate SEL.

fs_visitor::try_replace_with_sel optimizes only if statements whose
"then" and "else" bodies contain a single MOV instruction. It also
could not handle constant arguments, since they cause an extra MOV
immediate to be generated (since we haven't run constant propagation,
there are more than the single MOV).

This peephole fixes both of these and operates as a normal optimization
pass.

fs_visitor::try_replace_with_sel is still arguably necessary, since it
runs before pull constant loads are lowered.

total instructions in shared programs: 1559129 -> 1545833 (-0.85%)
instructions in affected programs:     167120 -> 153824 (-7.96%)
GAINED:                                13
LOST:                                  6

Reviewed-by: Paul Berry <stereotype441@gmail.com>
10 years agoi965/fs: Add SEL() convenience function.
Matt Turner [Wed, 23 Oct 2013 02:04:14 +0000 (19:04 -0700)]
i965/fs: Add SEL() convenience function.

Reviewed-by: Paul Berry <stereotype441@gmail.com>
10 years agoglsl: Use fabs() on floating point values.
Matt Turner [Tue, 26 Nov 2013 06:18:28 +0000 (22:18 -0800)]
glsl: Use fabs() on floating point values.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
10 years agoi965: Print conditional mod in dump_instruction().
Matt Turner [Sun, 20 Oct 2013 22:48:14 +0000 (15:48 -0700)]
i965: Print conditional mod in dump_instruction().

Reviewed-by: Eric Anholt <eric@anholt.net>
10 years agoi965: Externalize conditional_modifier for use in dump_instruction().
Matt Turner [Mon, 2 Dec 2013 21:15:45 +0000 (13:15 -0800)]
i965: Externalize conditional_modifier for use in dump_instruction().

Reviewed-by: Eric Anholt <eric@anholt.net>
10 years agoi965: Print argument types in dump_instruction().
Matt Turner [Mon, 2 Dec 2013 21:10:29 +0000 (13:10 -0800)]
i965: Print argument types in dump_instruction().

Reviewed-by: Eric Anholt <eric@anholt.net>
10 years agoi965: Externalize reg_encoding for use in dump_instruction().
Matt Turner [Mon, 2 Dec 2013 20:58:45 +0000 (12:58 -0800)]
i965: Externalize reg_encoding for use in dump_instruction().

Reviewed-by: Eric Anholt <eric@anholt.net>
10 years agoi965/vec4: Don't print swizzles for immediate values.
Matt Turner [Mon, 2 Dec 2013 20:43:50 +0000 (12:43 -0800)]
i965/vec4: Don't print swizzles for immediate values.

Reviewed-by: Eric Anholt <eric@anholt.net>
10 years agoi965/vec4: Print negate and absolute value for src args.
Matt Turner [Mon, 2 Dec 2013 20:41:16 +0000 (12:41 -0800)]
i965/vec4: Print negate and absolute value for src args.

Reviewed-by: Eric Anholt <eric@anholt.net>
10 years agoi965/vec4: Add support for printing HW_REGs in dump_instruction().
Matt Turner [Tue, 26 Nov 2013 06:17:29 +0000 (22:17 -0800)]
i965/vec4: Add support for printing HW_REGs in dump_instruction().

Reviewed-by: Eric Anholt <eric@anholt.net>
10 years agoi965/fs: Print ARF registers properly in dump_instruction().
Matt Turner [Mon, 25 Nov 2013 23:37:18 +0000 (15:37 -0800)]
i965/fs: Print ARF registers properly in dump_instruction().

Reviewed-by: Eric Anholt <eric@anholt.net>
10 years agoi965: Don't print extra (null) arguments in dump_instruction().
Matt Turner [Mon, 25 Nov 2013 23:15:25 +0000 (15:15 -0800)]
i965: Don't print extra (null) arguments in dump_instruction().

Reviewed-by: Eric Anholt <eric@anholt.net>
10 years agoglsl: Remove silly OR(..., 0x0) from ldexp() lowering.
Matt Turner [Wed, 27 Nov 2013 22:23:50 +0000 (14:23 -0800)]
glsl: Remove silly OR(..., 0x0) from ldexp() lowering.

I translated copysign(0.0f, x) a little too literally.

Reviewed-by: Eric Anholt <eric@anholt.net>
10 years agoi965: Allow commuting the operands of ADDC for const propagation.
Matt Turner [Thu, 28 Nov 2013 00:14:14 +0000 (16:14 -0800)]
i965: Allow commuting the operands of ADDC for const propagation.

Reviewed-by: Eric Anholt <eric@anholt.net>
10 years agoi965/fs: Rename register_coalesce_2() -> register_coalesce().
Matt Turner [Sat, 30 Nov 2013 06:16:14 +0000 (22:16 -0800)]
i965/fs: Rename register_coalesce_2() -> register_coalesce().

Reviewed-by: Eric Anholt <eric@anholt.net>
10 years agoi965/fs: Remove now useless register_coalesce() pass.
Matt Turner [Sat, 30 Nov 2013 06:14:14 +0000 (22:14 -0800)]
i965/fs: Remove now useless register_coalesce() pass.

Reviewed-by: Eric Anholt <eric@anholt.net>
10 years agoi965/fs: Let register_coalesce_2() eliminate self-moves.
Matt Turner [Fri, 29 Nov 2013 19:28:54 +0000 (11:28 -0800)]
i965/fs: Let register_coalesce_2() eliminate self-moves.

This is the last thing that register_coalesce() still handled.

total instructions in shared programs: 1561060 -> 1560908 (-0.01%)
instructions in affected programs:     15758 -> 15606 (-0.96%)

Reviewed-by: Eric Anholt <eric@anholt.net>
10 years agoi965: Allow constant propagation into ASR and BFI1.
Matt Turner [Tue, 26 Nov 2013 21:49:31 +0000 (13:49 -0800)]
i965: Allow constant propagation into ASR and BFI1.

Reviewed-by: Eric Anholt <eric@anholt.net>
10 years agoi965/cfg: Document cur_* variables.
Matt Turner [Mon, 2 Dec 2013 18:29:49 +0000 (10:29 -0800)]
i965/cfg: Document cur_* variables.

Reviewed-by: Eric Anholt <eric@anholt.net>
10 years agoi965/cfg: Remove ip & cur from brw_cfg.
Matt Turner [Sun, 1 Dec 2013 04:38:48 +0000 (20:38 -0800)]
i965/cfg: Remove ip & cur from brw_cfg.

Reviewed-by: Eric Anholt <eric@anholt.net>
10 years agoi965/cfg: Clean up cfg_t constructors.
Matt Turner [Fri, 29 Nov 2013 07:24:44 +0000 (23:24 -0800)]
i965/cfg: Clean up cfg_t constructors.

parent_mem_ctx was unused since db47074a, so remove the two wrappers
around create() and make create() the constructor.

Reviewed-by: Eric Anholt <eric@anholt.net>
10 years agoi965/cfg: Throw out confusing make_list method.
Matt Turner [Tue, 26 Nov 2013 23:25:44 +0000 (15:25 -0800)]
i965/cfg: Throw out confusing make_list method.

make_list is just a one-line wrapper and was confusingly called by
NULL objects. E.g., cur_if == NULL; cur_if->make_list(mem_ctx).

Reviewed-by: Eric Anholt <eric@anholt.net>
10 years agoi965/cfg: Include only needed headers.
Matt Turner [Sun, 1 Dec 2013 00:39:43 +0000 (16:39 -0800)]
i965/cfg: Include only needed headers.

Reviewed-by: Eric Anholt <eric@anholt.net>
10 years agoi965/cfg: Remove unnecessary endif_stack.
Matt Turner [Fri, 29 Nov 2013 07:39:02 +0000 (23:39 -0800)]
i965/cfg: Remove unnecessary endif_stack.

Unnecessary since last commit.

Reviewed-by: Eric Anholt <eric@anholt.net>
10 years agoi965/cfg: Rework to make IF & ELSE blocks flow into ENDIF.
Matt Turner [Fri, 29 Nov 2013 05:33:05 +0000 (21:33 -0800)]
i965/cfg: Rework to make IF & ELSE blocks flow into ENDIF.

Previously we made the basic block following an ENDIF instruction a
successor of the basic blocks ending with IF and ELSE. The PRM says that
IF and ELSE instructions jump *to* the ENDIF, rather than over it.

This should be immaterial to dataflow analysis, except for if, break,
endif sequences:

   START B1 <-B0 <-B9
0x00000100: cmp.g.f0(8)     null            g15<8,8,1>F     g4<0,1,0>F
0x00000110: (+f0) if(8) 0 0                 null            0x00000000UD
   END B1 ->B2 ->B4
   START B2 <-B1
   break
0x00000120: break(8) 0 0                    null            0D
   END B2 ->B10
   START B3
0x00000130: endif(8) 2                      null            0x00000002UD
   END B3 ->B4

The ENDIF block would have no parents, so dataflow analysis would
generate incorrect results, preventing copy propagation from eliminating
some instructions.

This patch changes the CFG to make ENDIF start rather than end basic
blocks, so that it can be the jump target of the IF and ELSE
instructions.

It helps three programs (including two fs8/fs16 pairs).

total instructions in shared programs: 1561126 -> 1561060 (-0.00%)
instructions in affected programs:     837 -> 771 (-7.89%)

More importantly, it allows copy propagation to handle more cases.
Disabling the register_coalesce() pass before this patch hurts 58
programs, while afterward it only hurts 11 programs.

Reviewed-by: Eric Anholt <eric@anholt.net>
10 years agoi965/cfg: Keep pointers to IF/ELSE/ENDIF instructions in the cfg.
Matt Turner [Wed, 30 Oct 2013 23:51:32 +0000 (16:51 -0700)]
i965/cfg: Keep pointers to IF/ELSE/ENDIF instructions in the cfg.

Useful for finding the associated control flow instructions, given a
block ending in one.

Reviewed-by: Eric Anholt <eric@anholt.net>
10 years agoi965/cfg: Add code to dump blocks and cfg.
Matt Turner [Thu, 28 Nov 2013 19:03:14 +0000 (11:03 -0800)]
i965/cfg: Add code to dump blocks and cfg.

Reviewed-by: Eric Anholt <eric@anholt.net>
10 years agomesa: Remove GL_MESA_texture_array cruft from gl.h
Ian Romanick [Wed, 20 Nov 2013 21:52:18 +0000 (13:52 -0800)]
mesa: Remove GL_MESA_texture_array cruft from gl.h

glext.h has had all the necessary bits for years.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
10 years agomesa: Remove support for GL_MESA_texture_array
Ian Romanick [Wed, 20 Nov 2013 21:48:36 +0000 (13:48 -0800)]
mesa: Remove support for GL_MESA_texture_array

This extension enabled the use of texture array with fixed-function and
assembly fragment shaders.  No applications are known to use this
extension.

NOTE: This patch regresses GL_TEXTURE_1D_ARRAY and GL_TEXTURE_2D_ARRAY
cases of the copyteximage piglit test.  The test is incorrectly using
texture arrays with fixed function while only requiring the
GL_EXT_texture_array extension.  A fix for the test has been posted to
the piglit mailing list.

http://lists.freedesktop.org/archives/piglit/2013-November/008639.html

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
10 years agomesa: Use a single enable for GL_EXT_texture_array and GL_MESA_texture_array
Ian Romanick [Wed, 20 Nov 2013 21:41:23 +0000 (13:41 -0800)]
mesa: Use a single enable for GL_EXT_texture_array and GL_MESA_texture_array

Every driver that enables one also enables the other.  The difference
between the two is MESA adds support for fixed-function and assembly
fragment shaders, but EXT only adds support for GLSL.  The MESA
extension was created back when Mesa did not support GLSL.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
10 years agomesa: Minor clean-up of target_enum_to_index
Ian Romanick [Wed, 20 Nov 2013 21:05:35 +0000 (13:05 -0800)]
mesa: Minor clean-up of target_enum_to_index

Constify the gl_context parameter, and remove suffixes from enums that
have non-suffix versions.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Brian Paul <brianp@vmware.com>