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Gregory Davill [Sat, 4 Dec 2021 07:45:45 +0000 (18:15 +1030)]
Merge pull request #9 from gregdavill/nx_support
nx support
Gregory Davill [Sat, 4 Dec 2021 07:44:52 +0000 (18:14 +1030)]
Merge branch 'main' into nx_support
Greg Davill [Sat, 4 Dec 2021 06:05:06 +0000 (16:35 +1030)]
Fix verify size
Greg Davill [Sat, 4 Dec 2021 05:53:49 +0000 (16:23 +1030)]
Fix warning about MIN being redeclared
Gregory Davill [Sun, 8 Aug 2021 04:17:51 +0000 (13:47 +0930)]
Merge pull request #7 from simeonmiteff/master
Fix typo in error message
Simeon Miteff [Sun, 8 Aug 2021 03:25:04 +0000 (13:25 +1000)]
Fix typo in error message
Sylvain Munaut [Tue, 8 Jun 2021 16:25:56 +0000 (18:25 +0200)]
ecpprog: Improve reset procedure
Doesn't work 100% of the time, for 100% of the flashes but for windbond
ones, it at least goes from 0% success if it was in QPI to 100% if
I try twice in a row.
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
Sylvain Munaut [Tue, 8 Jun 2021 16:24:51 +0000 (18:24 +0200)]
jtag_tap: Rewrite jtag_tap_shift to support non-multiple-of-8 data_bits
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
Sylvain Munaut [Tue, 8 Jun 2021 16:24:16 +0000 (18:24 +0200)]
jtag_tap: Make the MIN macro safer
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
Sylvain Munaut [Tue, 8 Jun 2021 16:23:56 +0000 (18:23 +0200)]
jtag_tap: Whitespace fixes
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
Luigi Ungaro [Fri, 26 Mar 2021 00:08:05 +0000 (01:08 +0100)]
Add a new option to reboot the ECP5 after any operation (#5)
* add a new option to reboot the ECP5 after any operation
Greg Davill [Sat, 31 Oct 2020 14:23:45 +0000 (00:53 +1030)]
nx: Add status word definitions
Greg Davill [Sat, 31 Oct 2020 12:19:19 +0000 (22:49 +1030)]
jtag: Sample data input on negative clock edge
Verification is off by 1bit when sampling on the rising edge.
Sampling on the megative edge also seems like a better option in
general.
Greg Davill [Sun, 20 Sep 2020 10:30:02 +0000 (20:00 +0930)]
sram mode: don't transmit trailing invalid bytes
Ed Bordin [Sun, 26 Jul 2020 03:24:50 +0000 (13:24 +1000)]
set file_size in read mode
currently it stays set to -1 and ecpprog reports e.g. "reading..
4190208/
4294967295" (the latter number being 0xFFFFFFFF)
Greg Davill [Sun, 20 Sep 2020 10:30:02 +0000 (20:00 +0930)]
sram mode: don't transmit trailing invalid bytes
Gregory Davill [Tue, 15 Sep 2020 01:16:34 +0000 (10:46 +0930)]
Merge pull request #4 from alanvgreen/nx_clkdiv
clkdiv: added clkdiv
Alan Green [Mon, 14 Sep 2020 07:30:33 +0000 (17:30 +1000)]
clkdiv: added clkdiv
This change allows arbitrary divider values to be used for the 6MHz FTDI
SPI/JTAG clock.
I find that, on the Lattice NX Evaluation Board, the FTDI clock divider
needs to be set to a value of 3 or higher in order to program the flash
rom. This may be because the board uses an ES (Early Silicon/Engineering
Sample) CrossLink/NX-40. I see similar behavior with the Radiant
programmer where a divisor of 2 or higher is needed.
With a slower clock divider, ecpprog is also able to verify programmed
flash rom content.
Greg Davill [Sun, 30 Aug 2020 02:30:24 +0000 (12:00 +0930)]
update help screen
Greg Davill [Sun, 30 Aug 2020 02:29:03 +0000 (11:59 +0930)]
read/check: fix total bytes
Greg Davill [Sun, 30 Aug 2020 02:01:55 +0000 (11:31 +0930)]
remove reading extended device ID
Greg Davill [Tue, 25 Aug 2020 02:44:47 +0000 (12:14 +0930)]
nx: Add support for NX IDCODEs
Gregory Davill [Sun, 26 Jul 2020 03:28:43 +0000 (12:58 +0930)]
Merge pull request #2 from edbordin/master
set file_size in read mode
Ed Bordin [Sun, 26 Jul 2020 03:24:50 +0000 (13:24 +1000)]
set file_size in read mode
currently it stays set to -1 and ecpprog reports e.g. "reading..
4190208/
4294967295" (the latter number being 0xFFFFFFFF)
Greg Davill [Sun, 19 Apr 2020 10:27:51 +0000 (19:57 +0930)]
updated readme
Greg Davill [Sun, 19 Apr 2020 10:20:02 +0000 (19:50 +0930)]
progress output on read/write. Add SR2 readout
Greg Davill [Sun, 19 Apr 2020 08:31:25 +0000 (18:01 +0930)]
tidy up code
Greg Davill [Sun, 19 Apr 2020 08:09:10 +0000 (17:39 +0930)]
intial loading bitstream logic works
Greg Davill [Sun, 19 Apr 2020 05:30:11 +0000 (15:00 +0930)]
shift out bytes instead of bits, when possible
Greg Davill [Sun, 19 Apr 2020 04:10:03 +0000 (13:40 +0930)]
add readme
Greg Davill [Sun, 19 Apr 2020 04:00:19 +0000 (13:30 +0930)]
move project into folder
Greg Davill [Sun, 19 Apr 2020 03:53:21 +0000 (13:23 +0930)]
cleanup warnings and errors
Greg Davill [Sun, 19 Apr 2020 03:43:07 +0000 (13:13 +0930)]
flash functions soould now operate correctly
Greg Davill [Sun, 19 Apr 2020 03:38:15 +0000 (13:08 +0930)]
update jtag_shift
Greg Davill [Sun, 19 Apr 2020 03:13:17 +0000 (12:43 +0930)]
cleanup of un-used code
Greg Davill [Sun, 19 Apr 2020 03:05:35 +0000 (12:35 +0930)]
fix issue with missing data
Greg Davill [Sun, 19 Apr 2020 02:02:02 +0000 (11:32 +0930)]
Fix clock divider
Greg Davill [Sat, 18 Apr 2020 16:36:18 +0000 (02:06 +0930)]
more speedups
Greg Davill [Sat, 18 Apr 2020 16:28:30 +0000 (01:58 +0930)]
some more jtag speedups
Greg Davill [Sat, 18 Apr 2020 15:57:35 +0000 (01:27 +0930)]
speed up jtag xfers
Greg Davill [Sat, 18 Apr 2020 15:24:41 +0000 (00:54 +0930)]
slight speedup to jtag-tap
Greg Davill [Sat, 18 Apr 2020 14:49:10 +0000 (00:19 +0930)]
fix flag decoding
Greg Davill [Sat, 18 Apr 2020 14:46:40 +0000 (00:16 +0930)]
update program name
Greg Davill [Sat, 18 Apr 2020 14:35:15 +0000 (00:05 +0930)]
add readout of status register
Greg Davill [Sat, 18 Apr 2020 14:05:30 +0000 (23:35 +0930)]
remove some ice40 specifics
Greg Davill [Sat, 18 Apr 2020 13:58:54 +0000 (23:28 +0930)]
update copyright
Greg Davill [Sat, 18 Apr 2020 13:54:41 +0000 (23:24 +0930)]
update to background spi entry
Greg Davill [Sat, 18 Apr 2020 12:20:04 +0000 (21:50 +0930)]
add idcode readout
Greg Davill [Sat, 18 Apr 2020 11:59:53 +0000 (21:29 +0930)]
add jtag_tap logic from luna
Greg Davill [Sat, 18 Apr 2020 09:52:27 +0000 (19:22 +0930)]
initial commit, start with iceprog as a base