openpower-isa.git
3 years agouse append on expected state dump, not ideal but
Luke Kenneth Casson Leighton [Thu, 11 Nov 2021 09:40:33 +0000 (09:40 +0000)]
use append on expected state dump, not ideal but
gives multiple results

3 years agoadd core state to gtkw
Luke Kenneth Casson Leighton [Thu, 11 Nov 2021 09:26:54 +0000 (09:26 +0000)]
add core state to gtkw

3 years agoAdd expected state to case_addze for addze in alu_cases unit test
R Veera Kumar [Thu, 11 Nov 2021 05:39:12 +0000 (11:09 +0530)]
Add expected state to case_addze for addze in alu_cases unit test

Now for only addze opcode
Removed a not needed self.add_case line

3 years agoAdd expected state to case_1_regression for 'add' in alu_cases unit test
R Veera Kumar [Thu, 11 Nov 2021 04:22:13 +0000 (09:52 +0530)]
Add expected state to case_1_regression for 'add' in alu_cases unit test

3 years agoAdd expected state to case_1_regression for extsb in alu_cases unit test
R Veera Kumar [Thu, 11 Nov 2021 02:55:54 +0000 (08:25 +0530)]
Add expected state to case_1_regression for extsb in alu_cases unit test

3 years agoAdd expected state to case_1_regression for subf (2) in alu_cases unit test
R Veera Kumar [Thu, 11 Nov 2021 02:35:51 +0000 (08:05 +0530)]
Add expected state to case_1_regression for subf (2) in alu_cases unit test

3 years agoattempt to get gtkw simulator signals updated on WB MMU
Luke Kenneth Casson Leighton [Wed, 10 Nov 2021 19:51:14 +0000 (19:51 +0000)]
attempt to get gtkw simulator signals updated on WB MMU

3 years agoAdd expected state to case_1_regression for subf in alu_cases unit test
R Veera Kumar [Wed, 10 Nov 2021 19:37:03 +0000 (01:07 +0530)]
Add expected state to case_1_regression for subf in alu_cases unit test

3 years agoadd LDST msr_pr to gtkw debug
Luke Kenneth Casson Leighton [Wed, 10 Nov 2021 19:10:40 +0000 (19:10 +0000)]
add LDST msr_pr to gtkw debug

3 years agodisplay 64 bits of msr
Luke Kenneth Casson Leighton [Wed, 10 Nov 2021 19:07:46 +0000 (19:07 +0000)]
display 64 bits of msr

3 years agoadd MSR to ldst operand debug gtkw
Luke Kenneth Casson Leighton [Wed, 10 Nov 2021 19:05:49 +0000 (19:05 +0000)]
add MSR to ldst operand debug gtkw

3 years agoadd MSR to gtkw file for simulation output
Luke Kenneth Casson Leighton [Wed, 10 Nov 2021 18:43:25 +0000 (18:43 +0000)]
add MSR to gtkw file for simulation output

3 years agoadd RT as an option for ternary instruction as 3rd register input
Luke Kenneth Casson Leighton [Wed, 10 Nov 2021 14:53:04 +0000 (14:53 +0000)]
add RT as an option for ternary instruction as 3rd register input

3 years agoadd creation of 8 and 16 DCT butterfly diagrams
Luke Kenneth Casson Leighton [Thu, 28 Oct 2021 11:47:45 +0000 (12:47 +0100)]
add creation of 8 and 16 DCT butterfly diagrams

3 years agoforward mmu sprs
Tobias Platen [Tue, 9 Nov 2021 17:12:45 +0000 (18:12 +0100)]
forward mmu sprs

3 years agoAdd expected state to case_1_regression for extsw for alu_cases unit test
R Veera Kumar [Tue, 9 Nov 2021 13:53:46 +0000 (19:23 +0530)]
Add expected state to case_1_regression for extsw for alu_cases unit test

3 years agoadd ternaryi
Jacob Lifshay [Fri, 5 Nov 2021 23:10:35 +0000 (16:10 -0700)]
add ternaryi

3 years agoformat code
Jacob Lifshay [Fri, 5 Nov 2021 22:50:36 +0000 (15:50 -0700)]
format code

3 years agoformat code
Jacob Lifshay [Fri, 5 Nov 2021 22:46:29 +0000 (15:46 -0700)]
format code

3 years agoadd comment2 and unofficial fields to existing instructions
Jacob Lifshay [Fri, 5 Nov 2021 22:10:06 +0000 (15:10 -0700)]
add comment2 and unofficial fields to existing instructions

3 years agodcbz needs to go through ldst function unit
Tobias Platen [Thu, 4 Nov 2021 19:44:30 +0000 (20:44 +0100)]
dcbz needs to go through ldst function unit

3 years agocaller.py: Fix ISACaller modifying test state
klehman [Thu, 4 Nov 2021 13:45:34 +0000 (09:45 -0400)]
caller.py: Fix ISACaller modifying test state

3 years agostate.py: Fix expected dump for cr regs
klehman [Thu, 28 Oct 2021 02:53:08 +0000 (22:53 -0400)]
state.py: Fix expected dump for cr regs

3 years agospacing fix
klehman [Mon, 25 Oct 2021 20:46:44 +0000 (16:46 -0400)]
spacing fix

3 years agotests now dump into caller dirs
klehman [Mon, 25 Oct 2021 20:19:16 +0000 (16:19 -0400)]
tests now dump into caller dirs

3 years agoget file name from stack, add in TestCase
klehman [Mon, 25 Oct 2021 19:59:54 +0000 (15:59 -0400)]
get file name from stack, add in TestCase

3 years agotmp creation/string formatting
klehman [Mon, 25 Oct 2021 14:13:39 +0000 (10:13 -0400)]
tmp creation/string formatting

3 years agoadded dump_state_tofile for code creation
klehman [Mon, 25 Oct 2021 12:41:25 +0000 (08:41 -0400)]
added dump_state_tofile for code creation

3 years agoAdd a new test caller for ALU based on shift_rot test caller
R Veera Kumar [Sat, 23 Oct 2021 05:19:50 +0000 (10:49 +0530)]
Add a new test caller for ALU based on shift_rot test caller

3 years agofixedlogical: simplify extsw
Dmitry Selyutin [Sat, 2 Oct 2021 09:23:42 +0000 (09:23 +0000)]
fixedlogical: simplify extsw

3 years agofixedlogical: simplify extsh
Dmitry Selyutin [Sat, 2 Oct 2021 09:23:22 +0000 (09:23 +0000)]
fixedlogical: simplify extsh

3 years agofixedlogical: simplify extsb
Dmitry Selyutin [Sat, 2 Oct 2021 09:23:02 +0000 (09:23 +0000)]
fixedlogical: simplify extsb

3 years agodecoder/helpers: introduce EXTSXL helper
Dmitry Selyutin [Sat, 2 Oct 2021 09:18:34 +0000 (09:18 +0000)]
decoder/helpers: introduce EXTSXL helper

https://libre-soc.org/openpower/sv/svp64/extsxl

3 years agodecoder/helpers: simplify XLCASTU
Dmitry Selyutin [Sat, 2 Oct 2021 09:12:13 +0000 (09:12 +0000)]
decoder/helpers: simplify XLCASTU

3 years agocorrections to EXTSXL 0x000000090000093 table for extsb, bit 7 needs
Luke Kenneth Casson Leighton [Sun, 10 Oct 2021 20:14:30 +0000 (21:14 +0100)]
corrections to EXTSXL 0x000000090000093 table for extsb, bit 7 needs
propagating through for XLEN=16/32/64

3 years agotest_caller_exts: extsb/extsh/extsw test
Dmitry Selyutin [Sun, 10 Oct 2021 18:48:09 +0000 (18:48 +0000)]
test_caller_exts: extsb/extsh/extsw test

3 years agoisafunctions/extsxl: fix one of markdown tables
Dmitry Selyutin [Sun, 10 Oct 2021 18:46:50 +0000 (18:46 +0000)]
isafunctions/extsxl: fix one of markdown tables

3 years agoadditional comments for runner
klehman [Thu, 7 Oct 2021 23:18:23 +0000 (19:18 -0400)]
additional comments for runner

3 years agotypo: gpr not fpr
klehman [Thu, 7 Oct 2021 17:19:40 +0000 (13:19 -0400)]
typo: gpr not fpr

3 years agovarious test state comments
klehman [Thu, 7 Oct 2021 15:00:33 +0000 (11:00 -0400)]
various test state comments

3 years agocorrections to csv files
Luke Kenneth Casson Leighton [Mon, 4 Oct 2021 22:01:06 +0000 (23:01 +0100)]
corrections to csv files

3 years agoadd another extsxl csv file
Luke Kenneth Casson Leighton [Mon, 4 Oct 2021 21:58:44 +0000 (22:58 +0100)]
add another extsxl csv file

3 years agoreplace f with F in csv files
Luke Kenneth Casson Leighton [Mon, 4 Oct 2021 21:55:03 +0000 (22:55 +0100)]
replace f with F in csv files

3 years agoadd extsxl csv files
Luke Kenneth Casson Leighton [Mon, 4 Oct 2021 21:50:36 +0000 (22:50 +0100)]
add extsxl csv files

3 years agotest adding extsxl data
Luke Kenneth Casson Leighton [Mon, 4 Oct 2021 20:16:39 +0000 (21:16 +0100)]
test adding extsxl data

3 years agoadd blank example file
Luke Kenneth Casson Leighton [Mon, 4 Oct 2021 19:28:51 +0000 (20:28 +0100)]
add blank example file

3 years agofix for self.rom core
klehman [Fri, 1 Oct 2021 22:01:47 +0000 (18:01 -0400)]
fix for self.rom core

3 years agoset run_hdl arg to None because it passes in a class now
Luke Kenneth Casson Leighton [Fri, 1 Oct 2021 16:57:26 +0000 (17:57 +0100)]
set run_hdl arg to None because it passes in a class now

3 years agocopy over TestRunner class from soc/simple/test/test_runner.py
Luke Kenneth Casson Leighton [Fri, 1 Oct 2021 16:53:41 +0000 (17:53 +0100)]
copy over TestRunner class from soc/simple/test/test_runner.py
Copyright attribution klehman, lkcl, tplaten, j neuschaefer, cstrauss

3 years agowhoops, use cache of pseudocode rather than attempt to truncate
Luke Kenneth Casson Leighton [Thu, 30 Sep 2021 18:31:14 +0000 (19:31 +0100)]
whoops, use cache of pseudocode rather than attempt to truncate
the list of instructions, causes them to disappear. oops

3 years agoreduce PyFnWriter compile time (pywriter) by 75%
Luke Kenneth Casson Leighton [Thu, 30 Sep 2021 13:32:18 +0000 (14:32 +0100)]
reduce PyFnWriter compile time (pywriter) by 75%

needs some explanation: the pagereader enumerates all the sub-options
(Rc=1, OE=1) and adds one instruction (each) for all of the sub-options
but adds the exact same pseudocode.

PyFnWriter then generates up to *four copies* of the exact same pseucodode
and four functions, *only one of which is actually used* by ISACaller
(the one *without* Rc=1 and OE=1), then handles Rc=1 and OE=1 *separately*

added an option to pagereader to only add the first-encountered instruction
but for other purposes it is still added, so is not made the default

3 years agoisa/caller: initialize helper and redirect XLEN
Dmitry Selyutin [Wed, 29 Sep 2021 11:50:36 +0000 (11:50 +0000)]
isa/caller: initialize helper and redirect XLEN

3 years agodecoder/helpers: use globals() with exception
Dmitry Selyutin [Wed, 29 Sep 2021 11:44:52 +0000 (11:44 +0000)]
decoder/helpers: use globals() with exception

3 years agodecoder/parser: self.XLEN instead of XLEN
Dmitry Selyutin [Wed, 29 Sep 2021 09:47:31 +0000 (09:47 +0000)]
decoder/parser: self.XLEN instead of XLEN

3 years agofixedlogical: switch xoris to XCASTU
Dmitry Selyutin [Wed, 29 Sep 2021 00:03:22 +0000 (00:03 +0000)]
fixedlogical: switch xoris to XCASTU

3 years agofixedlogical: switch oris to XCASTU
Dmitry Selyutin [Wed, 29 Sep 2021 00:03:09 +0000 (00:03 +0000)]
fixedlogical: switch oris to XCASTU

3 years agofixedlogical: switch andis. to XCASTU
Dmitry Selyutin [Wed, 29 Sep 2021 00:02:49 +0000 (00:02 +0000)]
fixedlogical: switch andis. to XCASTU

3 years agofixedlogical: switch xori to XCASTU
Dmitry Selyutin [Wed, 29 Sep 2021 00:01:35 +0000 (00:01 +0000)]
fixedlogical: switch xori to XCASTU

3 years agofixedlogical: switch ori to XCASTU
Dmitry Selyutin [Wed, 29 Sep 2021 00:01:16 +0000 (00:01 +0000)]
fixedlogical: switch ori to XCASTU

3 years agofixedlogical: switch andi. to XLCASTU
Dmitry Selyutin [Wed, 29 Sep 2021 00:00:11 +0000 (00:00 +0000)]
fixedlogical: switch andi. to XLCASTU

3 years agodecoder/helpers: support XLCASTS
Dmitry Selyutin [Tue, 28 Sep 2021 20:20:33 +0000 (20:20 +0000)]
decoder/helpers: support XLCASTS

3 years agodecoder/helpers: support XLCASTU
Dmitry Selyutin [Tue, 28 Sep 2021 20:17:42 +0000 (20:17 +0000)]
decoder/helpers: support XLCASTU

3 years agoremove unneeded module import
Luke Kenneth Casson Leighton [Tue, 28 Sep 2021 10:57:37 +0000 (11:57 +0100)]
remove unneeded module import

3 years agoconvert svp64 fft test just like the dct one
Luke Kenneth Casson Leighton [Tue, 28 Sep 2021 10:44:39 +0000 (11:44 +0100)]
convert svp64 fft test just like the dct one

3 years agoconvert test_caller_svp64_dct.py unit test to use new helper class
Luke Kenneth Casson Leighton [Tue, 28 Sep 2021 10:34:50 +0000 (11:34 +0100)]
convert test_caller_svp64_dct.py unit test to use new helper class
to get at DOUBLE2SINGLE
previously could import it as a (global) function

3 years agore-add accidentally-deleted low-level operators eq ne gt etc
Luke Kenneth Casson Leighton [Tue, 28 Sep 2021 10:27:00 +0000 (11:27 +0100)]
re-add accidentally-deleted low-level operators eq ne gt etc
from pyfnwriter

3 years agomove FPDIV, FPMUL (etc) to ISAFPHelpers class
Luke Kenneth Casson Leighton [Tue, 28 Sep 2021 10:08:06 +0000 (11:08 +0100)]
move FPDIV, FPMUL (etc) to ISAFPHelpers class

3 years agoadd ISACallerFnHelper, remove FPADD32 and other FP helpers
Luke Kenneth Casson Leighton [Tue, 28 Sep 2021 10:07:41 +0000 (11:07 +0100)]
add ISACallerFnHelper, remove FPADD32 and other FP helpers

3 years agoremove type information
Luke Kenneth Casson Leighton [Tue, 28 Sep 2021 09:47:04 +0000 (10:47 +0100)]
remove type information

3 years agopywriter, pyfnwriter, parser: activate helper class
Dmitry Selyutin [Mon, 27 Sep 2021 20:12:46 +0000 (20:12 +0000)]
pywriter, pyfnwriter, parser: activate helper class

3 years agopyfnwriter: write helper class
Dmitry Selyutin [Mon, 27 Sep 2021 20:10:32 +0000 (20:10 +0000)]
pyfnwriter: write helper class

3 years agodecoder/parser: generate methods, not functions
Dmitry Selyutin [Mon, 27 Sep 2021 19:30:24 +0000 (19:30 +0000)]
decoder/parser: generate methods, not functions

3 years agofixup! decoder/parser: pass helper argument
Dmitry Selyutin [Mon, 27 Sep 2021 19:26:54 +0000 (19:26 +0000)]
fixup! decoder/parser: pass helper argument

3 years agodecoder/power_pseudo: pass helper argument
Dmitry Selyutin [Mon, 27 Sep 2021 19:16:22 +0000 (19:16 +0000)]
decoder/power_pseudo: pass helper argument

3 years agodecoder/parser: pass helper argument
Dmitry Selyutin [Mon, 27 Sep 2021 19:16:02 +0000 (19:16 +0000)]
decoder/parser: pass helper argument

3 years agoadd name parameter to StateRunner
Luke Kenneth Casson Leighton [Sat, 25 Sep 2021 21:51:20 +0000 (22:51 +0100)]
add name parameter to StateRunner

3 years agoinherit ISACallerHelper in ISACaller
Luke Kenneth Casson Leighton [Sat, 25 Sep 2021 19:46:38 +0000 (20:46 +0100)]
inherit ISACallerHelper in ISACaller

3 years agopywriter: redirect helpers into self
Dmitry Selyutin [Sat, 25 Sep 2021 17:15:43 +0000 (17:15 +0000)]
pywriter: redirect helpers into self

3 years agodecoder/helpers.py: redirect helper class calls
Dmitry Selyutin [Sat, 25 Sep 2021 16:29:45 +0000 (16:29 +0000)]
decoder/helpers.py: redirect helper class calls

3 years agodecoder/helpers.py: ISACallerHelper stub class
Dmitry Selyutin [Sat, 25 Sep 2021 16:15:23 +0000 (16:15 +0000)]
decoder/helpers.py: ISACallerHelper stub class

3 years agoadd factory-function for StateRunner
Luke Kenneth Casson Leighton [Sat, 25 Sep 2021 18:03:05 +0000 (19:03 +0100)]
add factory-function for StateRunner

3 years agoconvert all SimRunner functions to yield
Luke Kenneth Casson Leighton [Sat, 25 Sep 2021 17:49:13 +0000 (18:49 +0100)]
convert all SimRunner functions to yield

3 years agoguessing what extra args needed for StateRunner
Luke Kenneth Casson Leighton [Fri, 24 Sep 2021 19:53:43 +0000 (20:53 +0100)]
guessing what extra args needed for StateRunner

3 years agoadd SimRunner constructor
klehman [Fri, 24 Sep 2021 17:20:32 +0000 (13:20 -0400)]
add SimRunner constructor

3 years agofinally sort out the running-out-of-file-handles
Luke Kenneth Casson Leighton [Fri, 24 Sep 2021 17:09:44 +0000 (18:09 +0100)]
finally sort out the running-out-of-file-handles
by taking a copy of the object file and placing it into a BytesIO

3 years agouse with subprocess to get it to close Popen files
Luke Kenneth Casson Leighton [Fri, 24 Sep 2021 16:55:09 +0000 (17:55 +0100)]
use with subprocess to get it to close Popen files

3 years agorename shift tests, move to test cases directory
Luke Kenneth Casson Leighton [Fri, 24 Sep 2021 16:44:49 +0000 (17:44 +0100)]
rename shift tests, move to test cases directory

3 years agorename files, test_issuer.py is for the TestIssuer,
Luke Kenneth Casson Leighton [Fri, 24 Sep 2021 16:35:46 +0000 (17:35 +0100)]
rename files, test_issuer.py is for the TestIssuer,
make the shift rot test named "shift rot"

3 years agoshift_rot expected cases
klehman [Fri, 24 Sep 2021 14:01:32 +0000 (10:01 -0400)]
shift_rot expected cases

3 years agodecoder test_issuer
klehman [Fri, 24 Sep 2021 13:59:27 +0000 (09:59 -0400)]
decoder test_issuer

3 years agoadd extra functions for StateRunner
Luke Kenneth Casson Leighton [Thu, 23 Sep 2021 22:43:59 +0000 (23:43 +0100)]
add extra functions for StateRunner

3 years agocreate Abstract Base Class StateRunner
Luke Kenneth Casson Leighton [Thu, 23 Sep 2021 18:41:15 +0000 (19:41 +0100)]
create Abstract Base Class StateRunner

3 years agoadd stfs unit test
Luke Kenneth Casson Leighton [Thu, 23 Sep 2021 14:27:54 +0000 (15:27 +0100)]
add stfs unit test

3 years agoadd stfx unit test
Luke Kenneth Casson Leighton [Thu, 23 Sep 2021 14:25:10 +0000 (15:25 +0100)]
add stfx unit test

3 years agoadd stfsux and unit test, code was there, needed adding to power_enums
Luke Kenneth Casson Leighton [Thu, 23 Sep 2021 14:21:38 +0000 (15:21 +0100)]
add stfsux and unit test, code was there, needed adding to power_enums

3 years agoadd load-immediate unit test
Luke Kenneth Casson Leighton [Thu, 23 Sep 2021 14:05:12 +0000 (15:05 +0100)]
add load-immediate unit test

3 years agoadd fsubs unit test
Luke Kenneth Casson Leighton [Thu, 23 Sep 2021 13:59:52 +0000 (14:59 +0100)]
add fsubs unit test

3 years agoadd first "ExpectedState" to HDL-sim ALU test cases
Luke Kenneth Casson Leighton [Wed, 22 Sep 2021 23:05:07 +0000 (00:05 +0100)]
add first "ExpectedState" to HDL-sim ALU test cases

3 years agotests for test state class
klehman [Wed, 22 Sep 2021 21:35:05 +0000 (17:35 -0400)]
tests for test state  class

3 years agoand add expected to TestAccumulatorBase
Luke Kenneth Casson Leighton [Wed, 22 Sep 2021 20:16:44 +0000 (21:16 +0100)]
and add expected to TestAccumulatorBase