Miodrag Milanović [Wed, 29 Jan 2020 10:18:06 +0000 (11:18 +0100)]
Merge pull request #1559 from YosysHQ/efinix_test_fix
Fix for non-deterministic test
Eddie Hung [Wed, 29 Jan 2020 02:11:34 +0000 (18:11 -0800)]
Add "help -all" and "help -celltypes" sanity test
Eddie Hung [Wed, 29 Jan 2020 01:48:43 +0000 (17:48 -0800)]
synth_xilinx: cleanup help
Eddie Hung [Wed, 29 Jan 2020 01:41:57 +0000 (17:41 -0800)]
synth_xilinx: fix help when no active_design; fixes #1664
Marcin Kościelnicki [Thu, 21 Nov 2019 12:05:30 +0000 (13:05 +0100)]
xilinx: Add simulation model for DSP48 (Virtex 4).
Eddie Hung [Tue, 28 Jan 2020 20:46:18 +0000 (12:46 -0800)]
Merge remote-tracking branch 'origin/master' into eddie/opt_merge_init
Eddie Hung [Tue, 28 Jan 2020 19:55:51 +0000 (11:55 -0800)]
Merge pull request #1660 from YosysHQ/eddie/abc9_unpermute_luts
Unpermute LUT ordering for ice40/ecp5/xilinx
Eddie Hung [Tue, 28 Jan 2020 18:37:16 +0000 (10:37 -0800)]
Add and use SigSpec::reverse()
Eddie Hung [Tue, 28 Jan 2020 18:17:47 +0000 (10:17 -0800)]
Fix unresolved conflict from #1573
Miodrag Milanovic [Tue, 28 Jan 2020 17:26:10 +0000 (18:26 +0100)]
Updated test to use assert-max
Claire Wolf [Tue, 28 Jan 2020 16:51:50 +0000 (17:51 +0100)]
Improve logging use of experimental features
Signed-off-by: Claire Wolf <clifford@clifford.at>
Claire Wolf [Tue, 28 Jan 2020 16:40:28 +0000 (17:40 +0100)]
Merge pull request #1567 from YosysHQ/eddie/sat_init_warning
sat: suppress 'Warning: ignoring initial value on non-register: ...' when init[i] = 1'bx
N. Engelhardt [Tue, 28 Jan 2020 16:24:54 +0000 (17:24 +0100)]
Merge pull request #1573 from YosysHQ/eddie/xilinx_tristate
synth_xilinx: error out if tristate without '-iopad'
David Shah [Tue, 28 Jan 2020 09:42:01 +0000 (09:42 +0000)]
opt_reduce: Call check() per run rather than per optimised cell
Signed-off-by: David Shah <dave@ds0.me>
Pepijn de Vos [Tue, 26 Nov 2019 11:56:06 +0000 (12:56 +0100)]
redirect fuser stderr to /dev/null
Claire Wolf [Tue, 28 Jan 2020 08:41:08 +0000 (09:41 +0100)]
Merge pull request #1553 from whitequark/manual-dffx
Document $dffe, $dffsr, $_DFFE_*, $_DFFSR_* cells
Eddie Hung [Mon, 27 Jan 2020 22:22:46 +0000 (14:22 -0800)]
abc9_ops: -check for negative arrival/required times
Eddie Hung [Mon, 27 Jan 2020 22:02:13 +0000 (14:02 -0800)]
Fix $lut input ordering -- SigSpec(std::initializer_list<>) is backwards
Just like Verilog...
Eddie Hung [Mon, 27 Jan 2020 21:56:16 +0000 (13:56 -0800)]
Import tests from #1628
Eddie Hung [Tue, 21 Jan 2020 20:29:07 +0000 (12:29 -0800)]
xilinx/ice40/ecp5: undo permuting LUT masks in lut_map
Now done in read_aiger
Eddie Hung [Mon, 27 Jan 2020 21:29:15 +0000 (13:29 -0800)]
Merge pull request #1619 from YosysHQ/eddie/abc9_refactor
Refactor `abc9` pass
Eddie Hung [Mon, 27 Jan 2020 20:30:39 +0000 (12:30 -0800)]
Fix typo
Eddie Hung [Mon, 27 Jan 2020 20:29:28 +0000 (12:29 -0800)]
Merge branch 'eddie/abc9_refactor' into eddie/abc9_required
Eddie Hung [Mon, 27 Jan 2020 19:18:21 +0000 (11:18 -0800)]
abc9_ops: add comments
Eddie Hung [Mon, 27 Jan 2020 18:34:10 +0000 (10:34 -0800)]
Merge remote-tracking branch 'origin/master' into eddie/verific_help
Eddie Hung [Mon, 27 Jan 2020 18:32:18 +0000 (10:32 -0800)]
verific: no help() when no YOSYS_ENABLE_VERIFIC
Eddie Hung [Mon, 27 Jan 2020 18:15:22 +0000 (10:15 -0800)]
verific: also unflatten for 'hierarchy' flow as per @cliffordwolf
Eddie Hung [Mon, 27 Jan 2020 17:54:04 +0000 (09:54 -0800)]
Merge pull request #1656 from YosysHQ/eddie/ice40_abc9_warnings
ice40: reduce ABC9 internal fanout warnings with a param for CI->I3
Claire Wolf [Mon, 27 Jan 2020 17:27:47 +0000 (18:27 +0100)]
Add log_experimental() and experimental() API and "yosys -x"
Signed-off-by: Claire Wolf <clifford@clifford.at>
Claire Wolf [Mon, 27 Jan 2020 16:59:58 +0000 (17:59 +0100)]
Merge pull request #1658 from YosysHQ/clifford/smtbmcsolvernotfound
Improve yosys-smtbmc "solver not found" handling
Claire Wolf [Mon, 27 Jan 2020 16:48:56 +0000 (17:48 +0100)]
Improve yosys-smtbmc "solver not found" handling
Signed-off-by: Claire Wolf <clifford@clifford.at>
Claire Wolf [Mon, 27 Jan 2020 11:59:27 +0000 (12:59 +0100)]
Merge pull request #1613 from porglezomp-misc/version-flag-alias
Add --version and -version as aliases for -V
Eddie Hung [Fri, 24 Jan 2020 21:11:43 +0000 (13:11 -0800)]
read_aiger: set abc9_box_seq attr
Eddie Hung [Fri, 24 Jan 2020 20:16:05 +0000 (12:16 -0800)]
ice40: add SB_SPRAM256KA arrival time
Eddie Hung [Fri, 24 Jan 2020 19:59:48 +0000 (11:59 -0800)]
ice40: reduce ABC9 internal fanout warnings with a param for CI->I3
Eddie Hung [Fri, 24 Jan 2020 18:12:52 +0000 (10:12 -0800)]
verific: unflatten struct ports
Eddie Hung [Fri, 24 Jan 2020 06:45:34 +0000 (22:45 -0800)]
abc9: -reintegrate recover type from existing cell, check against boxid
Eddie Hung [Fri, 24 Jan 2020 03:55:11 +0000 (19:55 -0800)]
simple_abc9 tests to discard whitebox before write for sim
Eddie Hung [Fri, 24 Jan 2020 03:55:11 +0000 (19:55 -0800)]
simple_abc9 tests to discard whitebox before write for sim
Eddie Hung [Fri, 24 Jan 2020 02:53:14 +0000 (18:53 -0800)]
abc_box_id -> abc9_box_id in test
Eddie Hung [Fri, 24 Jan 2020 03:08:51 +0000 (19:08 -0800)]
abc9: warning message if no modules selected
Eddie Hung [Wed, 22 Jan 2020 22:22:03 +0000 (14:22 -0800)]
Fix $__ABC9_ASYNC1 to output 1'b1 not 1'b0
Eddie Hung [Fri, 24 Jan 2020 02:56:25 +0000 (18:56 -0800)]
Test for (* keep *)-ed abc9_box_id
Eddie Hung [Fri, 24 Jan 2020 02:56:06 +0000 (18:56 -0800)]
abc9_ops: -prep_xaiger to skip (* keep *) cells
Eddie Hung [Fri, 24 Jan 2020 02:53:14 +0000 (18:53 -0800)]
abc_box_id -> abc9_box_id in test
Eddie Hung [Thu, 23 Jan 2020 22:58:56 +0000 (14:58 -0800)]
abc9_ops -prep_dff: insert async s/r mux in holes when replacing $_DFF_*
Eddie Hung [Thu, 23 Jan 2020 04:54:03 +0000 (20:54 -0800)]
alumacc: undo accidental commit
Eddie Hung [Wed, 22 Jan 2020 22:22:03 +0000 (14:22 -0800)]
Fix $__ABC9_ASYNC1 to output 1'b1 not 1'b0
Eddie Hung [Wed, 22 Jan 2020 22:21:25 +0000 (14:21 -0800)]
read_aiger: also parse abc9_mergeability
Eddie Hung [Wed, 22 Jan 2020 20:30:14 +0000 (12:30 -0800)]
Merge remote-tracking branch 'origin/eddie/abc9_fixes' into eddie/abc9_refactor
Eddie Hung [Wed, 22 Jan 2020 20:27:41 +0000 (12:27 -0800)]
Merge pull request #1652 from YosysHQ/eddie/abc9_fixes
Eddie/abc9 fixes
Eddie Hung [Wed, 22 Jan 2020 18:08:48 +0000 (10:08 -0800)]
abc9: error out if flip-flop init is 1'b1 for '-dff'
Due to ABC sequential synthesis restriction
Eddie Hung [Wed, 22 Jan 2020 17:36:54 +0000 (09:36 -0800)]
abc9: fix scratchpad entry abc9.verify
Eddie Hung [Wed, 22 Jan 2020 00:50:04 +0000 (16:50 -0800)]
Update tests with reduced area
Eddie Hung [Wed, 22 Jan 2020 00:49:34 +0000 (16:49 -0800)]
Explicitly create separate $mux cells
Eddie Hung [Wed, 22 Jan 2020 00:27:40 +0000 (16:27 -0800)]
Merge remote-tracking branch 'origin/master' into eddie/abc9_refactor
Eddie Hung [Tue, 21 Jan 2020 23:02:37 +0000 (15:02 -0800)]
Fix tests -- when Y_WIDTH is non-pow-2
Eddie Hung [Tue, 21 Jan 2020 22:08:24 +0000 (14:08 -0800)]
Move from +/shiftx2mux.v into +/techmap.v; cleanup
Eddie Hung [Thu, 16 Jan 2020 23:25:49 +0000 (15:25 -0800)]
New techmap +/shiftx2mux.v which decomposes LSB first; better for ABC
Eddie Hung [Tue, 21 Jan 2020 19:56:01 +0000 (11:56 -0800)]
read_aiger: discard LUT inputs with nodeID == 0; not < 2
Eddie Hung [Tue, 21 Jan 2020 19:16:50 +0000 (11:16 -0800)]
read_aiger: ignore constant inputs on LUTs
Eddie Hung [Tue, 21 Jan 2020 17:43:04 +0000 (09:43 -0800)]
write_xaiger: fix for (* keep *) on flop output
Claire Wolf [Tue, 21 Jan 2020 17:37:06 +0000 (18:37 +0100)]
Merge pull request #1637 from YosysHQ/mwk/fix-1634
fsm_detect: Add a cache to avoid excessive CPU usage for big mux networks.
Claire Wolf [Tue, 21 Jan 2020 17:35:15 +0000 (18:35 +0100)]
Merge pull request #1629 from YosysHQ/mwk/edif-z
edif: Just ignore connections to 'z
Claire Wolf [Mon, 20 Jan 2020 21:01:57 +0000 (22:01 +0100)]
Merge pull request #1621 from YosysHQ/clifford/fminit
Add fminit pass
David Shah [Sun, 19 Jan 2020 21:15:51 +0000 (21:15 +0000)]
ast: Add support for $sformatf system function
Signed-off-by: David Shah <dave@ds0.me>
Eddie Hung [Sat, 18 Jan 2020 17:11:52 +0000 (09:11 -0800)]
Merge pull request #1643 from YosysHQ/eddie/cleanup_arith_map
Cleanup +/xilinx/arith_map.v
David Shah [Sat, 18 Jan 2020 09:47:17 +0000 (09:47 +0000)]
Merge pull request #1602 from niklasnisbeth/ice40-init-vals-warning
ice40: Demote conflicting FF init values to a warning
Eddie Hung [Sat, 18 Jan 2020 03:25:59 +0000 (19:25 -0800)]
Merge pull request #1645 from YosysHQ/eddie/fix1644
{ice40,xilinx}_dsp: improve robustess
Eddie Hung [Sat, 18 Jan 2020 01:07:03 +0000 (17:07 -0800)]
xilinx_dsp: another typo; move xilinx specific test
Eddie Hung [Sat, 18 Jan 2020 00:08:04 +0000 (16:08 -0800)]
ice40_dsp: fix typo
Eddie Hung [Sat, 18 Jan 2020 00:06:20 +0000 (16:06 -0800)]
Consistency
Eddie Hung [Sat, 18 Jan 2020 00:05:10 +0000 (16:05 -0800)]
xilinx_dsp: add parameter defaults
Eddie Hung [Fri, 17 Jan 2020 23:57:52 +0000 (15:57 -0800)]
Add #1644 testcase
Eddie Hung [Fri, 17 Jan 2020 23:41:55 +0000 (15:41 -0800)]
synth_ice40: call wreduce before mul2dsp
Eddie Hung [Fri, 17 Jan 2020 23:38:26 +0000 (15:38 -0800)]
ice40_dsp: add test
Eddie Hung [Fri, 17 Jan 2020 23:37:52 +0000 (15:37 -0800)]
ice40_dsp: add default values for parameters
Eddie Hung [Fri, 17 Jan 2020 23:28:02 +0000 (15:28 -0800)]
ice40_dsp: tolerant of fanout-less outputs, as well as all-zero inputs
Eddie Hung [Fri, 17 Jan 2020 20:02:46 +0000 (12:02 -0800)]
Deprecate `_CLB_CARRY from +/xilinx/arith_map.v since #1623
Eddie Hung [Fri, 17 Jan 2020 20:00:14 +0000 (12:00 -0800)]
abc9: add some log_{push,pop}() as per @nakengelhardt
Eddie Hung [Fri, 17 Jan 2020 19:14:19 +0000 (11:14 -0800)]
+/xilinx/arith_map.v fix $lcu rule
Eddie Hung [Thu, 16 Jan 2020 17:15:42 +0000 (09:15 -0800)]
More rigorous test
Eddie Hung [Thu, 16 Jan 2020 00:42:27 +0000 (16:42 -0800)]
Merge remote-tracking branch 'origin/eddie/abc9_refactor' into eddie/abc9_required
Eddie Hung [Thu, 16 Jan 2020 00:42:16 +0000 (16:42 -0800)]
Merge remote-tracking branch 'origin/master' into eddie/abc9_refactor
Eddie Hung [Thu, 16 Jan 2020 00:22:49 +0000 (16:22 -0800)]
Merge pull request #1639 from YosysHQ/eddie/fix_read_xaiger
read_aiger: $lut prefix in front
Eddie Hung [Wed, 15 Jan 2020 22:42:00 +0000 (14:42 -0800)]
Update README.md for (* abc9_required *)
Eddie Hung [Wed, 15 Jan 2020 22:36:05 +0000 (14:36 -0800)]
abc9: aAdd test to check $_NOT_s are absorbed
Eddie Hung [Wed, 15 Jan 2020 22:31:32 +0000 (14:31 -0800)]
read_aiger: $lut prefix in front
Eddie Hung [Wed, 15 Jan 2020 21:14:48 +0000 (13:14 -0800)]
abc9_ops: -write_box is empty, output a dummy box to prevent ABC error
Eddie Hung [Wed, 15 Jan 2020 19:26:11 +0000 (11:26 -0800)]
Merge remote-tracking branch 'origin/eddie/abc9_refactor' into eddie/abc9_required
Eddie Hung [Wed, 15 Jan 2020 19:25:20 +0000 (11:25 -0800)]
write_xaiger: skip abc9_flop only if abc_box_seq present
Eddie Hung [Wed, 15 Jan 2020 17:51:31 +0000 (09:51 -0800)]
clk2fflogic: work for bit-level $_DFF_* and $_DFFSR_*
Miodrag Milanović [Wed, 15 Jan 2020 07:47:16 +0000 (08:47 +0100)]
Merge pull request #1636 from YosysHQ/eddie/fix_synth_xilinx_W
synth_xilinx: fix default W value for non-xc7
Eddie Hung [Wed, 15 Jan 2020 00:33:41 +0000 (16:33 -0800)]
abc9_ops: cope with (* abc9_flop *) in place of (* abc9_box_id *)
Eddie Hung [Wed, 15 Jan 2020 00:32:46 +0000 (16:32 -0800)]
Merge remote-tracking branch 'origin/eddie/abc9_refactor' into eddie/abc9_required
Eddie Hung [Wed, 15 Jan 2020 00:17:27 +0000 (16:17 -0800)]
write_xaiger: do not export flop inputs as POs
Eddie Hung [Tue, 14 Jan 2020 23:47:13 +0000 (15:47 -0800)]
Merge remote-tracking branch 'origin/master' into eddie/abc9_refactor
Eddie Hung [Tue, 14 Jan 2020 23:24:44 +0000 (15:24 -0800)]
abc9_ops: -check to check abc9_{arrival,required}
Eddie Hung [Tue, 14 Jan 2020 23:20:04 +0000 (15:20 -0800)]
abc9_ops: implement a requireds_cache
Eddie Hung [Tue, 14 Jan 2020 23:05:49 +0000 (15:05 -0800)]
abc9_ops: generate flop box ids, add abc9_required to FD* cells