Emil Velikov [Sat, 17 Aug 2013 21:24:26 +0000 (22:24 +0100)]
vl/idct: cleanup all idct buffers
Code should loop through and cleanup the three (VL_NUM_COMPONENTS) idct
buffers, rather than doing the first one three times.
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Emil Velikov [Sat, 17 Aug 2013 20:17:18 +0000 (21:17 +0100)]
vl/buffer: add sanity check after CALLOC_STRUCT
Check if we have successfully allocated memory.
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Emil Velikov [Sat, 17 Aug 2013 20:45:19 +0000 (21:45 +0100)]
st/xvmc: exit gracefully if we fail to create video buffer
Free any allocated memory and return BadAlloc if create_video_buffer()
has failed to create a buffer.
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Emil Velikov [Fri, 16 Aug 2013 22:10:20 +0000 (23:10 +0100)]
st/vdpau: don't try to create video buffer when the format is FORMAT_NONE
Not seen in the wild yet, but seems like a reasonable thing to do.
[suggested by Christian]
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Andy Furniss [Wed, 24 Jul 2013 23:40:11 +0000 (00:40 +0100)]
vdpau/vl 422 chroma width/height mix up
I was looking into some minor 422 issues/discrepencies I noticed long
ago using vdpau on my rv790.
I noticed that there is code that is halving height rather than width -
422 is full height AFAIK.
Making the changes below doesn't actually make any noticable difference
to what I was looking into.
Maybe there are more but here's three I've found so far
Reviewed-by: Christian König <christian.koenig@amd.com>
Vinson Lee [Sat, 17 Aug 2013 22:47:50 +0000 (15:47 -0700)]
radeonsi: Ensure fmask_format is initialized in release builds.
Fixes "Uninitialized scalar variable" defect reported by Coverity.
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Paul Berry [Sun, 18 Aug 2013 16:19:35 +0000 (09:19 -0700)]
i965: STATIC_ASSERT that there aren't too many BRW_NEW_* flags.
We are getting close to the maximum number of BRW_NEW_* bits that can
be stored in brw->state.dirty.brw without overflowing 32 bits, and
geometry shaders are going to add more. Add a STATIC_ASSERT so that
we will be alerted when we need to switch to 64 bits.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Christian König [Mon, 15 Jul 2013 14:48:41 +0000 (08:48 -0600)]
vl: add entrypoint to is_video_format_supported
Signed-off-by: Christian König <christian.koenig@amd.com>
Christian König [Mon, 15 Jul 2013 14:31:25 +0000 (08:31 -0600)]
vl: add entrypoint to get_video_param
Signed-off-by: Christian König <christian.koenig@amd.com>
Christian König [Mon, 15 Jul 2013 09:48:04 +0000 (03:48 -0600)]
vl: rename pipe_video_decoder to pipe_video_codec
Signed-off-by: Christian König <christian.koenig@amd.com>
Christian König [Mon, 15 Jul 2013 08:35:37 +0000 (02:35 -0600)]
vl: rename enum pipe_video_codec to pipe_video_format
Signed-off-by: Christian König <christian.koenig@amd.com>
Christian König [Mon, 15 Jul 2013 07:50:24 +0000 (01:50 -0600)]
vl: use a template for create_video_decoder
Signed-off-by: Christian König <christian.koenig@amd.com>
Marek Olšák [Fri, 9 Aug 2013 20:34:45 +0000 (22:34 +0200)]
glsl: don't eliminate texcoords that can be set by GL_COORD_REPLACE
Tested by examining generated TGSI shaders from piglit/glsl-routing.
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Henri Verbeet <hverbeet@gmail.com>
Tested-by: Henri Verbeet <hverbeet@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Ilia Mirkin [Sat, 17 Aug 2013 14:53:09 +0000 (10:53 -0400)]
nv50: allow non-nv12 buffers to be created, just pass them through to vl
Since we expose non-NV12 formats as supported when there is no decoer
profile selected, make sure that those formats are actually allowed to
be allocated.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Tested-by: Emil Velikov <emil.l.velikov@gmail.com>
Cc: "9.2" <mesa-stable@lists.freedesktop.org>
Eric Anholt [Wed, 26 Jun 2013 22:22:13 +0000 (15:22 -0700)]
dri: Choose a decent global driNConfigOptions.
Previously, we were asserting that each driver specified an NConfigOptions
exactly equal to the number of options they supplied, leading to frequent
bugs when people would forget to adjust the value when adjusting driver
options. Instead, just overallocate the table by a bit and leave sanity
checking to the assert in findOption().
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Kenneth Graunke [Thu, 1 Aug 2013 23:53:54 +0000 (16:53 -0700)]
i965: Improve comments for driver hooks in intel_buffer_object.c.
Consistently using a "The ___ driver hook." line at the the top of each
function's comment block makes it easy to see at a glance what function
is being implemented.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Kenneth Graunke [Thu, 1 Aug 2013 23:14:17 +0000 (16:14 -0700)]
i965: Split intel_upload code out into a separate file.
This code upload performs batched uploads via a BO. By moving it out to
a separate file, intel_buffer_objects.c only provides the core buffer
object functionality.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Kenneth Graunke [Thu, 1 Aug 2013 22:35:35 +0000 (15:35 -0700)]
i965: Move GL_APPLE_object_purgeable functionality into a new file.
GL_APPLE_object_purgeable creates a mechanism for marking OpenGL objects
as "purgeable" so they can be thrown away when system resources become
scarce. It specifically applies to buffer objects, textures, and
renderbuffers.
The intel_buffer_objects.c file provides core functionality for GL
buffer objects, such as MapBufferRange and CopyBufferSubData. Having
texture and renderbuffer functionality in that file is a bit strange.
The 2010 copyright on the new file is because Chris Wilson first added
this code in January 2010 (commit
755915fa).
v2: Actually remember to call the new dd table setup function.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Marek Olšák [Sat, 17 Aug 2013 00:47:21 +0000 (02:47 +0200)]
radeonsi: fix feature support reporting
broken by
21d9a1b5ef51ce449e9a82641d0d605c5448b41c
Niels Ole Salscheider [Wed, 7 Aug 2013 15:48:48 +0000 (17:48 +0200)]
clover: Fix linkage of libOpenCL
Clover needs the option component of llvm.
Reviewed-by: Tom Stellard <tom@stellard.net>
Signed-off-by: Niels Ole Salscheider <niels_ole@salscheider-online.de>
Marek Olšák [Fri, 16 Aug 2013 13:21:45 +0000 (15:21 +0200)]
radeonsi: require LLVM 3.4 for MSAA
Marek Olšák [Fri, 9 Aug 2013 22:08:45 +0000 (00:08 +0200)]
radeonsi: don't make scanout resources linear except for cursors
The surface allocator understands the scanout flag just fine.
This seems to improve performance for Ubuntu Unity on top of st/xorg
and it fixes the cursor.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Marek Olšák [Wed, 7 Aug 2013 01:20:34 +0000 (03:20 +0200)]
radeonsi: remove useless code from tex_fetch_args
The array slice has already been added to "address".
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Marek Olšák [Tue, 6 Aug 2013 22:14:26 +0000 (00:14 +0200)]
radeonsi: disable unbound colorbuffers
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Marek Olšák [Tue, 6 Aug 2013 19:30:59 +0000 (21:30 +0200)]
radeonsi: port texture improvements from r600g
This started as an attempt to add support for MSAA texture transfers and
MSAA depth-stencil decompression for the DB->CB copy path.
It has gotten a bit out of control, but it's for the greater good.
Some changes do not make much sense, they are there just to make it look
like the other driver.
With a few cosmetic modifications, r600_texture.c can be shared with
a symlink.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Marek Olšák [Tue, 6 Aug 2013 13:08:54 +0000 (15:08 +0200)]
radeonsi: implement texture fetching for compressed MSAA textures (v2)
v2: use resource slots 16..31 for FMASK textures
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Marek Olšák [Tue, 6 Aug 2013 06:53:27 +0000 (08:53 +0200)]
radeonsi: add FMASK texture binding slots and resource setup (v2)
v2: bind FMASK textures to shader resource slots 16..31
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Marek Olšák [Tue, 6 Aug 2013 06:48:07 +0000 (08:48 +0200)]
radeonsi: implement FMASK decompression for MSAA texturing
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Marek Olšák [Sat, 10 Aug 2013 16:51:12 +0000 (18:51 +0200)]
radeonsi: scanout buffers cannot be a destination of MSAA resolve
Resolving to scanout buffers just doesn't work.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Marek Olšák [Thu, 1 Aug 2013 23:44:15 +0000 (01:44 +0200)]
radeonsi: implement MSAA colorbuffer compression for rendering
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Marek Olšák [Tue, 30 Jul 2013 20:29:30 +0000 (22:29 +0200)]
radeonsi: implement uncompressed MSAA texturing
This is glBlitFramebuffer support for MSAA surfaces as required by GL 3.0
and texturing as required by GL 3.2 and GL_ARB_texture_multisample.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Marek Olšák [Wed, 7 Aug 2013 22:26:02 +0000 (00:26 +0200)]
radeonsi: disable alpha-to-coverage for integer colorbuffers
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Marek Olšák [Tue, 30 Jul 2013 20:29:29 +0000 (22:29 +0200)]
radeonsi: implement GL_SAMPLE_ALPHA_TO_ONE
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Marek Olšák [Tue, 30 Jul 2013 20:29:28 +0000 (22:29 +0200)]
radeonsi: implement uncompressed MSAA rendering and color resolving
This is basic MSAA support which should work with most apps.
Some features are missing, those will be implemented by other commits.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Marek Olšák [Tue, 6 Aug 2013 04:42:22 +0000 (06:42 +0200)]
radeonsi: add flexible shader descriptor management and use it for sampler views
It moves all sampler view descriptors to a buffer.
It supports partial resource updates and it can also unbind resources
(required for FMASK texturing).
The buffer contains all sampler view descriptors for one shader stage,
represented as an array. On top of that, there are N arrays in the buffer,
which are used to emulate context registers as implemented by the previous
ASICs (each array is a context).
This uses the RCU synchronization approach to avoid read-after-write hazards
as discussed in the thread:
"radeonsi: add FMASK texture binding slots and resource setup"
CP DMA is used to clear the descriptors at context initialization and to copy
the descriptors from one context to the next.
v2: - use PKT3_DMA_DATA on CIK (I'll test CIK later)
- turn the bool CP DMA parameters into self-explanatory flags
- add a nice simple API for packet emission to radeon_winsys.h
- use 256 contexts, 128 causes texture corruption in openarena
Tom Stellard [Fri, 16 Aug 2013 21:38:40 +0000 (17:38 -0400)]
radeonsi/compute: Let the state tracker do all the flushing
It shouldn't be necessary to call radeon_winsys::cs_flush() from
radeonsi_launch_grid(), because the state tracker is responsible for
flushing the pipeline at the appropriate time. The current behavior is
also wrong, because radeonsi_launch_grid() submits packets to the
compute ring, but when the state tracker calls pipe->flush() everything
is submitted to the graphics ring. This has the potential to create a
race condition.
The downside of removing this flush is that the compute dispatch packets
will be sent to the graphics ring rather than the compute ring.
In the future we will need to come up with a way to detect 'compute'
command streams and submit them to the appropriate ring.
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Kenneth Graunke [Wed, 14 Aug 2013 23:07:51 +0000 (16:07 -0700)]
i965: Dump more information about batch buffer usage.
Previously, INTEL_DEBUG=bat would dump messages like:
intel_mipmap_tree.c:1643: Batchbuffer flush with 456b used
This only reported the space used for command packets, and didn't
report any information on the space used for indirect state.
Now it dumps:
intel_context.c:366: Batchbuffer flush with 6128b (pkt) + 4288b (state)
= 10416b (31.8%)
This conveniently shows the breakdown of space used for packets vs.
state, as well as the percentage of batchbuffer space.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Kenneth Graunke [Tue, 13 Aug 2013 18:37:32 +0000 (11:37 -0700)]
i965: Add Gen7 depth stall flushes before disabling depth in BLORP.
We emit these before configuring depth in the normal path, or actually
using the depth buffer in BLORP - we just failed to emit them when
disabling depth altogether.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Kenneth Graunke [Tue, 13 Aug 2013 18:34:01 +0000 (11:34 -0700)]
i965: Add Gen6 depth stall flushes before disabling depth in BLORP.
We emit these before configuring depth in the normal path, or actually
using the depth buffer in BLORP - we just failed to emit them when
disabling depth altogether.
On Sandybridge, this also requires the post_sync_nonzero flush.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Matt Turner [Thu, 8 Aug 2013 23:41:48 +0000 (16:41 -0700)]
i965: Don't copy propagate bitcasts with source modifiers.
Previously, copy propagation would cause bitcast_f2u(abs(float)) to
be performed in a single step, but the application of source modifiers
(abs, neg) happens after type conversion, leading to incorrect results.
That is, for bitcast_f2u(abs(float)) we would in fact generate code to
do abs(bitcast_f2u(float)).
For example, whereas bitcast_f2u(abs(float)) might result in a register
argument such as
(abs)g2.2<0,1,0>UD
v2: Set interfered = true and break in register_coalesce instead of
returning false.
Reviewed-by: Paul Berry <stereoytpe441@gmail.com>
Matt Turner [Thu, 8 Aug 2013 20:50:01 +0000 (13:50 -0700)]
i965: Emit MOVs for neg/abs.
Necessary to avoid combining a bitcast and a modifier into a single
operation. Otherwise if safe, the MOV should be removed by
copy-propagation or register coalescing.
With this and the next patch, there are only four changes in shader-db:
all a single extra instruction. The code does something like
mov a.w, -b.x
and copy propagation doesn't work because it only handles no-op
swizzles. Seems acceptable, given the known limitation of our copy
propagation.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Paul Berry <stereoytpe441@gmail.com>
Anuj Phogat [Thu, 18 Jul 2013 01:38:50 +0000 (18:38 -0700)]
i965/blorp: Add support for single sample scaled blit with bilinear filter
Currently single sample scaled blits with GL_LINEAR filter falls
back to meta path. Patch removes this limitation in BLORP engine
and implements single sample scaled blit with bilinear filter.
No piglit, gles3 regressions are observed with this patch on Ivybridge.
V2: Use "sample" message to utilize the linear filtering functionality
built in to hardware.
V3: Define a bool variable (bilinear_filter) to handle the conditions
for GL_LINEAR blits.
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Anuj Phogat [Thu, 18 Jul 2013 21:59:29 +0000 (14:59 -0700)]
i965/blorp: Define a function to clamp texture coordinates
New function clamp_tex_coords() clamps the texture coordinates
to texture boundaries. This function will also be utilized later
for the BLORP implementation of single-sample scaled blit with
bilinear filter.
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Anuj Phogat [Thu, 18 Jul 2013 02:04:54 +0000 (19:04 -0700)]
i965/blorp: Use more appropriate variable names
When we talk about both multi-sample and single-sample scaled blits,
rect_grid_{x1, y1} are more appropriate variable names as compared
to sample_grid_{x1, y1}. There are no functional changes in this patch.
It just prepares for the BLORP implementation of single-sample scaled
blit with bilinear filter.
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Anuj Phogat [Mon, 5 Aug 2013 21:27:47 +0000 (14:27 -0700)]
meta: Fix blitting a framebuffer with renderbuffer attachment
This patch fixes a case of framebuffer blitting with renderbuffer
as color attachment and GL_LINEAR filter. Meta implementation of
glBlitFrambuffer() converts source color buffer to a texture and
uses it to do the scaled blitting in to destination buffer. Using
the exact source rectangle to create the texture does incorrect
linear filtering along the edges. This patch makes the changes to
extend the texture edges by one pixel in x, y directions. This
ensures correct linear filtering.
It fixes failing piglit fbo-attachments-blit-scaled-linear test.
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
CC: "9.2" <mesa-stable@lists.freedesktop.org>
CC: "9.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Ilia Mirkin [Sun, 11 Aug 2013 00:19:24 +0000 (20:19 -0400)]
nv50: add vp3/vp4 support for mpeg2/vc1
h264/mpeg4 remain disabled for pre-nvc0, there's some minor
bug/difference which causes the decoding to hang after some frames.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ilia Mirkin [Sat, 10 Aug 2013 22:53:15 +0000 (18:53 -0400)]
nv50: separate video logic from noalloc
The upcoming vp3 logic will want the video layout, but allocated by the
miptree.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ilia Mirkin [Thu, 15 Aug 2013 23:52:48 +0000 (19:52 -0400)]
nv30: remove no-longer-used formats from table
Commit
14ee790df77 removed the formats from the vtxfmt_table but forgot
to also update the info_table.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "9.2 and 9.1" <mesa-stable@lists.freedesktop.org>
Fredrik Höglund [Fri, 12 Apr 2013 15:36:06 +0000 (17:36 +0200)]
mesa: Update the BGRA vertex array error handling
The error code was changed from INVALID_VALUE to INVALID_OPERATION
in OpenGL 3.3. We should also generate an error when size is BGRA
and normalized is FALSE.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Kenneth Graunke [Tue, 13 Aug 2013 23:07:56 +0000 (16:07 -0700)]
i965/fs: Fix Sandybridge regressions from SEL optimization.
Sandybridge is the only platform that supports an IF instruction
with an embedded comparison. In this case, we need to emit a CMP
to go along with the SEL.
Fixes regressions in Piglit's glsl-fs-atan-3, fs-unpackHalf2x16,
fs-faceforward-float-float-float, isinf-and-isnan fs_basic, and
isinf-and-isnan fs_fbo.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=68086
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Tested-by: lu hua <huax.lu@intel.com>
Kenneth Graunke [Tue, 13 Aug 2013 22:03:12 +0000 (15:03 -0700)]
i965: Force X-tiling for 128 bpp formats on Sandybridge.
128 bpp formats are not allowed to be Y-tiled on any architectures
except Gen7.
+11 Piglits on Sandybridge (mostly regression fixes since the
switch to Y-tiling).
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=63867
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=64261
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Cc: "9.2" <mesa-stable@lists.freedesktop.org>
Ian Romanick [Wed, 7 Aug 2013 18:15:41 +0000 (11:15 -0700)]
mesa/vbo: Fix handling of attribute 0 in non-compatibilty contexts
It is only in OpenGL compatibility-style contexts where generic
attribute 0 and GL_VERTEX_ARRAY have a bizzare, aliasing relationship.
Moreover, it is only in OpenGL compatibility-style contexts and OpenGL
ES 1.x where one of these attributes provokes the vertex. In all other
APIs each implicit call to glArrayElement provokes a vertex regardless
of which attributes are enabled.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Robert Bragg <robert@sixbynine.org>
Cc: "9.0 9.1 9.2" <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=55503
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=66292
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=67548
Zack Rusin [Thu, 15 Aug 2013 17:10:22 +0000 (13:10 -0400)]
draw: handle nan clipdistance
If clipdistance for one of the vertices is nan (or inf) then the
entire primitive should be discarded.
Signed-off-by: Zack Rusin <zackr@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Vinson Lee [Fri, 2 Aug 2013 06:04:27 +0000 (23:04 -0700)]
i915,i965: Fix memory leak in try_pbo_upload (v2)
Fixes "Resource leak" defect reported by Coverity.
Tested on Haswell, no Piglit regressions.
v2: Apply to i965, not just i915. (chadv)
CC: "9.2, 9.1" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
Roland Scheidegger [Thu, 15 Aug 2013 17:26:39 +0000 (19:26 +0200)]
gallivm: revert accidentally commited hunk
That magic wasn't meant to be commited, need to work on some proper fix.
Roland Scheidegger [Thu, 15 Aug 2013 16:40:32 +0000 (18:40 +0200)]
gallivm: do per-sample depth comparison instead of doing it post-filter
Doing the comparisons pre-filter is highly recommended by OpenGL (and d3d9)
and definitely required by d3d10.
This actually doesn't do it pre-filter but more "in-filter" as otherwise
need to push the comparisons even further down into fetch code and this
also trivially allows using a somewhat cheaper lerp.
Doing it pre-filter would actually have some performance advantage for UNORM
formats (because the comparisons should be done in texture format, we'd only
need to convert the shadow ref coord to texture format once, but in turn would
save converting the per-sample texture values to floats) but this gets a bit
messy as this has implications for border color handling as well (which needs
to be done prior to depth comparisons, hence would also need to convert border
color to texture format too or use some other tricks like doing separate border
color / shadow ref comparison and simply using that result directly when doing
border replacement).
Should make no difference for nearest filtering, and performance for linear
filtering should be mostly the same too (essentially have one more comparison
instruction per sample, and replace the sub/mul/add lerp with a sub/and/and/add
special "lerp" which all in all shouldn't be much of a difference).
v2: get rid of old code completely
Reviewed-by: Zack Rusin <zackr@vmware.com>
Michel Dänzer [Fri, 9 Aug 2013 16:36:31 +0000 (18:36 +0200)]
radeonsi: Pixel shaders pre-load one more SGPR
Acked-by: Marek Olšák <maraeo@gmail.com>
Michel Dänzer [Wed, 7 Aug 2013 09:30:50 +0000 (11:30 +0200)]
radeonsi: TGSI_SEMANTIC_CLIPVERTEX doesn't use any parameters
Michel Dänzer [Thu, 8 Aug 2013 14:58:00 +0000 (16:58 +0200)]
radeonsi: Don't export unused clip distance vectors from vertex shader
E.g. the Source engine seems to always write to gl_ClipVertex, but normally
doesn't enable any GL_CLIP_DISTANCEn states. This change removes some
irrelevant parts from the generated vertex shader code in such cases.
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Michel Dänzer [Wed, 7 Aug 2013 16:14:16 +0000 (18:14 +0200)]
radeonsi: Don't leave gaps between position exports from vertex shader
If the vertex shader exports clip distances but not point size, use
position exports 1/2 instead of 2/3 for the clip distances. Fixes
geometry corruption in that case.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=66974
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Roland Scheidegger [Thu, 15 Aug 2013 14:50:27 +0000 (16:50 +0200)]
llvmpipe: fix stencil bug if we have both stencil and depth tests
This is a very well hidden bug found by accident (only the fixed glean
tstencil2 test so far seems to hit it).
We must use new mask with combined s_pass values and orig_mask values
for zpass/zfail stencil ops, otherwise both the sfail op and one of
zpass/zfail op are applied (probably not hit in most tests because
some of the ops tend to be KEEP usually).
Note: this is a candidate for the 9.2 branch.
Reviewed-by: Zack Rusin <zackr@vmware.com>
Roland Scheidegger [Wed, 14 Aug 2013 23:05:03 +0000 (01:05 +0200)]
st/mesa: use new float comparison opcodes if native integers are supported
Should get rid of some float-to-int conversions (with negation).
No piglit regressions (with llvmpipe).
v2: fix bogus formatting spotted by Brian.
Reviewed-by: Brian Paul <brianp@vmware.com>
Ilia Mirkin [Sat, 10 Aug 2013 22:02:49 +0000 (18:02 -0400)]
nvc0: move video param and format support functions to nouveau
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ilia Mirkin [Sat, 10 Aug 2013 21:51:01 +0000 (17:51 -0400)]
nvc0: move firmware loading functions to nouveau
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ilia Mirkin [Sat, 10 Aug 2013 21:10:26 +0000 (17:10 -0400)]
nvc0: move some of the simpler decoder functions into nouveau
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ilia Mirkin [Sat, 10 Aug 2013 20:43:06 +0000 (16:43 -0400)]
nvc0: move vp param filling logic into nouveau
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ilia Mirkin [Sat, 10 Aug 2013 20:07:17 +0000 (16:07 -0400)]
nvc0: move bsp param-filling logic into nouveau
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ilia Mirkin [Sat, 10 Aug 2013 19:42:19 +0000 (15:42 -0400)]
nvc0: move nvc0_decoder into nouveau, rename to nouveau_vp3_decoder
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ilia Mirkin [Sat, 10 Aug 2013 19:27:49 +0000 (15:27 -0400)]
nvc0: standardize on using #if for NVC0_DEBUG_FENCE
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ilia Mirkin [Sat, 10 Aug 2013 17:27:47 +0000 (13:27 -0400)]
nvc0: refactor video buffer management logic into nouveau_vp3
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ilia Mirkin [Mon, 29 Jul 2013 23:28:45 +0000 (19:28 -0400)]
nv50: allow forcing PMPEG use, for ease of testing
This also allows people who don't want to install the binary blobs
required for VP2 to still get MPEG decoding.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ilia Mirkin [Tue, 2 Jul 2013 21:33:41 +0000 (17:33 -0400)]
nv30: hook up PMPEG support via nouveau_video, enables XvMC to work
Force the format to be the reasonable format that doesn't require an
inverse z-scan.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ilia Mirkin [Sat, 10 Aug 2013 08:10:28 +0000 (04:10 -0400)]
nouveau: set buffer format of video buffer
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ilia Mirkin [Sat, 10 Aug 2013 07:49:21 +0000 (03:49 -0400)]
nouveau: fix number of surfaces in video buffer, use defines
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ilia Mirkin [Wed, 14 Aug 2013 05:08:38 +0000 (01:08 -0400)]
nv30: U8_USCALED only works for size 4
See https://bugs.freedesktop.org/show_bug.cgi?id=61635 for a sample
program. Changing it to use a vec4 makes it work. Remove the unsupported
formats.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "9.2 and 9.1" <mesa-stable@lists.freedesktop.org>
Chris Forbes [Sun, 7 Jul 2013 10:51:02 +0000 (22:51 +1200)]
i965: allow 8 user clip planes on CTG+
There's no need to use a clip flag for NEGW on these gens, so
no reason we can't just enable 8 planes.
V2: - Bump (and document!) MAX_VERTS in the clip code.
- Fix clip flag masks in the clip unit state and in the shader
prolog
- Move this to the end of the series for less breakage.
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Chris Forbes [Sun, 7 Jul 2013 15:46:55 +0000 (03:46 +1200)]
i965: get rid of clip plane compaction
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Chris Forbes [Sun, 4 Aug 2013 16:18:22 +0000 (04:18 +1200)]
i965/clip: Support clip distances for line clipping
This does the same thing as we do for triangle clipping -- select the
appropriate source (either dot(hpos,fixed plane) or a clipdistance
slot).
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Chris Forbes [Sun, 4 Aug 2013 06:32:48 +0000 (18:32 +1200)]
i965/clip: remove spurious clipvertex param
Nothing in the clipper uses gl_ClipVertex any more, so we don't care
where it is.
V2: Don't bother fishing out the clipvertex offset either.
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Chris Forbes [Sun, 4 Aug 2013 06:31:56 +0000 (18:31 +1200)]
i965/clip: Use clip distances for all user clipping
V2: Adjust explanation of load_clip_distance()
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Chris Forbes [Sat, 3 Aug 2013 17:47:34 +0000 (05:47 +1200)]
i956/clip: push dp4 into load_clip_distance
Soon the dp4 is only going to be used for fixed clip planes.
V2: Remove old inaccurate comment about the behavior of this function;
add a better explanation above.
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Chris Forbes [Sat, 3 Aug 2013 17:20:17 +0000 (05:20 +1200)]
i965/clip: Track offset into the vertex for clipdistance
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Chris Forbes [Sat, 3 Aug 2013 15:32:34 +0000 (03:32 +1200)]
i965/Gen4-5: Set clip flags from clip distances
V2: - Use the new VS_OPCODE_UNPACK_FLAGS_SIMD4X2 to correctly split the
flags for the two vertices being processed together.
- Don't apply bogus masking of clip flags. The set of plane enables
aren't included in the shader key, and we wouldn't want the
recompiles anyway.
V3: - Tidy up spurious instructions, name temps properly.
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
[V2] Reviewed-by: Paul Berry <stereotype441@gmail.com>
Chris Forbes [Wed, 7 Aug 2013 18:31:33 +0000 (06:31 +1200)]
i965: add new VS_OPCODE_UNPACK_FLAGS_SIMD4X2
Splits the bottom 8 bits of f0.0 for further wrangling
in a SIMD4x2 program. The 4 bits corresponding to the channels in each
program flow are copied to the LSBs of dst.x visible to each flow.
This is useful for working with clipping flags in the VS.
V3: - Fixup immediate types
- Teach scheduler about the hidden dep on flags
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
V2: Reviewed-by: Paul Berry <stereotype441@gmail.com>
Chris Forbes [Thu, 15 Aug 2013 18:54:30 +0000 (06:54 +1200)]
i965/vs: add vec4_instruction::depends_on_flags
We're about to have an instruction that depends on the flags but isn't
predicated. This lays the groundwork.
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Chris Forbes [Sun, 7 Jul 2013 16:48:52 +0000 (04:48 +1200)]
i965/clip: Enable interpolation of clip distances
Previously we had disabled interpolation of the clip distances as a
special case, since they were unused.
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Chris Forbes [Sun, 7 Jul 2013 16:21:08 +0000 (04:21 +1200)]
i965/vs: Do legacy clip lowering earlier
We need to produce clip flags for the vertex header on Gen4/5, so
clip plane lowering has to be done before we try to emit the flags/psiz
attribute.
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Chris Forbes [Sun, 7 Jul 2013 15:44:58 +0000 (03:44 +1200)]
i965/Gen4-5: ensure VUE slots for clipdistance are valid if user clipping is enabled.
V2: We don't particularly care where they fall in the VUE map, as long
as they are allocated somewhere, and occupy two contiguous slots. Don't
fiddle with the SF layout at all -- there's no need.
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Chia-I Wu [Thu, 15 Aug 2013 03:14:05 +0000 (11:14 +0800)]
ilo: fix fragment shaders that use PCB on GEN7+
Missed this commit when preparing PCB changes for upstreaming.
Vinson Lee [Thu, 15 Aug 2013 00:27:53 +0000 (17:27 -0700)]
nouveau: Fix variable name.
Fixes build error introduced with commit
d1ba1055d98c246d1ee9d9c14706bb9fba6a98c7.
CC nouveau_video.lo
nouveau_video.c: In function 'nouveau_screen_get_video_param':
nouveau_video.c:866:33: error: 'screen' undeclared (first use in this function)
nouveau_video.c:866:33: note: each undeclared identifier is reported only once for each function it appear
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Matt Turner [Wed, 7 Aug 2013 20:00:48 +0000 (13:00 -0700)]
glsl: Add i2b() and b2i() to ir_builder.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
Matt Turner [Sun, 4 Aug 2013 21:09:35 +0000 (14:09 -0700)]
glsl: Add nequal() to ir_builder.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
Matt Turner [Sun, 4 Aug 2013 21:09:09 +0000 (14:09 -0700)]
glsl: Add abs() to ir_builder.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
Matt Turner [Sat, 3 Aug 2013 18:33:49 +0000 (11:33 -0700)]
glsl: Add bitcast_i2f() to ir_builder.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
Marek Olšák [Tue, 6 Aug 2013 04:33:22 +0000 (06:33 +0200)]
radeonsi: unduplicate code in create_context
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Marek Olšák [Tue, 6 Aug 2013 04:23:52 +0000 (06:23 +0200)]
radeonsi: initialize the radeon_surface structure
this fixes valgrind warnings
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Marek Olšák [Tue, 6 Aug 2013 04:31:17 +0000 (06:31 +0200)]
radeonsi: correct sampler function names
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Marek Olšák [Mon, 5 Aug 2013 12:40:43 +0000 (14:40 +0200)]
radeonsi: rename r600_texture::dirty_db_mask to dirty_level_mask
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Marek Olšák [Mon, 5 Aug 2013 01:42:11 +0000 (03:42 +0200)]
radeonsi: rename r600_resource_texture to r600_texture
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Marek Olšák [Tue, 6 Aug 2013 04:35:23 +0000 (06:35 +0200)]
tgsi: add info about MSAA samplers to tgsi_shader_info
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>