Erik Faye-Lund [Mon, 10 Jun 2019 17:08:35 +0000 (19:08 +0200)]
TEMP: add rst-conversion scripts
This is just a temporary commit, adding the scripts that performs the
automated conversion of the docs. The next commit contains the results
of the conversion, and the commit following that removes these scripts
again.
To redo the conversion in the next commit, rebase interactively to edit
this commit and delete the next one, and run './update-docs.sh' from the
root directory. Then continue the rebasing, and resolve any conflicts
that might have occurred in the manual fixes on top. Finally, build the
documentation to ensure no further fixups are needed.
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4630>
Eric Engestrom [Fri, 5 Jun 2020 08:39:19 +0000 (10:39 +0200)]
iris: drop dead #include "config.h"
There hasn't been a config.h in a long time (it was an artifact of the
autotool build).
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5350>
Eric Engestrom [Fri, 5 Jun 2020 08:38:31 +0000 (10:38 +0200)]
i965: drop dead #include "config.h"
There hasn't been a config.h in a long time (it was an artifact of the
autotool build).
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5350>
Eric Engestrom [Wed, 3 Jun 2020 09:35:50 +0000 (11:35 +0200)]
docs: update the blocks of unused EGL enums assigned to us
See src/egl/generate/egl.xml for reference.
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5309>
Eric Engestrom [Fri, 5 Jun 2020 14:45:29 +0000 (16:45 +0200)]
intel/genxml: replace gen_sort_tags.py MIT licence with SPDX equivalent
Much more readable with the same information :)
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5362>
Eric Engestrom [Fri, 5 Jun 2020 14:41:44 +0000 (16:41 +0200)]
intel/genxml: drop python 2 support for gen_sort_tags.py
Python 2 is dead and this script is only run by devs, all of which have
had python3 available for basically forever.
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5362>
Eric Engestrom [Fri, 29 May 2020 18:19:22 +0000 (20:19 +0200)]
v3d: add missing unlock() in error path
CoverityID:
1435701
Fixes: e5a81ac70431502bc592 ("broadcom/vc5: Don't forget to get the BO offset when opening a dmabuf.")
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5263>
Jonathan Marek [Thu, 16 Apr 2020 19:44:06 +0000 (15:44 -0400)]
turnip: remove some dead/redundant code
A bit of cleanup to reduce noise in the codebase.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5447>
Eric Anholt [Tue, 9 Jun 2020 17:00:17 +0000 (10:00 -0700)]
ci/bare-metal: Terminate the job with an error on kernel panic.
Otherwise, we'll time out after 60 minutes of waiting for the run to
complete.
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2651
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5393>
Eric Anholt [Mon, 8 Jun 2020 22:36:16 +0000 (15:36 -0700)]
ci/bare-metal: Stop fetching the git tree.
Like for LAVA, make the tradeoff of moving the test scripts and data (55k)
into the artifacts in order to make the per-build jobs not have to pull
down the git tree (hundreds of MB when you don't hit a cached container
for your specific user, which I see happen multiple times a day in my CI
runs).
To do this, we have to be a bit more careful in some places about our
working directory potentially being dirty.
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5393>
Eric Anholt [Mon, 8 Jun 2020 22:09:51 +0000 (15:09 -0700)]
ci/bare-metal: Use the deqp-runner bits straight out of the artifacts.
We've already uploaded and downloaded them from fd.o and put them in the
rootfs, so we can clean up the extra prep work.
Our test job now extends from .test so that the artifacts' install dir
with all the scripts is extracted. This required moving the dependency on
meson-testing to the x86 test-gl/test-vk job blocks.
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5393>
Eric Anholt [Mon, 8 Jun 2020 22:23:52 +0000 (15:23 -0700)]
ci/bare-metal: Make which test to run configurable.
I'll use this to run tracie in a new job I'm working on.
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5393>
Eric Anholt [Mon, 8 Jun 2020 21:55:53 +0000 (14:55 -0700)]
ci/bare-metal: Reword the final output of the init script on the board.
I'm going to be adding tracie, which isn't deqp.
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5393>
Icecream95 [Sun, 19 Apr 2020 03:44:17 +0000 (15:44 +1200)]
panfrost: Tiled to linear layout conversion
Tiling is expensive, so this patch converts textures that appear to be
used for streaming to a linear layout.
Performance of mpv is significantly improved, with software-decoded
1080p mp4 playback on RK3288 going from 30fps to 50fps when testing
with `--untimed --no-audio`.
To keep things simple, conversion only happens when updating the whole
texture and no mipmapping is used.
v2: Make it clear that the heuristic doesn't rely on a texture being
uninitialized, since layout switching code can get confusing (Alyssa).
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4628>
Icecream95 [Fri, 12 Jun 2020 08:14:02 +0000 (20:14 +1200)]
panfrost: Create a new sampler view bo when the layout changes
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4628>
Icecream95 [Thu, 30 Apr 2020 03:21:17 +0000 (15:21 +1200)]
panfrost: Move sampler view bo creation to a separate function
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4628>
Matt Turner [Tue, 9 Jun 2020 20:51:10 +0000 (13:51 -0700)]
intel/compiler: Drop opt_sampler_eot()
Gen9 and Cherryview have the ability to mark texture instructions with
the End-of-thread bit under some conditions, which allows the texture
result to be written to the render target directly, rather than
returning to the EU.
In order to handle overlapping primitives correctly, we have to use the
'sendc' instruction which stalls until other threads potentially writing
to the same locations in the render target are retired. Unfortunately,
this stall happens before the texture is sampled (rather than in
parallel with stall), so for some literal edge cases (like the diagonal
edge between two triangles forming a rectangle) there can be a
performance penalty. As a result, it's probably not a good idea to use
this optimization in general.
I had planned to leave it enabled only for BLORP, where we use rectangle
primitives and are typically clearing/blitting an entire render target
without any overlapping primitives, but I noticed that the optimization
wasn't applied in some normal cases anyway. For example, in the piglit
test tests/shaders/glsl-fs-texture2d-bias.shader_test it is applied to
one BLORP-blit shader but not another due to some kind of mishandling of
register types (the destination register type of the texture operation
is UD while the color source of the render target write is F).
Additionally the instruction scheduler assumed that the combined texture
and render target write operation took 0 cycles, leading to cycle
estimates that are wildly inaccurate. Since the optimization was not
implemented for SIMD32 and our decision whether to use the SIMD32
program is made by comparing the estimated performance with that of the
SIMD16 shader, we wrongly threw out a bunch of SIMD32 programs that are
likely profitable.
total cycles in shared programs:
472807891 ->
473784245 (0.21%)
cycles in affected programs: 108277 ->
1084631 (901.72%)
helped: 0
HURT: 1290
total sends in shared programs: 998955 ->
1000245 (0.13%)
sends in affected programs: 1400 -> 2690 (92.14%)
helped: 0
HURT: 1290
LOST: 0
GAINED: 33
This patch shows no performance changes in Intel's Mesa performance CI.
Given the problems, the lack of evidence that the pass improves
performance, and the fact that the hardware feature was removed from
subsequent GPU generations, I think that the pass is not valuable and
should be removed.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5412>
Eric Anholt [Thu, 11 Jun 2020 16:00:35 +0000 (09:00 -0700)]
ci: Disable some flaky tests on turnip.
These have appeared more than once in the flake reporting channel, and a
couple of them have spuriously failed marge-bot merges.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5429>
Eric Anholt [Thu, 11 Jun 2020 20:19:11 +0000 (13:19 -0700)]
ci: Fix weird filesystem globs appearing in failed test .qpa files.
When you get a filure and go looking in the results, you'll find weird stuff like this in the XML:
Reference images fill undefined pixels with 3x3 grid pattern.
Attachment 0 (p' = p bin boot builds
dEQP-VK.renderpass.suballocation.attachment_allocation.grow_shrink.89.qpa
deqp dev etc home init install lib media mnt proc results root run sbin
set-job-env-vars.sh sys tmp usr var (1, 1, 1, 1) + (-1, -1, -1, 1))
because we were not quoting the line and 'p *' was getting expanded.
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5435>
Dylan Baker [Fri, 12 Jun 2020 17:02:05 +0000 (10:02 -0700)]
docs: update calendar, add news item, and link releases notes for 20.0.8
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5444>
Dylan Baker [Fri, 12 Jun 2020 01:37:10 +0000 (18:37 -0700)]
docs: Add sha256sums for 20.0.8
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5444>
Dylan Baker [Fri, 12 Jun 2020 01:17:30 +0000 (18:17 -0700)]
docs: Add release notes for 20.0.8
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5444>
Alyssa Rosenzweig [Fri, 12 Jun 2020 16:22:54 +0000 (12:22 -0400)]
pan/mdg: Prefer type over regmode for schedule constraints
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5443>
Alyssa Rosenzweig [Fri, 12 Jun 2020 16:21:11 +0000 (12:21 -0400)]
pan/mdg: Analyze types for 64-bitness in RA
Instead of reg_mode.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5443>
Alyssa Rosenzweig [Fri, 12 Jun 2020 16:20:52 +0000 (12:20 -0400)]
pan/mdg: Explicitly type 64-bit uniform moves
Instead of relying on reg_mode.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5443>
Jonathan Marek [Thu, 11 Jun 2020 13:49:23 +0000 (09:49 -0400)]
turnip: add emit renderpass cache flushes for sysmem 3D CmdClearAttachments
This clear path behaves like a draw, it needs the same flush as tu_draw.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5426>
Jonathan Marek [Thu, 11 Jun 2020 13:34:28 +0000 (09:34 -0400)]
turnip: add layered 3D path clear for CmdClearAttachments
This fixes cases where the 3D path is used with layered rendering.
Fixes dEQP-VK.renderpass.suballocation.multisample_resolve.layers* failures
Note the blob's 3D fallback path behaves differently, and uses the
framebuffer information to clear each layer individually (changing the MRT
state each time). But that's not possible in all cases, and the blob fails
to clear properly in dEQP-VK.geometry.layered.*.secondary_cmd_buffer cases.
So this clear path is not based on the blob's behavior.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5426>
Jonathan Marek [Thu, 11 Jun 2020 12:38:18 +0000 (08:38 -0400)]
turnip: share code between 3D blit/clear path and tu_pipeline
Instead of filling out registers manually, fill out ir3 structs and re-use
code from tu_pipeline.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5426>
Jonathan Marek [Thu, 11 Jun 2020 00:32:17 +0000 (20:32 -0400)]
turnip: pipeline program state refactor
This refactor simplifies things a bit, and will make it easier to share
some logic with tu_clear_blit (see next patches).
This changes the order in which some things are emitted, and emits less
for disabled shader stages. There's also as extra write to SP_GS_PRIM_SIZE
that is removed.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5426>
Alyssa Rosenzweig [Tue, 9 Jun 2020 22:15:20 +0000 (18:15 -0400)]
panfrost: Demote mediump varyings to fp16
Likewise lowp.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5423>
Alyssa Rosenzweig [Mon, 8 Jun 2020 22:11:29 +0000 (18:11 -0400)]
panfrost: Override varying format to minimal precision
Spec allows this!
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5423>
Alyssa Rosenzweig [Mon, 8 Jun 2020 22:05:21 +0000 (18:05 -0400)]
panfrost: Use shader_info harder
We already have this metadata..
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5423>
Alyssa Rosenzweig [Wed, 10 Jun 2020 19:48:33 +0000 (15:48 -0400)]
panfrost: Only store varying formats
This reduces linking complexity.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5423>
Alyssa Rosenzweig [Wed, 10 Jun 2020 19:47:45 +0000 (15:47 -0400)]
panfrost: Allow R/RG/RGB varyings
This can be a bandwidth savings.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5423>
Alyssa Rosenzweig [Mon, 8 Jun 2020 21:46:05 +0000 (17:46 -0400)]
panfrost: Remove unused routines
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5423>
Alyssa Rosenzweig [Thu, 4 Jun 2020 19:45:34 +0000 (15:45 -0400)]
panfrost: Use new varying linking
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5423>
Alyssa Rosenzweig [Mon, 8 Jun 2020 19:29:05 +0000 (15:29 -0400)]
panfrost: Add high-level varying emit
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5423>
Alyssa Rosenzweig [Wed, 10 Jun 2020 19:13:12 +0000 (15:13 -0400)]
panfrost: Add helper to determine if we are capturing
That is, is the varying setup for xfb *and* is there a buffer for it?
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5423>
Alyssa Rosenzweig [Mon, 8 Jun 2020 18:08:45 +0000 (14:08 -0400)]
panfrost: Emit xfb records
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5423>
Alyssa Rosenzweig [Mon, 8 Jun 2020 17:52:38 +0000 (13:52 -0400)]
panfrost: Emit special varyings
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5423>
Alyssa Rosenzweig [Mon, 8 Jun 2020 17:45:17 +0000 (13:45 -0400)]
panfrost: Emit unlinked varyings
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5423>
Alyssa Rosenzweig [Mon, 8 Jun 2020 17:32:38 +0000 (13:32 -0400)]
panfrost: Determine varying buffer presence
Essentially the same logic as before, but the assumptions are much more
explicit.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5423>
Alyssa Rosenzweig [Mon, 8 Jun 2020 16:56:33 +0000 (12:56 -0400)]
panfrost: Introduce bitfields for tracking varyings
Rather than having all sorts of random state flyng about with varying
emission, we can use a simple present mask and general stride to encode
everything we need for non-XFB cases, and layer XFB on top easily
enough.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5423>
Alyssa Rosenzweig [Wed, 10 Jun 2020 23:28:28 +0000 (19:28 -0400)]
panfrost: Add panfrost_streamout_offset helper
Calculates the bias required for an xfb record in the src_offset field
to account for truncating the address to force alignment.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5423>
Alyssa Rosenzweig [Wed, 10 Jun 2020 19:35:41 +0000 (15:35 -0400)]
panfrost: Calculate varying size by format
Will enable <16-byte varyings.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5423>
Alyssa Rosenzweig [Wed, 10 Jun 2020 18:06:43 +0000 (14:06 -0400)]
pan/mdg: Avoid fusing ld_vary_16 with non-zero component
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5423>
Daniel Schürmann [Fri, 12 Jun 2020 10:59:27 +0000 (11:59 +0100)]
aco: fix shared subdword loads
Shared subdword loads don't need byte alignment as they are split
into multiple loads if necessary.
Fixes: 5cde4989d3c8c25b0ba2a11ec450625e30092b16 ('aco: remove unnecessary split- and create_vector instructions for subdword loads')
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5441>
Samuel Pitoiset [Fri, 5 Jun 2020 12:25:20 +0000 (14:25 +0200)]
radv: enable radv_enable_mrt_output_nan_fixup for RAGE 2
To fix game artifacts. It's always sad to have to fix game bugs
inside drivers ...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5359>
Samuel Pitoiset [Fri, 5 Jun 2020 13:05:07 +0000 (15:05 +0200)]
radv/llvm: implement radv_enable_mrt_output_nan_fixup workaround
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5359>
Samuel Pitoiset [Fri, 5 Jun 2020 12:28:09 +0000 (14:28 +0200)]
aco: implement radv_enable_mrt_output_nan_fixup workaround
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5359>
Samuel Pitoiset [Fri, 5 Jun 2020 12:24:33 +0000 (14:24 +0200)]
radv: add new drirc option radv_enable_mrt_output_nan_fixup
To replace NaN from FS with zeros to fix game bugs.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5359>
Timothy Arceri [Wed, 10 Jun 2020 05:19:22 +0000 (15:19 +1000)]
glsl: fix incorrect optimisation in opt_constant_variable()
When handling function inputs the optimisation pass incorrectly
assumes the inputs are undefined. Here we simply change things to
assume inputs have always been assigned a value. Any further
optimisations will be taken care of once function inlining takes
place.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2984
Fixes: 65122e9e8038 ("ir_constant_variable: New pass to mark constant-assigned variables constant.")
Reviewed-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5413>
Samuel Pitoiset [Tue, 9 Jun 2020 15:59:00 +0000 (17:59 +0200)]
radv: set DB_SHADER_CONTROL.CONSERVATIVE_Z_EXPORT correctly
Use the SPIR-V execution modes if set.
Cc: 20.1 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5404>
Mauro Rossi [Thu, 11 Jun 2020 19:47:12 +0000 (21:47 +0200)]
android: nvir/gv100: update sources in Makefile.sources
Fixes the following building errors:
FAILED: out/target/product/x86_64/obj/SHARED_LIBRARIES/gallium_dri_intermediates/LINKED/gallium_dri.so
...
ld.lld: error: undefined symbol: nv50_ir::getTargetGV100(unsigned int)
...
ld.lld: error: undefined symbol: nv50_ir::getTargetGV100(unsigned int)
clang-9: error: linker command failed with exit code 1 (use -v to see invocation)
Fixes: 78103abe ("nvir/gv100: initial support")
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Rob Clark [Thu, 11 Jun 2020 19:03:03 +0000 (12:03 -0700)]
freedreno/ir3: limit pre-fetched tex dest
Teach RA to setup additional interference to prevent textures fetched
before the FS starts from ending up in a register that is too high to
encode.
Fixes mis-rendering in multiple playcanv.as webgl apps.
Note that the regression was not actually
733bee57eb8's fault, but
that was the commit that exposed the problem.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3108
Fixes: 733bee57eb8 ("glsl: lower samplers with highp coordinates correctly")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5431>
Rob Clark [Thu, 11 Jun 2020 21:56:29 +0000 (14:56 -0700)]
freedreno/ir3: remove RA "q-values" optimization
This is mainly the "piglit optimization" (ie, since piglit launches an
separate process for for each test). It was never wired up for a6xx,
and makes register class setup unnecessarily complicated. Remove it to
simplify the next patch.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5431>
Rob Clark [Thu, 11 Jun 2020 18:00:55 +0000 (11:00 -0700)]
freedreno/ir3: respect tex prefetch limits
Refactor a bit the limit checking in the bindless case, and add tex/samp
limit checking for the non-bindless case, to ensure we do not try to
prefetch textures which cannot be encoded in the # of bits available.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5431>
Rob Clark [Thu, 11 Jun 2020 16:47:05 +0000 (09:47 -0700)]
freedreno/ir3: add debug code to print conflicting half-regs
I keep re-typing this from time to time when debugging various things.
Which is dumb.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5431>
Rob Clark [Thu, 11 Jun 2020 16:43:11 +0000 (09:43 -0700)]
nir/print: print tex dest type
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5431>
Francisco Jerez [Tue, 9 Jun 2020 22:23:30 +0000 (15:23 -0700)]
iris/icl+: Report same caching domain as main surface for clear color BO.
Even though the clear color BO is bound as a read-only buffer, report
the same caching domain as the main BO in use_surface() (typically
IRIS_DOMAIN_RENDER_WRITE) in order to avoid ping-ponging back and
forth between IRIS_DOMAIN_RENDER_WRITE and IRIS_DOMAIN_OTHER_READ,
which leads to increased stall-at-pixel-scoreboard synchronization
between draw calls.
Fixes a 5%-10% FPS regression in some benchmarks spotted on ICL.
Reported-by: Clayton Craft <clayton.a.craft@intel.com>
Fixes: eb5d1c27227302167d299 "iris: Annotate all BO uses with domain and sequence number information."
Closes: #3097
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5411>
Mauro Rossi [Thu, 11 Jun 2020 06:17:02 +0000 (08:17 +0200)]
android: aco: add aco_ir.cpp to Makefile.sources
Fixes the following building errors:
FAILED: out/target/product/x86_64/obj/SHARED_LIBRARIES/vulkan.radv_intermediates/LINKED/vulkan.radv.so
...
ld.lld: error: undefined symbol: aco::can_use_SDWA(chip_class, std::__1::unique_ptr<aco::Instruction, aco::instr_deleter_functor> const&)
...
ld.lld: error: undefined symbol: aco::can_use_opsel(chip_class, aco_opcode, int, bool)
...
clang-9: error: linker command failed with exit code 1 (use -v to see invocation)
Fixes: d9cfb8ad ("aco: validate instructions reading/writing upper halves/bytes")
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5425>
Eric Engestrom [Wed, 10 Jun 2020 18:43:39 +0000 (20:43 +0200)]
docs: update calendar, add news item, and link releases notes for 20.1.1
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5421>
Eric Engestrom [Wed, 10 Jun 2020 18:01:30 +0000 (20:01 +0200)]
docs: Add release notes for 20.1.1
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5421>
Marek Olšák [Thu, 11 Jun 2020 09:00:44 +0000 (05:00 -0400)]
ac/surface: don't free dcc_retile_map on failure
because the hash table now owns it.
Fixes: bd553f0546d - ac/surface: cache DCC retile maps (v2)
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5424>
Marek Olšák [Thu, 11 Jun 2020 08:30:04 +0000 (04:30 -0400)]
ac/surface: enable DCC for the first level in the mip tail on gfx10
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5424>
Marek Olšák [Thu, 11 Jun 2020 08:20:44 +0000 (04:20 -0400)]
ac/surface: require that gfx8 doesn't have DCC in order to be displayable
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5424>
Marek Olšák [Wed, 10 Jun 2020 15:43:49 +0000 (11:43 -0400)]
ac/surface: don't set is_displayable if displayable DCC is missing
If flags.display isn't set, then displayable DCC will not be computed, so
is_displayable will always be false.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5424>
Marek Olšák [Wed, 10 Jun 2020 12:53:40 +0000 (08:53 -0400)]
amd/addrlib: fix the C++ one definition rule violation
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/1854
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5414>
Jason Ekstrand [Fri, 22 May 2020 03:24:28 +0000 (22:24 -0500)]
iris: Better handle metadata in NIR passes
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5171>
Jason Ekstrand [Fri, 22 May 2020 01:41:28 +0000 (20:41 -0500)]
intel/nir: Call nir_metadata_preserve on !progress
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5171>
Jason Ekstrand [Fri, 22 May 2020 03:34:37 +0000 (22:34 -0500)]
nir: Properly preserve metadata in more cases
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5171>
Jason Ekstrand [Fri, 22 May 2020 01:41:12 +0000 (20:41 -0500)]
nir: Call nir_metadata_preserve on !progress
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5171>
Jason Ekstrand [Fri, 22 May 2020 02:37:33 +0000 (21:37 -0500)]
nir: Add a nir_shader_preserve_all_metadata helper
There are some passes which really work on the shader level and it's
easier if we have a helper which preserves metadata on the whole shader.
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5171>
Jason Ekstrand [Fri, 22 May 2020 01:39:30 +0000 (20:39 -0500)]
nir: Add a nir_metadata_all enum value
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5171>
Dave Airlie [Wed, 10 Jun 2020 03:12:41 +0000 (13:12 +1000)]
gallivm/sample: fix texel type for stencil 8-bit
This has to be unsigned, so clamping works properly for border
colors.
Fixes dEQP-GLES31.functional.texture.border_clamp.range_clamp.nearest_uint_stencil
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5379>
Dave Airlie [Wed, 10 Jun 2020 02:42:38 +0000 (12:42 +1000)]
gallivm/conv: enable conversion min code. (v2)
I'm not sure why this code was if (0), but if (1) for it fixes
dEQP-GLES31.functional.texture.border_clamp.range_clamp.nearest_float_color
This test expects +inf to get mapped to 255 and -inf to 0, both values
were ending up at 0.
v2: also enable in the SSE paths
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5379>
Dave Airlie [Tue, 9 Jun 2020 03:58:59 +0000 (13:58 +1000)]
gallivm/format: convert unsigned values to float properly.
This fixes:
dEQP-GLES31.functional.draw_indirect.random.2
which ends up with 3x32-bit USCALED values going down this path
some of which have the top bit set, and end up converted to signed
float instead of unsigned float values.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5379>
Dave Airlie [Mon, 8 Jun 2020 22:25:37 +0000 (08:25 +1000)]
llvmpipe: fix subpixel bits reporting.
This fixes some vulkan tests later.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5379>
Dave Airlie [Fri, 27 Mar 2020 05:27:41 +0000 (15:27 +1000)]
gallivm/nir: add group barrier support
Fixes crash in
dEQP-GLES31.functional.synchronization.inter_invocation.image_write_read
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5379>
Dave Airlie [Mon, 8 Jun 2020 07:04:50 +0000 (17:04 +1000)]
draw/gs: add more info to debugging.
adds invocations and vertex streams to default off debug,
fixes compile as well due to missing ,
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5379>
Dave Airlie [Mon, 8 Jun 2020 07:02:11 +0000 (17:02 +1000)]
draw/gs: fix emitting inactive primitives crash
Fixes dEQP-GLES31.functional.geometry_shading.emit.line_strip_emit_1_end_1
This test only emits 1 primitive, but the stores don't respect
the current mask, which might only have one lane active, for that single
primitive. Also fix the final emit path to use the emitted_mask
rather than the current execution mask.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5379>
Eric Anholt [Wed, 10 Jun 2020 19:13:43 +0000 (12:13 -0700)]
ci: Leave a note as to what might be going on with a test.
dEQP-GLES2.functional.clipping.triangle_vertex.clip_three.clip_neg_x_neg_z_and_pos_x_pos_z_and_neg_x_neg_y_pos_z
fails pretty strangely (given that we're passing everything else) and
there's an old VK-GL-CTS bug open about this test, and it's suspicious
that all the ARM drivers seem to have trouble with it. I tried dropping
to -O0 on guilding that file in the CTS and it didn't help, though.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5419>
Eric Anholt [Wed, 10 Jun 2020 18:28:03 +0000 (11:28 -0700)]
freedreno/a6xx: Fix clip_halfz support.
Same bit as on other gens, apparently it just got missed on this one.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5419>
Ben Skeggs [Sat, 6 Jun 2020 23:52:49 +0000 (09:52 +1000)]
nvc0: initial support for tu1xx
v2:
- add proper method definitions
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Acked-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377>
Ben Skeggs [Sat, 6 Jun 2020 23:52:46 +0000 (09:52 +1000)]
nvc0: initial support for gv100
v2:
- remove unnecessary MAX2()
- add proper method definitions
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Acked-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377>
Ben Skeggs [Sat, 6 Jun 2020 23:52:45 +0000 (09:52 +1000)]
nvc0: remove hardcoded blitter vertprog
I don't really feel like writing SM70 SASS by hand...
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377>
Ben Skeggs [Sat, 6 Jun 2020 23:52:43 +0000 (09:52 +1000)]
nvc0: move setting of entrypoint for a shader stage to a function
GV100 requires something different, cleaner to move this to a single place.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377>
Ben Skeggs [Sat, 6 Jun 2020 23:52:41 +0000 (09:52 +1000)]
nvc0: use NVIDIA headers for GP100- compute QMD
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377>
Ben Skeggs [Sat, 6 Jun 2020 23:52:39 +0000 (09:52 +1000)]
nvc0: use NVIDIA headers for GK104->GM2xx compute QMD
v2:
- add header debug_printf(), and indent the output
v3:
- rename one of the helper macros
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377>
Ben Skeggs [Sat, 6 Jun 2020 23:52:37 +0000 (09:52 +1000)]
nvir/gv100: enable support for tu1xx
SM75 has a bunch more stuff, but is otherwise backwards-compatible
with SM70 SASS.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377>
Ben Skeggs [Sat, 6 Jun 2020 23:52:35 +0000 (09:52 +1000)]
nvir/gv100: initial support
v2:
- add TargetGV100::isBarrierRequired() for OP_BREV
- use NV50_IR_SUBOP_LOP3_LUT() convenience macro where it makes sense
- separated out nir_lower_idiv into its own commit
- make use of the shared function to generate compiler options
- disable lower_fpow, nir's lowering is broken
v3:
- use replaceCvt() instead of custom NEG/ABS/SAT lowering
v4:
- remove WAR from peephole, not needed now we're using replaceCvt()
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Acked-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377>
Ben Skeggs [Sat, 6 Jun 2020 23:52:33 +0000 (09:52 +1000)]
nvir/nir/gm107: switch off lower_extract_word
We can use PRMT here.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377>
Ben Skeggs [Sat, 6 Jun 2020 23:52:31 +0000 (09:52 +1000)]
nvir/nir/gm107: switch off lower_extract_byte
We can use PRMT here.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377>
Ben Skeggs [Sat, 6 Jun 2020 23:52:29 +0000 (09:52 +1000)]
nvir/nir/gm107: turn on nir_lower_extract64
About to disable lowering for extract_byte/word in favour of a better
local implementation, but still need lowering for 64-bit versions.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377>
Ben Skeggs [Sat, 6 Jun 2020 23:52:27 +0000 (09:52 +1000)]
nvir/nir/gm107: split nir shader compiler options from gf100
We can enable some more things here vs earlier GPUs.
v2:
- make use of the shared function to generate compiler options
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377>
Ben Skeggs [Sat, 6 Jun 2020 23:52:25 +0000 (09:52 +1000)]
nvir/gm107: separate out header for sched data calculator
SM70 code emitter will want to reuse this.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377>
Ben Skeggs [Sat, 6 Jun 2020 23:52:23 +0000 (09:52 +1000)]
nvir/gm107: replace SHR+AND+AND with PRMT+PRMT in PFETCH lowering
This is more SM70-friendly.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377>
Ben Skeggs [Sat, 6 Jun 2020 23:52:21 +0000 (09:52 +1000)]
nvir/gm107: implement OP_PERMT
PFETCH lowering will be changed to use this as it's more SM70-friendly,
and this will also allow us to implement extract_byte/word opcodes.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377>
Ben Skeggs [Sun, 7 Jun 2020 20:23:50 +0000 (06:23 +1000)]
nvir/nir: use nir_lower_idiv
NIR provides a common implementation of this so we don't need to use a
hand-written built-in library.
v2:
- use idiv_precise instead
Especially important on SM70 where we don't have an assembler.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377>
Ben Skeggs [Sat, 6 Jun 2020 23:52:17 +0000 (09:52 +1000)]
nvir/nir: nir expects the shift amount to wrap, rather than clamp
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377>
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