re PR bootstrap/83015 (bootstrap comparison failure on ia64)

PR bootstrap/83015
* config/cr16/unwind-cr16.c (uw_install_context): Add FRAMES
parameter.
* config/xtensa/unwind-dw2-xtensa.c: Likewise
* config/ia64/unwind-ia64.c: Add frames parameter.
* unwind-sjlj.c: Likewise.

From-SVN: r254951

[ARM] Do no clobber r4 in Armv8-M nonsecure call

Expanders for Armv8-M nonsecure call unnecessarily clobber r4 despite
the libcall they perform not writing to r4.  Furthermore, the
requirement for the branch target address to be in r4 as expected by
the libcall is modeled in a convoluted way in the define_insn patterns:
the address is a register match_operand constrained by the match_dup
for the clobber which is guaranteed to be r4 due to the expander.

This patch simplifies all this by simply requiring the address to be in
r4 and removing the clobbers. Expanders are left alone because
cmse_nonsecure_call_clear_caller_saved relies on branch target memory
attributes which would be lost if expanding to reg:SI R4_REGNUM.

2017-11-20  Thomas Preud'homme  <thomas.preudhomme@arm.com>

    gcc/
    * config/arm/arm.md (R4_REGNUM): Define constant.
    (nonsecure_call_internal): Remove r4 clobber.
    (nonsecure_call_value_internal): Likewise.
    * config/arm/thumb1.md (nonsecure_call_reg_thumb1_v5): Remove second
    clobber and resequence match_operands.
    (nonsecure_call_value_reg_thumb1_v5): Likewise.
    * config/arm/thumb2.md (nonsecure_call_reg_thumb2): Likewise.
    (nonsecure_call_value_reg_thumb2): Likewise.

From-SVN: r254950

[testsuite,arm] [Diagnostic Patch] don't print column zero

2017-11-20  Christophe Lyon  <christophe.lyon@linaro.org>

gcc/testsuite/
* gcc.target/arm/pr69180.c: Use -: for no column in expected
warnings.

From-SVN: r254949

re PR tree-optimization/78821 (GCC7: Copying whole 32 bits structure field by field not optimised into copying whole 32 bits at once)

PR tree-optimization/78821
* gimple-ssa-store-merging.c (find_bswap_or_nop_load): Give up
if base is TARGET_MEM_REF.  If base is not MEM_REF, set base_addr
to the address of the base rather than the base itself.
(find_bswap_or_nop_1): Just use pointer comparison for vuse check.
(find_bswap_or_nop_finalize): New function.
(find_bswap_or_nop): Use it.
(bswap_replace): Return a tree rather than bool, change first
argument from gimple * to gimple_stmt_iterator, allow inserting
into an empty sequence, allow ins_stmt to be NULL - then emit
all stmts into gsi.  Fix up MEM_REF address gimplification.
(pass_optimize_bswap::execute): Adjust bswap_replace caller.
(struct store_immediate_info): Add N and INS_STMT non-static
data members.
(store_immediate_info::store_immediate_info): Initialize them
from newly added ctor args.
(merged_store_group::apply_stores): Formatting fixes.  Sort by
bitpos at the end.
(stmts_may_clobber_ref_p): For stores call also
refs_anti_dependent_p.
(gather_bswap_load_refs): New function.
(imm_store_chain_info::try_coalesce_bswap): New method.
(imm_store_chain_info::coalesce_immediate_stores): Use it.
(split_group): Handle LROTATE_EXPR and NOP_EXPR rhs_code specially.
(imm_store_chain_info::output_merged_store): Fail if number of
new estimated stmts is bigger or equal than old.  Handle LROTATE_EXPR
and NOP_EXPR rhs_code.
(pass_store_merging::process_store): Compute n and ins_stmt, if
ins_stmt is non-NULL and the store rhs is otherwise invalid, use
LROTATE_EXPR rhs_code.  Pass n and ins_stmt to store_immediate_info
ctor.
(pass_store_merging::execute): Calculate dominators.

* gcc.dg/store_merging_16.c: New test.

From-SVN: r254948

tree-ssa-math-opts.c (nop_stats, [...]): Moved to ...

* tree-ssa-math-opts.c (nop_stats, bswap_stats, struct symbolic_number,
BITS_PER_MARKER, MARKER_MASK, MARKER_BYTE_UNKNOWN, HEAD_MARKER, CMPNOP,
CMPXCHG, do_shift_rotate, verify_symbolic_number_p,
init_symbolic_number, find_bswap_or_nop_load, perform_symbolic_merge,
find_bswap_or_nop_1, find_bswap_or_nop, pass_data_optimize_bswap,
class pass_optimize_bswap, bswap_replace,
pass_optimize_bswap::execute): Moved to ...
* gimple-ssa-store-merging.c: ... this file.
Include optabs-tree.h.
(nop_stats, bswap_stats, do_shift_rotate, verify_symbolic_number_p,
init_symbolic_number, find_bswap_or_nop_load, perform_symbolic_merge,
find_bswap_or_nop_1, find_bswap_or_nop, bswap_replace): Put into
anonymous namespace, remove static keywords.
(pass_optimize_bswap::gate): Test BITS_PER_UNIT == 8 here...
(pass_optimize_bswap::execute): ... rather than here.  Formatting fix.

From-SVN: r254947

re PR bootstrap/83062 (Bootstrap failure: libsanitizer/tsan/tsan_rtl.h:713:44: error: inlining failed in call to always_inline ‘void __tsan::MemoryRead(__tsan::ThreadState*, __sanitizer::uptr, __sanitizer: :uptr, int)’: caller is not optimized)

PR bootstrap/83062
* ipa-inline.c (can_inline_edge_p): Fix typo in previous patch.

From-SVN: r254946

vec.h (debug_helper): New function.

* vec.h (debug_helper): New function.
(DEFINE_DEBUG_VEC): New macro.
* hash-set.h (debug_helper): New function.
(DEFINE_DEBUG_HASH_SET): New macro.
* cfg.c (debug_slim (edge)): New function.
Call DEFINE_DEBUG_VEC for edges.
Call DEFINE_DEBUG_HASH_SET for edges.
* cfghooks.c (debug_slim (basic_block)): New function.
Call DEFINE_DEBUG_VEC for basic blocks.
Call DEFINE_DEBUG_HASH_SET for basic blocks.
* print-tree.c (debug_slim): New function to handle trees.
Call DEFINE_DEBUG_VEC for trees.
Call DEFINE_DEBUG_HASH_SET for trees.
(debug (vec<tree, va_gc>) &): Remove.
(debug (<vec<tree, va_gc>) *): Remove.
* print-rtl.c (debug_slim): New function to handle const_rtx.
Call DEFINE_DEBUG_VEC for rtx_def.
Call DEFINE_DEBUG_VEC for rtx_insn.
Call DEFINE_DEBUG_HASH_SET for rtx_def.
Call DEFINE_DEBUG_HASH_SET for rtx_insn.
* sel-sched-dump.c (debug (vec<rtx_insn *> &): Remove.
(debug (vec<rtx_insn *> *ptr): Remove.
(debug_insn_vector): Remove.
* stor-layout.c (debug_rli): Call debug() instead of debug_vec_tree.

From-SVN: r254945

Fix comparison mode in simplify_ternary_operation

2017-11-20  Tom de Vries  <tom@codesourcery.com>

PR rtl-optimization/82020
* simplify-rtx.c (simplify_ternary_operation): Fix comparison mode of
IF_THEN_ELSE condition.

From-SVN: r254944

Daily bump.

From-SVN: r254943

re PR ada/83016 (gnat1: warning: command line option ‘-nostdinc++’ is valid for C++/ObjC++ but not for Ada)

PR ada/83016
* gnatlink.adb (Process_Args): Accept multiple switches for --LINK.
(Usage): Adjust.
* gcc-interface/Makefile.in (GCC_LINK): Remove $(ADA_INCLUDES).
(common-tools): Pass $(CC) as --GCC= and $(GCC_LINK) as --LINK= in
the invocations of $(GNATLINK).
(../../gnatdll$(exeext)): Likewise.
(../../vxaddr2line$(exeext)): Likewise.
(gnatmake-re): Likewise.
(gnatlink-re): Likewise.

From-SVN: r254940

re PR target/82281 (Bulldozer/Zen tuning: uses XMM for single 64-bit integer AND, even with a simple mask)

PR target/82281
* gcc.target/i386/pr82281.c: New testcase.

From-SVN: r254939

tree-ssa-dom.c (record_equivalences_from_phis): Fix handling of degenerates resulting from ignoring an edge.

        * tree-ssa-dom.c (record_equivalences_from_phis): Fix handling
        of degenerates resulting from ignoring an edge.

From-SVN: r254938

re PR ipa/81360 (ice in estimate_edge_growth, at ipa-inline.h:86)

PR ipa/81360
* ipa-inline.c (can_inline_edge_p): Also check that caller is optimized
* gcc.c-torture/compile/pr81360.c: New testcase.

From-SVN: r254937

re PR fortran/78990 (ICE when assigning polymorphic array function result)

2017-11-19  Paul Thomas  <pault@gcc.gnu.org>

PR fortran/78990
* expr.c (gfc_is_class_array_function): Renamed from
'gfc_is_alloc_class_array_function' and modified to return true
for pointers as well as allocatable results.
* gfortran.h : Change of name for prototype of above function.
* trans-array.c (gfc_add_loop_ss_code): Force finalization of
class array results.
(build_class_array_ref): Change assertion into a condition.
(build_class_array_ref): Set the se class_vptr for class array
function results.
(gfc_walk_function_expr): Reference gfc_is_class_array_function
as above.
* trans-decl.c (get_proc_result): Move it up before
gfc_trans_deferred_vars.
(gfc_trans_deferred_vars): Nullify explicit return class arrays
on entry.
* trans-expr.c (gfc_conv_class_to_class): Allow conversion of
class array functions that have an se class_vptr and use it
for the result vptr.
(gfc_conv_subref_array_arg): Rename reference to the above
function.
(gfc_conv_procedure_call): Ditto. Add the se pre block to the
loop pre block before the function is evaluated. Do not
finalize class pointer results.
(arrayfunc_assign_needs_temporary, gfc_trans_assignment_1) More
renamed references.
* trans-intrinsic.c (gfc_conv_intrinsic_size): Ditto.

2017-11-19  Paul Thomas  <pault@gcc.gnu.org>

PR fortran/78990
* gfortran.dg/class_67.f90: New test.

From-SVN: r254936

re PR ipa/83001 (ICE in edge_badness, at ipa-inline.c:1025)

PR ipa/83001
* profile-count.c (profile_count::to_sreal_scale): Fix return value
for uninitialied counts.

From-SVN: r254935

re PR ipa/60243 (IPA is slow on large cgraph tree)

PR ipa/60243
* tree-inline.c (estimate_num_insns): Set to 1 at least.

From-SVN: r254934

re PR target/82713 (ICE in ix86_builtin_vectorization_cost, at config/i386/i386.c:44475)

PR target/82713
* i386.c (ix86_builtin_vectorization_cost): Be ready for insane
types.

From-SVN: r254933

re PR c/66618 (Failure to diagnose non-constant initializer for static object with -O1)

PR c/66618
PR c/69960
c-family/
* c-common.h (c_fully_fold): Add LVAL argument defaulted to false.
c/
* c-parser.c (c_parser_omp_atomic): Pass true as LVAL to c_fully_fold
where needed.
* c-typeck.c (build_unary_op, build_modify_expr, build_asm_expr,
handle_omp_array_sections): Likewise.
(digest_init): Don't call decl_constant_value_for_optimization.
* c-tree.h (decl_constant_value_for_optimization): Removed.
* c-fold.c (c_fold_array_ref): New function.
(c_fully_fold_internal): Add LVAL argument, propagate it through
recursive calls.  For VAR_P call decl_constant_value and
unshare if not LVAL and either optimizing or IN_INIT.  Remove
decl_constant_value_for_optimization calls.  If IN_INIT and not LVAL,
fold ARRAY_REF with STRING_CST and INTEGER_CST operands.
(c_fully_fold): Add LVAL argument, pass it through to
c_fully_fold_internal.
(decl_constant_value_for_optimization): Removed.
cp/
* cp-gimplify.c (c_fully_fold): Add LVAL argument, call
cp_fold_maybe_rvalue instead of cp_fold_rvalue and pass it !LVAL.
testsuite/
* gcc.dg/pr69960.c: New test.
* gcc.dg/pr66618.c: New test.
* gcc.dg/pr66618-2.c: New test.

From-SVN: r254930

[arc] Remove semicolon after do while (0) in FUNCTION_PROFILER

2017-11-19  Tom de Vries  <tom@codesourcery.com>

* config/arc/arc.h (FUNCTION_PROFILER): Remove semicolon after
"do while (0)".

From-SVN: r254929

[phoenix] Remove semicolon after do {} while (0) in TARGET_OS_CPP_BUILTINS

2017-11-19  Tom de Vries  <tom@codesourcery.com>

* config/phoenix.h (TARGET_OS_CPP_BUILTINS): Remove semicolon after
"do {} while (0)".

From-SVN: r254928

[visium] Remove semicolon after ASM_OUTPUT_CASE_END

2017-11-19  Tom de Vries  <tom@codesourcery.com>

* config/visium/visium.h (ASM_OUTPUT_CASE_END): Remove semicolon after
macro body.

From-SVN: r254927

[ft32, spu] Remove semicolon after do {} while (0) in REGISTER_TARGET_PRAGMAS

2017-11-19  Tom de Vries  <tom@codesourcery.com>

* config/ft32/ft32.h (REGISTER_TARGET_PRAGMAS): Remove semicolon after
"do {} while (0)".
* config/spu/spu.h (REGISTER_TARGET_PRAGMAS): Same.

From-SVN: r254926

[mcore] Remove semicolon after do {} while (0) in MCORE_EXPORT_NAME

2017-11-19  Tom de Vries  <tom@codesourcery.com>

* config/mcore/mcore-elf.h (MCORE_EXPORT_NAME): Remove semicolon after
"do {} while (0)".
* config/mcore/mcore.h (ASM_OUTPUT_ALIGNED_COMMON): After missing
semicolon after MCORE_EXPORT_NAME call.

From-SVN: r254925

PR libstdc++/pr66689 - comp_ellint_3 and ellint_3 return garbage values

2017-11-18  Edward Smith-Rowland  <3dw4rd@verizon.net>

PR libstdc++/pr66689 - comp_ellint_3 and ellint_3 return garbage values
* include/tr1/ell_integral.tcc: Correct the nu sign convention
in ellint_3 and comp_ellint_3.
* testsuite/tr1/5_numerical_facilities/special_functions/
06_comp_ellint_3/check_value.cc: Regen with correct values.
* testsuite/tr1/5_numerical_facilities/special_functions/
14_ellint_3/check_value.cc: Ditto.
* testsuite/special_functions/06_comp_ellint_3/check_value.cc: Ditto.
* testsuite/special_functions/13_ellint_3/check_value.cc: Ditto.
* testsuite/tr1/5_numerical_facilities/special_functions/
01_assoc_laguerre/check_value.cc: Regen.
* testsuite/tr1/5_numerical_facilities/special_functions/
02_assoc_legendre/check_value.cc: Regen.
* testsuite/tr1/5_numerical_facilities/special_functions/
03_beta/check_value.cc: Regen.
* testsuite/tr1/5_numerical_facilities/special_functions/
04_comp_ellint_1/check_value.cc: Regen.
* testsuite/tr1/5_numerical_facilities/special_functions/
05_comp_ellint_2/check_value.cc: Regen.
* testsuite/tr1/5_numerical_facilities/special_functions/
07_conf_hyperg/check_value.cc: Regen.
* testsuite/tr1/5_numerical_facilities/special_functions/
08_cyl_bessel_i/check_value.cc: Regen.
* testsuite/tr1/5_numerical_facilities/special_functions/
09_cyl_bessel_j/check_value.cc: Regen.
* testsuite/tr1/5_numerical_facilities/special_functions/
10_cyl_bessel_k/check_value.cc: Regen.
* testsuite/tr1/5_numerical_facilities/special_functions/
11_cyl_neumann/check_value.cc: Regen.
* testsuite/tr1/5_numerical_facilities/special_functions/
12_ellint_1/check_value.cc: Regen.
* testsuite/tr1/5_numerical_facilities/special_functions/
13_ellint_2/check_value.cc: Regen.
* testsuite/tr1/5_numerical_facilities/special_functions/
15_expint/check_value_neg.cc: Regen.
* testsuite/tr1/5_numerical_facilities/special_functions/
16_hermite/check_value.cc: Regen.
* testsuite/tr1/5_numerical_facilities/special_functions/
17_hyperg/check_value.cc: Regen.
* testsuite/tr1/5_numerical_facilities/special_functions/
18_laguerre/check_value.cc: Regen.
* testsuite/tr1/5_numerical_facilities/special_functions/
19_legendre/check_value.cc: Regen.
* testsuite/tr1/5_numerical_facilities/special_functions/
20_riemann_zeta/check_value_neg.cc: Regen.
* testsuite/tr1/5_numerical_facilities/special_functions/
21_sph_bessel/check_value.cc: Regen.
* testsuite/tr1/5_numerical_facilities/special_functions/
22_sph_legendre/check_value.cc: Regen.
* testsuite/tr1/5_numerical_facilities/special_functions/
23_sph_neumann/check_value.cc: Regen.
* testsuite/ext/special_functions/conf_hyperg/check_value.cc: Regen.
* testsuite/ext/special_functions/hyperg/check_value.cc: Regen.
* testsuite/special_functions/01_assoc_laguerre/check_value.cc: Regen.
* testsuite/special_functions/02_assoc_legendre/check_value.cc: Regen.
* testsuite/special_functions/03_beta/check_value.cc: Regen.
* testsuite/special_functions/04_comp_ellint_1/check_value.cc: Regen.
* testsuite/special_functions/05_comp_ellint_2/check_value.cc: Regen.
* testsuite/special_functions/07_cyl_bessel_i/check_value.cc: Regen.
* testsuite/special_functions/08_cyl_bessel_j/check_value.cc: Regen.
* testsuite/special_functions/09_cyl_bessel_k/check_value.cc: Regen.
  * testsuite/special_functions/10_cyl_neumann/check_value.cc: Regen.
* testsuite/special_functions/11_ellint_1/check_value.cc: Regen.
* testsuite/special_functions/12_ellint_2/check_value.cc: Regen.
* testsuite/special_functions/14_expint/check_value.cc: Regen.
* testsuite/special_functions/15_hermite/check_value.cc: Regen.
* testsuite/special_functions/16_laguerre/check_value.cc: Regen.
* testsuite/special_functions/17_legendre/check_value.cc: Regen.
* testsuite/special_functions/18_riemann_zeta/check_value.cc: Regen.
* testsuite/special_functions/19_sph_bessel/check_value.cc: Regen.
* testsuite/special_functions/20_sph_legendre/check_value.cc: Regen.
* testsuite/special_functions/21_sph_neumann/check_value.cc: Regen.
* testsuite/tr1/5_numerical_facilities/special_functions/
06_comp_ellint_3/pr66689.cc: New.
* testsuite/tr1/5_numerical_facilities/special_functions/
14_ellint_3/pr66689.cc: New.
* testsuite/special_functions/06_comp_ellint_3/pr66689.cc: New.
* testsuite/special_functions/13_ellint_3/pr66689.cc: New.

From-SVN: r254924

Daily bump.

From-SVN: r254923

[vms] Add missing vmsdbgout_early_finish

2017-11-19  Tom de Vries  <tom@codesourcery.com>

PR target/82961
* vmsdbgout.c (vmsdbgout_early_finish): New function.
(vmsdbg_debug_hooks): Set early_finish field to vmsdbgout_early_finish.

From-SVN: r254920

cgraphclones.c (cgraph_edge::clone): Rename gcov_count to prof_count.

* cgraphclones.c (cgraph_edge::clone): Rename gcov_count to prof_count.
(cgraph_edge::clone): Cleanup updating of profile.
* ipa-cp.c (update_profiling_info): Likewise.
* ipa-inline-transform.c (inline_transform): Likewise.
* ipa-inline.c (inline_small_functions): Add missing space to dump.
* ipa-split.c (execute_split_functions): Do not split when function
is cold.
* predict.c (estimate_bb_frequencies): Cleanup updating of profile.
* profile-count.c (profile_count::dump): Add global0.
(profile_count::to_cgraph_frequency): Do not ICE when entry is
undefined.
(profile_count::to_sreal_scale): Likewise.
(profile_count::adjust_for_ipa_scaling): Fix typo in comment.
(profile_count::combine_with_ipa_count): New function.
* profile-count.h (profile_guessed_global0adjusted): New.
(profile_count::adjusted_zero): New.
(profile_count::global0adjusted): New.
(profile_count::combine_with_ipa_count): New.
* tree-inline.c (copy_edges_for_bb): Add NUM/DEN arugment;
correct profile of return block of split functions.
(copy_cfg_body): Remove unused profile_count.
(copy_body): Likewise.
(expand_call_inline): Update.
(tree_function_versioning): Update.

From-SVN: r254919

PR 44292 Handle large record lengths

Now that the ABI supports large record lengths, there's a few places
in libgfortran where we need to use larger types. For internal units
which by definition are in-memory, it's enought to use ptrdiff_t, for
external units gfc_offset.

Regtested on x86_64-pc-linux-gnu?

libgfortran/ChangeLog:

2017-11-19  Janne Blomqvist  <jb@gcc.gnu.org>

        PR fortran/44292
* io/transfer.c (skip_record): Use gfc_offset to handle large
records.
(next_record_r): Likewise.
(sset): Likewise.
(next_record_w): Use gfc_offset/ptrdiff_t appropriately.

From-SVN: r254918

specfun.h: Expose airy_ai and airy_bi.

2017-11-18  Edward Smith-Rowland  <3dw4rd@verizon.net>

* include/bits/specfun.h: Expose airy_ai and airy_bi.
* include/tr1/modified_bessel_func.tcc: Treat NaN and inf arg, return.
* testsuite/ext/special_functions/airy_ai/check_nan.cc: New.
* testsuite/ext/special_functions/airy_ai/check_value.cc: New.
* testsuite/ext/special_functions/airy_ai/compile.cc: New.
* testsuite/ext/special_functions/airy_bi/check_nan.cc: New.
* testsuite/ext/special_functions/airy_bi/check_value.cc: New.
* testsuite/ext/special_functions/airy_bi/compile.cc: New.

From-SVN: r254917

PR 83036 Make NEXTREC specifier for INQUIRE work for large record numbers

This is accomplished by making the NEXTREC specifier be a 8 byte
integer where supported.

I wasn't able to come up with a testcase that does not create a large
file that could be added to the testsuite, but here's one which
creates a 2 GB file:

program nextrec
  implicit none
  integer(8) :: ii, n
  open(10, file="foo.dat", recl=1, access="direct", form="unformatted", &
       status="replace")
  do ii = 1, huge(1) + 2_8
     write(10, rec=ii) 'a'
  end do
  inquire(10, nextrec=n)
  if (n /= huge(1) + 3_8) then
     call abort()
  end if
  close(10, status="delete")
end program nextrec

Regtested on x86_64-pc-linux-gnu.

gcc/fortran/ChangeLog:

2017-11-18  Janne Blomqvist  <jb@gcc.gnu.org>

PR fortran/83036
* ioparm.def (IOPARM): Make nextrec a pintio.

libgfortran/ChangeLog:

2017-11-18  Janne Blomqvist  <jb@gcc.gnu.org>

PR fortran/83036
* io/io.h: Make nextrec a GFC_IO_INT*.
---
 gcc/fortran/ioparm.def | 2 +-
 libgfortran/io/io.h    | 3 +--
 2 files changed, 2 insertions(+), 3 deletions(-)

diff --git a/gcc/fortran/ioparm.def b/gcc/fortran/ioparm.def
index 5fc04bc..59cc7cd 100644
--- a/gcc/fortran/ioparm.def
+++ b/gcc/fortran/ioparm.def
@@ -62,7 +62,7 @@ IOPARM (inquire, exist, 1 << 7,  pint4)
 IOPARM (inquire, opened, 1 << 8,  pint4)
 IOPARM (inquire, number, 1 << 9,  pint4)
 IOPARM (inquire, named, 1 << 10, pint4)
-IOPARM (inquire, nextrec, 1 << 11, pint4)
+IOPARM (inquire, nextrec, 1 << 11, pintio)
 IOPARM (inquire, recl_out, 1 << 12, pintio)
 IOPARM (inquire, strm_pos_out, 1 << 13, pintio)
 IOPARM (inquire, file, 1 << 14, char1)
diff --git a/libgfortran/io/io.h b/libgfortran/io/io.h
index 3330bce..d29b112 100644
--- a/libgfortran/io/io.h
+++ b/libgfortran/io/io.h
@@ -388,8 +388,7 @@ typedef struct
 {
   st_parameter_common common;
   GFC_INTEGER_4 *exist, *opened, *number, *named;
-  GFC_INTEGER_4 *nextrec;
-  GFC_IO_INT  *recl_out, *strm_pos_out;
+  GFC_IO_INT *nextrec, *recl_out, *strm_pos_out;
   CHARACTER1 (file);
   CHARACTER2 (access);
   CHARACTER1 (form);
--
2.7.4

From-SVN: r254916

PR 44292 Enable large record lengths in OPEN and INQUIRE statements

This is a straightforward change that we can do now that the ABI has
been bumped (again!).

Regtested on x86_64-pc-linux-gnu.

gcc/fortran/ChangeLog:

2017-11-18  Janne Blomqvist  <jb@gcc.gnu.org>

PR fortran/44292
* ioparm.def (IOPARM): Make recl_in intio, and recl_out pintio.

libgfortran/ChangeLog:

2017-11-18  Janne Blomqvist  <jb@gcc.gnu.org>

PR fortran/44292
* io/io.h: Make recl_in a GC_IO_INT and recl_out a type
GFC_IO_INT*.

gcc/testsuite/ChangeLog:

2017-11-18  Janne Blomqvist  <jb@gcc.gnu.org>

PR fortran/44292
* gfortran.dg/large_recl.f90: New test.

From-SVN: r254915

re PR fortran/83012 (Simply contiguous pointer function not recognized as contiguous)

2017-11-18  Thomas Koenig  <tkoenig@gcc.gnu.org>

PR fortran/83012
* expr.c (gfc_is_simply_contiguous): If a function call through a
class variable is done through a reference, check the function's
interface.

2017-11-18  Thomas Koenig  <tkoenig@gcc.gnu.org>

PR fortran/83012
* gfortran.dg/contiguous_5.f90: New test.

From-SVN: r254914

hash-set.h (hash_set::empty): New.

* hash-set.h (hash_set::empty): New.
* tree-ssa-threadbackward.h: Delete.
* tree-ssa-threadbackward.c (class thread_jumps): New.
Move max_threaded_paths into class.
(fsm_find_thread_path): Remove arguments that are now in class.
(profitable_jump_thread_path): Rename to...
(thread_jumps::profitable_jump_thread_path): ...this.
(convert_and_register_jump_thread_path): Rename to...
(thread_jumps::convert_and_register_current_path): ...this.
(check_subpath_and_update_thread_path): Rename to...
(thread_jumps::check_subpath_and_update_thread_path): ...this.
(register_jump_thread_path_if_profitable): Rename to...
(thread_jumps::register_jump_thread_path_if_profitable): ...this.
(handle_phi): Rename to...
(thread_jumps::handle_phi): ...this.
(handle_assignment): Rename to...
(thread_jumps::handle_assignment): ...this.
(fsm_find_control_statement_thread_paths): Rename to...
(thread_jumps::fsm_find_control_statement_thread_paths): ...this.
(find_jump_threads_backwards): Rename to...
(thread_jumps::find_jump_threads_backwards): ...this.
Initialize path local data.
(pass_thread_jumps::execute): Call find_jump_threads_backwards
from within thread_jumps class.
(pass_early_thread_jumps::execute): Same.

From-SVN: r254913

Daily bump.

From-SVN: r254912

* cgraph.c (cgraph_node::dump): Do IPA sanity checking on IPA counts.

From-SVN: r254909

Enable building libitm with Intel CET

libitm/
* Makefile.in: Regenerate.
* acinclude.m4: Add enable.m4 and cet.m4.
* config/x86/sjlj.S: Include cet.h.
(_ITM_beginTransaction): Add _CET_ENDBR.
Save Shadow Stack pointer.
(GTM_longjmp): Add _CET_ENDBR. Restore Shadow Stack pointer.
* config/x86/target.h (struct gtm_jmpbuf):
Add new field for Shadow Stack pointer.
* configure: Regenerate.
* configure.ac: Set CET_FLAGS. Update XCFLAGS.
* configure.ac: Update libtool_VERSION for x86.
* testsuite/Makefile.in: Regenerate.

From-SVN: r254908

Add extra field to gtm_jmpbuf on x86 only

Expand the gtm_jmpbuf structure by one word field to add
Intel CET support further. The code in sjlj.S already
allocates more space on the stack then gtm_jmpbuf needs.
Use this extra space to absorb the new field.

The structure is allocated on the stack in such a way
that eip/rsp field is overlapped with return address on
the stack. Locate the new field right before eip/rsp so
code that accesses buffer fields relative to address of
gtm_jmpbuf has its offsets unchanged.

* libitm/config/x86/target.h: Add new field (ssp).
* libitm/config/x86/sjlj.S: Change offsets.

From-SVN: r254907

fmls.c: New test.

2017-11-17  Steve Ellcey  <sellcey@cavium.com>

* gcc.target/aarch64/fmls.c: New test.

From-SVN: r254906

aarch64-simd.md (fnma<mode>4): Move neg operator to canonical location.

2017-11-17  Steve Ellcey  <sellcey@cavium.com>

* config/aarch64/aarch64-simd.md (fnma<mode>4): Move neg operator
to canonical location.

From-SVN: r254905

Enable building libobjc with Intel CET

libobjc/
* Makefile.in: Regenerate.
* aclocal.m4: Likeiwse.
* configure: Likewise.
* configure.ac: Set CET_FLAGS. Update XCFLAGS.

From-SVN: r254904

pr81356.c: New test.

2017-11-17  Steve Ellcey  <sellcey@cavium.com>

* gcc.target/aarch64/pr81356.c: New test.

From-SVN: r254903

Enable building libgfortran with Intel CET

libgfortran/
* acinclude.m4: Add enable.m4, cet.m4.
* Makefile.in: Regenerate.
* configure: Likewise.
* configure.ac: Set CET_FLAGS. Update AM_FCFLAGS,
AM_CFLAGS, CFLAGS.

From-SVN: r254902

re PR target/81356 (__builtin_strcpy is not good for copying an empty string on aarch64)

2017-11-17  Steve Ellcey  <sellcey@cavium.com>

PR target/81356
* config/aarch64/aarch64.c (aarch64_use_by_pieces_infrastructure_p):
Remove.
(TARGET_USE_BY_PIECES_INFRASTRUCTURE_P): Remove define.

From-SVN: r254901

Enable building libmpx with Intel CET

libmpx/
* Makefile.in: Regenerate.
* acinclude.m4: Add enable.m4 and cet.m4.
* configure: Regenerate.
* configure.ac: Set CET_FLAGS. Update XCFLAGS.
* mpxrt/Makefile.am: Update libmpx_la_CFLAGS.
* mpxrt/Makefile.in: Regenerate.
* mpxwrap/Makefile.am: Add AM_CFLAGS. Update
libmpxwrappers_la_CFLAGS.
* mpxwrap/Makefile.in: Regenerate.

From-SVN: r254900

Enable building libquadmath with Intel CET

libquadmath/
* Makefile.am: Update AM_CFLAGS.
* Makefile.in: Regenerate:
* acinclude.m4: Add enable.m4 and cet.m4.
* configure: Regenerate.
* configure.ac: Set CET_FLAGS. Update XCFLAGS.

From-SVN: r254899

Enable building libssp with Intel CET

libssp/
* Makefile.am: Update AM_CFLAGS, update
libssp_nonshared_la_CFLAGS.
* Makefile.in: Regenerate.
* configure: Likewise.
* aclocal.m4: Likewise.
* configure.ac: Set CET_FLAGS. Update XCFLAGS.

From-SVN: r254898

Enable building libvtv with Intel CET

libvtv/
* acinclude.m4: Add enable.m4 and cet.m4.
* Makefile.in: Regenerate.
* testsuite/Makefile.in: Likewise.
* configure: Likewise.
* configure.ac: Set CET_FLAGS. Update XCFLAGS.
* testsuite/libvtv.cc/vtv.exp: Add scanlang.exp.

From-SVN: r254897

Enable building libsanitizer with Intel CET

libsanitizer/
* acinclude.m4: Add enable.m4 and cet.m4.
* Makefile.in: Regenerate.
* asan/Makefile.am: Update AM_CXXFLAGS.
* asan/Makefile.in: Regenerate.
* configure: Likewise.
* configure.ac: Set CET_FLAGS. Update EXTRA_CFLAGS,
EXTRA_CXXFLAGS, EXTRA_ASFLAGS.
* interception/Makefile.am: Update AM_CXXFLAGS.
* interception/Makefile.in: Regenerate.
* libbacktrace/Makefile.am: Update AM_CFLAGS, AM_CXXFLAGS.
* libbacktrace/Makefile.in: Regenerate.
* lsan/Makefile.am: Update AM_CXXFLAGS.
* lsan/Makefile.in: Regenerate.
* sanitizer_common/Makefile.am: Update AM_CXXFLAGS,
AM_CCASFLAGS.
* sanitizer_common/sanitizer_linux_x86_64.S: Include cet.h.
Add _CET_ENDBR macro.
* sanitizer_common/Makefile.in: Regenerate.
* tsan/Makefile.am: Update AM_CXXFLAGS.
* tsan/Makefile.in: Regenerate.
* tsan/tsan_rtl_amd64.S Include cet.h. Add _CET_ENDBR macro.
* ubsan/Makefile.am: Update AM_CXXFLAGS.
* ubsan/Makefile.in: Regenerate.

From-SVN: r254896

Enable building libstdc++-v3 with Intel CET

libstdc++-v3/
* acinclude.m4: Add cet.m4.
* configure.ac: Set CET_FLAGS. Update EXTRA_CFLAGS,
EXTRA_CXX_FLAGS.
* libsupc++/Makefile.am: Use Add EXTRA_CFLAGS.
* Makefile.in: Regenerate.
* configure: Likewise.
* doc/Makefile.in: Likewise.
* include/Makefile.in: Likewise.
* libsupc++/Makefile.in: Likewise.
* po/Makefile.in: Likewise.
* python/Makefile.in: Likewise.
* src/Makefile.in: Likewise.
* src/c++11/Makefile.in: Likewise.
* src/c++98/Makefile.in: Likewise.
* src/filesystem/Makefile.in: Likewise.
* testsuite/Makefile.in: Likewise.

From-SVN: r254895

Enable building libgomp with Intel CET

libgomp/
* configure.ac: Set CET_FLAGS, update XCFLAGS and FCFLAGS.
* acinclude.m4: Add cet.m4.
* configure: Regenerate.
* Makefile.in: Likewise.
* testsuite/Makefile.in: Likewise.

From-SVN: r254894

Enable building libatomic with Intel CET

libatomic/
* configure.ac: Set CET_FLAGS, update XCFLAGS.
* acinclude.m4: Add cet.m4 and enable.m4.
* configure: Regenerate.
* Makefile.in: Likewise.
* testsuite/Makefile.in: Likewise.

From-SVN: r254893

Enable building libbacktrace with Intel CET

libbacktrace/
* configure.ac: Add CET_FLAGS to EXTRA_FLAGS.
* aclocal.m4: Regenerate.
* Makefile.in: Likewise.
* configure: Likewise.

From-SVN: r254892

Use rcrt1.o%s/grcrt1.o%s to relocate static PIE

crt1.o is used to create dynamic and non-PIE static executables.  Static
PIE needs to link with rcrt1.o, instead of crt1.o, which is also used by
musl libc and OpenBSD:

https://gcc.gnu.org/ml/gcc/2015-06/msg00008.html

to relocate static PIE at run-time.  When -pg is used with -static-pie,
grcrt1.o should be used.

* config/gnu-user.h (GNU_USER_TARGET_STARTFILE_SPEC): Use
rcrt1.o%s/grcrt1.o%s for -static-pie.

From-SVN: r254890

i386.c (ix86_multiplication_cost, [...]): Break out from ...

* i386.c (ix86_multiplication_cost, ix86_division_cost,
ix86_shift_rotate_cost): Break out from ...
(ix86_rtx_costs): ... here.
(ix86_add_stmt_cost): Use rtx cost machinery to compute cost of
vector operations.

* gcc.target/i386/xop-imul64-vector.c: Disable vectorizer costmodel.

From-SVN: r254889

predict.c (determine_unlikely_bbs): Set cgraph node count to 0 when entry block was promoted unlikely.

* predict.c (determine_unlikely_bbs): Set cgraph node count to 0
when entry block was promoted unlikely.
(estimate_bb_frequencies): Increase frequency scale.
* profile-count.h (profile_count): Export precision info.
* gcc.dg/tree-ssa/dump-2.c: Fixup template for profile precision
changes.
* gcc.dg/tree-ssa/pr77445-2.c: Fixup template for profile precision
changes.

From-SVN: r254888

tree-tailcall.c (eliminate_tail_call): Be more careful about not disturbin profile of entry block.

* tree-tailcall.c (eliminate_tail_call): Be more careful about not
disturbin profile of entry block.

From-SVN: r254887

ipa-fnsummary.c (estimate_node_size_and_time): Be more tolerant for roundoff errors.

* ipa-fnsummary.c (estimate_node_size_and_time): Be more tolerant for
roundoff errors.

From-SVN: r254886

ipa-cp.c (update_profiling_info): Handle conversion to local profile.

* ipa-cp.c (update_profiling_info): Handle conversion to local
profile.
* tree-cfg.c (execute_fixup_cfg): Do fixup same way as inliner does.

From-SVN: r254885

gimple-ssa-evrp.c (class evrp_range_analyzer): New class extracted from evrp_dom_walker class.

* gimple-ssa-evrp.c (class evrp_range_analyzer): New class extracted
from evrp_dom_walker class.  Various methods moved into new class.
(evrp_range_analyzer::evrp_range_analyzer): Constructor for new class.
(evrp_range_analyzer::enter): New method.
(evrp_range_analyzer::leave): New method.
(evrp_dom_walker): Remove delegators no longer needed by this class.
Replace vr_values data member with evrp_range_analyzer

From-SVN: r254884

gimple-ssa-evrp.c (evrp_dom_walker::record_ranges_from_phis): New method extracted from evrp_dom_walker::before_dom_children.

* gimple-ssa-evrp.c (evrp_dom_walker::record_ranges_from_phis): New
method extracted from evrp_dom_walker::before_dom_children.
(evrp_dom_walker::record_ranges_from_stmt): Likewise.
(evrp_dom_walker::record_ranges_from_incoming_edge): Likewise.

From-SVN: r254883

gimple-ssa-evrp.c (evrp_dom_walker): Add cleanup method.

* gimple-ssa-evrp.c (evrp_dom_walker): Add cleanup method.
Add private copy constructor and move assignment operators.
Privatize methods and class data where trivially possible.
(evrp_dom_walker::cleanup): New function, extracted from
execute_early_vrp.  Simplify access to class data.

From-SVN: r254882

[PR c++/82836] Fixe testcase

https://gcc.gnu.org/ml/gcc-patches/2017-11/msg01515.html
* g++.dg/pr82836.C: Fix for c++17.

From-SVN: r254881

vr-values.h (get_output_for_vrp): Prototype.

* vr-values.h (get_output_for_vrp): Prototype.
* vr-values.c (get_output_for_vrp): New function extracted from
vrp_visit_assignment_or_call and extract_range_from_stmt.
(vrp_visit_assignment_or_call): Use get_output_for_vrp.  Simplify.

From-SVN: r254880

[AArch64] Adjust tuning parameters for Falkor

Disabling software prefetching and switching the autoprefetcher to weak improves
CPU2017 rate and speed benchmarks for both int and fp sets on Falkor.

SPECrate 2017 fp is up 0.38%
SPECspeed 2017 fp is up 0.54%
SPECrate 2017 int is up 3.02%
SPECspeed 2017 int is up 3.16%

There are only a couple individual regressions. The biggest one being about 4%
in parest.

For SPEC2006, we've noticed the following:

SPECint is up 0.91%
SPECfp is stable

In the case of SPEC2006 we noticed both a big regression in mcf (about 20%)
and a big improvement for hmmer (about 40%).

Since the overall result is positive, we would like to make these new tuning
settings the default for Falkor.

We may revisit the software prefetcher setting in the future, in case we
can adjust it enough so it provides us a good balance between improvements and
regressions (mcf). But for now it is best if it stays off.

2017-11-17  Luis Machado  <luis.machado@linaro.org>

gcc/
* config/aarch64/aarch64.c
(qdf24xx_prefetch_tune) <default_opt_level>: Set to -1.
(qdf24xx_tunings) <autoprefetcher_model>: Set to
tune_params::AUTOPREFETCHER_WEAK.

From-SVN: r254879

re PR target/82641 (Unable to enable crc32 for a certain function with target attribute on ARM (aarch32))

2017-11-17  Tamar Christina  <tamar.christina@arm.com>

PR target/82641
* config/arm/arm.c (arm_valid_target_attribute_rec):
Parse "arch=" and "+<ext>".
(arm_valid_target_attribute_tree): Re-init global options.
(arm_option_override): Make non-static.
(arm_options_perform_arch_sanity_checks): Make errors fatal.
* gcc/config/arm/arm-c.c (__ARM_FEATURE_CMSE): Support undef.
(__ARM_FEATURE_CRC32): Support undef.
* config/arm/arm_acle.h (__ARM_FEATURE_CRC32): Replace with pragma.
* doc/extend.texi (ARM Function Attributes): Add pragma and target.

gcc/testsuite/
2017-11-17  Tamar Christina  <tamar.christina@arm.com>

PR target/82641
* gcc.target/arm/pragma_arch_attribute.c: New.

From-SVN: r254878

gdbinit.in: add "break-on-diagnostic" command

gcc/ChangeLog:
* gdbinit.in (break-on-diagnostic): New command.

From-SVN: r254877

Add Intel CET support for EH in libgcc.

Control-flow Enforcement Technology (CET), published by Intel,
introduces the Shadow Stack feature, which ensures a return from a
function is done to exactly the same location from where the function
was called. When EH is present the control-flow transfer may skip some
stack frames and the shadow stack has to be adjusted not to signal a
violation of a control-flow transfer. It's done by counting a number
of skiping frames and adjasting shadow stack pointer by this number.

Having new semantic of the 'ret' instruction if CET is supported in HW
the 'ret' instruction cannot be generated in ix86_expand_epilogue when
we are returning after EH is processed. Added a code in
ix86_expand_epilogue to adjust Shadow Stack pointer and to generate an
indirect jump instead of 'ret'. As sp register is used during this
adjustment thus the argument in pro_epilogue_adjust_stack is changed
to update cfa_reg based on whether control-flow instrumentation is set.
Without updating the cfa_reg field there is an assert later in dwarf2
pass related to mismatch the stack register and cfa_reg value.

gcc/
* config/i386/i386.c (ix86_expand_epilogue): Change simple
return to indirect jump for EH return if control-flow protection
is enabled. Change explicit 'false' argument in
pro_epilogue_adjust_stack with a value of flag_cf_protection.
* config/i386/i386.md (simple_return_indirect_internal): Remove
SImode restriction to support 64-bit.

libgcc/
* config/i386/linux-unwind.h: Include
config/i386/shadow-stack-unwind.h.
* config/i386/shadow-stack-unwind.h: New file.
* unwind-dw2.c: (uw_install_context): Add a frame parameter and
pass it to _Unwind_Frames_Extra.
* unwind-generic.h (_Unwind_Frames_Extra): New.
* unwind.inc (_Unwind_RaiseException_Phase2): Add frames_p
parameter. Add local variable frames to count number of frames.
(_Unwind_ForcedUnwind_Phase2): Likewise.
(_Unwind_RaiseException): Add local variable frames to count
number of frames, pass it to _Unwind_RaiseException_Phase2 and
uw_install_context.
(_Unwind_ForcedUnwind): Likewise.
(_Unwind_Resume): Likewise.
(_Unwind_Resume_or_Rethrow): Likewise.

From-SVN: r254876

combine: Add added_notes_insn

This patch makes combine reconsider insns it added notes to.  This
matters for example if the note is a REG_DEAD; without the note the
setter of the register has to be kept around in the result of
combinations, so it cannot be a 2->1 combination, and the cost of
the result is higher than without that extra set, so try_combine may
refuse the combination with the set, but allow it without the set.

This fixes a regression for powerpc: pr69946.c has started to fail
after the bitfield expansion changes.  GCC used to generate

        lwz 3,0(9)
        rlwinm 3,3,12,20,23
        ori 3,3,0x11
        rotldi 3,3,52
        bl bar

but now it does

        lwz 3,0(9)
        rldicr 3,3,32,3
        srdi 3,3,48
        ori 3,3,0x110
        sldi 3,3,48
        bl bar

(an instruction too many).  After this patch it is

        lwz 3,0(9)
        rlwinm 3,3,16,16,19
        ori 3,3,0x110
        sldi 3,3,48
        bl bar

(the testcase still does not pass, it looks for very specific insns).

* combine.c (added_notes_insn): New.
(try_combine): Handle added_notes_insn like added_links_insn.
Rewrite return value code.
(distribute_notes): Set added_notes_insn to the earliest insn we added
a note to.

From-SVN: r254875

combine: Don't split insns if half is unused (PR82621)

If we have a PARALLEL of two SETs, and one half is unused, we currently
happily split that into two instructions (although the unused one is
useless).  Worse, as PR82621 shows, combine will happily merge this
insn into I3 even if some intervening insn sets the same register
again, which is wrong.

This fixes it by not splitting PARALLELs with REG_UNUSED notes.  It
all is handled fine by combine in that case: just the "single set
that is unused" case isn't handled properly.

This also results in better code: combine will now actually throw
away the unused SET.  (It still won't do that in an I3).

PR rtl-optimization/82621
* combine.c (try_combine): Do not split PARALLELs of two SETs if the
dest of one of those SETs is unused.

From-SVN: r254874

rs6000: Fix for altivec-macros.c

This fixes the altivec-macros.c testcase; we now need to explicitly
say "no column number" for messages without one.

gcc/testsuite/
* gcc.target/powerpc/altivec-macros.c: Include "-:" in the messages
matched for.

From-SVN: r254873

* g++.dg/pr82836.C: Add -Wno-return-type.

From-SVN: r254872

PR libstdc++/83025 fix constraints for path overloads in <fstream>

PR libstdc++/83025
* include/std/fstream (basic_filebuf::_If_path): Move to
namespace-scope and rename to _If_fs_path.
(basic_filebuf::open): Use new name.
(basic_ifstream(_Path, ios::openmode))
(basic_ifstream::open(_Path, ios::openmode))
(basic_ofstream(_Path, ios::openmode))
(basic_ofstream::open(_Path, ios::openmode))
(basic_fstream(_Path, ios::openmode))
(basic_fstream::open(_Path, ios::openmode)): Use _If_fs_path.
* testsuite/27_io/basic_filebuf/open/char/path.cc: Test with filename
as non-const char*.
* testsuite/27_io/basic_fstream/cons/char/path.cc: Likewise.
* testsuite/27_io/basic_fstream/open/char/path.cc: Likewise.
* testsuite/27_io/basic_ifstream/cons/char/path.cc: Likewise.
* testsuite/27_io/basic_ifstream/open/char/path.cc: Likewise.
* testsuite/27_io/basic_ofstream/cons/char/path.cc: Likewise.
* testsuite/27_io/basic_ofstream/open/char/path.cc: Likewise.

From-SVN: r254871

[BRIGFE] Fix sprintf format string type mismatch on 32b machines.

From-SVN: r254870

re PR fortran/83017 (DO CONCURRENT not parallelizing)

2017-11-17  Richard Biener  <rguenther@suse.de>

PR fortran/83017
* tree-core.h (enum annot_expr_kind): Add annot_expr_parallel_kind.
* tree-pretty-print.c (dump_generic_node): Handle
annot_expr_parallel_kind.
* tree-cfg.c (replace_loop_annotate_in_block): Likewise.
* gimplify.c (gimple_boolify): Likewise.

fortran/
* trans-stmt.c (gfc_trans_forall_loop): Annotate DO CONCURRENT
loops with annot_expr_parallel_kind instead of just
annot_expr_ivdep_kind.

From-SVN: r254869

Enable building libgcc with CET options.

Enable building libgcc with CET options by default on Linux/x86 if
binutils supports CET v2.0.  It can be disabled with --disable-cet.
It is an error to configure GCC with --enable-cet if bintuiils
doesn't support CET v2.0.

ENDBR instruction is added to __morestack_large_model since it is
called indirectly.

2017-11-17  Igor Tsimbalist  <igor.v.tsimbalist@intel.com>

config/
* cet.m4: New file.

gcc/
* config.gcc (extra_headers): Add cet.h for x86 targets.
* config/i386/cet.h: New file.
* doc/install.texi: Add --enable-cet/--disable-cet.

libgcc/
* Makefile.in (configure_deps): Add $(srcdir)/../config/cet.m4.
(CET_FLAGS): New.
* config/i386/morestack.S: Include <cet.h>.
(__morestack_large_model): Add _CET_ENDBR at function entrance.
* config/i386/resms64.h: Include <cet.h>.
* config/i386/resms64f.h: Likewise.
* config/i386/resms64fx.h: Likewise.
* config/i386/resms64x.h: Likewise.
* config/i386/savms64.h: Likewise.
* config/i386/savms64f.h: Likewise.
* config/i386/t-linux (HOST_LIBGCC2_CFLAGS): Add $(CET_FLAGS).
(CRTSTUFF_T_CFLAGS): Likewise.
* configure.ac: Include ../config/cet.m4.
Set and substitute CET_FLAGS.
* configure: Regenerated.

From-SVN: r254868

re PR fortran/83017 (DO CONCURRENT not parallelizing)

2017-11-17  Richard Biener  <rguenther@suse.de>

PR tree-optimization/83017
* tree-parloops.c (MIN_PER_THREAD): Use --param parloops-min-per-thread.
(gen_parallel_loop): Properly count iterations.
(parallelize_loops): Handle loop->can_be_parallel independent
of flag_loop_parallelize_all.  Make static profitability test match
the runtime one.
* params.def (PARAM_PARLOOPS_MIN_PER_THREAD): New.
* invoke.texi (parloops-min-per-thread): Document.

* gcc.dg/autopar/pr49960.c: Adjust.

From-SVN: r254867

[ARC] Update GLIBC_DYNAMIC_LINKER

Update GLIBC_DYNAMIC_LINKER per glibc upstreaming review comments:
http://lists.infradead.org/pipermail/linux-snps-arc/2017-June/002634.html

gcc/
* config/arc/linux.h: GLIBC_DYNAMIC_LINKER update per glibc
upstreaming review comments

From-SVN: r254866

[ARM] Fix test armv8_2-fp16-move-1.c

2017-11-17  Sudakshina Das  <sudi.das@arm.com>

* gcc.target/arm/armv8_2-fp16-move-1.c: Edit vmov scan-assembler
directives.

From-SVN: r254863

expr.c (copy_blkmode_to_reg): Fix bitsize for targets with fast unaligned access.

2017-11-17  Tamar Christina  <tamar.christina@arm.com>

* expr.c (copy_blkmode_to_reg): Fix bitsize for targets
with fast unaligned access.
* doc/sourcebuild.texi (word_mode_no_slow_unalign): New.

gcc/testsuite/
2017-11-17  Tamar Christina  <tamar.christina@arm.com>

* gcc.dg/struct-simple.c: New.
* lib/target-supports.exp
(check_effective_target_word_mode_no_slow_unalign): New.

From-SVN: r254862

[ARM] Rework expectation for call to Armv8-M nonsecure function

Testcase gcc.target/arm/cmse/cmse-14.c checks whether bar is called via
__gnu_cmse_nonsecure_call libcall and not via a direct call. However the
pattern is a bit surprising in that it needs to explicitely allow "by"
due to allowing anything before the 'b'.

This patch rewrites the logic to look for b as a first non-whitespace
letter followed iby anything (to match bl and conditional branches)
followed by some spaces and then bar.

2017-11-17  Thomas Preud'homme  <thomas.preudhomme@arm.com>

    gcc/testsuite/
    * gcc.target/arm/cmse/cmse-14.c: Change logic to match branch
    instruction to bar.

From-SVN: r254861

[ARM] Fix selection of effective target for cmse tests

Some of the tests in the gcc.target/arm/cmse directory (eg.
gcc.target/arm/cmse/mainline/bitfield-4.c) are failing when run without
an architecture specified in RUNTESTFLAGS due to them not adding the
option to select an Armv8-M architecture.

This patch fixes the issue by adding the right option from the exp file
so that no architecture fiddling is necessary in the individual tests.

2017-11-17  Thomas Preud'homme  <thomas.preudhomme@arm.com>

    gcc/testsuite/
    * gcc.target/arm/cmse/cmse.exp: Add option to select Armv8-M Baseline
    or Armv8-M Mainline when running the respective tests.
    * gcc.target/arm/cmse/baseline/cmse-11.c: Remove architecture check and
    selection.
    * gcc.target/arm/cmse/baseline/cmse-13.c: Likewise.
    * gcc.target/arm/cmse/baseline/cmse-2.c: Likewise.
    * gcc.target/arm/cmse/baseline/cmse-6.c: Likewise.
    * gcc.target/arm/cmse/baseline/softfp.c: Likewise.
    * gcc.target/arm/cmse/mainline/hard-sp/cmse-13.c: Likewise.
    * gcc.target/arm/cmse/mainline/hard-sp/cmse-5.c: Likewise.
    * gcc.target/arm/cmse/mainline/hard-sp/cmse-7.c: Likewise.
    * gcc.target/arm/cmse/mainline/hard-sp/cmse-8.c: Likewise.
    * gcc.target/arm/cmse/mainline/hard/cmse-13.c: Likewise.
    * gcc.target/arm/cmse/mainline/hard/cmse-5.c: Likewise.
    * gcc.target/arm/cmse/mainline/hard/cmse-7.c: Likewise.
    * gcc.target/arm/cmse/mainline/hard/cmse-8.c: Likewise.
    * gcc.target/arm/cmse/mainline/soft/cmse-13.c: Likewise.
    * gcc.target/arm/cmse/mainline/soft/cmse-5.c: Likewise.
    * gcc.target/arm/cmse/mainline/soft/cmse-7.c: Likewise.
    * gcc.target/arm/cmse/mainline/soft/cmse-8.c: Likewise.
    * gcc.target/arm/cmse/mainline/softfp-sp/cmse-5.c: Likewise.
    * gcc.target/arm/cmse/mainline/softfp-sp/cmse-7.c: Likewise.
    * gcc.target/arm/cmse/mainline/softfp-sp/cmse-8.c: Likewise.
    * gcc.target/arm/cmse/mainline/softfp/cmse-13.c: Likewise.
    * gcc.target/arm/cmse/mainline/softfp/cmse-5.c: Likewise.
    * gcc.target/arm/cmse/mainline/softfp/cmse-7.c: Likewise.
    * gcc.target/arm/cmse/mainline/softfp/cmse-8.c: Likewise.

From-SVN: r254860

[ARM] Fix ICE in Armv8-M Security Extensions code

Commit r253825 which introduced some sanity checks for sbitmap revealed
a bug in the conversion of cmse_nonsecure_entry_clear_before_return ()
to using bitmap structure. bitmap_and expects that the two bitmaps have
the same length, yet the code in
cmse_nonsecure_entry_clear_before_return () have different size for
to_clear_bitmap and to_clear_arg_regs_bitmap, with the assumption that
bitmap_and would behave has if the bits not allocated were in fact zero.
This commit makes sure both bitmap are equally sized.

2017-11-17  Thomas Preud'homme  <thomas.preudhomme@arm.com>

    gcc/
    * config/arm/arm.c (cmse_nonsecure_entry_clear_before_return): Allocate
    to_clear_arg_regs_bitmap to the same size as to_clear_bitmap.

From-SVN: r254859

tree-ssa-pre.c (phi_translate_1): Remove redundant constant folding of references.

2017-11-17  Richard Biener  <rguenther@suse.de>

* tree-ssa-pre.c (phi_translate_1): Remove redundant constant
folding of references.

From-SVN: r254858

re PR testsuite/82997 (gcc.dg/cpp/sysmac1.c and gcc.dg/cpp/macsyntx.c fail starting with r254707)

PR testsuite/82997
* gcc.dg/cpp/macsyntx.c (var1, rest): Don't expect
"requires at least one" warning.
* gcc.dg/cpp/sysmac1.c (foo): Likewise.
* gcc.dg/cpp/macsyntx2.c: New test.
* gcc.dg/cpp/sysmac3.c: New test.
* gcc.dg/cpp/sysmac3.h: New file.

From-SVN: r254857

re PR middle-end/78809 (Inline strcmp with small constant strings)

2017-11-15  Qing Zhao <qing.zhao@oracle.com>

PR middle-end/78809
* gimple-fold.c (gimple_fold_builtin_string_compare): Add handling
of replacing call to strncmp with corresponding call to strcmp when
meeting conditions.

PR middle-end/78809
* gcc.dg/strcmpopt_1.c: New test.

From-SVN: r254856

Enable option -mprefer-avx256 as default for Intel Skylake configuration

gcc/
* config/i386/x86-tune.def (X86_TUNE_AVX256_OPTIMAL): Add tuning
option prefer-avx256 for skylake-avx512 configuration.
* config/i386/i386.c (ix86_option_override_internal): Ditto.
(get_builtin_code_for_version): Ditto.

From-SVN: r254855

[NDS32] Reserve more register numbers for new registers in the future.

gcc/
* config/nds32/nds32.h (FIRST_PSEUDO_REGISTER): Modify.
(FIXED_REGISTERS): Reserve more register numbers.
(CALL_USED_REGISTERS): Likewise.
(REG_ALLOC_ORDER): Likewise.
(REG_CLASS_CONTENTS): Likewise.
(REGISTER_NAMES): Likewise.

Co-Authored-By: Monk Chiang <sh.chiang04@gmail.com>
From-SVN: r254854

Add nds32 vector modes.

gcc/
* config/nds32/nds32-modes.def: Add vector mode V4QI V2HI V8QI V4HI
V2SI.
* config/nds32/iterators.md: Add vector mode iterators and attributes.

Co-Authored-By: Kito Cheng <kito.cheng@gmail.com>
From-SVN: r254853

Daily bump.

From-SVN: r254852

Tweak vector::_M_realloc_insert for code size

2017-11-17  Marc Glisse  <marc.glisse@inria.fr>

* include/bits/vector.tcc (vector::_M_realloc_insert): Cache old
values before the allocation.

From-SVN: r254849

Had a small thinko in the implementation of mmintrin.h _mm_add_pi32 that only shows when compiling for power9.

Had a small thinko in the implementation of mmintrin.h _mm_add_pi32 that only shows
when compiling for power9. A trivial and obvious 2 line patch to fix it.

From-SVN: r254848

Add -std=c18 etc. option aliases.

ISO C17 won't go to ballot until December, meaning publication of the
standard won't be until 2018, leaving ambiguity as to whether people
will end up referring to the standard as C17, as it's currently known
and which corresponds to the __STDC_VERSION__ value, or C18 based on
the publication date.

In case people end up referring to this standard as C18, this patch
adds corresponding option aliases -std=c18, -std=iso9899:2018,
-std=gnu18 so people can use those names based on publication date if
they wish.  The "expected to be" explanations in help texts and the
manual can be removed as and when the standard is published, hopefully
before GCC 8 is out.

Bootstrapped with no regressions on x86_64-pc-linux-gnu.

gcc:
* doc/invoke.texi (-std=c17): Refer to 2018 expected publication
date of C17.
(-std=c18, -std=iso9899:2018, -std=gnu18): Document option
aliases.

gcc/c-family:
* c.opt (-std=c17, std=gnu17, -std=iso9899:2017): Refer to 2018
expected publication date of C17.
(-std=c18, -std=gnu18, -std=iso9899:2018): New option aliases.

gcc/testsuite:
* gcc.dg/c18-version-1.c, gcc.dg/c18-version-2.c: New tests.

From-SVN: r254847

re PR bootstrap/82856 (--enable-maintainter-mode broken by incompatiblity of gcc's required automake and modern Perl)

2017-11-16  Thomas Koenig  <tkoenig@gcc.gnu.org>

PR bootstrap/82856
* doc/install.texi: Document incompatibility of Perl >=5.6.26
with the required version of automake 1.11.6.

From-SVN: r254845

power9.md (power9fpdiv): New automaton and cpu_unit defined for it.

* rs6000/power9.md (power9fpdiv): New automaton and cpu_unit defined
for it.
(DU_C2_3_power9): Correct reservation combinations.
(FP_DIV_power9, VEC_DIV_power9): New.
(power9-alu): Split out rotate/shift...
(power9-rot): ...to here, correct dispatch resource.
(power9-cracked-alu, power9-mul, power9-mul-compare): Correct dispatch
resource.
(power9-fp): Correct latency.
(power9-sdiv): Add div/sqrt resource.
(power9-ddiv): Correct latency, add div/sqrt resource.
(power9-sqrt, power9-dsqrt): Add div/sqrt resource.
(power9-vecfdiv, power9-vecdiv): Correct latency, add div/sqrt
resource.
(power9-qpdiv, power9-qpmul): Adjust resource usage.

From-SVN: r254844

PR c++/79092 - non-type args of different types are different

* tree.c (cp_tree_equal): Check the type of constants.
* pt.c (unify) [TEMPLATE_PARM_INDEX]: Handle UNIFY_ALLOW_INTEGER
when comparing to previously deduced argument.
(maybe_convert_nontype_argument): New.
(convert_nontype_argument): Call it.
(tsubst_copy_and_build): Handle partial instantiation of
IMPLICIT_CONV_EXPR.
(unify): Ignore type when deducing from array bound.
(dependent_type_p_r): Handle DEFERRED_NOEXCEPT.
(value_dependent_expression_p): Any type-dependent expression is
value-dependent.  Handle IMPLICIT_CONV_EXPR.
* cp-tree.h (IMPLICIT_CONV_EXPR_NONTYPE_ARG): New.
* mangle.c (write_template_arg): Strip IMPLICIT_CONV_EXPR.

From-SVN: r254843

rs6000.c (rs6000_expand_builtin): Do not do the switch statement mapping KF built-ins to TF built-ins if...

[gcc]
2017-11-15  Michael Meissner  <meissner@linux.vnet.ibm.com>

* config/rs6000/rs6000.c (rs6000_expand_builtin): Do not do the
switch statement mapping KF built-ins to TF built-ins if we don't
have the proper ISA 3.0 assembler support.

[gcc/testsuite]
2017-11-15  Michael Meissner  <meissner@linux.vnet.ibm.com>

* gcc.target/powerpc/bfp/bfp.exp: Look for *.c files, not *.c*
files to prevent ~ files from getting recognized.
* gcc.target/powerpc/dfp/dfp.exp: Likewise.
* gcc.target/powerpc/vsu/vsu.exp: Likewise.

From-SVN: r254839

Makefile.am: Remove references to c-compiler-name.h and cp-compiler-name.h

* Makefile.am: Remove references to c-compiler-name.h and
cp-compiler-name.h
* Makefile.in: Regenerate.
* compiler-name.hh: New file.
* libcc1.cc: Don't include c-compiler-name.h.  Include
compiler-name.hh.
* libcp1.cc: Don't include cp-compiler-name.h.  Include
compiler-name.hh.

Co-Authored-By: Pedro Alves <palves@redhat.com>
From-SVN: r254838

[BRIGFE] Reduce the number of type conversions due to
the untyped HSAIL regs.

Instead of always representing the HSAIL's untyped registers as
unsigned int, the gccbrig now pre-analyzes the BRIG code and
builds the register variables as a type used the most when storing
or reading data to/from each register. This reduces the total
conversions which cannot be always optimized away.

From-SVN: r254837

tree-emutls.c (lower_emutls_data): Remove unused bb_freq.

* tree-emutls.c (lower_emutls_data): Remove unused bb_freq.
(lower_emutls_function_body): Do not compute it.

From-SVN: r254836

ipa-split.c (split_bb_info): Turn time to sreal.

* ipa-split.c (split_bb_info): Turn time to sreal.
(split_point): Likewise.
(dump_split_point): Likewise.
(fine_split_points): Likewise.
(execute_split_functions): Only zero split_bbs; turn time to sreals.

From-SVN: r254835