i965: Record the presence of the kernel scheduler

Mention to the debug log if the kernel scheduler is enabled; and in
particular if it has preemption enabled.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965: Sync i915_drm.h from kernel for IMG_context_priority

Pulling in changes up to

    kernel commit ac14fbd460d0ec16e7750e40dcd8199b0ff83d0a
    Author: Chris Wilson <chris@chris-wilson.co.uk>
    Date:   Tue Oct 3 21:34:53 2017 +0100

drm/i915/scheduler: Support user-defined priorities

and including the fixup from

    kernel commit 822a4b673284672af697ccd66e8795f8a712a90d
    Author: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
    Date:   Fri Oct 6 13:45:59 2017 +0300

drm/i915: Don't use BIT() in UAPI section

for implementing IMG_context_priority.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

egl,dri: Propagate context priority hint to driver->CreateContext

Jump through the layers of abstraction between egl and dri in order to
feed the context priority attribute through to the backend. This
requires us to read the value from the base _egl_context, convert it to
a DRI attribute, parse it again in the generic context creator before
passing it to the driver as a function parameter.

In order to not require us to pass back the actual value of the context
priority after creation, we impose that drivers should report the
available set of priorities during screen setup (and then they may chose
to fail if given an invalid value as that should have been checked at
the user boundary.)

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Acked-by: Ben Widawsky <ben@bwidawsk.net> # i915/i965
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

egl: Support IMG_context_priority

IMG_context_priority
https://www.khronos.org/registry/egl/extensions/IMG/EGL_IMG_context_priority.txt

    "This extension allows an EGLContext to be created with a priority
    hint. It is possible that an implementation will not honour the
    hint, especially if there are constraints on the number of high
    priority contexts available in the system, or system policy limits
    access to high priority contexts to appropriate system privilege
    level. A query is provided to find the real priority level assigned
    to the context after creation."

The extension adds a new eglCreateContext attribute for choosing a
priority hint. This stub parses the attribute and copies into the base
struct _egl_context, and hooks up the query similarly.

Since the attribute is purely a hint, I have no qualms about the lack of
implementation before reporting back the value the user gave!

v2: Remember to set the default ContextPriority value to medium.
v3: Use the driRendererQuery interface to probe the backend for
supported priority values and use those to mask the EGL interface.
v4: Treat the priority attrib as a hint and gracefully mask any requests
not supported by the driver, the EGLContext will remain at medium
priority.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Rob Clark <robdclark@gmail.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Emil Velikov <emli.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

radv: don't flush the VS when srcStageMask == TOP_OF_PIPE_BIT

The Vulkan specification says:

   "... an execution dependency with only VK_PIPELINE_STAGE_TOP_OF_-
    PIPE_BIT in the source stage mask will effectively not wait for
    any prior commands to complete."

Signed-off-by: Fredrik Höglund <fredrik@kde.org>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

radv: mark total_count as MAYBE_UNUSED in CmdSet{Viewport,Scissor}

Fixes two compilation warnings in release build. Trivial.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

radv: rename radv_cmd_buffer_flush_state() to radv_draw()

Similar to the dispatch codepath.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv: emit primitive restart from radv_emit_draw_registers()

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv: add radv_emit_draw_registers()

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv: refactor indirect draws (+count buffer) with radv_draw_info

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv: refactor indirect draws with radv_draw_info

Indirect draws with a count buffer will be refactored in a
separate patch.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv: refactor simple and indexed draws with radv_draw_info

Similar to the dispatch compute logic but for draw calls. For
convenience, indirect draws will be converted in a separate
patch.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv: re-emit VGT_INDEX_TYPE because non-indexed draws overwrite it

Only on CIK and later. We should only update VGT_INDEX_TYPE but
it seems easier to re-emit all the index buffer packets.

Fixes: 966d66f28f (radv: do not re-emit the index buffer for every draw call)
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv: clear the dirty flags in the corresponding emit helpers

This will allow us to fix the VGT_INDEX_TYPE issue properly.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv: rename RADV_CMD_DIRTY_RENDER_TARGETS to RADV_CMD_DIRTY_FRAMEBUFFER

To be consistent with the emit function name.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv: move DB_COUNT_CONTROL initialization to si_emit_config()

CLEAR_STATE will initialize DB_COUNT_CONTROL to 0 for CIK+.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

i965/vec4: remove setting default LOD in the backend

It is already done in NIR.

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>

i965/fs: remove setting default LOD in the backend

It is already done in NIR.

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>

nir: set default lod to texture opcodes that needed it but don't provide it

v2:
- Use helper to add a new source to the texture instruction.

v3:
- Use nir_tex_instr_src_index() to simplify the patch (Jason).

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

radv: enable GS on GFX9

Reviewed-by: Dave Airlie <airlied@redhat.com>

radv: calculate and emit GFX9 GS registers to pipeline state.

Reviewed-by: Dave Airlie <airlied@redhat.com>

ac/nir: Fix up GS input vgprs.

Reviewed-by: Dave Airlie <airlied@redhat.com>

ac/nir: Add loading from LDS for merged GS.

Reviewed-by: Dave Airlie <airlied@redhat.com>

ac/nir: Add ES output to LDS for GFX9.

Reviewed-by: Dave Airlie <airlied@redhat.com>

ac/nir: Add merged GS function.

[airlied: merged fixup + and fixed up a couple more bits].

Reviewed-by: Dave Airlie <airlied@redhat.com>

radv: Only emit TES when it exists.

Reviewed-by: Dave Airlie <airlied@redhat.com>

radv: Use control shader presence for detecting tess.

Reviewed-by: Dave Airlie <airlied@redhat.com>

radv: fixup tess eval shader when combined.

This fixes some access to the tess eval shader when it's combined
with geometry on gfx9.

This is a review of Bas's commit:
radv: Prevent crashing by accessing TES for VGT reuse depth.

Signed-off-by: Dave Airlie <airlied@redhat.com>

radv: Set VGT_GS_MODE properly for gfx9

Reviewed-by: Dave Airlie <airlied@redhat.com>

radv: ensure correct outinfo is picked.

This struct used to rely on being in a union, it isn't anymore,
so we have to pick the correct outinfo struct now.

This should fix a regression since the union became a struct.

dEQP-VK.tessellation.geometry_interaction.point_size.vertex_set_geometry_set

Fixes: 6078a3bd51 (ac/nir: Allow ac_shader_variant_info to contain info about multiple stages.)
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

swr: Rework scratch space allocation

Remove allocation of > 2kbyte buffers into context memory in
swr_copy_to_scatch_space() (which is used to copy small vertex/index buffers
and shader constants to a scratch space to be used by the upcoming draw.)

Large shader constant allocations need to be done in the circular scratch
buffer instead of context memory, because their values persist across
render calls.

Also lower SCRATCH_SINGLE_ALLOCATION_LIMIT to 8k, since allocations of larger
buffers will get too large for the circular scratch space.

Fixes render issues with CEI Ensight.

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>

radv: Enable tessellation shaders for  GFX9.

It mostly works now.

Reviewed-by: Dave Airlie <airlied@redhat.com>

ac/nir: init full exec mask for merged shaders.

Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Dave Airlie <airlied@redhat.com>

radv: drop unused r600_htile_info.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>

radv: fix CLEAR_STATE packet length.

Looking at shader traces I noticed some registers were missing,
one of them was being eaten by the wrong clear state length.

Fixes: 4f42ea4dc (radv: use CLEAR_STATE for initializing some registers)
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

meson: don't build gallium dri target if gallium is disabled

Otherwise -Dgallium-drivers= will cause libmesa_gallium to be built and
the megadriver install script to attempt to install drivers without any
actual drivers being built.

fixes: 66f97f6640f5316b36177fd1053f0027eb6ec6cc ("meson: build radeonsi")
Reported-by: Rafael Antognolli <rafael.antognolli@intel.com>
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Tested-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>

radv: copy indirect lowering settings from radeonsi

It looks the original indirect mask was probably copied from
ANV.

Sascha Willems demo results:

tessellation ~4000 -> ~4200 fps

V2: continue lowering local indirects due to llvm deficiencies.

Tested-by: Alex Smith <asmith@feralinteractive.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv: stop redundant setting of active_stages

We already set it when above in the nir compilation loop.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

ac: move some code out of loop in store_tcs_output()

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

radv: Modify rsrc1/rsrc2 generation for merged tess.

No OC_LDS_EN for HS, and the included LS vgpr_comp_cnt is at
a different offset.

Reviewed-by: Dave Airlie <airlied@redhat.com>

radv: Set correct registers for merged shader rings.

We need different regs to end up in s0/s1.

Reviewed-by: Dave Airlie <airlied@redhat.com>

radv: Add GFX9 HS emitting code.

Reviewed-by: Dave Airlie <airlied@redhat.com>

radv: Remove remaining hard coded references to VS.

Reviewed-by: Dave Airlie <airlied@redhat.com>

radv: Update GFX9 user data regs for GS/tess.

Reviewed-by: Dave Airlie <airlied@redhat.com>

radv: Add code to compile merged shaders.

Reviewed-by: Dave Airlie <airlied@redhat.com>

ac/nir: Add LS-HS input VGPR workaround.

Reviewed-by: Dave Airlie <airlied@redhat.com>

ac/nir: Compile the bodies of multiple shaders.

Reviewed-by: Dave Airlie <airlied@redhat.com>

ac/nir: Expand user SGPR descriptions a bit.

To prevent VS/TCS collisions in merged shaders.

Reviewed-by: Dave Airlie <airlied@redhat.com>

ac/nir: Don't write to the dynamic HS word on GFX9.

Reviewed-by: Dave Airlie <airlied@redhat.com>

ac/nir: Add function creation for merged LS+HS.

Reviewed-by: Dave Airlie <airlied@redhat.com>

ac/nir: Make scan_shader_output_decl less dependent on the context.

Reviewed-by: Dave Airlie <airlied@redhat.com>

ac/nir: Allow ac_shader_variant_info to contain info about multiple stages.

Reviewed-by: Dave Airlie <airlied@redhat.com>

ac/nir: Change interface to allow multiple source shaders.

Reviewed-by: Dave Airlie <airlied@redhat.com>

ac/nir: Add HS calling convention.

Needed for GFX9 merged shaders.

Reviewed-by: Dave Airlie <airlied@redhat.com>

ac: Parse the new HS RSRC1 register.

Reviewed-by: Dave Airlie <airlied@redhat.com>

swr: knob overrides for Intel Xeon Phi

Architecture benefits from having more threads/work outstanding.

Patch by Jan Zielinski.

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>

swr/rast: Add api to override draws in flight

Allow draws in flight to be overridden via SWR_CREATECONTEXT_INFO.

Patch by Jan Zielinski.

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>

swr/rast: Widen fetch shader to SIMD16 (disabled for now)

Refactored the gather operation to process 16 elements at a time via
paired SIMD8 operations.

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>

swr/rast: Change DS memory allocation

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>

swr/rast: Fix indentation

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>

swr/rast: Miscellaneous viewport array code changes

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>

swr/rast: Minor changes for os-x

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>

i965: Don't disable aux buffers for non-overlapping miplevels.

Meta's GenerateMipmap implementation binds the same image for both
sampling and rendering - but it samples from one miplevel while
rendering the next.  This is a false self-dependency, and there's
no need to disable auxiliary buffers in this case.  In fact, we really
want to leave it enabled so the new miplevels gain color compression.

Thankfully, the texture object's _MaxLevel is always one shy of the
miplevel being rendered.  So we can simply check if irb->mt_level is
overlaps with the texture's defined levels.  If not, there's no self-
dependency and we can leave the auxiliary buffers enabled.

Fixes a performance regression in GFXBench4 Car Chase, which apparently
calls glGenerateMipmap() on every frame.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103247
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by; Jason Ekstrand <jason@jlekstrand.net>

i965: Remove the intel_miptree_prepare_fb_fetch wrapper.

Now that intel_miptree_prepare_texture takes levels and layers, there's
not much use in this anymore.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by; Jason Ekstrand <jason@jlekstrand.net>

i965: Only resolve texture levels/layers that are accessed.

This should avoid unnecessary resolves when working with texture views.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by; Jason Ekstrand <jason@jlekstrand.net>

i965: Make intel_miptree_prepare_texture() take level/layer arguments.

This effectively exports intel_miptree_prepare_texture_slices() as
intel_miptree_prepare_texture().  The hope is to avoid resolves for
when using texture views that access a subset of the levels/layers.

For now, we pass the same arguments to separate the mechanical change
from the one that actually modifies our behavior.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by; Jason Ekstrand <jason@jlekstrand.net>

gallium: add more exceptions to tgsi_util_get_inst_usage_mask

A number of double/int64 operations don't have matching
read and write usage masks, which the fallthrough case of
tgsi_util_get_inst_usage_mask assumes for componentwise
tagged instructions.

No regressions in llvmpipe piglit; fixes a large number of
swr regressions.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

isl: Fix width check in isl_gen7_choose_msaa_layout.

The restriction is supposed to apply if the width *field* is >= 8192,
meaning the actual width *value* is >= 8193.

The code also incorrectly used == for some reason.

Reviewed-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

i965: Use is_scheduling_barrier instead of schedule_node::is_barrier.

Commit a73116ecc60414ade89802150b tried to make add_barrier_deps()
walk to the next barrier, and stop.  To accomplish that, it added an
is_barrier flag.  Unfortunately, this only works half of the time.

The issue is that add_barrier_deps() walks both backward (to the
previous barrier), and forward (to the next barrier).  It also sets
is_barrier.  Assuming that we're processing instructions in forward
order, this means that is_barrier will be set for previous instructions,
but not future ones.  So we'll never see it, and walk further than we
need to.

dEQP-GLES31.functional.ssbo.layout.random.all_shared_buffer.23
now compiles its shaders in 3.6 seconds instead of 3.3 minutes.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Tested-by: Pallavi G <pallavi.g@intel.com>

i965: Move fs_inst::has_side_effects()'s eot check to the parent class.

This eliminates a layer of wrapping, and makes a backend_instruction
sufficient.  The downside is that it exposes 'eot' to the vec4 backend,
which it doesn't need, but can basically happily ignore.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Tested-by: Pallavi G <pallavi.g@intel.com>

tgsi: fix tgsi_util_get_inst_usage_mask

The logic for handling shadow coords was completely broken.
Fixes be3ab867bd444594f9d9e0f8e59d305d15769afd.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103265

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

docs: update calendar, add news item and link release notes for 17.2.3

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

docs: add sha256 checksums for 17.2.3

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit facc85181883cb514b2b1a8106255be88fd54c6e)

docs: add release notes for 17.2.3

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 28dc4b64f2f75dc0a0a98e2b97f1dd3350f50e2d)

glsl/linker: produce error when invalid explicit locations are used

We only need to add a check to validate output locations here. For
inputs with invalid locations we will fail to link when we can't
find a matching output in the same (invalid) location.

v2: compute location slots properly depending on shader stage and
    variable type / direction

Fixes:
KHR-GL45.enhanced_layouts.varying_location_limit

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

i965/sbe: fix active components for SSO programs with over 16 inputs

When we have up to 16 FS inputs, the SF unit will reorder our inputs
to be consecutive, however, when we have more than 16 we need to
to read our inputs from the URB exactly as they have been
output from the previous stage. This means that for SSO we have to
consider if we have URB padding due to unused input locations.

Specifically, this affects gen9 active components programming, since
for things to work in scenarios with over 16 inputs that have padded
regions we need to ensure that we program active components for the
padded regions too. If we don't do this the hardware won't read
the URB properly for inputs located after padded regions.

Found empirically.

Fixes (these also require a patch in CTS):
KHR-GL45.enhanced_layouts.varying_locations
KHR-GL45.enhanced_layouts.varying_array_locations

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965: Do not log a perf warning when mapping an idle bo

We only want to scare the user away from causing a GPU stall for mapping
a busy bo. The time taken to instantiate the set of pages for a buffer
and their mmapping is unavoidable and flagging idle bo as being busy is
"crying wolf".

Reported-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965: Use a union to bitcast a float

... which does not break C's aliasing rules.

drirc: Group a few games in the glthread whitelist together.

Signed-off-by: Marek Olšák <marek.olsak@amd.com>

drirc: Enable glthread for more games (Saints Row 4 & Gat out of Hell).

“Saints Row: Gat out of Hell” benefits from this on slower CPUs in that
usage spikes on individual cores are avoided, which in turn makes it harder
to hit a bug which causes broken audio and the game to hang on exit.

“Saints Row IV” appears to be fine either way, but also exhibits the audio
breakage bug: glthread is therefore being enabled on the grounds that it should
make it a little harder to hit that bug.

Signed-off-by: Marek Olšák <marek.olsak@amd.com>

radv: reset dirty flags after flushing all states

Move it to radv_cmd_buffer_flush_state() because if
rasterizerDiscardEnable is true, the flags are not cleared.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv: do not re-emit the index buffer for every draw call

It can only be changed when CmdBindIndexBuffer() is called
or when a secondary buffer is used. Though not always, but
let's re-emit the packets in this situation for now.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv: remove useless mask operation in radv_cs_emit_draw_indexed_packet()

This saves few CPU cycles when CmdDrawIndexed() is used a lot.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv: Do not read from the disk cache with RADV_DEBUG=nocache.

Otherwise the flag is borderline useless.
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>

radv: Set active_stages after getting cached shaders

Fixes: 7d45d22fdd2e ("radv: switch to using radv_create_shaders()")
Signed-off-by: Alex Smith <asmith@feralinteractive.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv: Don't free NIR shaders if tracing

Fixes a crash while generating a hang report.

Fixes: 7d45d22fdd2e ("radv: switch to using radv_create_shaders()")
Signed-off-by: Alex Smith <asmith@feralinteractive.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

Revert "egl: move alloc & init out of _eglBuiltInDriver{DRI2,Haiku}"

This reverts commit 8cb84c8477a57ed05d703669fee1770f31b76ae6.

This fixes crashing shader-db/run.

Revert "egl: drop EGL driver `name`"

This reverts commit 6414d6bd8d2897f4ba643357fe3037f3acd60879.

This is needed to apply the next revert.

st/mesa: set dimension for constants in ATI_fragment_shader

This fixes an assertion failure introduced by 30a2f0dfd46de.

Fixes: 30a2f0dfd46 ("radeonsi: add an assertion that only
Signed-off-by: Miklós Máté <mtmkls@gmail.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>

st/osmesa: include u_inlines.h for pipe_resource_reference

Fixes build failure due to unresolved symbol.

Fixes: 7561da367bae "st/mesa: Initialize textures array in
                     st_framebuffer_validate"

Trivial.

st/mesa: Initialize textures array in st_framebuffer_validate

And just reference pipe_resources to it in the validate callbacks.

Avoids pipe_resource leaks when st_framebuffer_validate ends up calling
the validate callback multiple times, e.g. when a window is resized.

v2:
* Use generic stable tag instead of Fixes: tag, since the problem could
  already happen before the commit referenced in v1 (Thomas Hellstrom)
* Use memset to initialize the array on the stack instead of allocating
  the array with os_calloc.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com>

egl: set UseFallback if LIBGL_ALWAYS_SOFTWARE is set

Suggested-by: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>

egl: drop EGL driver `name`

The "DRI2" name was reported as confusing when printing EGL infos (one
user reported thinking DRI3 was not working on his X server), and the
only alternative is Haiku, which can only be used on a Haiku machine.

The name therefore doesn't add any information that the user wouldn't
know already, so let's just drop it.

Cc: Kai Wasserbäch <kai@dev.carbon-project.org>
Suggested-by: Emil Velikov <emil.l.velikov@gmail.com>
Related-to: b174a1ae720cb404738c ("egl: Simplify the "driver" interface")
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>

egl: drop always-false TestOnly option

Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>

Fix the xf86vm meson dependency

The pkg-config file is called xxf86vm.

Signed-off-by: Nicholas Miell <nmiell@gmail.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>

egl: move alloc & init out of _eglBuiltInDriver{DRI2,Haiku}

Note: dropping the EGL_BAD_ALLOC in egl_haiku because it's
overwritten by the EGL_NOT_INITIALIZED in eglInitialize().

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

egl_dri2: drop dri2_egl_driver struct

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

egl_dri2: move glFlush out of struct dri2_egl_driver

There's no reason to store this there, it doesn't depend on the driver.

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

llvmpipe: handle shader sample mask output

This probably isn't all that useful for GL, but there are apis where
sample_mask is a valid output even without msaa.
Just discard the pixel if the sample_mask doesn't include the bit for
sample 0.

Reviewed-by: Brian Paul <brianp@vmware.com>

anv: Fix instance typos.

Fix build error.

  CC       vulkan/vulkan_libvulkan_common_la-anv_device.lo
In file included from vulkan/anv_device.c:33:0:
vulkan/anv_device.c: In function ‘anv_AllocateMemory’:
vulkan/anv_device.c:1562:37: error: ‘struct anv_device’ has no member named ‘instace’; did you mean ‘instance’?
          result = vk_errorf(device->instace, device,
                                     ^
vulkan/anv_private.h:317:17: note: in definition of macro ‘vk_errorf’
     __vk_errorf(instance, obj, REPORT_OBJECT_TYPE(obj), error,\
                 ^~~~~~~~

Fixes: 9775894f1025 ("anv: Move size check from anv_bo_cache_import() to caller (v2)")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>