Mike Frysinger [Sun, 25 Dec 2022 05:48:30 +0000 (00:48 -0500)]
sim: m32r: fix iterator typo when setting up cpus
This code loops over available cpus with "c", but then looks up the
cpu with "i". Fix the typo so the code works correctly with smp.
Mike Frysinger [Sun, 25 Dec 2022 05:32:49 +0000 (00:32 -0500)]
sim: v850: fix SMP compile
The igen tool sets up the SD & CPU defines for code fragments to use,
but v850 was expecting "sd". Change all the igen related code to use
SD so it actually compiles, and fix a few places to use "CPU" instead
of hardcoding cpu0.
Mike Frysinger [Sun, 25 Dec 2022 05:31:19 +0000 (00:31 -0500)]
sim: or1k: fix iterator typo when setting up cpus
This code loops over available cpus with "c", but then looks up the
cpu with "i". Fix the typo so the code works correctly with smp.
Mike Frysinger [Sun, 25 Dec 2022 05:28:55 +0000 (00:28 -0500)]
sim: mn10300: fix SMP compile
The igen tool sets up the SD define for code fragments to use, but
mn10300 was expecting "sd". Change all the igen related code to use
SD so it actually compiles.
Mike Frysinger [Sun, 25 Dec 2022 04:43:18 +0000 (23:43 -0500)]
sim: cpu: fix SMP msg prefix helper
This code fails to compile when SMP is enabled due to some obvious
errors. Fix those and change the logic to avoid CPP to prevent any
future rot from creeping back in.
Mike Frysinger [Sun, 25 Dec 2022 02:29:55 +0000 (21:29 -0500)]
sim: mips: clean up a bit after mips/configure removal
Now that there is no subdir configure script, we can clean up some
logic that was spread between the files.
Mike Frysinger [Sun, 25 Dec 2022 02:28:03 +0000 (21:28 -0500)]
sim: mips: move igen settings to top-level configure
This is the last bit of logic that exists in the mips configure
script, so move it to the top-level configure to kill it off.
We still have to move the Makefile.in igen logic to local.mk,
but this is a required first step for that.
Mike Frysinger [Sun, 25 Dec 2022 00:38:44 +0000 (19:38 -0500)]
sim: mips: namespace igen configure vars
To prepare moving this logic to the top-level configure, the vars
need to be namespaced. Do that here to make it easier to review.
Basically sim_xxx -> SIM_MIPS_XXX when a var is exported from the
configure script to the Makefile, and sim_xxx -> sim_mips_xxx when
the var is internal in the configure script.
Mike Frysinger [Sun, 25 Dec 2022 02:25:50 +0000 (21:25 -0500)]
sim: mips: add igen recursive dep
Make sure the igen tool exists before trying to compile the mips
subdir. This happens to work when mips has a subconfigure, but
hits a race condition when that is removed.
Mike Frysinger [Sun, 25 Dec 2022 02:04:09 +0000 (21:04 -0500)]
sim: mips: drop unused ENGINE_ISSUE_POSTFIX_HOOK
Nothing defines this, and it isn't called in all the engine runtimes,
so drop it entirely to avoid confusion.
Mike Frysinger [Sat, 24 Dec 2022 20:10:01 +0000 (15:10 -0500)]
sim: igen: drop move-if-changed usage
Now that igen itself has this logic, drop these custom build rules
to greatly simplify.
Mike Frysinger [Sat, 24 Dec 2022 20:02:00 +0000 (15:02 -0500)]
sim: igen: support in-place updates ourself
Every file that igen outputs is then processed with the move-if-changed
shell script. This creates a lot of boilerplate in the build and not an
insignificant amount of build-time overhead. Move the simple "is the file
changed" logic into igen itself.
Mike Frysinger [Sat, 24 Dec 2022 06:20:14 +0000 (01:20 -0500)]
sim: igen: constify itable data structures
These are const data arrays of strings and numbers. We don't want
or need them to be writable, so mark them all const.
GDB Administrator [Sun, 25 Dec 2022 00:00:08 +0000 (00:00 +0000)]
Automatic date update in version.in
Andrew Burgess [Tue, 20 Dec 2022 12:51:50 +0000 (12:51 +0000)]
gdb/testsuite: fix buffer overflow in gdb.base/signed-builtin-types.exp
In commit:
commit
9f50fe0835850645bd8ea9bb1efe1fe6c48dfb12
Date: Wed Dec 7 15:55:25 2022 +0000
gdb/testsuite: new test for recent dwarf reader issue
A new test (gdb.base/signed-builtin-types.exp) was added that made use
of 'info sources' to figure out if the debug information for a
particular object file had been fully expanded or not. Unfortunately
some lines of the 'info sources' output can be very long, this was
observed on some systems where the debug information for the
dynamic-linker was installed, in this case, the list of source files
associated with the dynamic linker was so long it would cause expect's
internal buffer to overflow.
This commit switches from using 'info sources' to 'maint print
objfile', the output from the latter command is more compact, but
also, can be restricted to a single named object file.
With this change in place I am no longer seeing buffer overflow errors
from expect when running gdb.base/signed-builtin-types.exp.
Mike Frysinger [Sat, 24 Dec 2022 01:51:39 +0000 (20:51 -0500)]
sim: or1k: move arch-specific settings to internal header
There's no need for these settings to be in sim-main.h which is shared
with common/ sim code, so move it all out to the existing or1k-sim.h.
Unfortunately, we can't yet drop the or1k-sim.h include from sim-main.h
as many of the generated CGEN files refer only to sim-main.h. We'll
have to improve the CGEN interface before we can make more progress,
but this is at least a minor improvement.
GDB Administrator [Sat, 24 Dec 2022 00:00:07 +0000 (00:00 +0000)]
Automatic date update in version.in
Tom Tromey [Wed, 21 Dec 2022 21:35:01 +0000 (14:35 -0700)]
Use bool for dwarf2_has_info
This changes dwarf2_has_info to return bool.
Indu Bhagat [Fri, 23 Dec 2022 21:04:19 +0000 (13:04 -0800)]
libsframe: testsuite: fix memory leaks in testcases
ChangeLog:
* libsframe/testsuite/libsframe.decode/be-flipping.c: Free
SFrame buffer.
* libsframe/testsuite/libsframe.decode/frecnt-1.c: Likewise.
* libsframe/testsuite/libsframe.decode/frecnt-2.c: Likewise.
Indu Bhagat [Fri, 23 Dec 2022 21:04:06 +0000 (13:04 -0800)]
libsframe: fix a memory leak in sframe_decode
sframe_decode () needs to malloc a temporary buffer of the same size as
the input buffer (containing the SFrame section bytes) when endian
flipping is needed. The decoder keeps the endian flipped contents in
this buffer for its usage. This code is necessary when the target
endianneess is not the same as host endianness.
The malloc'd buffer needs to be kept track of, so that it can freed up in
sframe_decoder_free () later.
ChangeLog:
* libsframe/sframe-impl.h (struct sframe_decoder_ctx): Add new
member to keep track of the internally malloc'd buffer.
* libsframe/sframe.c (sframe_decoder_free): Free it up.
(sframe_decode): Update the reference to the buffer.
Simon Marchi [Thu, 22 Dec 2022 15:10:24 +0000 (10:10 -0500)]
gdb/testsuite: remove MPFR detection in gdb.base/float128.exp
I see this fail since commit
991180627851 ("Use toplevel configure for
GMP and MPFR for gdb"):
FAIL: gdb.base/float128.exp: show configuration
The test fails to find --with-mpfr or --without-mpfr in the "show
configuration" output. Since MPFR has become mandatory, we can just
remove that check and simplify the test to assume MPFR support is there.
Change-Id: I4f3458470db0029705b390dfefed3a66dfc0633a
Approved-By: Tom de Vries <tdevries@suse.de>
Mike Frysinger [Fri, 23 Dec 2022 05:49:09 +0000 (00:49 -0500)]
sim: m32r: move arch-specific settings to internal header
There's no need for these settings to be in sim-main.h which is shared
with common/ sim code, so move it all out to the existing m32r-sim.h.
Unfortunately, we can't yet drop the m32r-sim.h include from sim-main.h
as many of the generated CGEN files refer only to sim-main.h. We'll
have to improve the CGEN interface before we can make more progress,
but this is at least a minor improvement.
Mike Frysinger [Fri, 23 Dec 2022 05:10:35 +0000 (00:10 -0500)]
sim: bfin: move arch-specific settings to internal header
There's no need for these settings to be in sim-main.h which is shared
with common/ sim code, so drop the bfin.h include and move the remaining
bfin-specific settings into it.
Mike Frysinger [Fri, 23 Dec 2022 05:07:47 +0000 (00:07 -0500)]
sim: m68hc11: move arch-specific settings to internal header
There's no need for these settings to be in sim-main.h which is shared
with common/ sim code, so move it all out to a new header which only
this port will include.
Mike Frysinger [Fri, 23 Dec 2022 05:01:43 +0000 (00:01 -0500)]
sim: sh: move arch-specific settings to internal header
There's no need for these settings to be in sim-main.h which is shared
with common/ sim code, so move it all out to a new header which only
this port will include.
Mike Frysinger [Fri, 23 Dec 2022 05:00:07 +0000 (00:00 -0500)]
sim: mcore: move arch-specific settings to internal header
There's no need for these settings to be in sim-main.h which is shared
with common/ sim code, so move it all out to a new header which only
this port will include.
Mike Frysinger [Fri, 23 Dec 2022 04:56:19 +0000 (23:56 -0500)]
sim: h8300: move arch-specific settings to internal header
There's no need for these settings to be in sim-main.h which is shared
with common/ sim code, so move it all out to a new header which only
this port will include.
Mike Frysinger [Fri, 23 Dec 2022 04:52:24 +0000 (23:52 -0500)]
sim: pru: move arch-specific settings to internal header
There's no need for these settings to be in sim-main.h which is shared
with common/ sim code, so drop the pru.h include and move the remaining
pru-specific settings into it.
Mike Frysinger [Fri, 23 Dec 2022 04:47:50 +0000 (23:47 -0500)]
sim: mn10300: standardize the arch-specific settings a little
Rename mn10300_sim.h to mn10300-sim.h to match other ports, and move most
of the arch-specific content out of sim-main.h to it. This isn't a big
win though as we still have to include the header in sim-main.h due to the
igen interface: it hardcodes including sim-main.h in its files. So until
we can fix that, we have to keep bleeding these settings into the common
codes.
Also take the opportunity to purge a lot of unused headers from these.
The local modules should already include the right headers, so there's
no need to force everyone to pull them in. A lot of this is a hold over
from the pre-igen days of this port.
Mike Frysinger [Fri, 23 Dec 2022 04:29:21 +0000 (23:29 -0500)]
sim: microblaze: move arch-specific settings to internal header
There's no need for these settings to be in sim-main.h which is shared
with common/ sim code, so move it all out to a new header which only
this port will include.
Mike Frysinger [Fri, 23 Dec 2022 04:15:39 +0000 (23:15 -0500)]
sim: example-synacor: move arch-specific settings to internal header
There's no need for these settings to be in sim-main.h which is shared
with common/ sim code, so move it all out to a new header which only
this port will include.
Mike Frysinger [Fri, 23 Dec 2022 04:13:54 +0000 (23:13 -0500)]
sim: moxie: move arch-specific settings to internal header
There's no need for these settings to be in sim-main.h which is shared
with common/ sim code, so move it all out to a new header which only
this port will include.
Mike Frysinger [Fri, 23 Dec 2022 04:10:38 +0000 (23:10 -0500)]
sim: riscv: move arch-specific settings to internal header
There's no need for these settings to be in sim-main.h which is shared
with common/ sim code, so move it all out to a new header which only
this port will include.
We can also move the machs.h include out since the model logic was all
generalized from compile-time to runtime last year.
Mike Frysinger [Fri, 23 Dec 2022 03:57:57 +0000 (22:57 -0500)]
sim: v850: standardize the arch-specific settings a little
Rename v850_sim.h to v850-sim.h to match other ports, and move most
of the arch-specific content out of sim-main.h to it. This isn't a
big win though as we still have to include the header in sim-main.h
due to the igen interface: it hardcodes including sim-main.h in its
files. So until we can fix that, we have to keep bleeding these
settings into the common codes.
Mike Frysinger [Fri, 23 Dec 2022 03:47:10 +0000 (22:47 -0500)]
sim: msp430: move arch-specific settings to internal header
There's no need for these settings to be in sim-main.h which is shared
with common/ sim code, so drop the msp430-sim.h include and move it to
the few files that actually need it.
While we're here, drop redundant includes from sim-main.h:
* sim-config.h & sim-types.h included by sim-basics.h already
* sim-engine.h included by sim-base.h already
And move sim-options.h to the one file that needs it.
Mike Frysinger [Fri, 23 Dec 2022 03:42:02 +0000 (22:42 -0500)]
sim: ft32: move arch-specific settings to internal header
There's no need for these settings to be in sim-main.h which is shared
with common/ sim code, so drop the ft32-sim.h include and move it to
the few files that actually need it.
Mike Frysinger [Fri, 23 Dec 2022 03:39:55 +0000 (22:39 -0500)]
sim: d10v: move arch-specific settings to internal header
There's no need for these settings to be in sim-main.h which is shared
with common/ sim code, so drop the d10v_sim.h include and move it to
the few files that actually need it.
Also rename the file to standardize it a bit better with other ports.
Mike Frysinger [Fri, 23 Dec 2022 03:35:11 +0000 (22:35 -0500)]
sim: cr16: move arch-specific settings to internal header
There's no need for these settings to be in sim-main.h which is shared
with common/ sim code, so drop the cr16_sim.h include and move it to
the few files that actually need it.
Also rename the file to standardize it a bit better with other ports.
Mike Frysinger [Fri, 23 Dec 2022 03:28:06 +0000 (22:28 -0500)]
sim: arm: move arch-specific settings to internal header
There's no need for these settings to be in sim-main.h which is shared
with common/ sim code, so move it all out to a new header which only
this port will include.
The BIT override would be better in the place where it's redefined, so
move it to armdefs.h instead.
Mike Frysinger [Fri, 23 Dec 2022 03:20:08 +0000 (22:20 -0500)]
sim: aarch64: move arch-specific settings to internal header
There's no need for these settings to be in sim-main.h which is shared
with common/ sim code, so move it all out to a new header which only
this port will include.
While we're here, drop redundant includes from sim-main.h:
* sim-types.h is included by sim-base.h already
* sim-base.h is included twice
* sim-io.h is included by sim-base.h already
Mike Frysinger [Fri, 23 Dec 2022 03:12:20 +0000 (22:12 -0500)]
sim: avr: move arch-specific settings to internal header
There's no need for these settings to be in sim-main.h which is shared
with common/ sim code, so move it all out to a new header which only
this port will include.
Nick Clifton [Fri, 23 Dec 2022 13:02:04 +0000 (13:02 +0000)]
Fix illegal memory access parsing corrupt DWARF information.
PR 29936
* dwarf2.c (concat_filename): Fix check for a directory index off
the end of the directory table.
Eli Zaretskii [Thu, 22 Dec 2022 10:42:24 +0000 (12:42 +0200)]
Fix MinGW build using mingw.org's MinGW
This allows to build GDB even though the default value of
_WIN32_WINNT is lower than the one needed to expose some
new APIs used here, and leave the test for their actual
support to run time.
* gdb/nat/windows-nat.c (EXTENDED_STARTUPINFO_PRESENT): Define if
not defined.
(create_process_wrapper): Use 'gdb_lpproc_thread_attribute_list'
instead of 'PPROC_THREAD_ATTRIBUTE_LIST' (which might not be defined
at compile time). This fixes compilation error using mingw.org's
MinGW.
Mark Harmstone [Fri, 9 Dec 2022 01:52:40 +0000 (01:52 +0000)]
ld: Write linker symbols in PDB
Mark Harmstone [Fri, 9 Dec 2022 01:52:39 +0000 (01:52 +0000)]
ld: Copy other symbols into PDB file
Mark Harmstone [Fri, 9 Dec 2022 01:52:38 +0000 (01:52 +0000)]
ld: Write globals stream in PDB
Mark Harmstone [Fri, 9 Dec 2022 01:52:37 +0000 (01:52 +0000)]
ld: Parse LF_UDT_SRC_LINE records when creating PDB file
Mark Harmstone [Fri, 9 Dec 2022 01:52:36 +0000 (01:52 +0000)]
ld: Write types into IPI stream of PDB
Mark Harmstone [Fri, 9 Dec 2022 01:52:35 +0000 (01:52 +0000)]
ld: Write types into TPI stream of PDB
Mark Harmstone [Fri, 9 Dec 2022 01:52:34 +0000 (01:52 +0000)]
ld: Write DEBUG_S_LINES entries in PDB file
Mark Harmstone [Fri, 9 Dec 2022 01:52:33 +0000 (01:52 +0000)]
ld: Fix segfault in populate_publics_stream
Mark Harmstone [Fri, 9 Dec 2022 01:52:32 +0000 (01:52 +0000)]
ld: Write DEBUG_S_FILECHKSMS entries in PDBs
Mark Harmstone [Fri, 9 Dec 2022 01:52:31 +0000 (01:52 +0000)]
ld: Generate PDB string table
Alan Modra [Thu, 22 Dec 2022 01:19:09 +0000 (11:49 +1030)]
pdb build fixes
Enable compilation of ld/pdb.c just for x86, as is done for bfd/pdb.c.
This reduces the size of ld and is necessary with the following
patches that call a COFF-only bfd function from ld/pdb.c. Without it
we'd break every non-COFF target build.
Mike Frysinger [Fri, 23 Dec 2022 05:37:32 +0000 (00:37 -0500)]
sim: lm32/m32r: drop redundant opcode/cgen.h include
The xxx-desc.h header file already includes this, and it's how the
other cgen ports are getting it, so drop it from these two.
Mike Frysinger [Fri, 23 Dec 2022 05:27:08 +0000 (00:27 -0500)]
sim: ppc: drop unused types from sim-main.h
The common sim headers should define these for us already, so there's
no need for the ppc header to set them up.
Mike Frysinger [Fri, 23 Dec 2022 05:32:29 +0000 (00:32 -0500)]
sim: cgen: move symcat.h include to where it's used
Move this out of the global sim-main.h and to the few files that
actually use functions from it. Only the cgen ports were pulling
this, so this makes cgen & non-cgen behave more the same.
Mike Frysinger [Fri, 23 Dec 2022 04:21:59 +0000 (23:21 -0500)]
sim: cgen: move cgen-types.h include to cgen-defs.h
The cgen-types.h header sets up types that are needed by cgen-defs.h,
so move the include out of sim-main.h and to that header. It might
be needed in other specific modules, but for now let's kick it out of
sim-main.h to make some progress. Things still build with just this.
Mike Frysinger [Fri, 23 Dec 2022 05:20:52 +0000 (00:20 -0500)]
Revert "sim: mn10300: drop unused sim-main.c"
This reverts commit
681a422b855e4b20086554b170dae051361f00c7.
I missed that this was included via common/sim-inline.c. I thought
I had grepped the top of the tree, but I must have only done mn10300.
Add a comment to make it clear where/how this file is used.
Mike Frysinger [Fri, 23 Dec 2022 04:38:32 +0000 (23:38 -0500)]
sim: mn10300: drop unused sim-main.c
Nothing compiles or references this, so punt it.
Mike Frysinger [Fri, 23 Dec 2022 03:06:52 +0000 (22:06 -0500)]
sim: endian: move bfd.h from header to source
The bfd APIs are used only by sim-n-endian.h which is only included by
sim-endian.c, so move the bfd.h include there and out of sim-endian.h
which is included by many other modules.
Mike Frysinger [Fri, 23 Dec 2022 03:01:19 +0000 (22:01 -0500)]
sim: move bfd.h include out of sim-main.h
Not all arches include this in sim-main.h, and the ones that do don't
actually use bfd defines in the sim-main.h header. Prune it to make
sim-main.h simpler so we can kill it off entirely in the future.
We add the include to the files that utilize e.g. bfd_vma though.
Mike Frysinger [Fri, 23 Dec 2022 02:53:51 +0000 (21:53 -0500)]
sim: mcore: replace custom "word" type with int32_t
This is a 32-bit architecture with 32-bit registers, so replace the
custom "word" long int typedef with an explicit int32_t. This is
a correctness fix since long will be 64-bits on most 64-bit hosts.
Mike Frysinger [Fri, 23 Dec 2022 02:45:15 +0000 (21:45 -0500)]
sim: moxie: replace custom "word" type with int32_t
This is a 32-bit architecture with 32-bit registers, so replace the
custom "word" int typedef with an explicit int32_t. Practically
speaking, this produces the same code, but it should hopefully make
it easier to merge common code in the future.
Mike Frysinger [Fri, 23 Dec 2022 02:36:24 +0000 (21:36 -0500)]
sim: cr16/d10v/mcore/moxie: clean up unused word & uword types
Nothing actually uses these, so punt them. Some of the ports are
using local "word" types, but we'll clean those up in a follow up.
Mike Frysinger [Fri, 23 Dec 2022 02:28:16 +0000 (21:28 -0500)]
sim: mips: trim redundant igen settings
These variables are setting the same value as the defaults. Trim
this redundant logic to make it easier to see the real differences
so we can try to keep unifying cases.
Mike Frysinger [Fri, 11 Nov 2022 16:58:23 +0000 (23:58 +0700)]
sim: mips: merge mips64* with existing multi-run build
Change the default (unhandled) mips64* targets to use the existing
mips64 multi-run build. It already handles the formats, we just
have to list the mips8000 bfd for it.
Mike Frysinger [Fri, 11 Nov 2022 16:52:59 +0000 (23:52 +0700)]
sim: mips: merge mips64vr5000 with existing multi-run build
The existing mips64vr-* multi-run build already handles mips5000
targets, so reuse that for mips64vr5* targets too. This moves
more logic from build-time to runtime so we can have a single
binary that supports many targets.
Nelson Chu [Wed, 21 Dec 2022 03:22:06 +0000 (11:22 +0800)]
RISC-V: Relax the order checking for the architecture string
* riscv-toolchain-conventions,
PR, https://github.com/riscv-non-isa/riscv-toolchain-conventions/pull/14
Issue, https://github.com/riscv-non-isa/riscv-toolchain-conventions/issues/11
* Refer to the commit
afc41ffb,
RISC-V: Reorder the prefixed extensions which are out of order.
In the past we only allow to reorder the prefixed extensions. But according
to the PR 14 in the riscv-toolchain-convention, we can also relax the order
checking to allow the whole extensions be written out of orders, including
the single standard extensions and the prefixed multi-letter extensions.
Just that we still need to follow the following rules as usual,
1. prefixed extensions need to be seperated with `_'.
2. prefixed extensions need complete <major>.<minor> version if set.
Please see the details in the march-ok-reorder gas testcase.
Passed the riscv-gnu-toolchain regressions.
bfd/
* elfxx-riscv.c (enum riscv_prefix_ext_class): Changed RV_ISA_CLASS_UNKNOWN
to RV_ISA_CLASS_SINGLE, since everything that does not belong to the
multi-keyword will possible be a single extension for the current parser.
(parse_config): Likewise.
(riscv_get_prefix_class): Likewise.
(riscv_compare_subsets): Likewise.
(riscv_parse_std_ext): Removed, and merged with riscv_parse_prefixed_ext
into riscv_parse_extensions.
(riscv_parse_prefixed_ext): Likewise.
(riscv_parse_subset): Only need to call riscv_parse_extensions to parse
both single standard and prefixed extensions.
gas/
* testsuite/gas/riscv/march-fail-order-std.d: Removed since the relaxed
order checking.
* testsuite/gas/riscv/march-fail-order-std.l: Likewise.
* testsuite/gas/riscv/march-fail-order-x-std.d: Likewise.
* testsuite/gas/riscv/march-fail-order-z-std.d: Likewise.
* testsuite/gas/riscv/march-fail-order-zx-std.l: Likewise.
* testsuite/gas/riscv/march-fail-unknown-std.l: Updated.
* testsuite/gas/riscv/march-ok-reorder.d: New testcase.
Mike Frysinger [Fri, 23 Dec 2022 01:01:37 +0000 (20:01 -0500)]
sim: drop unused SIM_ADDR type [PR sim/7504]
Now that sim APIs either use 64-bit addresses all the time, or more
appropriate target-specific types, drop this now-unused 32-bit-only
address type.
Bug: https://sourceware.org/PR7504
Mike Frysinger [Fri, 23 Dec 2022 00:59:38 +0000 (19:59 -0500)]
sim: mips: switch from SIM_ADDR to address_word
The latter type matches the address size configured for this sim.
Also take the opportunity to simplify printf logic by leveraging
PRI* macros.
Mike Frysinger [Fri, 11 Nov 2022 18:25:42 +0000 (01:25 +0700)]
sim: v850: switch from SIM_ADDR to address_word
The latter type matches the address size configured for this sim.
Mike Frysinger [Fri, 11 Nov 2022 18:15:32 +0000 (01:15 +0700)]
sim: switch sim_{read,write} APIs to 64-bit all the time [PR sim/7504]
We've been using SIM_ADDR which has always been 32-bit. This means
the upper 32-bit address range in 64-bit sims is inaccessible. Use
64-bit addresses all the time since we want the APIs to be stable
regardless of the active arch backend (which can be 32 or 64-bit).
The length is also 64-bit because it's completely feasible to have
a program that is larger than 4 GiB in size/image/runtime. Forcing
the caller to manually chunk those accesses up into 4 GiB at a time
doesn't seem useful to anyone.
Bug: https://sourceware.org/PR7504
Mike Frysinger [Fri, 11 Nov 2022 18:13:26 +0000 (01:13 +0700)]
sim: use bfd_vma when reading start addr from bfd info
Since SIM_ADDR is always 32-bit, it might truncate the address with
64-bit ELFs. Since we load that addr from the bfd, use the bfd_vma
type which matches the bfd_get_start_address API.
Mike Frysinger [Fri, 23 Dec 2022 00:11:04 +0000 (19:11 -0500)]
sim: m32r: include sim-hw.h for sim_hw_parse
Alan Modra [Thu, 22 Dec 2022 22:57:14 +0000 (09:27 +1030)]
COFF build-id writes uninitialised data to file
1) The first write in write_build_id wrote rubbish past the struct
external_IMAGE_DEBUG_DIRECTORY, which was later overwritten with
correct data. No user visible problem there, except that tools like
valgrind complain.
2) The size for the pdb name was incorrectly calculated.
* emultempl/pe.em (write_build_id): Write the debug directory,
not the entire section contents.
(setup_build_id): Add size for the base name of pdb_name, not
the full path.
* emultempl/pep.em: Likewise.
* testsuite/ld-pe/pdb2-section-contrib.d: Update.
Mike Frysinger [Fri, 11 Nov 2022 16:37:44 +0000 (23:37 +0700)]
sim: mips: merge mips64vr4300 with existing multi-run build
The existing mips64vr-* multi-run build already handles mips4300
targets, so reuse that for mips64vr43* targets too. This moves
more logic from build-time to runtime so we can have a single
binary that supports many targets.
GDB Administrator [Fri, 23 Dec 2022 00:01:40 +0000 (00:01 +0000)]
Automatic date update in version.in
Indu Bhagat [Thu, 22 Dec 2022 17:58:21 +0000 (09:58 -0800)]
sframe: doc: update documentation for pauth key in SFrame FDE
ChangeLog:
* libsframe/doc/sframe-spec.texi
Indu Bhagat [Thu, 22 Dec 2022 17:57:52 +0000 (09:57 -0800)]
gas: sframe: testsuite: add testcase for .cfi_b_key_frame
This is actually a composite test that checks SFrame unwind information
generation for both the .cfi_negate_ra_state and .cfi_b_key_frame
directives on aarch64.
ChangeLog:
* testsuite/gas/cfi-sframe/cfi-sframe-aarch64-pac-ab-key-1.d:
New test.
* testsuite/gas/cfi-sframe/cfi-sframe-aarch64-pac-ab-key-1.s:
Likewise.
* testsuite/gas/cfi-sframe/cfi-sframe.exp: Run new test.
Indu Bhagat [Thu, 22 Dec 2022 17:57:27 +0000 (09:57 -0800)]
objdump/readelf: sframe: emit marker for SFrame FDE with B key
ChangeLog:
* libsframe/sframe-dump.c (is_sframe_abi_arch_aarch64): New
definition.
(dump_sframe_func_with_fres): Emit a string if B key is used.
Indu Bhagat [Thu, 22 Dec 2022 17:57:16 +0000 (09:57 -0800)]
gas: sframe: add support for .cfi_b_key_frame
Gather the information from the DWARF FDE on whether frame's return
addresses are signed using the B key or A key. Reflect the information in
the SFrame counterpart data structure, the SFrame FDE.
ChangeLog:
* gas/gen-sframe.c (get_dw_fde_pauth_b_key_p): New definition.
(sframe_v1_set_func_info): Add new argument for pauth_key.
(sframe_set_func_info): Likewise.
(output_sframe_funcdesc): Likewise.
* gas/gen-sframe.h (struct sframe_version_ops): Add new argument
to the function pointer declaration.
* gas/sframe-opt.c (sframe_convert_frag): Handle pauth_key.
Indu Bhagat [Thu, 22 Dec 2022 17:57:02 +0000 (09:57 -0800)]
sframe.h: add support for .cfi_b_key_frame
ARM 8.3 provides five separate keys that can be used to authenticate
pointers. There are two key for executable (instruction) pointers. The
enum pointer_auth_key in gas/config/tc-aarch64.h currently holds two keys:
enum pointer_auth_key {
AARCH64_PAUTH_KEY_A,
AARCH64_PAUTH_KEY_B
};
Analogous to the above, in SFrame format V1, a bit is reserved in the SFrame
FDE to indicate which key is used for signing the frame's return addresses:
- SFRAME_AARCH64_PAUTH_KEY_A has a value of 0
- SFRAME_AARCH64_PAUTH_KEY_B has a value of 1
Note that the information in this bit will always be used along with the
mangled_ra_p bit, the latter indicates whether the return addresses are
mangled/contain PAC auth bits.
include/ChangeLog:
* sframe.h (SFRAME_AARCH64_PAUTH_KEY_A): New definition.
(SFRAME_AARCH64_PAUTH_KEY_B): Likewise.
(SFRAME_V1_FUNC_INFO): Adjust to accommodate pauth_key.
(SFRAME_V1_FUNC_PAUTH_KEY): New macro.
(SFRAME_V1_FUNC_INFO_UPDATE_PAUTH_KEY): Likewise.
Jan Beulich [Thu, 22 Dec 2022 13:31:11 +0000 (14:31 +0100)]
gas: re-arrange listing output for .irp and alike
It is kind of odd to have the expansions of such constructs ahead of
their definition in listings with macro expansion enabled. Adjust this
by pulling ahead the output of the definition lines, taking care to
avoid producing a listing line for (non-existing) line 0 when the source
is stdin.
Note that with the code movement the conditional operator isn't
necessary anymore - list->line now match up.
Jan Beulich [Thu, 22 Dec 2022 08:36:16 +0000 (09:36 +0100)]
x86: correct/improve TSX controls
TSXLDTRK takes RTM as a prereq. Additionally introduce an umbrella "tsx"
extension option covering both RTM and HLE, paralleling the "abm" one we
already have.
Jan Beulich [Thu, 22 Dec 2022 08:35:53 +0000 (09:35 +0100)]
x86: add dependencies on SVME
SEV-ES is an extension to SVME. SNP in turn is an extension to SEV-ES,
and yet in turn RMPQUERY is a SNP extension.
Note that cpu_arch[] has no SNP entry, so CPU_ANY_SNP_FLAGS remains
unused (just like CPU_SNP_FLAGS already is).
Jan Beulich [Thu, 22 Dec 2022 08:35:32 +0000 (09:35 +0100)]
x86: add dependencies on VMX
Both EPT and VMFUNC are extensions to VMX.
Jan Beulich [Thu, 22 Dec 2022 08:35:11 +0000 (09:35 +0100)]
x86: correct XSAVE* dependencies
Like various other features AMX-TILE takes XSAVE as a prereq.
XSAVES, unconditionally using compacted format, in turn effectively
takes XSAVEC as a prereq (an SDM clarification to this effect is in the
works).
Jan Beulich [Thu, 22 Dec 2022 08:34:50 +0000 (09:34 +0100)]
x86: correct dependencies of a few AVX512 sub-features
Like AVX512-FP16, several other extensions require wider than 16-bit
mask registers. As a result they take AVX512BW as a prereq, not (just)
AVX512F. Which in turn points out wrong expectations in the noavx512-1
testcase.
Jan Beulich [Thu, 22 Dec 2022 08:34:17 +0000 (09:34 +0100)]
x86: rework noavx512-1 testcase
So far the set of ".noavx512*" has been accumulating, which isn't ideal.
In particular this hides issues with dependencies between features.
Switch back to the default ISA before disabling a particular subset.
Furthermore limit redundancy by wrapping the repeated block of insns in
an .irp.
Jan Beulich [Thu, 22 Dec 2022 08:33:53 +0000 (09:33 +0100)]
x86: add dependencies on AVX2
Like AVX-VNNI both VAES and VPCLMUL take AVX2 as a prereq, for operating
on up to 256-bit packed integer vectors.
Jan Beulich [Thu, 22 Dec 2022 08:33:26 +0000 (09:33 +0100)]
x86: correct SSE dependencies
SSE itself takes FXSR as a prereq. Like AES, PCLMUL, and SHA both GFNI
and KL take SSE2 as a prereq, for operating on packed integers. And
while correcting KL also record it as a prereq to WIDEKL.
Jan Beulich [Thu, 22 Dec 2022 08:33:01 +0000 (09:33 +0100)]
x86: correct what gets disabled by certain ".arch .no*"
Features with prereqs as well as features with dependents cannot re-use
CPU_*_MASK for the 3rd argument of SUBARCH() - they need to use
CPU_ANY_*_MASK in order to avoid disabling too many (when there are
prereqs) and/or too few (when there are dependents) features.
Generally any CPU_ANY_*_MASK which exist should not remain unused.
Exceptions are
- FISTTP which has no corresponding entry in cpu_arch[],
- IAMCU which is a base architecture and hence uses ARCH(), not
SUBARCH() (only extensions can be disabled, but unlike for Cpu*86 it
would be a little more clumsy to suppress generating of the #define).
Jan Beulich [Thu, 22 Dec 2022 08:32:29 +0000 (09:32 +0100)]
x86: re-work ISA extension dependency handling
Getting both forward and reverse ISA dependencies right / consistent has
been a permanent source of mistakes. Reduce what needs specifying
manually to just the direct forward dependencies. Transitive forward
dependencies as well as reverse ones are now derived and hence cannot go
out of sync anymore (at least in the vast majority of cases; there are a
few special cases to still take care of manually). In the course of this
several CPU_ANY_*_FLAGS disappear, requiring adjustment to the
assembler's cpu_arch[].
Note that to retain the correct reverse dependency of AVX512F wrt
AVX512-VP2INTERSECT, the latter has the previously missing AVX512F
prereq added.
Note further that to avoid adding the following undue prereqs:
* ATHLON, K8, and AMDFAM10 gain CMOV and FXSR,
* IAMCU gains 387,
auxiliary table entries (including a colon-separated modifier) are
introduced in addition to the ones representing from converting the old
table.
To maintain forward-only dependencies between AVX (XOP) and SSE* (SSE4a)
(i.e. "nosse" not disabling AVX), reverse dependency tracking is
artifically suppressed.
As a side effect disabling of SSE or SSE2 will now also disable AES,
PCLMUL, and SHA (respective elements were missing from
CPU_ANY_SSE2_FLAGS).
Mike Frysinger [Fri, 11 Nov 2022 16:27:12 +0000 (23:27 +0700)]
sim: mips: match target on cpu settings
We don't need to enforce larger target settings when the only thing
the sim should care about is the CPU target. So reduce most of the
target matches to only check the CPU.
Mike Frysinger [Fri, 11 Nov 2022 09:15:46 +0000 (16:15 +0700)]
sim: mips: move fpu bitsize defines to top-level configure
This drops support for the --enable-sim-float configure option,
but it's not clear anyone ever actually used that. Eventually
we'll want this to be a runtime option anyways.
Mike Frysinger [Fri, 11 Nov 2022 08:57:55 +0000 (15:57 +0700)]
sim: mips: move bitsize defines to top-level configure
Since the msb value is always defined as the wordsize-1, stop
hardcoding that value directly, and use a CPP value instead.
Mike Frysinger [Fri, 11 Nov 2022 08:44:57 +0000 (15:44 +0700)]
sim: mips: move subtarget defines to top-level configure
We want to kill off mips/configure entirely. Move this small part
out now to get started.
Mike Frysinger [Fri, 11 Nov 2022 15:57:05 +0000 (22:57 +0700)]
sim: mips: always resolve active bfd mach dynamically
Don't assume that the default bfd that we configured for is the one
that is always active when running a program. We already have access
to the real runtime value, so use it directly. This simplifies the
code quite a bit, and will make it easier to support multiple mach's
in a single binary.
Mike Frysinger [Sun, 6 Nov 2022 15:57:06 +0000 (22:57 +0700)]
sim: hw-config.h: move generation to top-level
In order to compile arch objects from the top-level, we need to
generate the hw-config.h header, so move that logic up to the top
level first.