Ilia Mirkin [Wed, 25 May 2016 00:03:22 +0000 (20:03 -0400)]
docs: add missing GL_OES/EXT_gpu_shader5 enablement note
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ilia Mirkin [Tue, 24 May 2016 23:57:47 +0000 (19:57 -0400)]
glsl: add GL_EXT_clip_cull_distance define, add helpers
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>
Brian Paul [Tue, 24 May 2016 23:44:30 +0000 (17:44 -0600)]
tgsi: print TGSI_PROPERTY_NEXT_SHADER value as string, not an integer
Print "GEOM" instead of "2", for example.
v2: also update the text parsing code, per Ilia.
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Brian Paul [Tue, 24 May 2016 23:44:08 +0000 (17:44 -0600)]
tgsi: s/6/PIPE_SHADER_TYPES/ for tgsi_processor_type_names array size
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Jason Ekstrand [Tue, 24 May 2016 21:17:16 +0000 (14:17 -0700)]
nir/spirv: Handle location decorations on structure members
Jason Ekstrand [Tue, 24 May 2016 20:59:10 +0000 (13:59 -0700)]
nir/spirv: Add explicit handling for all decorations
From time to time we have had cases where glslang has added a decoration we
don't handle and it has caused problems. This audit ensures that, for
every decoration, we either handle it or hit an unreachable() with an
accurate description of why we don't have to.
Jason Ekstrand [Tue, 24 May 2016 23:57:38 +0000 (16:57 -0700)]
i965/draw: Use the correct buffer index for interleaved VBO sizes
The buffer_range_* arrays are indexed by buffer index not element index.
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Jordan Justen [Tue, 24 May 2016 00:34:51 +0000 (17:34 -0700)]
i965/gen7: Fix gl_HelperInvocation
It appears that UV immediates aren't working on Ivy Bridge. In this
case, a signed version will work, and this fixes the piglit
tests/spec/glsl-4.50/execution/helper-invocation.shader_test test.
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Emil Velikov [Thu, 21 Apr 2016 16:29:16 +0000 (17:29 +0100)]
mesa_glinterop: make GL interop version field bidirectional
This allows clear and easy communication between the two.
Caller: Requesting information (struct vN)
Callee: I know how to deal with older version (vN-1) only. Here is your
data and the version I support.
Caller: Older version ? Sure I'll cap all access to the fields provided
by the older version (vN-1)
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Tom Stellard <thomas.stellard@amd.com>
Emil Velikov [Thu, 21 Apr 2016 16:16:49 +0000 (17:16 +0100)]
mesa_glinterop: drop mesa_glinterop_device_info::interop_version
One cannot use a single version to control both export_in and export_out
versions. Using this forces us to always extend/bump both structs at the
same time.
An alternative scheme is coming with next patch.
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Tom Stellard <thomas.stellard@amd.com>
Emil Velikov [Tue, 3 May 2016 10:13:12 +0000 (11:13 +0100)]
st/dri: add note about GL interop version checks
... and make them more explicit.
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Tom Stellard <thomas.stellard@amd.com>
Emil Velikov [Tue, 3 May 2016 10:10:54 +0000 (11:10 +0100)]
mesa_glinterop: rename MESA_GLINTEROP_INVALID_{VALUE,VERSION}
Be more explicit what it actually does.
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Tom Stellard <thomas.stellard@amd.com>
Emil Velikov [Thu, 21 Apr 2016 15:18:39 +0000 (16:18 +0100)]
mesa_glinterop: s/struct_version/version/
OCD polish for consistency with other mesa interfaces.
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Tom Stellard <thomas.stellard@amd.com>
Emil Velikov [Thu, 21 Apr 2016 15:16:07 +0000 (16:16 +0100)]
mesa_glinterop: fix GL interop *_VERSION comments
Using the macro to set the version is wrong and ill-advised. Please don't
do it.
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Tom Stellard <thomas.stellard@amd.com>
Emil Velikov [Tue, 3 May 2016 11:25:53 +0000 (12:25 +0100)]
mesa_glinterop: remove inclusion of EGL header
Analogous to previous commit, but for EGL.
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Tom Stellard <thomas.stellard@amd.com>
Emil Velikov [Tue, 3 May 2016 11:25:34 +0000 (12:25 +0100)]
mesa_glinterop: remove inclusion of GLX header
Since we only need partial information about the GLX symbols we can
forward declare them and drop the include. Obviously each user of the
said API will needs more than what's provides, so they'll include the
GLX header.
If they don't, the compiler will give us a nice warning ;-)
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Tom Stellard <thomas.stellard@amd.com>
Emil Velikov [Tue, 3 May 2016 11:14:26 +0000 (12:14 +0100)]
mesa_glinterop: remove unneeded GLAPI/GLAPIENTRY/APIENTRYP symbols
These come from windows.h, gl.h, glcorearb.h and/or glext.h.
The interop interface is aimed at non-Windows platforms while the macros
are used/derived due to Windows specifics. Thus we can safely remove
them.
Strictly speaking there should be GLXAPIENTRY/EGLAPIENTRY and alike
macros, although a) there is no GLX ones and b) this brings us even
further from decoupling the file from the GLX/EGL header dependency.
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Tom Stellard <thomas.stellard@amd.com>
Emil Velikov [Tue, 3 May 2016 11:13:43 +0000 (12:13 +0100)]
mesa_glinterop: replace GL types with their native counterpart.
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Tom Stellard <thomas.stellard@amd.com>
Emil Velikov [Thu, 21 Apr 2016 15:36:01 +0000 (16:36 +0100)]
mesa_glinterop: use generic variable types for the GL interop
Thus we can preserve the ABI, while avoiding the inclusion of some/all
of the following:
EGL/egl.h
GL/gl.h
GL/glcorearb.h
GLES/gl.h
GLES2/gl2.h
GLES3/gl3.h
GLES3/gl31.h
This will allow us to build/use it alongside any combination of APIs.
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Tom Stellard <thomas.stellard@amd.com>
Emil Velikov [Thu, 21 Apr 2016 15:20:45 +0000 (16:20 +0100)]
mesa_glinterop: use consistent naming scheme for GL interop
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Tom Stellard <thomas.stellard@amd.com>
Emil Velikov [Tue, 24 May 2016 13:21:31 +0000 (14:21 +0100)]
Revert "mesa: Build EGL without X11 headers after interop patchset"
This reverts commit
4e2c9a04354b6b133845b8b93c0c5d34261a91d0.
The solution was incomplete and fragile. An alternative one is coming
shortly.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Tom Stellard <thomas.stellard@amd.com>
Ian Romanick [Tue, 24 May 2016 19:43:18 +0000 (12:43 -0700)]
docs: Note that GL_OES_geometry_shader and GL_OES_tessellation_shader are started
The GL_OES_geometry_shader work is on the oes_shader_io_blocks branch
of idr's fd.o repository.
The GL_OES_tessellation_shader work is on the tess-gles branch
of kwg's fd.o repository.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Emil Velikov [Tue, 24 May 2016 15:23:09 +0000 (16:23 +0100)]
c11/threads: resolve link issues with -O0
Add weak symbol notation for the pthread_mutexattr* symbols, thus making
the linker happy. When building with -O1 or greater the optimiser will
kick in and remove the said functions as they are dead/unreachable code.
Ideally we'll enable the optimisations locally, yet that does not seem
to work atm.
v2: Add the AX_GCC_FUNC_ATTRIBUTE([weak]) hunk in configure.
Cc: Alejandro Piñeiro <apinheiro@igalia.com>
Cc: Ben Widawsky <ben@bwidawsk.net>
Cc: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: Rob Herring <robh@kernel.org>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Tested-by: Rob Clark <robdclark@gmail.com>
Tested-by: Mark Janes <mark.a.janes@intel.com>
Tim Rowley [Fri, 20 May 2016 00:08:53 +0000 (18:08 -0600)]
swr: [rasterizer] remove containers.hpp
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
Tim Rowley [Thu, 19 May 2016 22:23:07 +0000 (16:23 -0600)]
swr: [rasterizer core] remove utility dead code
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
Tim Rowley [Tue, 17 May 2016 23:26:27 +0000 (17:26 -0600)]
swr: [rasterizer core] buckets fixes
1. Don't clear bucket descriptions to fix issues with sim level
buckets getting out of sync.
2. Close out threadviz file descriptors in ClearThreads().
3. Skip buckets for jitter based buckets when multithreaded. We need
thread local storage through llvm jit functions to be fixed before
we can enable this.
4. Fix buckets StopCapture to correctly detect capture complete.
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
Tim Rowley [Tue, 17 May 2016 22:32:08 +0000 (16:32 -0600)]
swr: [rasterizer core] move centroid setup out of CalcCentroidBarycentrics
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
Tim Rowley [Fri, 20 May 2016 16:15:43 +0000 (11:15 -0500)]
swr: [rasterizer jitter] implement InstanceID/VertexID in fetch jit
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
Ian Romanick [Thu, 19 May 2016 01:26:34 +0000 (18:26 -0700)]
mesa: Silence unused parameter warnings
Neither shProg nor name was used. Remove them both.
main/shader_query.cpp:779:53: warning: unused parameter ‘shProg’ [-Wunused-parameter]
program_resource_location(struct gl_shader_program *shProg,
^
main/shader_query.cpp:780:72: warning: unused parameter ‘name’ [-Wunused-parameter]
struct gl_program_resource *res, const char *name,
^
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Ian Romanick [Thu, 19 May 2016 19:06:55 +0000 (12:06 -0700)]
glsl/linker: Silence unused parameter warning
The parameter is required for the interface.
glsl/link_uniforms.cpp:689:61: warning: unused parameter ‘record_type’ [-Wunused-parameter]
bool row_major, const glsl_type *record_type,
^
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Kristian Høgsberg Kristensen [Wed, 27 Apr 2016 22:00:54 +0000 (15:00 -0700)]
dri: Add YVU formats
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Kristian Høgsberg Kristensen [Mon, 2 May 2016 04:25:35 +0000 (21:25 -0700)]
i965: Allow creating planar YUV __DRIimages
Lift the resctriction we had before and allow creation of images with
multiple planes. We still require all the planes to be within the same
bo.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>
Kristian Høgsberg Kristensen [Mon, 2 May 2016 04:22:54 +0000 (21:22 -0700)]
i965: Invoke lowering pass for YUV textures
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Kristian Høgsberg Kristensen [Mon, 2 May 2016 04:20:02 +0000 (21:20 -0700)]
i965: Support textures with multiple planes
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Kristian Høgsberg Kristensen [Mon, 2 May 2016 04:24:00 +0000 (21:24 -0700)]
i965: Create multiple miptrees for planar YUV images
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Kristian Høgsberg Kristensen [Tue, 10 May 2016 05:53:47 +0000 (22:53 -0700)]
i965: Refactor intel_set_texture_image_bo() to create_mt_for_dri_image()
This function now only creates the mt and we then call
intel_set_texture_image_mt() in intel_image_target_texture_2d() to set
it for the texture image.
Reviewed-by: Chad Versace <chad.versace@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Kristian Høgsberg Kristensen [Tue, 10 May 2016 00:02:45 +0000 (17:02 -0700)]
i965: Use intel_set_texture_image_mt() in intelSetTexBuffer2()
Create the mt for the drawable bo directly and call our new
intel_miptree_create_for_bo() helper instead.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>
Kristian Høgsberg Kristensen [Mon, 9 May 2016 23:53:06 +0000 (16:53 -0700)]
i965: Add new intel_set_texture_image_mt() helper
This factors out the work of setting up a miptree as the backing for a
texture image into a new helper.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>
Kristian Høgsberg Kristensen [Mon, 2 May 2016 04:13:37 +0000 (21:13 -0700)]
nir: Add a lowering pass for YUV textures
This lowers sampling from YUV textures to 1) one or more texture
instructions to sample each plane and 2) color space conversion to RGB.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Kristian Høgsberg Kristensen [Tue, 10 May 2016 22:08:38 +0000 (15:08 -0700)]
nir: Handle NULL in nir_copy_deref()
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Kristian Høgsberg Kristensen [Mon, 2 May 2016 04:12:48 +0000 (21:12 -0700)]
nir: Add new 'plane' texture source type
This will be used to select the plane to sample from for planar
textures.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Brian Paul [Mon, 23 May 2016 20:58:02 +0000 (14:58 -0600)]
mesa: log buffer ID numbers in decimal, not hexadecimal
All the other error messages use decimal. Let's be consistent.
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Brian Paul [Mon, 23 May 2016 20:56:38 +0000 (14:56 -0600)]
mesa: use enum name in bind_buffer_object() error message
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Brian Paul [Mon, 23 May 2016 16:28:24 +0000 (10:28 -0600)]
mesa: raise error for glEnable(GL_VERTEX_ARRAY), etc. in core profile
Otherwise, if the call executes normally we'll hit an assertion later
in the VBO code when we draw something. Note that these cases were
already handled correctly for the glIsEnabled() function (and the API
checks were copied from there).
Tested with new piglit gl-3.1-enable-vertex-array test.
v2: fix compat/es mix-up, per Ilia.
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Nicolas Boichat [Tue, 24 May 2016 05:55:20 +0000 (13:55 +0800)]
docs/egl: Android platform can also be build using autotools
We added support for Android build using autotools (configure),
update the documentation to reflect that.
Signed-off-by: Nicolas Boichat <drinkcat@google.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Juan A. Suarez Romero [Fri, 20 May 2016 14:35:52 +0000 (16:35 +0200)]
i965: fix double-precision vertex inputs measurement
For double-precision vertex inputs we need to measure them in dvec4
terms, and for single-precision vertex inputs we need to measure them in
vec4 terms.
For the later case, we use type_size_vec4() function. For the former
case, we had a wrong implementation based on type_size_vec4().
This commit introduces a proper type_size_dvec4() function, that we use
to measure vertex inputs.
Measuring double-precision vertex inputs as dvec4 is required because
ARB_vertex_attrib_64bit states that these uses the same number of
locations than the single-precision version. That is, two consecutives
dvec4 would be located in location "x" and location "x+1", not "x+2".
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Ilia Mirkin [Tue, 24 May 2016 03:04:06 +0000 (23:04 -0400)]
docs: true up nvc0 status - images, etc
Images aren't supported on maxwell, but neither is tessellation. Don't
overly confuse matters by trying to expose those subtleties in the
GL3.txt file/relnotes.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Dave Airlie <airlied@redhat.com>
Ilia Mirkin [Tue, 24 May 2016 03:00:45 +0000 (23:00 -0400)]
st/mesa: enable ARB_ES3_1_compatibility when ES 3.1 would be exposed
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Ilia Mirkin [Tue, 24 May 2016 02:41:23 +0000 (22:41 -0400)]
mesa: remove separate enable for KHR_robust_buffer_access_behavior
This extension appears to be a strict subset of the ARB version. Also
remove it from GL3.txt since it doesn't seem relevant.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Timothy Arceri [Tue, 17 May 2016 01:15:27 +0000 (11:15 +1000)]
glsl: add support for explicit components to frag outputs
V2: fix error checking for arrays and components. V1 was
only taking into account all the array elements and all the
components of one of the varyings during the comparision
and treating the other as a single slot/component.
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Ilia Mirkin [Sun, 8 May 2016 21:21:45 +0000 (17:21 -0400)]
mesa: add view classes for 3d astc formats
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Ilia Mirkin [Tue, 24 May 2016 01:38:38 +0000 (21:38 -0400)]
glsl: add EXT_clip_cull_distance support based on ARB_cull_distance
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Ilia Mirkin [Tue, 17 May 2016 05:30:52 +0000 (01:30 -0400)]
nvc0: expose robust buffer access
We apparently pass all the relevant CTS tests. There are probably some
shortcomings, but they can be addressed down the line.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Jason Ekstrand [Fri, 20 May 2016 23:10:41 +0000 (16:10 -0700)]
i965: Use ISL for surface format introspection
With this, we can delete the surface format table in brw_surface_formats.c
because all of the information we need is now in ISL.
Jason Ekstrand [Fri, 20 May 2016 23:07:04 +0000 (16:07 -0700)]
anv/formats: Use isl_format_supports* for format introspection
Jason Ekstrand [Fri, 20 May 2016 22:42:34 +0000 (15:42 -0700)]
isl: Add per-gen format introspection
This is just a copy-and-paste from brw_surface_formats.c. For the
supports_vertex_fetch function, we do a bit more work so that it properly
handles Bay Trail.
Jason Ekstrand [Fri, 20 May 2016 22:41:57 +0000 (15:41 -0700)]
isl: Add the ISL_FORMAT_R32G32_FLOAT_LD format
Jason Ekstrand [Fri, 20 May 2016 22:41:20 +0000 (15:41 -0700)]
isl: Add support for quering the string name of a format
Jason Ekstrand [Tue, 17 May 2016 20:46:43 +0000 (13:46 -0700)]
i965: Enable ARB/KHR_robust_buffer_access_behavior on BYT and HSW+
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Jason Ekstrand [Fri, 20 May 2016 23:45:31 +0000 (16:45 -0700)]
main: Add extension enable bits for KHR_robust_buffer_access_behavior
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Jason Ekstrand [Wed, 18 May 2016 21:56:19 +0000 (14:56 -0700)]
nir/lower_samplers: Protect against sampler index overflow
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Jason Ekstrand [Thu, 19 May 2016 03:28:07 +0000 (20:28 -0700)]
glsl: Add an option to clamp block indices when lowering UBO/SSBOs
This prevents array overflow when the block is actually an array of UBOs or
SSBOs. On some hardware such as i965, such overflows can cause GPU hangs.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Jason Ekstrand [Thu, 19 May 2016 03:29:59 +0000 (20:29 -0700)]
glsl/linker: Add a helper variable for compiler options
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Jason Ekstrand [Tue, 17 May 2016 22:34:40 +0000 (15:34 -0700)]
i965/draw: Use the real size for index buffers
Previously, we were using the size of the whole BO which may be
substantially larger than the actual index buffer size.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Jason Ekstrand [Tue, 17 May 2016 22:34:07 +0000 (15:34 -0700)]
i965/draw: Use the real size for vertex buffers
Previously, we were using the size of the BO which may be substantially
larger than the actual vertex buffer size.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Jason Ekstrand [Thu, 19 May 2016 21:33:50 +0000 (14:33 -0700)]
i965/draw: Use 3-channel formats for vertex fetch when possible.
For a long time, several of the 3-channel vertex formats didn't exist so we
faked them with 4-channel versions. Starting with Sandy Bridge, we can use
R16G16B16_FLOAT and 8 and 16-bit integer formats become available on
Haswell and Bay Trail.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Jason Ekstrand [Thu, 19 May 2016 22:43:43 +0000 (15:43 -0700)]
i965/surface_formats: Update the VB column for new formats added on BYT
Bay Trail and Haswell added a bunch of new vertex formats. There was also
the addition of 64-bit passthrough formats for BDW+.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Jason Ekstrand [Wed, 18 May 2016 20:05:48 +0000 (13:05 -0700)]
i965/draw: Properly handle rounding when dividing by InstanceDivisor
The old code always divided rounded down and then subtracted 1. What we
wanted was to divide rounded up and then subtract 1 which is equivalent to
subtracting 1 and then dividing rounded down.
Cc: "11.1 11.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Jason Ekstrand [Wed, 18 May 2016 20:05:02 +0000 (13:05 -0700)]
i965/draw: Account for BaseInstance in VBO bounds
Cc: "11.1 11.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Jason Ekstrand [Wed, 18 May 2016 19:28:31 +0000 (12:28 -0700)]
i965/draw: Use worst-case VBO bounds if brw->num_instances == 0
Previously, we only handled the "I don't know what's going on" case for
things with InstanceDivisor == 0. However, in the DrawIndirect case we can
get num_instances == 0 and we don't know what's going on with the instanced
ones either. This commit makes the worst-case bound the default and then
conservatively tightens the bound.
Cc: "11.1 11.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Jason Ekstrand [Wed, 18 May 2016 04:42:49 +0000 (21:42 -0700)]
i965/draw: Delay when we get the bo for vertex buffers
The previous code got the BO the first time we encountered it. However,
this can potentially lead to problems if the BO is used for multiple arrays
with the same buffer object because the range we declare as busy may not be
quite right. By delaying the call to intel_bufferobj_buffer, we can ensure
that we have the full range for the given buffer.
Cc: "11.1 11.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Jason Ekstrand [Wed, 18 May 2016 18:34:44 +0000 (11:34 -0700)]
i965/draw: Stop relying on min_index == -1 for invalid index bounds
The vbo layer passes an index_bounds_valid flag that we should be using
instead. This also fixes a bug when min_index == -1 and basevertex != 0
where we were actually comparing min_index + basevertex == -1 which was
false and we were getting the wrong buffer-sizing path.
Cc: "11.1 11.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Jason Ekstrand [Thu, 19 May 2016 06:47:01 +0000 (23:47 -0700)]
vbo: Declare the index range invalid for DrawTransformFeedback
Right now, we're setting the range to [0, 0] which is obviously bogus.
Instead, we should set it to be invalid like we do for DrawIndirect.
Cc: "11.1 11.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Jason Ekstrand [Wed, 18 May 2016 05:24:59 +0000 (22:24 -0700)]
vbo: Declare the index range invalid for DrawIndirect
Right now, we're just setting the range to [0, MAX_UINT32] which, while
correct isn't helpful. With DrawIndirect, you can't really know what the
actual range is so we may as well flag it as being an invalid range. This
is what we do for draws with index buffer which is similar (the indices
aren't statically known) if a bit simpler.
Cc: "11.1 11.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Ilia Mirkin [Tue, 24 May 2016 01:43:51 +0000 (21:43 -0400)]
mesa/teximage: fix GL_FLOAT in comment
Noticed by Brian. Trivial.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Timothy Arceri [Mon, 23 May 2016 03:07:14 +0000 (13:07 +1000)]
glsl: fix explicit location validation for doubles
Previously we would fail to find a match for the second half of a
dvec4 as 'i' would get incremented to 1 before we added the var to
the array at component 0.
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Dave Airlie [Fri, 13 May 2016 06:11:27 +0000 (16:11 +1000)]
docs: update ARB_cull_distance status.
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Fri, 20 May 2016 01:27:29 +0000 (11:27 +1000)]
st/mesa: reenable culling
Now the lowering pass is fixed, reenable ARB_cull_distance.
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Sun, 15 May 2016 22:57:45 +0000 (08:57 +1000)]
i965: reenable ARB_cull_distance.
Now the lowering pass is fixed we can reenable culling.
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Sun, 15 May 2016 22:47:32 +0000 (08:47 +1000)]
glsl: rewrite clip/cull distance lowering pass
The last version of this broke clipping, and I had to spend
sometime getting this working properly.
I had to introduce a third pass to count the clip/cull totals,
all due to one messy corner case. We have a piglit test
tes-input-gl_ClipDistance.shader_test
that doesn't actually output the clip distances, it just passes
them like a varying from TCS->TES, the older lowering pass worked
but to lower clip/cull we need to know the total number of clip+culls
used to defined the new variable correctly, and to offset culls
properly.
This adds an extra pass that works out the sizes for clip/cull,
then lowers gl_ClipDistance then gl_CullDistance into the new
gl_ClipDistanceMESA.
The pass checks using the fixed array sizes code if they array
has been referenced, or is actually never used, and ignores
it in the latter case.
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Fri, 20 May 2016 00:19:14 +0000 (10:19 +1000)]
glsl: make max array trackers ints and use -1 as base. (v2)
This fixes a bug that breaks cull distances. The problem
is the max array accessors can't tell the difference between
an never accessed unsized array and an accessed at location 0
unsized array. This leads to converting an undeclared unused
gl_ClipDistance inside or outside gl_PerVertex to a size 1
array. However we need to the number of active clip distances
to work out the starting point for the cull distances, and
this offset by one when it's not being used isn't possible
to distinguish from the case were only the first element is
accessed. I tried to use ->used for this, but that doesn't
work when gl_ClipDistance is part of an interface block.
So this changes things so that max_array_access is an int
and initialised to -1. This also allows unsized arrays to
proceed further than that could before, but we really shouldn't
mind as they will get eliminated if nothing uses them later.
For initialised uniforms we no longer change their array
size at runtime, if these are unused they will get eliminated
eventually.
v2: use ralloc_array (Ilia)
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Nanley Chery [Tue, 3 May 2016 17:08:44 +0000 (10:08 -0700)]
anv/formats: Make alpha blending a property of render targets
In agreement with the SNB PRM, alpha blending is a property that render
targets may or may not support.
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Nanley Chery [Tue, 3 May 2016 17:06:29 +0000 (10:06 -0700)]
i965: Unset alpha blend for R10G10B10_SNORM_A2_UNORM
This format does not support alpha blending, according to the SNB PRM.
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Dave Airlie [Mon, 23 May 2016 23:52:10 +0000 (09:52 +1000)]
i965: deindent blorp code.
gcc6 warns about this.
Acked-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Mon, 23 May 2016 23:31:30 +0000 (09:31 +1000)]
glsl: reindent line in ast_function.cpp
This fixes a warning with gcc -Wmisleading-indentation.
Acked-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Ilia Mirkin [Sun, 22 May 2016 00:26:47 +0000 (20:26 -0400)]
mesa: allow GL_FRAMEBUFFER_DEFAULT_LAYERS to be queried with ES geometry
When we have the geometry extensions, enable querying of the new param.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Ilia Mirkin [Sat, 21 May 2016 23:43:42 +0000 (19:43 -0400)]
mesa: allow xfb to be active in GLES when geometry shader is enabled.
OES_geometry_shader has wording to allow xfb when using Draw*Indirect
and DrawElements.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Ilia Mirkin [Sun, 22 May 2016 20:09:53 +0000 (16:09 -0400)]
main: check driver float texture support before upgrading to 16F/32F
When passing in GL_RGBA or other base formats, we will try to upgrade
the format to whatever the passed in type was. However not all drivers
(notably nv30) support 32F textures, and so this would lead to crashes
down the line. Only upgrade when the relevant extensions are available.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Ilia Mirkin [Sun, 22 May 2016 20:50:27 +0000 (16:50 -0400)]
st/mesa: update inst->info along with inst->op
Otherwise we still have TGSI_OPCODE_CMP's info, which causes a number of
later logic to go wrong. This fixes
dEQP-GLES2.functional.shaders.functions.control_flow.return_in_if_vertex
on nv30.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Bas Nieuwenhuizen [Wed, 20 Apr 2016 13:42:01 +0000 (15:42 +0200)]
glsl: Use correct mode for split components.
The mode should stay the same as the original struct. In
particular, shared should not be changed to temporary.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Kenneth Graunke [Sat, 21 May 2016 03:59:33 +0000 (20:59 -0700)]
mesa: Implement glGet*(GL_PRIMITIVE_RESTART_FOR_PATCHES_SUPPORTED).
Technically, this was introduced with GL 4.4. However, I believe it
was intended to be retroactive. As far as I know, AMD has never
supported primitive restart with patches, while NVidia and Intel do.
This necessitated the need for a query which would allow applications
to figure out whether this was usable or not.
I decided to expose it everywhere ARB_tessellation_shader is exposed.
(It's also in both OES and EXT_tessellation_shader.)
Enable this for i965 and Gallium drivers which expose the capability.
v2: Fix a bug in the state_tracker code (caught by Ilia Mirkin).
Bugzilla: https://cvs.khronos.org/bugzilla/show_bug.cgi?id=10364
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Kenneth Graunke [Sat, 21 May 2016 04:05:34 +0000 (21:05 -0700)]
gallium: Add a pipe cap for whether primitive restart works for patches.
Some hardware supports primitive restart on patch primitives, and other
hardware does not. Modern GL and ES include a query for this feature;
adding a capability bit will allow us to answer it.
As far as I know, AMD hardware does not support this feature, while
NVIDIA and Intel hardware does. However, most Gallium drivers do not
appear to support tessellation shaders yet. So, I've enabled it for
nvc0 and disabled it everywhere else.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Francisco Jerez [Mon, 23 May 2016 21:07:23 +0000 (14:07 -0700)]
i965/fs: Mark UBO uniform pull constant loads as force_writemask_all.
This lets the rest of the backend know that the uniform pull constant
load opcodes don't respect channel enables -- Without this the
register allocator has no way to know that the return payload of a
pull constant load is not per-channel and spills of the destination
will be broken under non-uniform control flow.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Francisco Jerez [Wed, 27 Apr 2016 09:07:08 +0000 (02:07 -0700)]
i965/fs: Allow spilling of non-contiguous registers.
This should be working fine now.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94997
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Francisco Jerez [Mon, 16 May 2016 08:03:43 +0000 (01:03 -0700)]
i965/fs: Calculate the (un)spill block size correctly.
Currently the spilling code attempts to guess the scratch message
block size from the dispatch width of the shader, which is plain wrong
for SIMD-lowered instructions (frequently but not exclusively
encountered in SIMD32 shaders) or for instructions with register
region data types of size other than 32 bit.
Instead try to use the SIMD component size of the instruction which in
some cases will allow the dataport to apply the correct channel mask
to the scratch data read or written. In the spill case the block size
needs to be clamped to the number of MRF registers reserved for
spilling. In the unspill case I didn't even bother because we
currently have no 100% accurate way to determine whether a source
region is per-channel or whether it contains things like headers that
don't respect channel boundaries -- That's fine, because the unspill
is marked force_writemask_all we can just use the largest allowable
scratch message size.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Francisco Jerez [Mon, 16 May 2016 08:23:44 +0000 (01:23 -0700)]
i965/fs: Set exec_all on spills not matching the channel layout of the instruction.
This prevents the application of an incorrect channel mask by the
scratch write instruction for spilled variables that don't have an
exact one-to-one correspondence between channels of the variable and
32-bit components of the scratch write instruction.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Francisco Jerez [Mon, 16 May 2016 07:59:37 +0000 (00:59 -0700)]
i965/fs: Set exec_all on unspills.
This makes sure that unspills restore the exact contents of the
variable in scratch space into the GRF without applying channel
masking, which is incorrect under control flow for things like message
headers or vectors of heterogeneous types that don't properly respect
channel boundaries.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Francisco Jerez [Mon, 16 May 2016 05:59:04 +0000 (22:59 -0700)]
i965/fs: Move scratch block size calculation into the caller of emit_(un)spill.
This makes emit_(un)spill even more stupid by removing the logic that
decides what execution size each scratch read or write send message
should have and instead relying on the caller to specify an
appropriate execution size via the builder argument. This makes sense
because the caller will need to act differently based on the scratch
message width (e.g. emit an additional unspill before the instruction
if the execution width and channel layout of the spill doesn't match
the instruction's).
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Francisco Jerez [Mon, 16 May 2016 03:30:06 +0000 (20:30 -0700)]
i965/fs: Make emit_spill/unspill static functions taking builder as argument.
This seems cleaner than exposing an implementation detail of
brw_fs_reg_allocate.cpp to the world, and will give the caller control
over the instruction execution flags (e.g. force_writemask_all) that
are applied to the scratch read and write instructions.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Francisco Jerez [Sun, 15 May 2016 23:52:49 +0000 (16:52 -0700)]
i965/fs: Apply execution controls from the instruction to scratch messages.
Until now the execution controls (e.g. channel group,
force_writemask_all, exec_size) of the instruction had been completely
ignored by spilling, even though that can lead to a mismatch between
the channel mask applied to the contents of the (un)spilled memory and
the GRF source or destination of the instruction. In some cases we'll
actually want the (un)spill messages to be marked force_writemask_all
regardless of whether the instruction has it set, but that will have
to be handled specially by the caller.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>