Paul Thomas [Fri, 15 Sep 2017 07:26:14 +0000 (07:26 +0000)]
re PR fortran/82184 (187.facerec in SPEC CPU 2000 miscompares)
2017-09-15 Paul Thomas <pault@gcc.gnu.org>
PR fortran/82184
trans-decl.c (gfc_trans_deferred_vars): Do not null the 'span'
field if the symbol is either implicitly or explicitly saved.
2017-09-15 Paul Thomas <pault@gcc.gnu.org>
PR fortran/82184
* gfortran.dg/pointer_array_9.f90: New test.
From-SVN: r252781
Richard Biener [Fri, 15 Sep 2017 07:03:02 +0000 (07:03 +0000)]
re PR tree-optimization/68823 ([graphite] tramp3d-v4 compiled with -floop-nest-optimize crashes)
2017-09-15 Richard Biener <rguenther@suse.de>
PR tree-optimization/68823
* graphite-scop-detection.c (build_alias_set): If we have a
possible dependence check whether we can handle them by just
looking at the DRs DR_ACCESS_FNs.
(build_scops): If build_alias_set fails, fail the SCOP.
From-SVN: r252780
GCC Administrator [Fri, 15 Sep 2017 00:16:17 +0000 (00:16 +0000)]
Daily bump.
From-SVN: r252779
Tom de Vries [Thu, 14 Sep 2017 21:15:40 +0000 (21:15 +0000)]
Introduce libgomp/testsuite/libgomp.c-c++-common
2017-09-14 Tom de Vries <tom@codesourcery.com>
* testsuite/libgomp.c++/cancel-taskgroup-1.C: Remove.
* testsuite/libgomp.c/cancel-taskgroup-1.c: Move to ...
* testsuite/libgomp.c-c++-common/cancel-taskgroup-1.c: ... here.
* testsuite/libgomp.c/c.exp: Include test-cases from
libgomp.c-c++-common.
* testsuite/libgomp.c++/c++.exp: Same. Force c++-mode compilation of .c
files.
From-SVN: r252775
Michael Meissner [Thu, 14 Sep 2017 20:44:40 +0000 (20:44 +0000)]
rs6000-builtin.def (BU_FLOAT128_1_HW): New macros to support float128 built-in functions that require the ISA 3.0 hardware.
[gcc]
2017-09-14 Michael Meissner <meissner@linux.vnet.ibm.com>
* config/rs6000/rs6000-builtin.def (BU_FLOAT128_1_HW): New macros
to support float128 built-in functions that require the ISA 3.0
hardware.
(BU_FLOAT128_3_HW): Likewise.
(SQRTF128): Add support for the IEEE 128-bit square root and fma
built-in functions.
(FMAF128): Likewise.
(FMAQ): Likewise.
* config/rs6000/rs6000.c (rs6000_builtin_mask_calculate): Add
support for built-in functions that need the ISA 3.0 IEEE 128-bit
floating point instructions.
(rs6000_invalid_builtin): Likewise.
(rs6000_builtin_mask_names): Likewise.
* config/rs6000/rs6000.h (MASK_FLOAT128_HW): Likewise.
(RS6000_BTM_FLOAT128_HW): Likewise.
(RS6000_BTM_COMMON): Likewise.
* config/rs6000/rs6000.md (fma<mode>4_hw): Add a generator
function.
* doc/extend.texi (RS/6000 built-in functions): Document the
IEEE 128-bit floating point square root and fused multiply-add
built-in functions.
[gcc/testsuite]
2017-09-14 Michael Meissner <meissner@linux.vnet.ibm.com>
* gcc.target/powerpc/abs128-1.c: Use __builtin_fabsf128 instead of
__builtin_fabsq.
* gcc.target/powerpc/float128-5.c: Use __builtin_fabsf128 instead
of __builtin_fabsq. Prevent the test from running on 32-bit.
* gcc.target/powerpc/float128-fma1.c: New test.
* gcc.target/powerpc/float128-fma2.c: Likewise.
* gcc.target/powerpc/float128-sqrt1.c: Likewise.
* gcc.target/powerpc/float128-sqrt2.c: Likewise.
From-SVN: r252771
Jakub Jelinek [Thu, 14 Sep 2017 20:18:17 +0000 (22:18 +0200)]
re PR c++/81314 (Undefined reference to a function with -fopenmp)
PR c++/81314
* cp-gimplify.c (omp_var_to_track): Look through references.
(omp_cxx_notice_variable): Likewise.
* testsuite/libgomp.c++/pr81314.C: New test.
From-SVN: r252770
David Malcolm [Thu, 14 Sep 2017 19:30:26 +0000 (19:30 +0000)]
Fix crash accessing builtins in sanitizer.def and after (PR jit/82174)
Calls to gcc_jit_context_get_builtin_function that accessed builtins
in sanitizer.def and after (or failed to match any builtin) led to
a crash accessing a NULL builtin name.
The entries with the NULL name came from these lines in sanitizer.def:
/* This has to come before all the sanitizer builtins. */
DEF_BUILTIN_STUB(BEGIN_SANITIZER_BUILTINS, (const char *)0)
[...snip...]
/* This has to come after all the sanitizer builtins. */
DEF_BUILTIN_STUB(END_SANITIZER_BUILTINS, (const char *)0)
This patch updates jit-builtins.c to cope with such entries, fixing the
crash.
gcc/jit/ChangeLog:
PR jit/82174
* jit-builtins.c (matches_builtin): Ignore entries with a NULL
name.
gcc/testsuite/ChangeLog:
PR jit/82174
* jit.dg/test-error-gcc_jit_context_get_builtin_function-unknown-builtin.c:
New test case.
From-SVN: r252769
Pat Haugen [Thu, 14 Sep 2017 18:29:44 +0000 (18:29 +0000)]
rs6000.c (rs6000_set_up_by_prologue): Make sure the TOC reg (r2) isn't in the set of registers defined in the prologue.
* config/rs6000/rs6000.c (rs6000_set_up_by_prologue): Make sure the TOC
reg (r2) isn't in the set of registers defined in the prologue.
* gcc.target/powerpc/r2_shrink-wrap.c: New.
From-SVN: r252768
Ian Lance Taylor [Thu, 14 Sep 2017 17:11:35 +0000 (17:11 +0000)]
libgo: update to go1.9
Reviewed-on: https://go-review.googlesource.com/63753
From-SVN: r252767
Richard Sandiford [Thu, 14 Sep 2017 16:35:39 +0000 (16:35 +0000)]
Add LOOP_VINFO_MAX_VECT_FACTOR
Epilogue vectorisation uses the vectorisation factor of the main loop
as the maximum vectorisation factor allowed for correctness. That makes
sense as a conservatively correct value, since the chosen vectorisation
factor will be strictly less than that anyway. However, once the VF
itself becomes variable, it's easier to carry across the original
maximum VF instead.
2017-09-14 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* tree-vectorizer.h (_loop_vec_info): Add max_vectorization_factor.
(LOOP_VINFO_MAX_VECT_FACTOR): New macro.
(LOOP_VINFO_ORIG_VECT_FACTOR): Replace with...
(LOOP_VINFO_ORIG_MAX_VECT_FACTOR): ...this new macro.
* tree-vect-data-refs.c (vect_analyze_data_ref_dependences): Update
accordingly.
* tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
max_vectorization_factor.
(vect_analyze_loop_2): Set LOOP_VINFO_MAX_VECT_FACTOR.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r252766
Richard Sandiford [Thu, 14 Sep 2017 16:30:54 +0000 (16:30 +0000)]
Add a vect_worthwhile_without_simd_p helper routine
The vectoriser sometimes considers lowering "vector" operations into N
scalar word operations. This N needs to be fixed at compile time, so
the condition guarding it needs to change when variable-lengh vectors
are added. This patch puts the condition into a helper routine so that
there's only one place to update.
2017-09-14 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* tree-vectorizer.h (vect_min_worthwhile_factor): Delete.
(vect_worthwhile_without_simd_p): Declare.
* tree-vect-loop.c (vect_worthwhile_without_simd_p): New function.
(vectorizable_reduction): Use it.
* tree-vect-stmts.c (vectorizable_shift): Likewise.
(vectorizable_operation): Likewise.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r252765
Richard Sandiford [Thu, 14 Sep 2017 16:30:36 +0000 (16:30 +0000)]
Add a vect_get_num_copies helper routine
This patch adds a vectoriser helper routine to calculate how
many copies of a vector statement we need. At present this
is always:
LOOP_VINFO_VECT_FACTOR (loop_vinfo) / TYPE_VECTOR_SUBPARTS (vectype)
but later patches add other cases. Another benefit of using
a helper routine is that it can assert that the division is
exact (which it must be).
2017-09-14 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* tree-vectorizer.h (vect_get_num_copies): New function.
* tree-vect-data-refs.c (vect_get_data_access_cost): Use it.
* tree-vect-loop.c (vectorizable_reduction): Likewise.
(vectorizable_induction): Likewise.
(vectorizable_live_operation): Likewise.
* tree-vect-stmts.c (vectorizable_mask_load_store): Likewise.
(vectorizable_bswap): Likewise.
(vectorizable_call): Likewise.
(vectorizable_conversion): Likewise.
(vectorizable_assignment): Likewise.
(vectorizable_shift): Likewise.
(vectorizable_operation): Likewise.
(vectorizable_store): Likewise.
(vectorizable_load): Likewise.
(vectorizable_condition): Likewise.
(vectorizable_comparison): Likewise.
(vect_analyze_stmt): Pass the slp node to vectorizable_live_operation.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r252764
Richard Sandiford [Thu, 14 Sep 2017 16:24:31 +0000 (16:24 +0000)]
Make more use of gimple-fold.h in tree-vect-loop.c
This patch makes the vectoriser use the gimple-fold.h routines
in more cases, instead of vect_init_vector. Later patches want
to use the same interface to handle variable-length vectors.
2017-09-14 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* tree-vect-loop.c (vectorizable_induction): Use gimple_build instead
of vect_init_vector.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r252763
Richard Sandiford [Thu, 14 Sep 2017 16:18:55 +0000 (16:18 +0000)]
Add gimple_build_vector* helpers
This patch adds gimple-fold.h equivalents of build_vector and
build_vector_from_val. Like the other gimple-fold.h routines
they always return a valid gimple value and add any new
statements to a given gimple_seq. In combination with later
patches this reduces the number of force_gimple_operands.
2017-09-14 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* gimple-fold.h (gimple_build_vector_from_val): Declare, and provide
an inline wrapper that provides a location.
(gimple_build_vector): Likewise.
* gimple-fold.c (gimple_build_vector_from_val): New function.
(gimple_build_vector): Likewise.
* tree-vect-loop.c (get_initial_def_for_reduction): Use the new
functions to build the initial value. Always return a gimple value.
(get_initial_defs_for_reduction): Likewise. Only compute
neutral_vec once.
(vect_create_epilog_for_reduction): Don't call force_gimple_operand or
vect_init_vector on the results from get_initial_def(s)_for_reduction.
(vectorizable_induction): Use gimple_build_vector rather than
vect_init_vector.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r252762
Richard Sandiford [Thu, 14 Sep 2017 16:04:32 +0000 (16:04 +0000)]
Use vec<> for constant permute masks
This patch makes can_vec_perm_p & co. take a vec<>, wrapped in new
typedefs vec_perm_indices and auto_vec_perm_indices. There are two
reasons for doing this for SVE:
(1) it means that the number of elements is bundled with the elements
themselves, and is obviously constant.
(2) it makes it easier to change the "unsigned char" element type to
something wider.
Changing the target hook is left as follow-on work.
2017-09-14 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* target.h (vec_perm_indices): New typedef.
(auto_vec_perm_indices): Likewise.
* optabs-query.h: Include target.h
(can_vec_perm_p): Take a vec_perm_indices *.
* optabs-query.c (can_vec_perm_p): Likewise.
(can_mult_highpart_p): Update accordingly. Use auto_vec_perm_indices.
* tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
* tree-vect-generic.c (lower_vec_perm): Likewise.
* tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
(vect_grouped_load_supported): Likewise.
(vect_shift_permute_load_chain): Likewise.
(vect_permute_store_chain): Use auto_vec_perm_indices.
(vect_permute_load_chain): Likewise.
* fold-const.c (fold_vec_perm): Take vec_perm_indices.
(fold_ternary_loc): Update accordingly. Use auto_vec_perm_indices.
Update uses of can_vec_perm_p.
* tree-vect-loop.c (calc_vec_perm_mask_for_shift): Replace the
mode with a number of elements. Take a vec_perm_indices *.
(vect_create_epilog_for_reduction): Update accordingly.
Use auto_vec_perm_indices.
(have_whole_vector_shift): Likewise. Update call to can_vec_perm_p.
* tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
(vect_transform_slp_perm_load): Likewise.
(vect_schedule_slp_instance): Use auto_vec_perm_indices.
* tree-vectorizer.h (vect_gen_perm_mask_any): Take a vec_perm_indices.
(vect_gen_perm_mask_checked): Likewise.
* tree-vect-stmts.c (vect_gen_perm_mask_any): Take a vec_perm_indices.
(vect_gen_perm_mask_checked): Likewise.
(vectorizable_mask_load_store): Use auto_vec_perm_indices.
(vectorizable_store): Likewise.
(vectorizable_load): Likewise.
(perm_mask_for_reverse): Likewise. Update call to can_vec_perm_p.
(vectorizable_bswap): Likewise.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r252761
Richard Sandiford [Thu, 14 Sep 2017 15:46:08 +0000 (15:46 +0000)]
Use vec<> in build_vector
This patch makes build_vector take the elements as a vec<> rather
than a tree *. This is useful for SVE because it bundles the number
of elements with the elements themselves, and enforces the fact that
the number is constant. Also, I think things like the folds can be used
with any generic GNU vector, not just those that match machine vectors,
so the arguments to XALLOCAVEC had no clear limit.
2017-09-14 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* tree.h (build_vector): Take a vec<tree> instead of a tree *.
* tree.c (build_vector): Likewise.
(build_vector_from_ctor): Update accordingly.
(build_vector_from_val): Likewise.
* gimple-fold.c (gimple_fold_stmt_to_constant_1): Likewise.
* tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
* tree-vect-generic.c (add_rshift): Likewise.
(expand_vector_divmod): Likewise.
(optimize_vector_constructor): Likewise.
* tree-vect-slp.c (vect_get_constant_vectors): Likewise.
(vect_transform_slp_perm_load): Likewise.
(vect_schedule_slp_instance): Likewise.
* tree-vect-stmts.c (vectorizable_bswap): Likewise.
(vectorizable_call): Likewise.
(vect_gen_perm_mask_any): Likewise. Add elements in order.
* expmed.c (make_tree): Likewise.
* fold-const.c (fold_negate_expr_1): Use auto_vec<tree> when building
a vector passed to build_vector.
(fold_convert_const): Likewise.
(exact_inverse): Likewise.
(fold_ternary_loc): Likewise.
(fold_relational_const): Likewise.
(const_binop): Likewise. Use VECTOR_CST_ELT directly when operating
on VECTOR_CSTs, rather than going through vec_cst_ctor_to_array.
(const_unop): Likewise. Store the reduction accumulator in a
variable rather than an array.
(vec_cst_ctor_to_array): Take the number of elements as a parameter.
(fold_vec_perm): Update calls accordingly. Use auto_vec<tree> for
the new vector, rather than constructing it after the input arrays.
(native_interpret_vector): Use auto_vec<tree> when building
a vector passed to build_vector. Add elements in order.
* tree-vect-loop.c (get_initial_defs_for_reduction): Use
auto_vec<tree> when building a vector passed to build_vector.
(vect_create_epilog_for_reduction): Likewise.
(vectorizable_induction): Likewise.
(get_initial_def_for_reduction): Likewise. Fix indentation of
case statements.
* config/sparc/sparc.c (sparc_handle_vis_mul8x16): Change n_elts
to a vec<tree> *.
(sparc_fold_builtin): Use auto_vec<tree> when building a vector
passed to build_vector.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r252760
Richard Sandiford [Thu, 14 Sep 2017 15:25:57 +0000 (15:25 +0000)]
Store VECTOR_CST_NELTS directly in tree_node
Previously VECTOR_CST_NELTS (t) read the number of elements from
TYPE_VECTOR_SUBPARTS (TREE_TYPE (t)). There were two ways of handling
this with variable TYPE_VECTOR_SUBPARTS: either forcibly convert the
number to a constant (which is doable) or store the number directly
in the VECTOR_CST. The latter seemed better, since it involves less
pointer chasing and since the tree_node u field is otherwise unused
for VECTOR_CST. It would still be easy to switch to the former in
future if we need to free up the field for someting else.
The patch also changes various bits of VECTOR_CST code to use
VECTOR_CST_NELTS instead of TYPE_VECTOR_SUBPARTS when iterating
over VECTOR_CST_ELTs. Also, when the two are checked for equality,
the patch prefers to read VECTOR_CST_NELTS (which must be constant)
and check against TYPE_VECTOR_SUBPARTS, instead of the other way
around.
2017-09-14 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* tree-core.h (tree_base::u): Add an "nelts" field.
(tree_vector): Use VECTOR_CST_NELTS as the length.
* tree.c (tree_size): Likewise.
(make_vector): Initialize VECTOR_CST_NELTS.
* tree.h (VECTOR_CST_NELTS): Use the u.nelts field.
* cfgexpand.c (expand_debug_expr): Use VECTOR_CST_NELTS instead of
TYPE_VECTOR_SUBPARTS.
* expr.c (const_vector_mask_from_tree): Consistently use "units"
as the number of units, setting it from VECTOR_CST_NELTS.
(const_vector_from_tree): Likewise.
* fold-const.c (negate_expr_p): Use VECTOR_CST_NELTS instead of
TYPE_VECTOR_SUBPARTS for the number of elements in a VECTOR_CST.
(fold_negate_expr_1): Likewise.
(fold_convert_const): Likewise.
(const_binop): Likewise. Differentiate the number of output and
input elements.
(const_unop): Likewise.
(fold_ternary_loc): Use VECTOR_CST_NELTS for the number of elements
in a VECTOR_CST, asserting that it is the same as TYPE_VECTOR_SUBPARTS
in cases that did the opposite.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r252758
Will Schmidt [Thu, 14 Sep 2017 13:56:05 +0000 (13:56 +0000)]
fold-vec-ld-longlong.c: Add lp64 requirement.
[gcc/testsuite]
2017-09-14 Will Schmidt <will_schmidt@vnet.ibm.com>
* gcc.target/powerpc/fold-vec-ld-longlong.c: Add lp64 requirement.
From-SVN: r252757
Richard Biener [Thu, 14 Sep 2017 11:57:08 +0000 (11:57 +0000)]
tree-ssa-sccvn.c (visit_phi): Merge undefined values similar to VN_TOP.
2017-09-14 Richard Biener <rguenther@suse.de>
* tree-ssa-sccvn.c (visit_phi): Merge undefined values similar
to VN_TOP.
* gcc.dg/tree-ssa/ssa-fre-59.c: New testcase.
* gcc.dg/uninit-suppress_2.c: Adjust.
* gcc.dg/tree-ssa/ssa-sccvn-2.c: Likewise.
From-SVN: r252756
Rainer Orth [Thu, 14 Sep 2017 09:20:18 +0000 (09:20 +0000)]
Don't xfail gcc.dg/vect/vect-multitypes-12.c on 32-bit SPARC (PR tree-optimization/80996)
PR tree-optimization/80996
* gcc.dg/vect/vect-multitypes-12.c: Remove sparc*-*-* handling.
From-SVN: r252754
Eric Botcazou [Thu, 14 Sep 2017 08:33:20 +0000 (08:33 +0000)]
* dwarf2out.c (dwarf2out_source_line): Remove superfluous test.
From-SVN: r252753
Jakub Jelinek [Thu, 14 Sep 2017 08:07:30 +0000 (10:07 +0200)]
re PR target/81325 (-fcompare-debug failure on ppc64le)
PR target/81325
* cfgbuild.c (find_bb_boundaries): Ignore debug insns in decisions
if and where to split a bb, except for splitting before debug insn
sequences followed by non-label real insn. Delete debug insns
in between basic blocks.
* g++.dg/cpp0x/pr81325.C: New test.
From-SVN: r252752
Jakub Jelinek [Thu, 14 Sep 2017 08:05:42 +0000 (10:05 +0200)]
* combine.c (make_compound_operation_int): Formatting fixes.
From-SVN: r252751
Jakub Jelinek [Thu, 14 Sep 2017 07:56:23 +0000 (09:56 +0200)]
elf.h (LINK_EH_SPEC): Add -static-pie support.
* config/alpha/elf.h (LINK_EH_SPEC): Add -static-pie support.
* config/alpha/linux.h (LINK_GCC_C_SEQUENCE_SPEC): Likewise.
* config/netbsd.h (LINK_EH_SPEC): Likewise.
* config/sol2.h (LINK_EH_SPEC): Likewise.
* config/arm/uclinux-elf.h (LINK_GCC_C_SEQUENCE_SPEC): Likewise.
* config/s390/linux.h (LINK_SPEC): Likewise.
* config/freebsd.h (LINK_EH_SPEC): Likewise.
* config/openbsd.h (LINK_EH_SPEC): Likewise.
* config/lm32/uclinux-elf.h (LINK_GCC_C_SEQUENCE_SPEC): Likewise.
* config/aarch64/aarch64-linux.h (LINUX_TARGET_LINK_SPEC): Likewise.
* config/powerpcspe/sysv4.h (LINK_EH_SPEC): Likewise.
* config/bfin/linux.h (LINK_GCC_C_SEQUENCE_SPEC): Likewise.
* config/i386/gnu-user64.h (GNU_USER_TARGET_LINK_SPEC): Fix a typo.
* config/i386/gnu-user.h (GNU_USER_TARGET_LINK_SPEC): Formatting fix.
From-SVN: r252750
Ian Lance Taylor [Thu, 14 Sep 2017 03:57:18 +0000 (03:57 +0000)]
compiler, runtime: simplify select and channel operations
In preparation for upgrading libgo to the 1.9 release, this
approximately incorporates https://golang.org/cl/37661 and
https://golang.org/cl/38351.
CL 37661 changed the gc compiler such that the select statement simply
returns an integer which is then used as the argument for a switch.
Since gccgo already worked that way, this just adjusts the switch code
to look like the gc switch code by removing the explicit case index
expression and calculating it from the order of calls to selectsend,
selectrecv, and selectdefault.
CL 38351 simplifies the channel code by not passing the unused channel
type descriptor pointer.
Reviewed-on: https://go-review.googlesource.com/62730
From-SVN: r252749
Ian Lance Taylor [Thu, 14 Sep 2017 03:53:21 +0000 (03:53 +0000)]
compiler: avoid compiler crash on invalid program
I encountered this crash while working on upgrading libgo to the 1.9
release. I no longer have the cause of the crash, but it doesn't much
matter, as the policy for crash-on-invalid errors is to fix the crash
but not bother to commit the invalid test case.
Reviewed-on: https://go-review.googlesource.com/62750
From-SVN: r252748
Ian Lance Taylor [Thu, 14 Sep 2017 03:51:21 +0000 (03:51 +0000)]
compiler: emit type specific functions for aliases
If we have an alias for a struct or array that requires a
type-specific function, don't emit the function with the alias name.
Emit it with the struct/array as usual.
Test case is https://golang.org/cl/62531.
Reviewed-on: https://go-review.googlesource.com/62412
From-SVN: r252747
Ian Lance Taylor [Thu, 14 Sep 2017 03:48:51 +0000 (03:48 +0000)]
compiler, reflect: fix struct field names for embedded aliases
This adds much of https://golang.org/cl/35731 and
https://golang.org/cl/35732 to the gofrontend code.
This is a step toward updating libgo to the 1.9 release. The
gofrontend already supports type aliases, and this is required for
correct support of type aliases when used as embedded fields.
The change to expressions.cc is to handle the << 1, used for the
newly renamed offsetAnon field, in the constant context used for type
descriptor initialization.
Reviewed-on: https://go-review.googlesource.com/62710
From-SVN: r252746
Ian Lance Taylor [Thu, 14 Sep 2017 03:45:44 +0000 (03:45 +0000)]
compiler: fix check for notinheap conversion
A normal pointer may not be converted to a notinheap pointer. We were
erroneously permitting a conversion from a normal pointer to a
notinheap unsafe.Pointer, which is useless since unsafe.Pointer is not
marked notinheap. Correct the test to permit a conversion from
unsafe.Pointer to a notinheap pointer, which is the same test that the
gc compiler uses.
The test case for this is in the 1.9 runtime package.
Reviewed-on: https://go-review.googlesource.com/62731
From-SVN: r252745
GCC Administrator [Thu, 14 Sep 2017 00:16:21 +0000 (00:16 +0000)]
Daily bump.
From-SVN: r252744
Jakub Jelinek [Wed, 13 Sep 2017 21:22:33 +0000 (23:22 +0200)]
sysv4.h (STARTFILE_LINUX_SPEC): Add -static-pie support.
* config/rs6000/sysv4.h (STARTFILE_LINUX_SPEC): Add -static-pie
support.
(ENDFILE_LINUX_SPEC): Likewise.
(LINK_EH_SPEC): Likewise.
* config/rs6000/linux64.h (LINK_SHLIB_SPEC): Likewise.
(LINK_OS_LINUX_SPEC32): Likewise.
(LINK_OS_LINUX_SPEC64): Likewise.
* config/rs6000/linux.h (LINK_SHLIB_SPEC): Likewise.
(LINK_OS_LINUX_SPEC): Likewise.
From-SVN: r252735
Paul Thomas [Wed, 13 Sep 2017 21:15:26 +0000 (21:15 +0000)]
re PR fortran/82173 ([meta-bug] Parameterized derived type errors)
2017-09-13 Paul Thomas <pault@gcc.gnu.org>
PR fortran/82173
* decl.c (match_char_kind): If the kind expression is
parameterized, save it in saved_kind_expr and set kind = 0.
(gfc_get_pdt_instance): Resolve and simplify before emitting
error on expression kind. Insert a missing simplification after
insertion of kind expressions.
2017-09-13 Paul Thomas <pault@gcc.gnu.org>
PR fortran/82173
* gfortran.dg/pdt_10.f03 : New test.
From-SVN: r252734
Paolo Carlini [Wed, 13 Sep 2017 19:22:55 +0000 (19:22 +0000)]
re PR c++/68177 (Lambda capture doesn't work correctly when lambda is used in a pack expansion)
2017-09-13 Paolo Carlini <paolo.carlini@oracle.com>
PR c++/68177
* g++.dg/cpp0x/lambda/lambda-68177.C: New.
From-SVN: r252732
Martin Liska [Wed, 13 Sep 2017 19:12:08 +0000 (21:12 +0200)]
Fix emission of exception dispatch (PR middle-end/82154).
2017-09-13 Martin Liska <mliska@suse.cz>
PR middle-end/82154
* stmt.c (expand_sjlj_dispatch_table): Use CASE_LOW when
CASE_HIGH is NULL_TREE.
2017-09-13 Martin Liska <mliska@suse.cz>
PR middle-end/82154
* g++.dg/torture/pr82154.C: New test.
From-SVN: r252728
Paolo Carlini [Wed, 13 Sep 2017 18:18:48 +0000 (18:18 +0000)]
re PR c++/61362 (g++ (Ubuntu 4.8.2-19ubuntu1) 4.8.2 does not compile lambda with template)
2017-09-13 Paolo Carlini <paolo.carlini@oracle.com>
PR c++/61362
* g++.dg/cpp0x/lambda/lambda-ice19.C: New.
* g++.dg/cpp0x/lambda/lambda-ice20.C: Likewise.
From-SVN: r252724
Steve Ellcey [Wed, 13 Sep 2017 18:06:36 +0000 (18:06 +0000)]
re PR tree-optimization/80925 (vect peeling failures)
2017-09-13 Steve Ellcey <sellcey@cavium.com>
PR tree-optimization/80925
* gfortran.dg/vect/vect-2.f90: Add
--param vect-max-peeling-for-alignment=0 option.
Remove unaligned access and peeling checks.
* gfortran.dg/vect/vect-3.f90: Ditto.
* gfortran.dg/vect/vect-4.f90: Ditto.
* gfortran.dg/vect/vect-5.f90: Ditto.
From-SVN: r252723
Paolo Carlini [Wed, 13 Sep 2017 17:28:37 +0000 (17:28 +0000)]
re PR c++/61135 (It seems to be not able to call virtual method of literal object in lambda expression)
2017-09-13 Paolo Carlini <paolo.carlini@oracle.com>
PR c++/61135
* g++.dg/cpp0x/lambda/lambda-ice18.C: New.
* g++.dg/cpp1y/lambda-ice2.C: Likewise.
From-SVN: r252571
Richard Sandiford [Wed, 13 Sep 2017 17:05:16 +0000 (17:05 +0000)]
Turn SECONDARY_MEMORY_NEEDED into a hook
Since the patch is going through all the definitions anyway, it seemed
like a good opportunity to put the mode argument first, to match the
order for register_move_cost.
2017-09-13 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* target.def (secondary_memory_needed): New hook.
(secondary_reload): Refer to TARGET_SECONDARY_MEMORY_NEEDED
instead of SECONDARY_MEMORY_NEEDED.
(secondary_memory_needed_mode): Likewise.
* hooks.h (hook_bool_mode_reg_class_t_reg_class_t_false): Declare.
* hooks.c (hook_bool_mode_reg_class_t_reg_class_t_false): New function.
* doc/tm.texi.in (SECONDARY_MEMORY_NEEDED): Replace with...
(TARGET_SECONDARY_MEMORY_NEEDED): ...this.
(SECONDARY_MEMORY_NEEDED_RTX): Update reference accordingly.
* doc/tm.texi: Regenerate.
* config/alpha/alpha.h (SECONDARY_MEMORY_NEEDED): Delete.
* config/alpha/alpha.c (alpha_secondary_memory_needed): New function.
(TARGET_SECONDARY_MEMORY_NEEDED): Redefine.
* config/i386/i386.h (SECONDARY_MEMORY_NEEDED): Delete.
* config/i386/i386-protos.h (ix86_secondary_memory_needed): Delete.
* config/i386/i386.c (inline_secondary_memory_needed): Put the
mode argument first and change the reg_class arguments to reg_class_t.
(ix86_secondary_memory_needed): Likewise. Remove the strict parameter.
Make static. Update the call to inline_secondary_memory_needed.
(ix86_register_move_cost): Update the call to
inline_secondary_memory_needed.
(TARGET_SECONDARY_MEMORY_NEEDED): Redefine.
* config/ia64/ia64.h (SECONDARY_MEMORY_NEEDED): Delete commented-out
definition.
* config/ia64/ia64.c (spill_xfmode_rfmode_operand): Refer to
TARGET_SECONDARY_MEMORY_NEEDED rather than SECONDARY_MEMORY_NEEDED
in comment.
* config/mips/mips.h (SECONDARY_MEMORY_NEEDED): Delete.
* config/mips/mips-protos.h (mips_secondary_memory_needed): Delete.
* config/mips/mips.c (mips_secondary_memory_needed): Make static
and match hook interface. Add comment from mips.h.
(TARGET_SECONDARY_MEMORY_NEEDED): Redefine.
* config/mmix/mmix.md (truncdfsf2): Refer to
TARGET_SECONDARY_MEMORY_NEEDED rather than SECONDARY_MEMORY_NEEDED
in comment.
* config/pa/pa-64.h (SECONDARY_MEMORY_NEEDED): Rename to...
(PA_SECONDARY_MEMORY_NEEDED): ...this, and put the mode argument first.
* config/pa/pa.c (TARGET_SECONDARY_MEMORY_NEEDED): Redefine.
(pa_secondary_memory_needed): New function.
* config/pdp11/pdp11.h (SECONDARY_MEMORY_NEEDED): Delete.
* config/pdp11/pdp11-protos.h (pdp11_secondary_memory_needed): Delete.
* config/pdp11/pdp11.c (TARGET_SECONDARY_MEMORY_NEEDED): Redefine.
(pdp11_secondary_memory_needed): Make static and match hook interface.
* config/powerpcspe/powerpcspe.h (SECONDARY_MEMORY_NEEDED): Delete.
* config/powerpcspe/powerpcspe-protos.h
(rs6000_secondary_memory_needed_ptr): Delete.
* config/powerpcspe/powerpcspe.c (rs6000_secondary_memory_needed_ptr):
Delete.
(TARGET_SECONDARY_MEMORY_NEEDED): Redefine.
(rs6000_option_override_internal): Assign to
targetm.secondary_memory_needed rather than
rs6000_secondary_memory_needed_ptr.
(rs6000_secondary_memory_needed): Match hook interface.
(rs6000_debug_secondary_memory_needed): Likewise.
* config/riscv/riscv.h (SECONDARY_MEMORY_NEEDED): Delete.
* config/riscv/riscv.c (riscv_secondary_memory_needed): New function.
(riscv_register_move_cost): Use it instead of SECONDARY_MEMORY_NEEDED.
(TARGET_SECONDARY_MEMORY_NEEDED): Redefine.
* config/rs6000/rs6000.h (SECONDARY_MEMORY_NEEDED): Delete.
* config/rs6000/rs6000-protos.h (rs6000_secondary_memory_needed_ptr):
Delete.
* config/rs6000/rs6000.c (rs6000_secondary_memory_needed_ptr): Delete.
(TARGET_SECONDARY_MEMORY_NEEDED): Redefine.
(rs6000_option_override_internal): Assign to
targetm.secondary_memory_needed rather than
rs6000_secondary_memory_needed_ptr.
(rs6000_secondary_memory_needed): Match hook interface.
(rs6000_debug_secondary_memory_needed): Likewise.
* config/s390/s390.h (SECONDARY_MEMORY_NEEDED): Delete.
* config/s390/s390.c (s390_secondary_memory_needed): New function.
(TARGET_SECONDARY_MEMORY_NEEDED): Redefine.
* config/sparc/sparc.h (SECONDARY_MEMORY_NEEDED): Delete.
* config/sparc/sparc.c (TARGET_SECONDARY_MEMORY_NEEDED): Redefine.
(sparc_secondary_memory_needed): New function.
* lra-constraints.c (check_and_process_move): Refer to
TARGET_SECONDARY_MEMORY_NEEDED rather than SECONDARY_MEMORY_NEEDED
in comment.
(curr_insn_transform): Likewise.
(process_alt_operands): Use targetm.secondary_memory_needed
instead of TARGET_SECONDARY_MEMORY_NEEDED.
(check_secondary_memory_needed_p): Likewise.
(choose_split_class): Likewise.
* reload.c: Unconditionally include code that was previously
conditional on SECONDARY_MEMORY_NEEDED.
(push_secondary_reload): Use targetm.secondary_memory_needed
instead of TARGET_SECONDARY_MEMORY_NEEDED.
(push_reload): Likewise.
* reload1.c: Unconditionally include code that was previously
conditional on SECONDARY_MEMORY_NEEDED.
(choose_reload_regs): Use targetm.secondary_memory_needed
instead of TARGET_SECONDARY_MEMORY_NEEDED.
(gen_reload): Likewise.
* system.h (SECONDARY_MEMORY_NEEDED): Poison.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r252461
Richard Sandiford [Wed, 13 Sep 2017 17:04:08 +0000 (17:04 +0000)]
Turn SECONDARY_MEMORY_NEEDED_MODE into a target hook
This includes a change to LRA. Previously the code was:
if (sclass == NO_REGS && dclass == NO_REGS)
return false;
#ifdef SECONDARY_MEMORY_NEEDED
if (SECONDARY_MEMORY_NEEDED (sclass, dclass, GET_MODE (src))
#ifdef SECONDARY_MEMORY_NEEDED_MODE
&& ((sclass != NO_REGS && dclass != NO_REGS)
|| GET_MODE (src) != SECONDARY_MEMORY_NEEDED_MODE (GET_MODE (src)))
#endif
)
{
*sec_mem_p = true;
return false;
}
#endif
in which the positioning of the second ifdef meant that defining
SECONDARY_MEMORY_NEEDED_MODE to its default value was not a no-op:
without a definition, we would consider using secondary reloads for
mem<-reg and reg<-mem reloads even if the secondary memory has the
same mode as the original mem, while defining it would avoid this.
The latter behaviour seems correct.
The default is different for reload and LRA. For LRA the default is
to use the original mode, while reload promotes smaller-than-word
integral modes to word mode:
if (GET_MODE_BITSIZE (mode) < BITS_PER_WORD && INTEGRAL_MODE_P (mode))
mode = mode_for_size (BITS_PER_WORD,
GET_MODE_CLASS (mode), 0).require ();
Some of the ports that have switched to LRA seemed to have
SECONDARY_MEMORY_NEEDED_MDOEs based on the old reload definition,
and still referred to the reload.c:get_secondary_mem function in
the comments. The patch just keeps them as-is.
2017-09-13 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* target.def (secondary_memory_needed_mode): New hook:
* targhooks.c (default_secondary_memory_needed_mode): Declare.
* targhooks.h (default_secondary_memory_needed_mode): New function.
* doc/tm.texi.in (SECONDARY_MEMORY_NEEDED_MODE): Replace with...
(TARGET_SECONDARY_MEMORY_NEEDED_MODE): ...this.
* doc/tm.texi: Regenerate.
* lra-constraints.c (check_and_process_move): Use
targetm.secondary_memory_needed_mode instead of
TARGET_SECONDARY_MEMORY_NEEDED_MODE.
(curr_insn_transform): Likewise.
* reload.c (get_secondary_mem): Likewise.
* config/alpha/alpha.h (SECONDARY_MEMORY_NEEDED_MODE): Delete.
* config/alpha/alpha.c (alpha_secondary_memory_needed_mode): New
function.
(TARGET_SECONDARY_MEMORY_NEEDED_MODE): Redefine.
* config/i386/i386.h (SECONDARY_MEMORY_NEEDED_MODE): Delete.
* config/i386/i386.c (ix86_secondary_memory_needed_mode): New function.
(TARGET_SECONDARY_MEMORY_NEEDED_MODE): Redefine.
* config/powerpcspe/powerpcspe.h (SECONDARY_MEMORY_NEEDED_MODE):
Delete.
* config/powerpcspe/powerpcspe-protos.h
(rs6000_secondary_memory_needed_mode): Delete.
* config/powerpcspe/powerpcspe.c
(TARGET_SECONDARY_MEMORY_NEEDED_MODE): Redefine.
(rs6000_secondary_memory_needed_mode): Make static.
* config/rs6000/rs6000.h (SECONDARY_MEMORY_NEEDED_MODE): Delete.
* config/rs6000/rs6000-protos.h (rs6000_secondary_memory_needed_mode):
Delete.
* config/rs6000/rs6000.c (TARGET_SECONDARY_MEMORY_NEEDED_MODE):
Redefine.
(rs6000_secondary_memory_needed_mode): Make static.
* config/s390/s390.h (SECONDARY_MEMORY_NEEDED_MODE): Delete.
* config/s390/s390.c (s390_secondary_memory_needed_mode): New function.
(TARGET_SECONDARY_MEMORY_NEEDED_MODE): Redefine.
* config/sparc/sparc.h (SECONDARY_MEMORY_NEEDED_MODE): Delete.
* config/sparc/sparc.c (TARGET_SECONDARY_MEMORY_NEEDED_MODE):
Redefine.
(sparc_secondary_memory_needed_mode): New function.
* system.h (TARGET_SECONDARY_MEMORY_NEEDED_MODE): Poison.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r252455
Jackson Woodruff [Wed, 13 Sep 2017 16:49:42 +0000 (16:49 +0000)]
[AArch64, PATCH] Improve Neon store of zero
Committed on behalf of Jackson Woodruff.
---
gcc/
* config/aarch64/constraints.md (Umq): New constraint.
* config/aarch64/aarch64-simd.md (*aarch64_simd_mov<mode>):
Change to use Umq.
(mov<mode>): Update condition.
gcc/testsuite/
* gcc.target/aarch64/simd/vect_str_zero.c: Update testcase.
From-SVN: r252387
Marek Polacek [Wed, 13 Sep 2017 16:46:17 +0000 (16:46 +0000)]
re PR c/82167 (Segmentation fault when dereferencing the address of an array argument)
PR c/82167
* c-typeck.c (c_expr_sizeof_expr): Use the type of expr.value rather
than expr.original_type.
* gcc.dg/pr82167.c: New test.
From-SVN: r252372
Thomas Schwinge [Wed, 13 Sep 2017 16:12:53 +0000 (18:12 +0200)]
* MAINTAINERS: Remove email address of Jim Norris.
From-SVN: r252218
Will Schmidt [Wed, 13 Sep 2017 14:24:23 +0000 (14:24 +0000)]
fold-vec-ld-char.c: New.
[gcc/testsuite]
2017-09-12 Will Schmidt <will_schmidt@vnet.ibm.com>
* gcc.target/powerpc/fold-vec-ld-char.c: New.
* gcc.target/powerpc/fold-vec-ld-double.c: New.
* gcc.target/powerpc/fold-vec-ld-float.c: New.
* gcc.target/powerpc/fold-vec-ld-int.c: New.
* gcc.target/powerpc/fold-vec-ld-longlong.c: New.
* gcc.target/powerpc/fold-vec-ld-short.c: New.
From-SVN: r252087
Jackson Woodruff [Wed, 13 Sep 2017 14:08:49 +0000 (14:08 +0000)]
[Aarch64, Patch] Update failing testcase pr62178.c
This patch changes pr62178.c so that it now scans
for two `ldr`s, one into an `s` register, instead
of a `ld1r` as before. Also add a scan for an mla
instruction.
The `ld1r` was needed when this should have generated
a mla by vector. Now that we can generate an mla by
element instruction and can load directly into the
simd register, it is cheaper to not do the ld1r
which needlessly duplicates the single element used
across the whole vector register.
Committed on behalf of Jackson Woodruff
gcc/testsuite/
* gcc.target/aarch64/pr62178.c: Updated testcase
to scan for two ldrs and an mla.
From-SVN: r252086
Jonathan Wakely [Wed, 13 Sep 2017 14:07:44 +0000 (15:07 +0100)]
PR libstdc++/81468 constrain std::chrono::time_point constructor
PR libstdc++/81468
* include/std/chrono (__enable_if_is_duration)
(__disable_if_is_duration): New alias templates to simplify SFINAE.
(duration_cast, floor, ceil): Use __enable_if_is_duration.
(duration::__is_float, duration::__is_harmonic): New alias templates
to simplify SFINAE.
(duration::duration(const _Rep2&)): Use _Require, __is_float and
__is_harmonic.
(duration::duration(const duration<_Rep2, _Period2>&)): Likewise.
(__common_rep_type): Remove, replace with ...
(__common_rep_t): New alias template.
(operator*, operator/, operator%): Use __common_rep_t and
__disable_if_is_duration.
(time_point::time_point(const time_point<clock, _Dur2>&)): Add missing
constraint from LWG DR 1177.
* testsuite/20_util/duration/cons/dr1177.cc: New.
* testsuite/20_util/duration/literals/range.cc: Update dg-error line.
* testsuite/20_util/duration/requirements/typedefs_neg1.cc: Likewise.
* testsuite/20_util/duration/requirements/typedefs_neg2.cc: Likewise.
* testsuite/20_util/duration/requirements/typedefs_neg3.cc: Likewise.
* testsuite/20_util/time_point/cons/81468.cc: New.
From-SVN: r252085
Kyrylo Tkachov [Wed, 13 Sep 2017 13:49:50 +0000 (13:49 +0000)]
[store-merging] Use store order as tie-breaker in sort_by_bitpos
As Alexander pointed out in the thread starting at [1] the sort_by_bitpos sorting function
was behaving badly when we had multiple stores at the same position. He fixed that (thanks!)
but we can do better by not returning zero when the bitpositions are equal but by falling back
to comparing the order the stores appear in, which is guaranteed to be unique (barring other
bugs elsewhere).
This patch does that.
Bootstrapped and tested on aarch64-none-linux-gnu.
[1] https://gcc.gnu.org/ml/gcc-patches/2017-07/msg00895.html
* gimple-ssa-store-merging.c (sort_by_bitpos): Compare store order
when bitposition is the same.
From-SVN: r252084
Nicolas Roche [Wed, 13 Sep 2017 13:18:46 +0000 (13:18 +0000)]
Make-lang.in: In the fallback mechanim...
2017-09-13 Nicolas Roche <roche@adacore.com>
* Make-lang.in: In the fallback mechanim, parse the associated .ali
file and try to guess the locations of dependencies.
From-SVN: r252082
Nathan Sidwell [Wed, 13 Sep 2017 12:41:21 +0000 (12:41 +0000)]
Conv-op identifers not in identifier hash table
Conv-op identifers not in identifier hash table
* lex.c (conv_type_hasher): Make member fns inline.
(make_conv_op_name): Directly clone conv_op_identifier.
From-SVN: r252081
Paolo Carlini [Wed, 13 Sep 2017 11:57:56 +0000 (11:57 +0000)]
re PR c++/59949 (lambda expression as default argument of function template causes "already defined" messages in assembler)
2017-09-13 Paolo Carlini <paolo.carlini@oracle.com>
PR c++/59949
* g++.dg/cpp0x/lambda/lambda-defarg7.C: New.
From-SVN: r252079
Nathan Sidwell [Wed, 13 Sep 2017 11:45:56 +0000 (11:45 +0000)]
Rename CLASSTYPE_METHOD_VEC to CLASSTYPE_MEMBER_VEC.
* cp-tree.h (struct lang_type): Rename methods to members.
(CLASSTYPE_METHOD_VEC): Rename to ...
(CLASSTYPE_MEMBER_VEC): ... this.
* name-lookup.h (get_method_slot): Rename to ...
(get_member_slot): ... this.
(resort_type_method_vec): Rename to ...
(resort_type_member_vec): ... this.
* class.c (add_method, warn_hidden): Adjust.
* search.c (dfs_locate_field_accessor_pre): Adjust.
* name-lookup.c (method_vec_binary_search): Rename to ...
(member_vec_binary_search): ... this and adjust.
(method_vec_linear_search): Rename to ...
(member_vec_linear_search): ... this and adjust.
(fields_linear_search, get_class_binding_direct): Adjust.
(get_method_slot): Rename to ...
(get_member_slot): ... this and adjust.
(method_name_slot): Rename to ...
(member_name_slot): ... this and adjust.
(resort_type_method_vec): Rename to ...
(resort_type_member_vec): ... this and adjust.
(method_vec_append_class_fields): Rename to ...
(member_vec_append_class_fields): ... this and adjust.
(method_vec_append_enum_values): Rename to ...
(member_vec_append_enum_values): ... this and adjust.
(method_vec_dedup): Rename to ...
(member_vec_dedup): ... this and adjust.
(set_class_bindings, insert_late_enum_def_bindings): Adjust.
From-SVN: r252078
Wilco Dijkstra [Wed, 13 Sep 2017 11:40:02 +0000 (11:40 +0000)]
Update aarch64/vmov_n_1.c
Update vmov_n_1.c now we are generating better code for dup:
ldr s0, [x0]
dup v0.2s, v0.s[0]
ret
gcc/testsuite/
* gcc.target/aarch64/vmov_n_1.c: Update dup scan-assembler.
From-SVN: r252077
Pierre-Marie de Rodat [Wed, 13 Sep 2017 10:33:47 +0000 (10:33 +0000)]
[multiple changes]
2017-09-13 Eric Botcazou <ebotcazou@adacore.com>
* sem_ch13.adb (Register_Address_Clause_Check): New procedure to save
the suppression status of Alignment_Check on the current scope.
(Alignment_Checks_Suppressed): New function to use the saved instead of
the current suppression status of Alignment_Check.
(Address_Clause_Check_Record): Add Alignment_Checks_Suppressed field.
(Analyze_Attribute_Definition_Clause): Instead of manually appending to
the table, call Register_Address_Clause_Check.
(Validate_Address_Clauses): Call Alignment_Checks_Suppressed on the
recorded address clause instead of its entity.
2017-09-13 Jerome Guitton <guitton@adacore.com>
* libgnarl/s-tpopsp__vxworks-tls.adb,
libgnarl/s-tpopsp__vxworks-rtp.adb, libgnarl/s-tpopsp__vxworks.adb
(Self): Register thread if task id is null.
2017-09-13 Arnaud Charlet <charlet@adacore.com>
* libgnat/s-htable.adb, libgnat/s-htable.ads: Minor style tuning.
2017-09-13 Arnaud Charlet <charlet@adacore.com>
* lib-xref-spark_specific.adb (Scopes): simplify hash map; now it maps
from an entity to only scope index, as a mapping from an entity to the
same entity was useless.
(Get_Scope_Num): refactor as a simple renaming; rename parameter from N
to E.
(Set_Scope_Num): refactor as a simple renaming; rename parameter from N
to E.
(Is_Constant_Object_Without_Variable_Input): remove local "Result"
variable, just use return statements.
From-SVN: r252076
Arnaud Charlet [Wed, 13 Sep 2017 10:28:52 +0000 (10:28 +0000)]
s-vxwext__kernel-smp.adb, [...]: New file.
* libgnarl/s-vxwext__kernel-smp.adb,
libgnarl/s-tpopsp__vxworks-rtp.adb, libgnarl/s-vxwext__noints.adb:
New file.
From-SVN: r252075
Thomas Preud'homme [Wed, 13 Sep 2017 10:27:00 +0000 (10:27 +0000)]
[testsuite/ARM] Fix coprocessor intrinsic test failures on ARMv8-A
Coprocessor intrinsic tests in gcc.target/arm/acle test whether
__ARM_FEATURE_COPROC has the right bit defined before calling the
intrinsic. This allows to test both the correct setting of that macro
and the availability and correct working of the intrinsic. However the
__ARM_FEATURE_COPROC macro is no longer defined for ARMv8-A since
r249399.
This patch changes the testcases to skip that test for ARMv8-A and
ARMv8-R targets. It also fixes some irregularity in the coprocessor
effective targets:
- add ldcl and stcl to the list of instructions listed as guarded by
arm_coproc1_ok
- enable tests guarded by arm_coproc2_ok, arm_coproc3_ok and
arm_coproc4_ok for Thumb-2 capable targets but disable for Thumb-1
targets.
2017-09-13 Thomas Preud'homme <thomas.preudhomme@arm.com>
gcc/testsuite/
* gcc.target/arm/acle/cdp.c: Skip __ARM_FEATURE_COPROC check for
ARMv8-A and ARMv8-R.
* gcc.target/arm/acle/cdp2.c: Likewise.
* gcc.target/arm/acle/ldc.c: Likewise.
* gcc.target/arm/acle/ldc2.c: Likewise.
* gcc.target/arm/acle/ldc2l.c: Likewise.
* gcc.target/arm/acle/ldcl.c: Likewise.
* gcc.target/arm/acle/mcr.c: Likewise.
* gcc.target/arm/acle/mcr2.c: Likewise.
* gcc.target/arm/acle/mcrr.c: Likewise.
* gcc.target/arm/acle/mcrr2.c: Likewise.
* gcc.target/arm/acle/mrc.c: Likewise.
* gcc.target/arm/acle/mrc2.c: Likewise.
* gcc.target/arm/acle/mrrc.c: Likewise.
* gcc.target/arm/acle/mrrc2.c: Likewise.
* gcc.target/arm/acle/stc.c: Likewise.
* gcc.target/arm/acle/stc2.c: Likewise.
* gcc.target/arm/acle/stc2l.c: Likewise.
* gcc.target/arm/acle/stcl.c: Likewise.
* lib/target-supports.exp:
(check_effective_target_arm_coproc1_ok_nocache): Mention ldcl
and stcl in the comment.
(check_effective_target_arm_coproc2_ok_nocache): Allow Thumb-2 targets
and disable Thumb-1 targets.
(check_effective_target_arm_coproc3_ok_nocache): Likewise.
(check_effective_target_arm_coproc4_ok_nocache): Likewise.
Acked-by: Kyrill Tkachov <kyrylo.tkachov@foss.arm.com>
From-SVN: r252074
Jonathan Wakely [Wed, 13 Sep 2017 10:17:44 +0000 (11:17 +0100)]
Fix broken URLs in libstdc++ API docs
* doc/doxygen/mainpage.html: Fix broken URLs.
From-SVN: r252070
Jonathan Wakely [Wed, 13 Sep 2017 10:05:59 +0000 (11:05 +0100)]
PR libstdc++/81835 fix broken URLs in libstdc++ docs
PR libstdc++/81835
* doc/xml/manual/extensions.xml: Replace unstable URL.
* doc/html/manual/ext_demangling.html: Regenerate.
* libsupc++/cxxabi.h (__cxa_demangle): Fix broken URL.
From-SVN: r252066
Pierre-Marie de Rodat [Wed, 13 Sep 2017 09:53:05 +0000 (09:53 +0000)]
[multiple changes]
2017-09-13 Hristian Kirtchev <kirtchev@adacore.com>
* einfo.adb: Flag42 is now Is_Controlled_Active.
(Is_Controlled): This attribute is now synthesized.
(Is_Controlled_Active): This attribute is now an explicit flag rather
than a synthesized attribute. (Set_Is_Controlled): Removed.
(Set_Is_Controlled_Active): New routine.
(Write_Entity_Flags): Update the output for Flag42.
* einfo.ads: Update the documentation of the following attributes:
Disable_Controlled, Is_Controlled, Is_Controlled_Active, Is_Controlled
and Is_Controlled_Active have swapped their functionality.
(Is_Controlled): Renamed to Is_Controlled_Active.
(Is_Controlled_Active): Renamed to Is_Controlled.
(Set_Is_Controlled): Renamed to Set_Is_Controlled_Active.
* exp_ch3.adb (Expand_Freeze_Record_Type): Restore the original use of
Is_Controlled.
* exp_util.adb (Has_Some_Controlled_Component): Code clean up.
(Needs_Finalization): Code clean up. Remove the tests for
Disable_Controlled because a) they were incorrect as they would reject
a type which is sublect to the aspect, but may contain controlled
components, and b) they are no longer necessary.
* exp_util.ads (Needs_Finalization): Update comment on documentation.
* freeze.adb (Freeze_Array_Type): Restore the original use of
Is_Controlled.
(Freeze_Record_Type): Restore the original use of Is_Controlled.
* sem_ch3.adb (Analyze_Object_Declaration): Restore the original use of
Is_Controlled.
(Array_Type_Declaration): Restore the original use of Is_Controlled.
(Build_Derived_Private_Type): Restore the original use of
Is_Controlled.
(Build_Derived_Record_Type): Set the Is_Controlled_Active flag of a
type derived from Ada.Finalization.[Limited_]Controlled.
(Build_Derived_Type): Restore the original use of Is_Controlled.
(Record_Type_Definition): Restore the original use of Is_Controlled.
* sem_ch7.adb (Preserve_Full_Attributes): Restore the original use of
Is_Controlled.
* sem_ch13.adb (Analyze_Aspect_Disable_Controlled): New routine.
(Analyze_Aspect_Specifications): Use routine
Analyze_Aspect_Disable_Controlled to process aspect Disable_Controlled.
2017-09-13 Vincent Celier <celier@adacore.com>
* clean.adb (Gnatclean): Fix error when looking for target
of <target>-gnatclean
2017-09-13 Javier Miranda <miranda@adacore.com>
Ed Schonberg <schonberg@adacore.com>
* sem_ch8.adb (Find_Expanded_Name): Complete code that identifies an
expanded name that designates the current instance of a child unit in
its own body and appears as the prefix of a reference to an entity
local to the child unit.
From-SVN: r252065
Paolo Carlini [Wed, 13 Sep 2017 09:47:11 +0000 (09:47 +0000)]
re PR c++/47226 ([C++0x] GCC doesn't expand template parameter pack that appears in a lambda-expression)
2017-09-13 Paolo Carlini <paolo.carlini@oracle.com>
PR c++/47226
* g++.dg/cpp0x/lambda/lambda-variadic4.C: New.
* g++.dg/cpp0x/lambda/lambda-variadic5.C: Likewise.
From-SVN: r252064
Richard Biener [Wed, 13 Sep 2017 09:01:42 +0000 (09:01 +0000)]
dwarf2out.c (output_die_symbol): Remove.
2017-09-13 Richard Biener <rguenther@suse.de>
* dwarf2out.c (output_die_symbol): Remove.
(output_die): Do not output a DIEs symbol.
From-SVN: r252063
Richard Biener [Wed, 13 Sep 2017 08:13:03 +0000 (08:13 +0000)]
re PR tree-optimization/82128 (ICE on valid code)
2017-09-13 Richard Biener <rguenther@suse.de>
PR middle-end/82128
* gimple-fold.c (gimple_fold_call): Update SSA name in-place to
default-def to avoid breaking iterator update with the weird
interaction with cgraph_update_edges_for_call_stmt_node.
* g++.dg/pr82128.C: New testcase.
From-SVN: r252062
Richard Biener [Wed, 13 Sep 2017 08:09:31 +0000 (08:09 +0000)]
tree-cfg.c (verify_gimple_assign_binary): Add verification for WIDEN_SUM_EXPR...
2017-09-13 Richard Biener <rguenther@suse.de>
* tree-cfg.c (verify_gimple_assign_binary): Add verification
for WIDEN_SUM_EXPR, VEC_WIDEN_MULT_{HI,LO,EVEN,ODD}_EXPR,
VEC_PACK_{TRUNC,SAT,FIX_TRUNC}_EXPR.
(verify_gimple_assign_ternary): Add verification for DOT_PROD_EXPR.
From-SVN: r252061
Arnaud Charlet [Wed, 13 Sep 2017 08:00:26 +0000 (10:00 +0200)]
Minor edits.
From-SVN: r252060
Arnaud Charlet [Wed, 13 Sep 2017 07:51:23 +0000 (09:51 +0200)]
Regenerate.
From-SVN: r252059
Arnaud Charlet [Wed, 13 Sep 2017 07:50:02 +0000 (09:50 +0200)]
Minor edits.
From-SVN: r252058
Arnaud Charlet [Wed, 13 Sep 2017 07:38:41 +0000 (09:38 +0200)]
Regenerate.
From-SVN: r252057
Arnaud Charlet [Wed, 13 Sep 2017 07:37:23 +0000 (09:37 +0200)]
Minor edits.
From-SVN: r252056
Jonathan Wakely [Wed, 13 Sep 2017 07:27:40 +0000 (08:27 +0100)]
Define std::__to_address helper
* include/bits/allocated_ptr.h (__allocated_ptr::get): Use
__to_address.
(__allocated_ptr::_S_raw_ptr): Remove.
* include/bits/forward_list.h (_Fwd_list_base::_M_get_node): Use
__to_address.
* include/bits/hashtable_policy.h (_Hashtable_alloc): Likewise.
* include/bits/ptr_traits.h (__to_address): Define new function
template.
* include/bits/shared_ptr_base.h (__shared_ptr): Use __to_address.
(__shared_ptr::_S_raw_ptr): Remove.
* include/bits/stl_vector.h [__cplusplus >= 201103L]
(vector::_M_data_ptr): Use __to_address.
[__cplusplus < 201103L] (vector::_M_data_ptr): Don't dereference
possibly invalid pointers.
* include/ext/alloc_traits.h (__alloc_traits::construct)
(__alloc_traits::destroy): Use __to_address.
From-SVN: r252055
Arnaud Charlet [Wed, 13 Sep 2017 07:04:41 +0000 (09:04 +0200)]
New file.
From-SVN: r252054
Kugan Vivekanandarajah [Wed, 13 Sep 2017 01:28:43 +0000 (01:28 +0000)]
pr63304_1.c: Remove-mno-fix-cortex-a53-843419.
gcc/testsuite/ChangeLog:
2017-09-13 Kugan Vivekanandarajah <kuganv@linaro.org>
* gcc.target/aarch64/pr63304_1.c: Remove-mno-fix-cortex-a53-843419.
gcc/ChangeLog:
2017-09-13 Kugan Vivekanandarajah <kuganv@linaro.org>
* config/aarch64/aarch64.c (aarch64_override_options_after_change_1):
Disable pc relative literal load irrespective of TARGET_FIX_ERR_A53_84341
for default.
From-SVN: r252053
GCC Administrator [Wed, 13 Sep 2017 00:16:17 +0000 (00:16 +0000)]
Daily bump.
From-SVN: r252051
Eric Botcazou [Tue, 12 Sep 2017 20:24:35 +0000 (20:24 +0000)]
sparc.c (output_return): Output the source location of the insn in the delay slot, if any.
* config/sparc/sparc.c (output_return): Output the source location of
the insn in the delay slot, if any.
(output_sibcall): Likewise.
From-SVN: r252041
Paolo Carlini [Tue, 12 Sep 2017 19:45:37 +0000 (19:45 +0000)]
re PR c++/70621 (ICE on invalid code at -O1 and above on x86_64-linux-gnu in record_reference, at cgraphbuild.c:64)
/cp
2017-09-12 Paolo Carlini <paolo.carlini@oracle.com>
PR c++/70621
* decl.c (start_decl): Early return error_mark_node if duplicate_decls
returns it; avoid misleading error message.
/testsuite
2017-09-12 Paolo Carlini <paolo.carlini@oracle.com>
PR c++/70621
* g++.dg/torture/pr70621.C: New.
From-SVN: r252040
Paul Thomas [Tue, 12 Sep 2017 18:06:52 +0000 (18:06 +0000)]
re PR fortran/82173 ([meta-bug] Parameterized derived type errors)
2017-09-12 Paul Thomas <pault@gcc.gnu.org>
PR fortran/82173
PR fortran/82168
* decl.c (variable_decl): Check pdt template components for
appearance of KIND/LEN components in the type parameter name
list, that components corresponding to type parameters have
either KIND or LEN attributes and that KIND or LEN components
are scalar. Copy the initializer to the parameter value.
(gfc_get_pdt_instance): Add a label 'error_return' and follow
it with repeated code, while replacing this code with a jump.
Check if a parameter appears as a component in the template.
Make sure that the parameter expressions are integer. Validate
KIND expressions.
(gfc_match_decl_type_spec): Search for pdt_types in the parent
namespace since they are instantiated in the template ns.
* expr.c (gfc_extract_int): Use a KIND parameter if it
appears as a component expression.
(gfc_check_init_expr): Allow expressions with the pdt_kind
attribute.
*primary.c (gfc_match_actual_arglist): Make sure that the first
keyword argument is recognised when 'pdt' is set.
2017-09-12 Paul Thomas <pault@gcc.gnu.org>
PR fortran/82173
* gfortran.dg/pdt_4.f03 : Remove the 'is being used before it
is defined' error.
* gfortran.dg/pdt_6.f03 : New test.
* gfortran.dg/pdt_7.f03 : New test.
* gfortran.dg/pdt_8.f03 : New test.
PR fortran/82168
* gfortran.dg/pdt_9.f03 : New test.
From-SVN: r252039
Steve Ellcey [Tue, 12 Sep 2017 17:00:00 +0000 (17:00 +0000)]
re PR other/81096 (test case ttest in libbacktrace fails starting with its introduction in r249111)
2017-09-12 Steve Ellcey <sellcey@cavium.com>
PR other/81096
* Makefile.am (ttest_CFLAGS): Add $(AM_CFLAGS)
* Makefile.in: Regenerate.
From-SVN: r252038
Jiong Wang [Tue, 12 Sep 2017 16:39:59 +0000 (16:39 +0000)]
Add DW_CFA_AARCH64_negate_ra_state to dwarf2.def/h and dwarfnames.c
A new vendor CFA DW_CFA_AARCH64_negate_ra_state was introduced for ARMv8.3-A
return address signing, it is multiplexing DW_CFA_GNU_window_save in CFA vendor
extension space.
This patch adds necessary code to make it available to external, the GDB
patch (https://sourceware.org/ml/gdb-patches/2017-08/msg00215.html) is intended
to use it.
A new DW_CFA_DUP for it is added in dwarf2.def. The use of DW_CFA_DUP is to
avoid duplicated case value issue when included in libiberty/dwarfnames.
Native x86 builds OK to make sure no macro expanding errors.
Committed on behalf of Jiong Wang.
include/
* dwarf2.def (DW_CFA_AARCH64_negate_ra_state): New DW_CFA_DUP.
* dwarf2.h (DW_CFA_DUP): New define.
libiberty/
* dwarfnames.c (DW_CFA_DUP): New define.
From-SVN: r252037
H.J. Lu [Tue, 12 Sep 2017 16:35:39 +0000 (16:35 +0000)]
Don't warn function alignment if warn_if_not_aligned_p is true
When warn_if_not_aligned_p is true, a warning will be issued on function
declaration later. There is no need to warn function alignment when
warn_if_not_aligned_p is true.
* c-attribs.c (common_handle_aligned_attribute): Don't warn
function alignment if warn_if_not_aligned_p is true.
From-SVN: r252036
Steve Ellcey [Tue, 12 Sep 2017 16:33:31 +0000 (16:33 +0000)]
re PR other/81096 (test case ttest in libbacktrace fails starting with its introduction in r249111)
2017-09-12 Steve Ellcey <sellcey@cavium.com>
PR other/81096
* libbacktrace/Makefile.in
(HAVE_PTHREAD_TRUE@@NATIVE_TRUE@ttest_CFLAGS): Add $(AM_CFLAGS)
From-SVN: r252035
H.J. Lu [Tue, 12 Sep 2017 16:30:28 +0000 (16:30 +0000)]
Add -static-pie to GCC driver to create static PIE
This patch adds -static-pie to GCC driver to create static PIE. A static
position independent executable (PIE) is similar to static executable,
but can be loaded at any address without a dynamic linker. All linker
input files must be compiled with -fpie or -fPIE and linker must support
--no-dynamic-linker to avoid linking with dynamic linker. "-z text" is
also needed to prevent dynamic relocations in read-only segments.
PR driver/81498
* common.opt (-static-pie): New alias.
(shared): Negate static-pie.
(-no-pie): Update help text.
(-pie): Likewise.
(static-pie): New option.
* config/gnu-user.h (GNU_USER_TARGET_STARTFILE_SPEC): Add
-static-pie support.
(GNU_USER_TARGET_ENDFILE_SPEC): Likewise.
(LINK_EH_SPEC): Likewise.
(LINK_GCC_C_SEQUENCE_SPEC): Likewise.
* config/i386/gnu-user.h (GNU_USER_TARGET_LINK_SPEC): Likewise.
* config/i386/gnu-user64.h (GNU_USER_TARGET_LINK_SPEC): Likewise.
* gcc.c (LINK_COMMAND_SPEC): Likewise.
(init_gcc_specs): Likewise.
(init_spec): Likewise.
(display_help): Update help message for -pie.
* doc/invoke.texi: Update -pie, -no-pie and -static. Document
-static-pie.
From-SVN: r252034
Wilco Dijkstra [Tue, 12 Sep 2017 16:27:47 +0000 (16:27 +0000)]
Remove '*' from movsi/di/ti patterns
Remove the remaining uses of '*' from the movsi/di/ti patterns.
Using '*' in alternatives is typically incorrect at it tells the register
allocator to ignore those alternatives. So remove these from all the
integer move patterns. This removes unnecessary int to float moves, for
example gcc.target/aarch64/pr62178.c no longer generates a redundant fmov
since the w = m variant is now allowed.
gcc/
* config/aarch64/aarch64.md (movsi_aarch64): Remove all '*'.
(movdi_aarch64): Likewise.
(movti_aarch64): Likewise.
From-SVN: r252033
Simon Wright [Tue, 12 Sep 2017 15:29:16 +0000 (15:29 +0000)]
re PR target/80204 (macosx-version-min wrong for macOS Sierra 10.12.3)
PR target/80204
* config/darwin-driver.c (darwin_find_version_from_kernel): Eliminate
calculation of the minor version, always output as 0.
From-SVN: r252029
Jakub Jelinek [Tue, 12 Sep 2017 15:25:15 +0000 (17:25 +0200)]
re PR target/82112 (internal compiler error: in fold_convert_loc, at fold-const.c:2262)
PR target/82112
* config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): For
ALTIVEC_BUILTIN_VEC_LD if arg1 has array type call default_conversion
on it early, rather than manual conversion late. For
ALTIVEC_BUILTIN_VEC_ST if arg2 has array type call default_conversion
instead of performing manual conversion.
* gcc.target/powerpc/pr82112.c: New test.
* g++.dg/ext/altivec-18.C: New test.
From-SVN: r252028
Carl Love [Tue, 12 Sep 2017 15:14:32 +0000 (15:14 +0000)]
altivec.md (vec_widen_umult_even_v4si, [...]): Add define expands for vmuleuw, vmulesw, vmulouw, vmulosw.
gcc/ChangeLog:
2017-09-12 Carl Love <cel@us.ibm.com>
* config/rs6000/altivec.md (vec_widen_umult_even_v4si,
vec_widen_smult_even_v4si): Add define expands for vmuleuw, vmulesw,
vmulouw, vmulosw.
* config/rs6000/rs6000-builtin.def (VMLEUW, VMULESW, VMULOUW,
VMULOSW): Add definitions.
* config/rs6000/rs6000-c.c (altivec_overloaded_builtins): Add
ALTIVEC_BUILTIN_VMULESW, ALTIVEC_BUILTIN_VMULEUW,
ALTIVEC_BUILTIN_VMULOSW, ALTIVEC_BUILTIN_VMULOUW entries.
* config/rs6000/rs6000.c (rs6000_gimple_fold_builtin,
builtin_function_type): Add ALTIVEC_BUILTIN_* case statements.
From-SVN: r252027
James Greenhalgh [Tue, 12 Sep 2017 14:57:58 +0000 (14:57 +0000)]
[Patch AArch64 2/2] Fix memory sizes to load/store patterns
There seems to be a partial misconception in the AArch64 backend that
load1/load2 referred to the number of registers to load, rather than the
number of words to load. This patch fixes that using the new "number of
byte" types added in the previous patch.
That means using the load_16 and store_16 types that were defined in the
previous patch for the first time in the AArch64 backend. To ensure
continuity for scheduling models, I've just split this out from load_8.
Please update your models if this is very wrong!
---
gcc/
* config/aarch64/aarch64.md (movdi_aarch64): Set load/store
types correctly.
(movti_aarch64): Likewise.
(movdf_aarch64): Likewise.
(movtf_aarch64): Likewise.
(load_pairdi): Likewise.
(store_pairdi): Likewise.
(load_pairdf): Likewise.
(store_pairdf): Likewise.
(loadwb_pair<GPI:mode>_<P:mode>): Likewise.
(storewb_pair<GPI:mode>_<P:mode>): Likewise.
(ldr_got_small_<mode>): Likewise.
(ldr_got_small_28k_<mode>): Likewise.
(ldr_got_tiny): Likewise.
* config/aarch64/iterators.md (ldst_sz): New.
(ldpstp_sz): Likewise.
* config/aarch64/thunderx.md (thunderx_storepair): Split store_8
to store_16.
(thunderx_load): Split load_8 to load_16.
* config/aarch64/thunderx2t99.md (thunderx2t99_loadpair): Split
load_8 to load_16.
(thunderx2t99_storepair_basic): Split store_8 to store_16.
* config/arm/xgene1.md (xgene1_load_pair): Split load_8 to load_16.
(xgene1_store_pair): Split store_8 to store_16.
* config/aarch64/falkor.md (falkor_ld_3_ld): Split load_8 to load_16.
(falkor_st_0_st_sd): Split store_8 to store_16.
From-SVN: r252026
James Greenhalgh [Tue, 12 Sep 2017 14:48:34 +0000 (14:48 +0000)]
[Mechanical Patch ARM/AArch64 1/2] Rename load/store scheduling types to encode data size
In the AArch64 backend and scheduling models there is some confusion as to
what the load1/load2 etc. scheduling types refer to. This leads to us using
load1/load2 in two contexts - for a variety of 32-bit, 64-bit and 128-bit
loads in AArch32 and 128-bit loads in AArch64. That leads to an undesirable
confusion in scheduling.
Fixing it is easy, but mechanical and boring. Essentially,
s/load1/load_4/
s/load2/load_8/
s/load3/load_12/
s/load4/load_16/
s/store1/store_4/
s/store2/store_8/
s/store3/store_12/
s/store4/store_16/
Across all sorts of pipeline models, and the two backends.
I have intentionally not modified any of the patterns which now look obviously
incorrect. I'll be doing a second pass over the AArch64 back-end in patch
2/2 which will fix these bugs.
---
gcc/
* config/arm/types.md (type): Rename load1/2/3/4 to load_4/8/12/16
and store1/2/3/4 to store_4/8/12/16.
* config/aarch64/aarch64.md: Update for rename.
* config/arm/arm.md: Likewise.: Likewise.
* config/arm/arm.c: Likewise.
* config/arm/thumb1.md: Likewise.
* config/arm/thumb2.md: Likewise.
* config/arm/vfp.md: Likewise.
* config/arm/arm-generic.md: Likewise.
* config/arm/arm1020e.md: Likewise.
* config/arm/arm1026ejs.md: Likewise.
* config/arm/arm1136jfs.md: Likewise.
* config/arm/arm926ejs.md: Likewise.
* config/arm/cortex-a15.md: Likewise.
* config/arm/cortex-a17.md: Likewise.
* config/arm/cortex-a5.md: Likewise.
* config/arm/cortex-a53.md: Likewise.
* config/arm/cortex-a57.md: Likewise.
* config/arm/cortex-a7.md: Likewise.
* config/arm/cortex-a8.md: Likewise.
* config/arm/cortex-a9.md: Likewise.
* config/arm/cortex-m4.md: Likewise.
* config/arm/cortex-m7.md: Likewise.
* config/arm/cortex-r4.md: Likewise.
* config/arm/exynos-m1.md: Likewise.
* config/arm/fa526.md: Likewise.
* config/arm/fa606te.md: Likewise.
* config/arm/fa626te.md: Likewise.
* config/arm/fa726te.md: Likewise.
* config/arm/fmp626.md: Likewise.
* config/arm/iwmmxt.md: Likewise.
* config/arm/ldmstm.md: Likewise.
* config/arm/marvell-pj4.md: Likewise.
* config/arm/xgene1.md: Likewise.
* config/aarch64/thunderx.md: Likewise.
* config/aarch64/thunderx2t99.md: Likewise.
* config/aarch64/falkor.md: Likewise.
From-SVN: r252025
Martin Liska [Tue, 12 Sep 2017 14:32:39 +0000 (16:32 +0200)]
Fix GIMPLE FE test (PR testsuite/82114)
2017-09-12 Martin Liska <mliska@suse.cz>
PR testsuite/82114
* gcc.dg/gimplefe-14.c (main): Add handling of case 0.
From-SVN: r252024
Nathan Sidwell [Tue, 12 Sep 2017 14:25:17 +0000 (14:25 +0000)]
c-common.c (field_decl_cmp, [...]): Move to c/c-decl.c.
c-family/
* c-common.c (field_decl_cmp, resort_data, resort_field_decl_cmp,
resort_sorted_fields): Move to c/c-decl.c.
* c-common.h (field_decl_cmp, resort_sorted_fields): Delete.
(struct sorted_fields_type): Move to c/c-lang.h.
c/
* c-decl.c (field_decl_cmp, resort_data, resort_field_decl_cmp,
resort_sorted_fields): Moved from c-family/c-common.c.
* c-lang.h (struct sorted_fields_type): Moved from c-family/c-common.h.
From-SVN: r252023
Martin Liska [Tue, 12 Sep 2017 14:24:29 +0000 (16:24 +0200)]
Reduce lookup_attribute memory footprint.
2017-09-12 Martin Liska <mliska@suse.cz>
* attribs.c (private_lookup_attribute): New function.
* attribs.h (private_lookup_attribute): Declared here.
(lookup_attribute): Called from this place.
From-SVN: r252022
Richard Biener [Tue, 12 Sep 2017 14:15:37 +0000 (14:15 +0000)]
re PR tree-optimization/82157 (ICE on valid code at -O2 and -O3: cannot update SSA form)
2017-09-12 Richard Biener <rguenther@suse.de>
PR tree-optimization/82157
* tree-ssa-pre.c (remove_dead_inserted_code): Do not remove
stmts with side-effects.
* gcc.dg/torture/pr82157.c: New testcase.
From-SVN: r252020
Jonathan Wakely [Tue, 12 Sep 2017 14:03:06 +0000 (15:03 +0100)]
PR libstdc++/79433 no #error for including TS headers with wrong -std
PR libstdc++/79433
* include/Makefile.am: Remove <bits/c++14_warning.h>.
* include/Makefile.in: Regenerate.
* include/bits/c++14_warning.h: Remove.
* include/experimental/algorithm: Do not include <c++14_warning.h>.
* include/experimental/any: Likewise.
* include/experimental/array: Likewise.
* include/experimental/bits/erase_if.h: Likewise.
* include/experimental/bits/lfts_config.h: Likewise.
* include/experimental/bits/shared_ptr.h: Likewise.
* include/experimental/bits/string_view.tcc: Likewise.
* include/experimental/chrono: Likewise.
* include/experimental/deque: Likewise.
* include/experimental/filesystem: Do not include <c++0x_warning.h>.
* include/experimental/forward_list: Do not include <c++14_warning.h>.
* include/experimental/functional: Likewise.
* include/experimental/iterator: Likewise.
* include/experimental/list: Likewise.
* include/experimental/map: Likewise.
* include/experimental/memory: Likewise.
* include/experimental/numeric: Likewise.
* include/experimental/optional: Likewise.
* include/experimental/propagate_const: Likewise.
* include/experimental/ratio: Likewise.
* include/experimental/regex: Likewise.
* include/experimental/set: Likewise.
* include/experimental/string: Likewise.
* include/experimental/string_view: Likewise.
* include/experimental/system_error: Likewise.
* include/experimental/tuple: Likewise.
* include/experimental/type_traits: Likewise.
* include/experimental/unordered_map: Likewise.
* include/experimental/unordered_set: Likewise.
* include/experimental/vector: Likewise.
* testsuite/experimental/any/misc/any_cast_neg.cc: Adjust dg-error
line number.
* testsuite/experimental/array/neg.cc: Likewise.
* testsuite/experimental/propagate_const/assignment/move_neg.cc:
Likewise.
* testsuite/experimental/propagate_const/cons/move_neg.cc: Likewise.
* testsuite/experimental/propagate_const/requirements2.cc: Likewise.
* testsuite/experimental/propagate_const/requirements3.cc: Likewise.
* testsuite/experimental/propagate_const/requirements4.cc: Likewise.
* testsuite/experimental/propagate_const/requirements5.cc: Likewise.
From-SVN: r252019
Jonathan Wakely [Tue, 12 Sep 2017 14:02:59 +0000 (15:02 +0100)]
PR libstdc++/79433 no #error for including headers with wrong -std
PR libstdc++/79433
* doc/xml/manual/status_cxx2017.xml: Update feature-test macros.
* doc/html/*: Regenerate.
* include/Makefile.am: Remove <bits/c++17_warning.h>.
* include/Makefile.in: Regenerate.
* include/bits/c++17_warning.h: Remove.
* include/bits/string_view.tcc: Do not include <bits/c++17_warning.h>
for pre-C++17 modes.
* include/std/any: Likewise.
(__cpp_lib_any): Define.
* include/std/mutex (__cpp_lib_scoped_lock): Adjust value as per new
SD-6 draft.
* include/std/numeric (__cpp_lib_gcd_lcm): Define as per new SD-6
draft.
* include/std/optional: Do not include <bits/c++17_warning.h>.
(__cpp_lib_optional): Define.
* include/std/shared_mutex: Do not include <bits/c++14_warning.h>.
* include/std/string_view: Do not include <bits/c++17_warning.h>.
(__cpp_lib_string_view): Define.
* include/std/variant: Do not include <bits/c++17_warning.h>.
(__cpp_lib_variant): Define.
* testsuite/20_util/optional/cons/value_neg.cc: Adjust dg-error line
numbers.
* testsuite/26_numerics/gcd/1.cc: Test for __cpp_lib_gcd_lcm.
* testsuite/26_numerics/gcd/gcd_neg.cc: Adjust dg-error line
numbers.
* testsuite/26_numerics/lcm/1.cc: Test for __cpp_lib_gcd_lcm.
* testsuite/26_numerics/lcm/lcm_neg.cc: Adjust dg-error line
numbers.
* testsuite/30_threads/scoped_lock/requirements/typedefs.cc: Adjust
expected value of __cpp_lib_scoped_lock.
From-SVN: r252018
Jonathan Wakely [Tue, 12 Sep 2017 13:31:20 +0000 (14:31 +0100)]
PR libstdc++/70483 make std::experimental::string_view fully constexpr
PR libstdc++/70483
* include/experimental/bits/string_view.tcc (basic_string_view::find)
(basic_string_view::rfind, basic_string_view::find_first_of)
(basic_string_view::find_last_of, basic_string_view::find_first_not_of)
(basic_string_view::find_last_not_of): Add constexpr specifier.
* include/experimental/string_view (basic_string_view::remove_prefix)
(basic_string_view::remove_suffix, basic_string_view::swap)
(basic_string_view::compare, basic_string_view::find)
(basic_string_view::rfind, basic_string_view::find_first_of)
(basic_string_view::find_last_of, basic_string_view::find_first_not_of)
(basic_string_view::find_last_not_of, operator==, operator!=)
(operator<, operator>, operator<=, operator>=): Likewise.
* testsuite/experimental/string_view/operations/compare/char/70483.cc:
New.
From-SVN: r252017
Richard Sandiford [Tue, 12 Sep 2017 13:29:36 +0000 (13:29 +0000)]
Turn HARD_REGNO_NREGS into a target hook
2017-09-12 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* target.def (hard_regno_nregs): New hook.
(class_max_nregs): Refer to it instead of HARD_REGNO_NREGS.
* targhooks.h (default_hard_regno_nregs): Declare.
* targhooks.c (default_hard_regno_nregs): New function.
* doc/tm.texi.in (HARD_REGNO_NREGS): Replace with...
(TARGET_HARD_REGNO_NREGS): ...this hook.
(HARD_REGNO_NREGS_HAS_PADDING): Update accordingly.
(CLASS_MAX_NREGS): Likewise.
* doc/tm.texi: Regenerate.
* reginfo.c (init_reg_modes_target): Use targetm.hard_regno_nregs
instead of HARD_REGNO_NREGS.
* rtl.h (REG_NREGS): Refer to TARGET_HARD_REGNO_NREGS rather than
HARD_REGNO_NREGS in the comment.
* config/aarch64/aarch64.h (HARD_REGNO_NREGS): Delete.
* config/aarch64/aarch64-protos.h (aarch64_hard_regno_nregs): Delete.
* config/aarch64/aarch64.c (aarch64_hard_regno_nregs): Make static.
Return an unsigned int.
(TARGET_HARD_REGNO_NREGS): Redefine.
* config/alpha/alpha.h (HARD_REGNO_NREGS): Delete.
* config/arc/arc.h (HARD_REGNO_NREGS): Delete.
* config/arc/arc.c (TARGET_HARD_REGNO_NREGS): Redefine.
(arc_hard_regno_nregs): New function.
* config/arm/arm.h (HARD_REGNO_NREGS): Delete.
* config/arm/arm.c (TARGET_HARD_REGNO_NREGS): Redefine.
(arm_hard_regno_nregs): New function.
* config/avr/avr.h (HARD_REGNO_NREGS): Delete.
* config/bfin/bfin.h (HARD_REGNO_NREGS): Delete.
* config/bfin/bfin.c (bfin_hard_regno_nregs): New function.
(TARGET_HARD_REGNO_NREGS): Redefine.
* config/c6x/c6x.h (HARD_REGNO_NREGS): Delete.
* config/cr16/cr16.h (LONG_REG_P): Use targetm.hard_regno_nregs.
(HARD_REGNO_NREGS): Delete.
* config/cr16/cr16.c (TARGET_HARD_REGNO_NREGS): Redefine.
(cr16_hard_regno_nregs): New function.
(cr16_memory_move_cost): Use it instead of HARD_REGNO_NREGS.
* config/cris/cris.h (HARD_REGNO_NREGS): Delete.
* config/cris/cris.c (TARGET_HARD_REGNO_NREGS): Redefine.
(cris_hard_regno_nregs): New function.
* config/epiphany/epiphany.h (HARD_REGNO_NREGS): Delete.
* config/fr30/fr30.h (HARD_REGNO_NREGS): Delete.
(CLASS_MAX_NREGS): Use targetm.hard_regno_nregs.
* config/frv/frv.h (HARD_REGNO_NREGS): Delete.
(CLASS_MAX_NREGS): Remove outdated copy of documentation.
* config/frv/frv-protos.h (frv_hard_regno_nregs): Delete.
* config/frv/frv.c (TARGET_HARD_REGNO_NREGS): Redefine.
(frv_hard_regno_nregs): Make static. Take and return an
unsigned int.
(frv_class_max_nregs): Remove outdated copy of documentation.
* config/ft32/ft32.h (HARD_REGNO_NREGS): Delete.
* config/h8300/h8300.h (HARD_REGNO_NREGS): Delete.
* config/h8300/h8300-protos.h (h8300_hard_regno_nregs): Delete.
* config/h8300/h8300.c (h8300_hard_regno_nregs): Delete.
* config/i386/i386.h (HARD_REGNO_NREGS): Delete.
* config/i386/i386.c (ix86_hard_regno_nregs): New function.
(TARGET_HARD_REGNO_NREGS): Redefine.
* config/ia64/ia64.h (HARD_REGNO_NREGS): Delete.
(CLASS_MAX_NREGS): Update comment.
* config/ia64/ia64.c (TARGET_HARD_REGNO_NREGS): Redefine.
(ia64_hard_regno_nregs): New function.
* config/iq2000/iq2000.h (HARD_REGNO_NREGS): Delete.
* config/lm32/lm32.h (HARD_REGNO_NREGS): Delete.
* config/m32c/m32c.h (HARD_REGNO_NREGS): Delete.
* config/m32c/m32c-protos.h (m32c_hard_regno_nregs): Delete.
* config/m32c/m32c.c (m32c_hard_regno_nregs_1): Take and return
an unsigned int.
(m32c_hard_regno_nregs): Likewise. Make static.
(TARGET_HARD_REGNO_NREGS): Redefine.
* config/m32r/m32r.h (HARD_REGNO_NREGS): Delete.
* config/m68k/m68k.h (HARD_REGNO_NREGS): Delete.
* config/m68k/m68k.c (TARGET_HARD_REGNO_NREGS): Redefine.
(m68k_hard_regno_nregs): New function.
* config/mcore/mcore.h (HARD_REGNO_NREGS): Delete.
* config/microblaze/microblaze.h (HARD_REGNO_NREGS): Delete.
* config/mips/mips.h (HARD_REGNO_NREGS): Delete.
* config/mips/mips-protos.h (mips_hard_regno_nregs): Delete.
* config/mips/mips.c (mips_hard_regno_nregs): Make static.
Take and return an unsigned int.
(TARGET_HARD_REGNO_NREGS): Redefine.
* config/mmix/mmix.h (HARD_REGNO_NREGS): Delete.
(CLASS_MAX_NREGS): Use targetm.hard_regno_nregs.
* config/mn10300/mn10300.h (HARD_REGNO_NREGS): Delete.
* config/moxie/moxie.h (HARD_REGNO_NREGS): Delete.
* config/msp430/msp430.h (HARD_REGNO_NREGS): Delete.
* config/msp430/msp430-protos.h (msp430_hard_regno_nregs): Delete.
* config/msp430/msp430.c (TARGET_HARD_REGNO_NREGS): Redefine.
(msp430_hard_regno_nregs): Make static. Take and return an
unsigned int.
* config/nds32/nds32.h (HARD_REGNO_NREGS): Delete.
* config/nds32/nds32-protos.h (nds32_hard_regno_nregs): Delete.
* config/nds32/nds32.c (nds32_hard_regno_nregs): Delete.
(nds32_hard_regno_mode_ok): Use targetm.hard_regno_nregs.
* config/nios2/nios2.h (HARD_REGNO_NREGS): Delete.
* config/nvptx/nvptx.h (HARD_REGNO_NREGS): Delete.
* config/nvptx/nvptx.c (nvptx_hard_regno_nregs): New function.
(TARGET_HARD_REGNO_NREGS): Redefine.
* config/pa/pa32-regs.h (HARD_REGNO_NREGS): Rename to...
(PA_HARD_REGNO_NREGS): ...this.
* config/pa/pa64-regs.h (HARD_REGNO_NREGS): Rename to...
(PA_HARD_REGNO_NREGS): ...this.
* config/pa/pa.c (TARGET_HARD_REGNO_NREGS): Redefine.
(pa_hard_regno_nregs): New function.
* config/pdp11/pdp11.h (HARD_REGNO_NREGS): Delete.
* config/pdp11/pdp11.c (TARGET_HARD_REGNO_NREGS): Redefine.
(pdp11_hard_regno_nregs): New function.
* config/powerpcspe/powerpcspe.h (HARD_REGNO_NREGS): Delete.
* config/powerpcspe/powerpcspe.c (TARGET_HARD_REGNO_NREGS): Redefine.
(rs6000_hard_regno_nregs_hook): New function.
* config/riscv/riscv.h (HARD_REGNO_NREGS): Delete.
* config/riscv/riscv-protos.h (riscv_hard_regno_nregs): Delete.
* config/riscv/riscv.c (riscv_hard_regno_nregs): Make static.
Take and return an unsigned int. Move earlier in file.
(TARGET_HARD_REGNO_NREGS): Redefine.
* config/rl78/rl78.h (HARD_REGNO_NREGS): Delete.
* config/rl78/rl78-protos.h (rl78_hard_regno_nregs): Delete.
* config/rl78/rl78.c (TARGET_HARD_REGNO_NREGS): Reefine.
(rl78_hard_regno_nregs): Make static. Take and return an
unsigned int.
* config/rs6000/rs6000.h (HARD_REGNO_NREGS): Delete.
* config/rs6000/rs6000.c (TARGET_HARD_REGNO_NREGS): Redefine.
(rs6000_hard_regno_nregs_hook): New function.
* config/rx/rx.h (HARD_REGNO_NREGS): Delete.
* config/rx/rx.c (rx_hard_regno_nregs): New function.
(TARGET_HARD_REGNO_NREGS): Redefine.
* config/s390/s390.h (HARD_REGNO_NREGS): Delete.
* config/s390/s390.c (REGNO_PAIR_OK): Use s390_hard_regno_nregs
instead of HARD_REGNO_NREGS.
(s390_hard_regno_nregs): New function.
(s390_hard_regno_mode_ok): Add comment from s390.h.
(TARGET_HARD_REGNO_NREGS): Redefine.
* config/sh/sh.h (HARD_REGNO_NREGS): Delete.
* config/sh/sh.c (TARGET_HARD_REGNO_NREGS): Redefine.
(sh_hard_regno_nregs): New function.
(sh_pass_in_reg_p): Use it.
* config/sparc/sparc.h (HARD_REGNO_NREGS): Delete.
* config/sparc/sparc.c (TARGET_HARD_REGNO_NREGS): Redefine.
(sparc_hard_regno_nregs): New function.
* config/spu/spu.h (HARD_REGNO_NREGS): Delete.
* config/spu/spu.c (spu_hard_regno_nregs): New function.
(spu_function_arg_advance): Use it, supplying a valid register number.
(TARGET_HARD_REGNO_NREGS): Redefine.
* config/stormy16/stormy16.h (HARD_REGNO_NREGS): Delete.
* config/tilegx/tilegx.h (HARD_REGNO_NREGS): Delete.
* config/tilepro/tilepro.h (HARD_REGNO_NREGS): Delete.
* config/v850/v850.h (HARD_REGNO_NREGS): Delete.
* config/vax/vax.h (HARD_REGNO_NREGS): Delete.
* config/visium/visium.h (HARD_REGNO_NREGS): Delete.
(CLASS_MAX_NREGS): Remove copy of old documentation.
* config/visium/visium.c (TARGET_HARD_REGNO_NREGS): Redefine.
(visium_hard_regno_nregs): New function.
(visium_hard_regno_mode_ok): Use it instead of HARD_REGNO_NREGS.
* config/xtensa/xtensa.h (HARD_REGNO_NREGS): Delete.
* config/xtensa/xtensa.c (TARGET_HARD_REGNO_NREGS): Redefine.
xtensa_hard_regno_nregs): New function.
* system.h (HARD_REGNO_NREGS): Poison.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r252016
Richard Sandiford [Tue, 12 Sep 2017 13:29:18 +0000 (13:29 +0000)]
Use hard_regno_nregs instead of HARD_REGNO_NREGS
This patch converts some places that use HARD_REGNO_NREGS to use
hard_regno_nregs, in places where the initialisation has obviously
already taken place.
2017-09-12 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* config/arm/arm.h (THUMB_SECONDARY_INPUT_RELOAD_CLASS): Use
hard_regno_nregs instead of HARD_REGNO_NREGS.
(THUMB_SECONDARY_OUTPUT_RELOAD_CLASS): Likewise.
* config/c6x/c6x.c (c6x_expand_prologue): Likewise.
(c6x_expand_epilogue): Likewise.
* config/frv/frv.c (frv_alloc_temp_reg): Likewise.
(frv_read_iacc_argument): Likewise.
* config/sh/sh.c: Include regs.h.
(sh_print_operand): Use hard_regno_nregs instead of HARD_REGNO_NREGS.
(regs_used): Likewise.
(output_stack_adjust): Likewise.
* config/xtensa/xtensa.c (xtensa_copy_incoming_a7): Likewise.
* expmed.c: Include regs.h.
(store_bit_field_1): Use hard_regno_nregs instead of HARD_REGNO_NREGS.
* ree.c: Include regs.h.
(combine_reaching_defs): Use hard_regno_nregs instead of
HARD_REGNO_NREGS.
(add_removable_extension): Likewise.
From-SVN: r252015
Richard Sandiford [Tue, 12 Sep 2017 13:29:05 +0000 (13:29 +0000)]
Convert hard_regno_nregs to a function
This patch converts hard_regno_nregs into an inline function, which
in turn allows hard_regno_nregs to be used as the name of a targetm
field. This is just a mechanical change.
2017-09-12 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* regs.h (hard_regno_nregs): Turn into a function.
(end_hard_regno): Update accordingly.
* caller-save.c (setup_save_areas): Likewise.
(save_call_clobbered_regs): Likewise.
(replace_reg_with_saved_mem): Likewise.
(insert_restore): Likewise.
(insert_save): Likewise.
* combine.c (can_change_dest_mode): Likewise.
(move_deaths): Likewise.
(distribute_notes): Likewise.
* config/mips/mips.c (mips_hard_regno_call_part_clobbered): Likewise.
* config/powerpcspe/powerpcspe.c (rs6000_cannot_change_mode_class)
(rs6000_split_multireg_move): Likewise.
(rs6000_register_move_cost): Likewise.
(rs6000_memory_move_cost): Likewise.
* config/rs6000/rs6000.c (rs6000_cannot_change_mode_class): Likewise.
(rs6000_split_multireg_move): Likewise.
(rs6000_register_move_cost): Likewise.
(rs6000_memory_move_cost): Likewise.
* cselib.c (cselib_reset_table): Likewise.
(cselib_lookup_1): Likewise.
* emit-rtl.c (set_mode_and_regno): Likewise.
* function.c (aggregate_value_p): Likewise.
* ira-color.c (setup_profitable_hard_regs): Likewise.
(check_hard_reg_p): Likewise.
(calculate_saved_nregs): Likewise.
(assign_hard_reg): Likewise.
(improve_allocation): Likewise.
(calculate_spill_cost): Likewise.
* ira-emit.c (modify_move_list): Likewise.
* ira-int.h (ira_hard_reg_set_intersection_p): Likewise.
(ira_hard_reg_in_set_p): Likewise.
* ira.c (setup_reg_mode_hard_regset): Likewise.
(clarify_prohibited_class_mode_regs): Likewise.
(check_allocation): Likewise.
* lra-assigns.c (find_hard_regno_for_1): Likewise.
(lra_setup_reg_renumber): Likewise.
(setup_try_hard_regno_pseudos): Likewise.
(spill_for): Likewise.
(assign_hard_regno): Likewise.
(setup_live_pseudos_and_spill_after_risky_transforms): Likewise.
* lra-constraints.c (in_class_p): Likewise.
(lra_constraint_offset): Likewise.
(simplify_operand_subreg): Likewise.
(lra_constraints): Likewise.
(split_reg): Likewise.
(split_if_necessary): Likewise.
(invariant_p): Likewise.
(inherit_in_ebb): Likewise.
* lra-lives.c (process_bb_lives): Likewise.
* lra-remat.c (reg_overlap_for_remat_p): Likewise.
(get_hard_regs): Likewise.
(do_remat): Likewise.
* lra-spills.c (assign_spill_hard_regs): Likewise.
* mode-switching.c (create_pre_exit): Likewise.
* postreload.c (reload_combine_recognize_pattern): Likewise.
* recog.c (peep2_find_free_register): Likewise.
* regcprop.c (kill_value_regno): Likewise.
(set_value_regno): Likewise.
(copy_value): Likewise.
(maybe_mode_change): Likewise.
(find_oldest_value_reg): Likewise.
(copyprop_hardreg_forward_1): Likewise.
* regrename.c (check_new_reg_p): Likewise.
(regrename_do_replace): Likewise.
* reload.c (push_reload): Likewise.
(combine_reloads): Likewise.
(find_dummy_reload): Likewise.
(operands_match_p): Likewise.
(find_reloads): Likewise.
(find_equiv_reg): Likewise.
(reload_adjust_reg_for_mode): Likewise.
* reload1.c (count_pseudo): Likewise.
(count_spilled_pseudo): Likewise.
(find_reg): Likewise.
(clear_reload_reg_in_use): Likewise.
(free_for_value_p): Likewise.
(allocate_reload_reg): Likewise.
(choose_reload_regs): Likewise.
(reload_adjust_reg_for_temp): Likewise.
(emit_reload_insns): Likewise.
(delete_output_reload): Likewise.
* rtlanal.c (subreg_get_info): Likewise.
* sched-deps.c (sched_analyze_reg): Likewise.
* sel-sched.c (init_regs_for_mode): Likewise.
(mark_unavailable_hard_regs): Likewise.
(choose_best_reg_1): Likewise.
(verify_target_availability): Likewise.
* valtrack.c (dead_debug_insert_temp): Likewise.
* var-tracking.c (track_loc_p): Likewise.
(emit_note_insn_var_location): Likewise.
* varasm.c (make_decl_rtl): Likewise.
* reginfo.c (choose_hard_reg_mode): Likewise.
(init_reg_modes_target): Refer directly to
this_target_regs->x_hard_regno_nregs.
From-SVN: r252014
Richard Sandiford [Tue, 12 Sep 2017 13:28:37 +0000 (13:28 +0000)]
Make more use of in_hard_reg_set_p
An upcoming patch will convert hard_regno_nregs into an inline
function, which in turn allows hard_regno_nregs to be used as the
name of a targetm field. This patch rewrites a use that can use
in_hard_reg_set_p instead.
2017-09-12 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* ira-costs.c (record_operand_costs): Use in_hard_reg_set_p
instead of hard_regno_nregs.
From-SVN: r252013
Richard Sandiford [Tue, 12 Sep 2017 13:28:27 +0000 (13:28 +0000)]
Make more use of end_hard_regno
An upcoming patch will convert hard_regno_nregs into an inline
function, which in turn allows hard_regno_nregs to be used as the
name of a targetm field. This patch rewrites uses that can use
end_hard_regno instead.
2017-09-12 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* config/aarch64/aarch64.c (aarch64_hard_regno_mode_ok): Use
end_hard_regno instead of hard_regno_nregs.
* config/s390/s390.c (s390_reg_clobbered_rtx): Likewise.
* config/sparc/sparc.h (ASM_DECLARE_REGISTER_GLOBAL): Likewise.
* config/visium/visium.c (visium_hard_regno_mode_ok): Likewise.
* ira-color.c (improve_allocation): Likewise.
* lra-assigns.c (find_hard_regno_for_1): Likewise.
* lra-lives.c (mark_regno_live): Likewise.
(mark_regno_dead): Likewise.
* lra-remat.c (operand_to_remat): Likewise.
* lra.c (collect_non_operand_hard_regs): Likewise.
* postreload.c (reload_combine_note_store): Likewise.
(move2add_valid_value_p): Likewise.
* reload.c (regno_clobbered_p): Likewise.
From-SVN: r252012
Richard Sandiford [Tue, 12 Sep 2017 13:28:18 +0000 (13:28 +0000)]
Make more use of END_REGNO
An upcoming patch will convert hard_regno_nregs into an inline
function, which in turn allows hard_regno_nregs to be used as the
name of a targetm field. This patch rewrites uses that are more
easily (and efficiently) written as END_REGNO.
2017-09-12 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* config/frv/frv.c (FOR_EACH_REGNO): Use END_REGNO instead of
hard_regno_nregs.
* config/v850/v850.c (v850_reorg): Likewise.
* reload.c (refers_to_regno_for_reload_p): Likewise.
(find_equiv_reg): Likewise.
* reload1.c (reload_reg_reaches_end_p): Likewise.
From-SVN: r252011
Richard Sandiford [Tue, 12 Sep 2017 13:28:08 +0000 (13:28 +0000)]
Make more use of REG_NREGS
An upcoming patch will convert hard_regno_nregs into an inline
function, which in turn allows hard_regno_nregs to be used as the
name of a targetm field. This patch rewrites uses that are more
easily (and efficiently) written as REG_NREGS.
2017-09-12 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* caller-save.c (add_used_regs): Use REG_NREGS instead of
hard_regno_nregs.
* config/aarch64/aarch64.c (aarch64_split_combinev16qi): Likewise.
* config/arm/arm.c (output_move_neon): Likewise.
(arm_attr_length_move_neon): Likewise.
(neon_split_vcombine): Likewise.
* config/c6x/c6x.c (c6x_mark_reg_read): Likewise.
(c6x_mark_reg_written): Likewise.
(c6x_dwarf_register_span): Likewise.
* config/i386/i386.c (ix86_save_reg): Likewise.
* config/ia64/ia64.c (mark_reg_gr_used_mask): Likewise.
(rws_access_reg): Likewise.
* config/s390/s390.c (s390_call_saved_register_used): Likewise.
* mode-switching.c (create_pre_exit): Likewise.
* ree.c (combine_reaching_defs): Likewise.
(add_removable_extension): Likewise.
* regcprop.c (find_oldest_value_reg): Likewise.
(copyprop_hardreg_forward_1): Likewise.
* reload.c (reload_inner_reg_of_subreg): Likewise.
(push_reload): Likewise.
(combine_reloads): Likewise.
(find_dummy_reload): Likewise.
(reload_adjust_reg_for_mode): Likewise.
* reload1.c (find_reload_regs): Likewise.
(forget_old_reloads_1): Likewise.
(reload_reg_free_for_value_p): Likewise.
(reload_adjust_reg_for_temp): Likewise.
(emit_reload_insns): Likewise.
(delete_output_reload): Likewise.
* sel-sched.c (choose_best_reg_1): Likewise.
(choose_best_pseudo_reg): Likewise.
From-SVN: r252010
Richard Sandiford [Tue, 12 Sep 2017 13:27:55 +0000 (13:27 +0000)]
Turn SLOW_UNALIGNED_ACCESS into a target hook
2017-09-12 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* defaults.h (SLOW_UNALIGNED_ACCESS): Delete.
* target.def (slow_unaligned_access): New hook.
* targhooks.h (default_slow_unaligned_access): Declare.
* targhooks.c (default_slow_unaligned_access): New function.
* doc/tm.texi.in (SLOW_UNALIGNED_ACCESS): Replace with...
(TARGET_SLOW_UNALIGNED_ACCESS): ...this.
* doc/tm.texi: Regenerate.
* config/alpha/alpha.h (SLOW_UNALIGNED_ACCESS): Delete.
* config/arm/arm.h (SLOW_UNALIGNED_ACCESS): Delete.
* config/i386/i386.h (SLOW_UNALIGNED_ACCESS): Delete commented-out
definition.
* config/powerpcspe/powerpcspe.h (SLOW_UNALIGNED_ACCESS): Delete.
* config/powerpcspe/powerpcspe.c (TARGET_SLOW_UNALIGNED_ACCESS):
Redefine.
(rs6000_slow_unaligned_access): New function.
(rs6000_emit_move): Use it instead of SLOW_UNALIGNED_ACCESS.
(expand_block_compare): Likewise.
(expand_strn_compare): Likewise.
(rs6000_rtx_costs): Likewise.
* config/riscv/riscv.h (SLOW_UNALIGNED_ACCESS): Delete.
(riscv_slow_unaligned_access): Likewise.
* config/riscv/riscv.c (riscv_slow_unaligned_access): Rename to...
(riscv_slow_unaligned_access_p): ...this and make static.
(riscv_option_override): Update accordingly.
(riscv_slow_unaligned_access): New function.
(TARGET_SLOW_UNALIGNED_ACCESS): Redefine.
* config/rs6000/rs6000.h (SLOW_UNALIGNED_ACCESS): Delete.
* config/rs6000/rs6000.c (TARGET_SLOW_UNALIGNED_ACCESS): Redefine.
(rs6000_slow_unaligned_access): New function.
(rs6000_emit_move): Use it instead of SLOW_UNALIGNED_ACCESS.
(rs6000_rtx_costs): Likewise.
* config/rs6000/rs6000-string.c (expand_block_compare)
(expand_strn_compare): Use targetm.slow_unaligned_access instead
of SLOW_UNALIGNED_ACCESS.
* config/tilegx/tilegx.h (SLOW_UNALIGNED_ACCESS): Delete.
* config/tilepro/tilepro.h (SLOW_UNALIGNED_ACCESS): Delete.
* calls.c (expand_call): Use targetm.slow_unaligned_access instead
of SLOW_UNALIGNED_ACCESS.
* expmed.c (simple_mem_bitfield_p): Likewise.
* expr.c (alignment_for_piecewise_move): Likewise.
(emit_group_load_1): Likewise.
(emit_group_store): Likewise.
(copy_blkmode_from_reg): Likewise.
(emit_push_insn): Likewise.
(expand_assignment): Likewise.
(store_field): Likewise.
(expand_expr_real_1): Likewise.
* gimple-fold.c (gimple_fold_builtin_memory_op): Likewise.
* lra-constraints.c (simplify_operand_subreg): Likewise.
* stor-layout.c (bit_field_mode_iterator::next_mode): Likewise.
* gimple-ssa-store-merging.c: Likewise in block comment at start
of file.
* tree-ssa-strlen.c: Include target.h.
(handle_builtin_memcmp): Use targetm.slow_unaligned_access instead
of SLOW_UNALIGNED_ACCESS.
* system.h (SLOW_UNALIGNED_ACCESS): Poison.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r252009
Richard Sandiford [Tue, 12 Sep 2017 13:27:13 +0000 (13:27 +0000)]
PR81285: Fix uninitialised variable in emit_store_flag_int
2017-09-12 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
PR rtl-optimization/82185
* expmed.c (emit_store_flag_int): Only test tem if it has been
initialized.
From-SVN: r252008
projects / gcc.git / log