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Olof Kindgren [Fri, 23 Aug 2019 12:09:06 +0000 (14:09 +0200)]
Add Nexys Video support
Olof Kindgren [Fri, 23 Aug 2019 11:32:05 +0000 (13:32 +0200)]
Add FuseSoC core description file with Nexys A7 support
Olof Kindgren [Fri, 23 Aug 2019 11:19:11 +0000 (13:19 +0200)]
Add constraint file for Nexys A7
Olof Kindgren [Fri, 23 Aug 2019 11:18:39 +0000 (13:18 +0200)]
Expose ram init file and memory size through toplevel
Olof Kindgren [Fri, 23 Aug 2019 11:17:35 +0000 (13:17 +0200)]
Add dummy clock generator
Anton Blanchard [Fri, 23 Aug 2019 06:23:53 +0000 (16:23 +1000)]
Add a few more FPGA related files
Add a temporary gcc patch to remove hardware divide instructions.
Also add a firmware.hex file built with a gcc with the above patch.
Right now micropython assumes 1MB of BRAM, which limits the FPGAs
we can run on. We should be able to cut it down somewhat.
Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
Anton Blanchard [Thu, 22 Aug 2019 06:46:13 +0000 (16:46 +1000)]
Initial import of microwatt
Signed-off-by: Anton Blanchard <anton@linux.ibm.com>