meta: Make _mesa_meta_texture_object_from_renderbuffer static

   text     data     bss      dec    hex  filename
12244974 1344936 1290748 14880658 e30f92  before/lib64/dri/i965_dri.so
12244854 1344936 1290748 14880538 e30f1a  after/lib64/dri/i965_dri.so

v2: Put static on the function definition too.  Suggested by Paulo.

v3: Reformat prototype.  Suggested by Jason.

Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> [v2]
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/856>

i965: Assert that blorp always handles color blits

Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/856>

nir/validate: validate the stride for deref_ptr_as_array

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4068>

nir/deref: copy ptr_stride when rematerializing

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4068>

targets/opencl: fix build against LLVM>=10 with Polly support

see https://bugs.llvm.org/show_bug.cgi?id=44870

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4511>

freedreno: Avoid duplicate BO relocs in FD_RINGBUFFER_OBJECTs.

For the piglit drawoverhead case, 5/18 of the objects' relocs were
duplicated.  We can dedupe them at object create time (since objects are
long-lived) and avoid repeated relocation work at emit time.

nohw drawoverhead program statechange throughput 2.34082% +/- 0.645832%
(n=10).

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5020>

freedreno: Fix resource layout dump loop.

Apparently I've never dumped a fully populated slices array, so the 0-init
always terminated the loop.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5020>

zink: disable vkCmdResolveImage when respecting render-condition

vkCmdResolveImage doesn't respect render-condition, so let's fall back
to blitter in this case instead.

Fixes: 80d7cc6f129 ("zink: enable conditional rendering if available")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5008>

anv: Fix deadlock in anv_timelines_wait

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2945
Fixes: 34f32a6d6648073e2fda3fb78377124fb32bb288
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5005>

gitlab-ci: Install g++-mingw-w64-x86-64-win32 instead of mingw-w64

mingw-w64 pulls in a lot more packages we don't need.

g++-mingw-w64-x86-64-win32 is only available in Debian testing, so get
all mingw packages from there.

Acked-by: Andres Gomez <agomez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4851>

gitlab-ci: Move lib{drm,pciaccess}-dev cross packages out of loop

Simpler like this, since they're only needed for one cross architecture
each.

Acked-by: Andres Gomez <agomez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4851>

gitlab-ci: Install WINE from Debian testing

Instead of a third-party repository which has proved unreliable at
times.

This pulls in glibc 2.30 from testing in the x86_build image, so we need
to update the x86_test-{gl,vk} images to match.

Acked-by: Andres Gomez <agomez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4851>

gitlab-ci: Add Debian testing repository for x86_build image

We don't want LLVM 8 packages to be pulled in from testing though (it
would make installing llvm-8-dev for cross architectures a lot more
complicated), so explicitly select buster-backports for them (they were
already implicitly installed from there before, since they're not
available in buster proper).

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4851>

gitlab-ci: Move down container_pre_build.sh invocation in x86_build.sh

It was in the middle of package installations.

Acked-by: Andres Gomez <agomez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4851>

gitlab-ci: Update to current templates

Notable changes:

* No longer generate a separate *-built-by-job-* image tag, instead
  store the pipeline/job information as labels in the image.
* Clean up some package information files which were accidentally left
  before, possibly resulting in slightly smaller images.

Acked-by: Andres Gomez <agomez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4851>

zink. Changed sampler default name.

Changed the sampler variable name from 'sampler' to 'sampler_<num>' to stop symbol classes in the Metal MSL shaders, as 'sampler' is a keyword.
Improves human readability when debugging issues.

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4211>

radv: enable shaderResourceMinLod

This feature was missing for unknown reasons.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4989>

ac/llvm: add support for texturing with clamped LOD

This is a requirement for the shaderResourceMinLod feature which
allows to clamp LOD. This uses all image_sample_*_cl variants.

All dEQP-VK.glsl.texture_functions.texture*clamp.* pass.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4989>

aco: add support for texturing with clamped LOD

This is a requirement for the shaderResourceMinLod feature which
allows to clamp LOD. This uses all image_sample_*_cl variants.

All dEQP-VK.glsl.texture_functions.texture*clamp.* pass.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4989>

aco: remove useless check for nir_tex_src_bias

I think only nir_texop_txb can have a bias operand anyways.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4989>

CI: Windows: Build LLVM and llvmpipe

We will eventually need to build our own LLVM on Windows in order to
build libclc and other bits which are required for the d3d12 build, as
well as to be able to test SPIR-V/OpenCL on llvmpipe.

Start doing this now, building into the base container, and exercise
this by building llvmpipe under Windows.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4946>

llvmpipe: Expect increased exp precision on Windows

'Newer' versions of MSVCRT than 2013 appear to have fixed the bug around expf
precision which caused bb9e8c5090f0. It's not clear when this was
changed, but at least on Windows 10 machines with Visual Studio 2019,
expf behaves in line with other implementations.

As there is no clear way to test for the version of the VCRT in use,
simply mark this test as expected-pass rather than xfail.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4946>

freedreno/ir3: use lower_wrmasks pass

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Eric Anholt <eric@anholt.net>

nir: add pass to lower disjoint wrmask's

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Eric Anholt <eric@anholt.net>

nir: add helper to copy const_index[]

It seems less brittle to not assume they are in the same order for src
and dst instructions.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Eric Anholt <eric@anholt.net>

nir: fix indices for ir3 ssbo_atomic intrinsics

Caught by the sanity checking in nir_intrinsic_copy_const_indices()
(which is introduced by the next patch).

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Eric Anholt <eric@anholt.net>

freedreno/ir3: use const_index accessors

Cleans up a couple spots that were still open-coding this.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Eric Anholt <eric@anholt.net>

freedreno/ir3: Drop wrmask for ir3 local and global store intrinsics

These intrinsics are supposed to map to the underlying hardware
instructions, which don't have wrmask. We use them when we lower
store_output in the geometry pipeline and since store_output gets
lowered to temps, we always see full wrmasks there.

nir: Add some docs to the metadata types

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5028>

freedreno: Fix attempts to push UBO contents past the constlen on pre-a6xx.

The binning variant likely won't have any UBO load code in it, so we were
writing past constlen (and sometimes asserting about it) when loading more
than one ubo block.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5027>

docs: update calendar for 20.1.0-rc3

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5026>

panfrost: Fix background showing when using discard

This fixes problems in a number of games, including SuperTuxKart,
OpenMW and RVGL.

v2: Use MALI_READS_ZS | 0x20 instead of MALI_WRITES_Z to match with
the blob. Keep using 0x400 | 0x20 when depth is disabled.

Closes: #2620
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5001>

anv: Translate relative timeout to absolute when calling anv_timelines_wait

Fixes: 34f32a6d6648073e2fda3fb78377124fb32bb288
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5025>

anv: Set MOCS in 3DSTATE_CONSTANT_* on Gen9+

While we're here, we add a nice detailed comment about why always
assuming internal is ok.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5022>

anv: Set 3DSTATE_VF_INSTANCING on the SVGS element

It probably doesn't matter because that buffer should have a stride of
zero.  However, it still seems like a good idea just to be safe.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5022>

freedreno: Drop the noubo fails list for CI, since there aren't any now.

The remaining two fails in the list are the same as for the normal CI run.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4858>

freedreno/a6xx: Use LDC for UBO loads.

It saves addressing math, but may cause multiple loads to be done and
bcseled due to NIR not giving us good address alignment information
currently.  I don't have any workloads I know of using non-const-uploaded
UBOs, so I don't have perf numbers for it

This makes us match the GLES blob's behavior, and turnip (other than being
bindful).

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4858>

freedreno: Trim num_ubos to just the ones we haven't lowered to constbuf.

With the upcoming LDC usage in the GL driver, we don't want to be
uploading descriptors for every UBO when they aren't actually in use.
Trimming NIR's num_ubos will avoid that, and cleans up num_ubo handling
elsewhere right now.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4858>

freedreno/ir3: Move i/o offset lowering after analyze_ubo_ranges.

I found that when moving more UBOs to load_ubo_ir3, analyze_ubo_ranges
would move things back in a broken way.  We can just run this pass later
and drop the _ir3 path.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4858>

freedreno/ir3: Leave the cursor alone during ir3_nir_try_propagate_bit_shift.

Otherwise, we might end up inserting the nir_intrinsic_load_ubo_ir3()
after the non-offset src's definition, leading to nir_validate() failures.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4858>

freedreno/ir3: Clean up a silly nir_src_for_ssa(src.ssa).

Just copy the src through.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4858>

nir: Include num_ubos in the printed shader (if nonzero).

I keep wanting this number for debugging shaders.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4858>

util/ra: Add [de]serialization support

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5019>

util/vma: Add a debug print helper

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5019>

util/vma: Add an option to configure high/low preference

The vma_heap allocator was originally designed to prefer high addresses
in order to find bugs in ANV's high address handling.  However, there
are cases where you might want the allocator to prefer lower addresses
for some reason.  This provides a configure bit for exactly this
purpose.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5019>

util/list: Add list_foreach_entry_from_safe

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5019>

util/list: Add a list pair iterator

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5019>

anv: Implement VK_EXT_custom_border_color

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4898>

anv: Add a way to reserve states from a pool

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4898>

anv: Disable B5G6R5_UNORM_PACK16

It's not a required format and it causes issues with some features.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4898>

anv: use the correct format on Android

Per https://android.googlesource.com/platform/frameworks/native/+/master/vulkan/libvulkan/swapchain.cpp#745
the format Android requires is R5G6B5, and we have it backwards here.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4898>

drirc: Enable glthread for PCSX2

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5023>

post_version.py: stop adding release candidates to the index and relnotes

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2870
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4929>

post_version.py: invert `is_point` into `is_first_release` to make its purpose clearer

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4929>

post_version.py: fix branch name construction for release candidates

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2870
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4929>

glthread: stop using GLenum16 to get correct GL errors for out-of-bounds enums

Reported by Ian Romanick.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5016>

radeonsi: also enable tgsi_to_nir caching for compute shaders

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4993>

radeonsi: Enable tgsi to nir disk cache

Enable the tgsi to nir cache for radeonsi.

Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4993>

st/nine: Enable ttn cache

A trace of a Hat in Time, which builds thousands of shaders
takes 339 seconds to run the second time without this patch,
and 41 seconds with it (basically there is no more loading times).

Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4993>

ttn: Implement disk cache

ttn is slow, let's disk cache it.

Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4993>

ttn: Add new allow_disk_cache parameter

For now this parameter doesn't do anything.
It means the implementation is allowed to use
a cache on disk.

Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4993>

freedreno/a6xx: Fix UBWC mipmapping height alignment.

After fixing the power of two sizing, pitches worked, but 1-pixel high and
unaligned height miplevels were off.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4931>

freedreno/a6xx: Fix UBWC mipmap sizing.

The HW requires a log2 width/height of the level 0 meta_* size in the
descriptors, making it pretty clear that UBWC mipmapping is all
power-of-two sized.  Fixes a bunch of failures in the upcoming unit UBWC
layout unit tests.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4931>

freedreno/a6xx: Fix UBWC blockheight for RG8.

Using texturator on a P3A at 1024x1024, RG8 has log2w/h of 6x7 instead of
R16I/UI's 6x8.  The other blockw/h I verified other than cpp=1
(R8/R8I/R8UI didn't use UBWC) and 32 (would need a bigger type).

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4931>

freedreno: Pull the tile_alignment lookup for a layout to a helper.

The r8g8 case UBWC alignment will be changing in the next commit, so
fdl6_get_ubwc_blockwidth needs to start paying attention to r8g8 too.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4931>

freedreno/a6xx: Add a testcase for UBWC buffer sharing.

These offsets are hand-computed referencing msm_media_info.h, and match
our driver's current behavior.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4931>

freedreno/a6xx: Improve layout testcase logging for UBWC fails.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4931>

freedreno/a4xx+: Increase max texture size to 16384.

Noticed when poking around with texture layouts and found that my big
texture layout from the blob buffer overflowed.  Values come from
http://vulkan.gpuinfo.org for Adreno 418, 512, 630.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4931>

nir: reset ssa-defs as non-divergent during divergence analysis instead of upfront

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4062>

nir: simplify phi handling in divergence analysis

This patch adds some control flow information to the
state to keep track whether a loop contains divergent
continue or break statements to not having to
recalculate this property for every phi.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4062>

nir: rework phi handling in divergence analysis

This patch splits the visit_phi() function into
three different ones according to the kind of phi
(merge-node, loop-header or loop-exit) and calls
them when visiting the cf_nodes.
This allows to revisit loops if the loop header's
phis have changed, only.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4062>

nir: refactor divergence analysis state

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4062>

nir: add nir_intrinsic_elect to divergence analysis

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4062>

nir: Make "divergent" a property of an SSA value

v2: fix usage in ACO (by Daniel Schürmann)

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4062>

gallium: remove more "state tracker" occurences

Trivial.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4902>

gallium: rename PIPE_RESOURCE_FLAG_ST_PRIV to FRONTEND_PRIV

Acked-by: Eric Anholt <eric@anholt.net>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4902>

gallium: change comments to remove 'state tracker'

Acked-by: Eric Anholt <eric@anholt.net>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4902>

gallium: rename 'state tracker' to 'frontend'

Acked-by: Eric Anholt <eric@anholt.net>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4902>

tu: Implement fallback linear staging blit for CopyImage

Also, rewrite the format decision code so that we correctly decide when
the linear fallback is needed, even if UBWC is disabled. As part of
that, I also moved around some of the code to handle compressed formats
to make sure that copying compressed formats with a linear staging blit
works (this is now possible since we started allowing tiled compressed
textures).

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5007>

tu: Add noubwc debug flag to disable UBWC

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5007>

tu: Add a "scratch bo" allocation mechanism

This is simpler than a full-blown memory reuse mechanism, but is good
enough to make sure that repeatedly doing a copy that requires the
linear staging buffer workaround won't use excessive memory or be slowed
down due to repeated allocations.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5007>

aco: improve phi affinities with p_split_vector

Totals from 5860 (4.59% of 127638) affected shaders:
VGPRs: 460212 -> 460216 (+0.00%)
CodeSize: 65554356 -> 65464816 (-0.14%)
Instrs: 12655972 -> 12633578 (-0.18%)
Copies: 1309994 -> 1292163 (-1.36%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4990>

aco: consider affinities when creating v_mac_f32

Totals from 8487 (6.65% of 127638) affected shaders:
CodeSize: 62061988 -> 62058020 (-0.01%); split: -0.01%, +0.01%
Instrs: 11910757 -> 11885409 (-0.21%); split: -0.21%, +0.00%
Copies: 1065244 -> 1040945 (-2.28%); split: -2.30%, +0.02%
Branches: 349665 -> 348914 (-0.21%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4990>

aco: mark phi definitions as last-seen phi operands

Totals from 14340 (11.23% of 127638) affected shaders:
SGPRs: 1251648 -> 1251512 (-0.01%)
VGPRs: 994556 -> 994104 (-0.05%); split: -0.06%, +0.01%
CodeSize: 122894528 -> 121099604 (-1.46%); split: -1.49%, +0.03%
MaxWaves: 106039 -> 106103 (+0.06%); split: +0.06%, -0.00%
Instrs: 23860066 -> 23414317 (-1.87%); split: -1.90%, +0.03%
Copies: 2448228 -> 2049305 (-16.29%); split: -16.37%, +0.07%
Branches: 789381 -> 757921 (-3.99%); split: -4.62%, +0.64%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4990>

aco: fix consecutively written vgprs from vmem instructions

If one VMEM instruction uses a sampler and the other doesn't, we can't do
this optimization.

Totals from 47 (0.04% of 127638) affected shaders:
CodeSize: 271744 -> 271656 (-0.03%); split: -0.04%, +0.01%
Instrs: 52783 -> 52761 (-0.04%); split: -0.05%, +0.01%
Cycles: 5547040 -> 5546952 (-0.00%); split: -0.00%, +0.00%
VMEM: 10022 -> 9887 (-1.35%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4949>

aco: simplify consecutive ordered vmem/lds writes optimization

This was unnecessary and messed with statistics

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4949>

gitlab-ci: correct tracie behavior with replay errors

[dump_trace_images] Info: Dumping trace /tmp/tracie.test.ap5pshYcsg/traces-db/trace1/magenta.testtrace... ERROR
[dump_trace_images] Debug: === Failure log start ===
invalid literal for int() with base 16: 'in'
[dump_trace_images] Debug: === Failure log end ===
[check_image] Trace /tmp/tracie.test.ap5pshYcsg/traces-db/trace1/magenta.testtrace couldn't be replayed. See above logs for more information.
Traceback (most recent call last):
  File "/tmp/tracie.test.ap5pshYcsg/tracie.py", line 176, in <module>
    main()
  File "/tmp/tracie.test.ap5pshYcsg/tracie.py", line 164, in main
    ok, result = gitlab_check_trace(project_url, commit_id, args.device_name, trace, expectation)
TypeError: cannot unpack non-iterable bool object

Fixes: efbbf8bb81e ("tracie: Print results in a machine readable format")
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Rohan Garg <rohan.garg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4839>

gitlab-ci: create always the "results" directory with tracie

Otherwise, we will fail when the traces description file doesn't
contain any checksum for the specified device.

Fixes: efbbf8bb81e ("tracie: Print results in a machine readable format")
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Rohan Garg <rohan.garg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4839>

radv: add a LLVM version string workaround for SotTR and ACO

When the LLVM version is too old or missing, SotTR applies shader
workarounds and that reduces performance by 2-5% with ACO.

SotTR workarounds are applied with LLVM 8 and older, so reporting
LLVM 9.0.1 should be fine.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4984>

turnip: use the common code for generating extensions and dispatch tables

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4987>

anv: use the common code for generating extensions and dispatch tables

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4987>

radv: use the common code for generating extensions and dispatch tables

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4987>

vulkan: import common code for generating extensions

ANV and RADV have similar Python code for generating extensions
and dispatch tables.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4987>

radv: implement VK_EXT_private_data

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4886>

radv: use the base object struct types

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4886>

radv: use the common base object type for VkDevice

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4886>

etnaviv: Disable seamless cube map on GC880

The GC880 on iMX6DL indicates in it's minorFeatures2 register that it
does support SEAMLESS_CUBE_MAP, however when the TE.SAMPLER_CONFIG1
VIVS_TE_SAMPLER_CONFIG1_SEAMLESS_CUBE_MAP bit is set on GC880 on iMX6DL,
the result is corrupted image. In particular, the following ~112 dEQPs
are affected and fail:

  dEQP-GLES2.functional.texture.filtering.cube.*

This only happens on MX6DL GC880, MX6Q GC2000 and STM32MP1 GC400(GCnano)
do not report the minorFeatures2 SEAMLESS_CUBE_MAP bit and ignore the
TE_SAMPLER_CONFIG1 VIVS_TE_SAMPLER_CONFIG1_SEAMLESS_CUBE_MAP bit (note
that ss->seamless_cube_map is unconditionally set by mesa at times even
PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE returns 0), so there is no visible
problem and there are no failing dEQP tests on the GC2000 and GCnano.

This might imply that the minorFeatures2 SEAMLESS_CUBE_MAP has some
different meaning on GC880 or the SEAMLESS_CUBE_MAP behaves differently
on the GC880.

This patch does not set the SEAMLESS_CUBE_MAP bit on hardware which does
not indicate support for seamless cube map and on GC880, which results
in reduction in failed dEQPs: 635 to 186 on GC880, 274 to 270 on GC2000
and no change on GC400(GCnano).

Fixes: 8dd26fa2f06 ("etnaviv: support GL_ARB_seamless_cubemap_per_texture")
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4865>

freedreno/a6xx: fix max-scissor opt

On a6xx we need a 0,0 based scissor in the binning pass, but can use the
blit-scissor to avoid restore/resolve of untouched pixels, and use the
conditional execution if the IB to bin to skip bins with no geometry
(due to the scissor).

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5021>

freedreno/ir3/sched: try to avoid syncs

Similar to what we do in postsched.  It is useful for pre-RA sched to be
a bit aware of things that would cause syncs.  In particular for the tex
fetches, since the vecN src/dst tends to limit postsched's ability to
re-order them.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4923>

freedreno/ir3/sched: avoid scheduling outputs

If an instruction's only use is as an output, and it increases register
pressure, then try to avoid scheduling it until there are no other
options.

A semi-common pattern is `fragcolN.a = 1.0`, this pushes all these
immed loads to the end of the shader.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4923>