git.libre-soc.org Git - mesa.git/log

gallium: pass cso_velems_state into cso_context instead of pipe_vertex_element

This removes one memcpy from the CSO hashing code.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3990>

gallium/cso_hash: inline struct cso_hash_data

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3990>

gallium/cso_hash: pack cso_node better

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3990>

mesa: remove unused "indirect" parameter from Driver.Draw

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3990>

i965: stop using "indirect" parameter from Driver.Draw (non-indirect)

The parameter will be removed.

v2: added UNUSED, removed "!!"

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3990>

anv: Remove unused field `urb.total_size`

This was used before the URB calculation functions were shared by GL
and Vulkan. Also drop the substruct for the remaining, `l3_config` is
a good name on its own.

Also-written-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3981>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3981>

pan/midgard: Use address analysis for globals, etc

..instead of opencoding for constants and doing the rest as ALU.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3978>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3978>

pan/midgard: Add address analysis framework

Midgard has the ability to calculate addresses as part of the load/store
pipeline. We'd like to make use of this to avoid doing this work on the
ALU pipes. To do so, when emitting globals/SSBOs/shareds, we walk the
tree looking for address arithmetic to try to parse out something the
hardware can work with, letting the original instructions be DCE'd
ideally. This analysis is done at the NIR level to properly account for
some messy details of vectorization which we'd rather not poke at the
backend level. (Originally I wrote this as a MIR pass but I'm fairly
sure it was wrong.)

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3978>

pan/midgard: Force address alignment

I thought we already had this but... maybe not..

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3978>

pan/midgard: Round up bytemasks when promoting uniforms

Fixes crashes with uniform promotion in certain mixed type
circumstances.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3978>

pan/midgard: Fix load/store argument sizing

The swizzles are as-if they were 32-bit regardless of the bitness of the
operation, but the source sizes can and do change depending on the
flags. Account for this in the analysis.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3978>

pan/midgard: Add LDST_ADDRESS property

Many load/store ops (used for globals, SSBOs, shared memory, etc) have
the ability to compute addresses directly. Mark off which ones behave
like this.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3978>

pan/midgard: Extract nir_ssa_index helper

In case we don't have a nir_src.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3978>

pan/midgard: Partially fix 64-bit swizzle alignment

When mixing 32/64-bit, we need to align the 32-bit registers to get the
required alignment. This isn't quite enough yet, though, since user
swizzles could bypass and will need to be lowered to 32-bit moves
(outstanding todo).

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3978>

pan/midgard: Allow fusing inverted sources for inverted ops

It doesn't make a difference to the actual algorithm, so let's get rid
of them.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3978>

pan/midgard: Allow inverted inverted ops

We'd like to transform `inand.not` back to `iand` and so forth.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3978>

panfrost: Increase SSBO/image limit from 4->8

Fixes an error compiling some shaders.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3978>

etnaviv: disable INT_FILTER for ASTC

Tested on GC3000: INT_FILTER bit is incompatible with ASTC formats.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3927>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3927>

anv: Remove unused field xfb_used from anv_pipeline

Since we only use xfb_info for GEN >= 8, make the ifdef cover that
local variable.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3973>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3973>

ci: Include db410c support in the ARM container.

I'm working on moving the db410c CI from docker to LAVA, which means we
get to boot a custom kernel.  To do that, we need to enable ARCH_QCOM in
the kernel, save the dtb around, and include abootimg in our container so
that we can generate combined kernel/dtb/ramdisk images for fastboot.

LAVA's fastboot support is unable to pack the overlay into an abootimg
image, just a cpio rootfs.  We could flash the cpio rootfs after overlay
addition, but that takes 2 minutes to do, and causes wear on the devices.
Instead, we'll bring up the network at boot and use wget to fetch the
overlay.  We'll want network support anyway, so that we can transfer the
failure xmls back to the gitlab job's artifacts at some point.

Since the msm GPU and realtek network firmware increase our payload by
3MB, add in firmware compression so that it doesn't waste as much RAM on
devices not using it.

Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3928>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3928>

ci: Shrink the arm64 kernel build a bit.

No sense building some of these subsystems for just testing the GPU.
Saves some container rebuild time and kernel contents to move around.

Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3928>

ci: Stop disabling ACPI in the LAVA arm64 kernel build.

I can't figure out why, but it's necessary to get QCOM_CLK_APCS_MSM8916
for db410c.

Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3928>

ci: Remove LLVM from ARM test drivers.

The LLVM libraries were a significant fraction of the entire payload
(55M/250M uncompressed) into the initramfs of the test boards, but
LLVM is only used for the draw module used in select/feedback (which
isn't even tested in CI on ARM yet).

Assume that llvmpipe draw is safe enough for ARM given the coverage on
x86, and disable LLVM for these jobs.

Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3928>

ci: Split out radv build-testing on arm64

radv needs libllvm which increases our ramdisk size
significantly. Since this driver is only build tested,
we can split it out into a separate job.

Signed-off-by: Rohan Garg <rohan.garg@collabora.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3928>

gitlab-ci: Skip dEQP-GLES3.functional.shaders.derivate.*

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950>

gitlab-ci: Remove GLES3 test from Panfrost fails list

Seems to have been fixed recently.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950>

gitlab-ci: Use PAN_MESA_DEBUG=gles3 for Panfrost

We can drop now the GLES version overrides now that we have a DEBUG flag
that enables all what is expected from a GLES 3.0 implementation.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950>

panfrost: Add PAN_MESA_DEBUG=gles3 option

This enables experimental GLES3.0 support without ES3.1/2 hacks.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950>

panfrost: Expose PIPE_CAP_PRIMITIVE_RESTART

It works just fine, we just forgot to expose the CAP.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950>

panfrost: Simplify stack shift calculation

I'm not sure why I never saw smaller values, but here you go.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950>

panfrost: Reserve an extra page for spilling

I'm not sure what this is for, but the blob does it and I'd rather not
poke farther than needed into hardware-internal details.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950>

panfrost: Default to 256 threads for TLS

I'm not sure where I got the impression 1024 was the right number. From
kbase:

#define THREAD_MT_DEFAULT 256

(where MT = "max threads" and the threads to allocate for TLS is <= max
threads). Let's cut out memory footprint for spilling by 75% :)

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950>

panfrost: Fix param getting

....Oops....

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950>

panfrost: Don't set shared->unk0

This field controls the size of per-thread temporaries (somehow this is
separate from the regular stack for register spilling..), though I'm not
certain on the details. Regardless this value of 0x1e despite being used
in places by the blob seems wrong and is interfering with correct sizing
of the stack.

We don't use non-spilling scratchpad yet, so this is just here to fix
some details of spilling.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950>

panfrost: Update spilling comment framebuffer->shared

All of this should apply equally with compute shaders, as far as I know.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950>

panfrost: Fix padded_vertex_count generation

These two cases were flipped from the notes, leading to underestimates
of the padded vertex count, manifesting as visual corruption (random
geometry messed up). This issue was raised when noticing the corruption
went away when dramaticlaly oversizing max_index on an instanced indexed
draw, and then checking that padded_count >= vertex_count -- which
turned out *not* to be the case on certain inputs, a clear issue. Hence
looking into this routine...

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950>

panfrost: Fix gl_VertexID/InstanceID

Fixes a bunch of tests in dEQP-GLES3.functional.instanced.*.

Fixes: 027944c7c8c ("panfrost: Avoid reading GPU memory when packing
vertices")

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950>

pan/midgard: Don't spill near a branch

Fixes
dEQP-GLES2.functional.shaders.indexing.varying_array.vec2_dynamic_loop_write_
static_read with register pressure forced down.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950>

pan/decode: Dump scratchpad size if present

This will help us narrow the size required for thread local storage.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950>

panfrost: Implement index buffer cache

For index bufer resources (not user index buffers), we're able to cache
results. In practice, the cache works pretty dang well. It's still
important that the min/max computation is efficient (since when the
cache misses it'll run at draw-time and we don't want jank), but this
can eliminate a lot of computations entirely.

We use a custom data structure for caching. Search is O(N) to the size
but sizes are capped so it's effectively O(1). Insertion is O(1) with
automatic oldest eviction, on the assumption that the oldest results are
the least likely to still be useful. We might also experiment with other
heuristics based on actual usage later.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3880>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3880>

panfrost: Combine get_index_buffer with bound computation

These operations are intertwined since there are optimizations that will
want to "double dip". In particular for user index buffers we'd want to
upload simultaneous with index computation. For resources we'd like to
keep resource related code together.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3880>

radeon/jpeg: fix the jpeg dt_pitch with YUYV format

The dt_pitch should be same as NV12 format from decoder views,
and it finally got corrected with gfx9 surface's fixes from MR
https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3738

Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3738>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3738>

st/va: add support YUY2

YUY2 is a duplicate of YUYV and is used by gstreamer for 4:2:2.

Acked-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3738>

st/va: enable 4:2:2 chroma format

Everything is in place to support them.

Acked-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3738>

radeonsi: fix surf_pitch for subsampled surface

gfx9.surf_pitch is supposed to be in blocks (or elements) but addrlib
returns a pitch in pixels.
This cause a mismatch between surface->bpe and surface.u.gfx9.surf_pitch.

For subsampled formats like uyvy (bpe is 2) this breaks in various places:
- sdma copy
- video rendering (see issue https://gitlab.freedesktop.org/mesa/mesa/issues/2363)
when the vl_compositor_gfx_render method is used

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3738>

gallium/vl: add 4:2:2 support

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2363
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3738>

gallium/video: remove pipe_video_buffer.chroma_format

chroma_format depends on buffer_format so use the format_to_chroma_format
helper instead of storing it next to buffer_format.
This avoids bugs where one value is changed without updating the other.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3738>

format: add format_to_chroma_format

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3738>

radeonsi: test subsampled format in testdma

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3738>

ac/llvm: flush denorms for nir_op_fmed3 on GFX8 and older gens

The hardware doesn't flush denorms, exactly like fmin/fmax, so
we have to do it manually. This doesn't fix anything known.

Fixes: d6a07732c9c ("ac: use llvm.amdgcn.fmed3 intrinsic for nir_op_fmed3")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3962>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3962>

ac/llvm: fix 16-bit fmed3 on GFX8 and older gens

16-bit med3 is only supported on GFX9+.

Fixes dEQP-VK.spirv_assembly.instruction.amd_trinary_minmax.mid3.f16.*.

Fixes: d6a07732c9c ("ac: use llvm.amdgcn.fmed3 intrinsic for nir_op_fmed3")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3962>

ac/llvm: fix 64-bit fmed3

Lower 64-bit fmed3 because LLVM doesn't expose an intrinsic.

Fixes dEQP-VK.spirv_assembly.instruction.amd_trinary_minmax.mid3.f64.*.

Fixes: d6a07732c9c ("ac: use llvm.amdgcn.fmed3 intrinsic for nir_op_fmed3")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3962>

mesa: Flush vertices before changing the OpenGL state.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
CC: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3958>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3958>

mesa: Check for OpenGL state change before flushing vertices.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3958>

gallivm/nir: handle mod 0 better.

I haven't seen this crash but TGSI does it so best align with
it to avoid future issues.

Fixes: 44a6b0107b3J (gallivm: add nir->llvm translation (v2))
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3956>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3956>

gallivm/nir: fix integer divide SIGFPE

Blender was crashing with a SIGFPE even though the divide by 0
logic was kicking in. I'm not sure why TGSI doesn't get into this state.

The problem was is the numerator was INT_MIN we'd replace the div by
0 with a divide by -1, which is an exception for INT_MIN as INT_MIN/-1
== INT_MAX + 1 (too large for 32-bits). Instead for integer divides
just replace the mask values with 0x7fffffff. Also fix up the
result handling so it aligns with TGSI usage. (gives 0)

Fixes: c717ac1247c3 ("gallivm/nir: wrap idiv to avoid divide by 0 (v2)")
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3956>

gallivm/tgsi: fix stream id regression

This broke TGSI GS shaders with llvmpipe, it wasn't looking at the
right immediates and it should be cast to an integer type.

Fixes: 163d5fde0669 (gallium/swr: Enable GL_ARB_gpu_shader5: multiple streams)
Reviewed-by: Krzysztof Raszkowski <krzysztof.raszkowski@intel.com>
Acked-by: Jan Zielinski <jan.zielinski@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3949>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3949>

mesa: call FLUSH_VERTICES before updating CoordReplace

Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Cc: 20.0 <mesa-stable@lists.freedesktop.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3947>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3947>

mesa: remove leftovers from ARB_shadow_ambient

Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3947>

cube_face_index: Use fabsf instead of fabs since we know it's floats

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3933>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3933>

cube_face_coord: Use fabsf instead of fabs since we know it's floats

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3933>

iris: Apply the flushes when switching pipelines.

Even though the workaround description says:

   "all the listed commands are non-pipelined and hence flush caused due
   to pipeline mode change must not cause performance issues..."

My understanding is that we still need to have the flushes. Also, the
flushes are required not only to stall the pipeline, but also to clear
caches, so I don't think they can simply be discarded.

Additionally, while doing some testing that increased the number of
surface STATE_BASE_ADDRESS emitted, I got a lot more GPU hangs. Adding
these flushes fixes those hangs.

Fixes: b8fbb39a (iris: Implement Gen12 workaround for non pipelined
                 state)

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3908>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3908>

gallium/hash_table: remove some function wrappers

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3722>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3722>

gallium/hash_table: turn it into a wrapper around util/hash_table

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3722>

gallium/hash_table: use the same callback signatures as util/hash_table

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3722>

gallium/hash_table: consolidate hash tables with FD keys

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3722>

gallium/hash_table: consolidate hash tables with pointer keys

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3722>

amd/addrlib: fix build on non-x86 platforms

regparm(0) attribute does not work on aarch64 (and presumably powerpc64 and others).
Default to not specifying any calling convention on non-amd64/i386 platforms.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3567>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3567>

tgsi_to_nir: set num_images and num_samplers with holes correctly

This fixes the copy_uv shader from st/omx, because it uses image 0 and 2
and image 1 isn't declared.

Cc: 20.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3936>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3936>

nir: Drop nir_tex_instr::texture_array_size

It's set by lots of things and we spend a lot of time maintaining it but
no one actually uses the value for anything useful.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3940>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3940>

freedreno/computerator: Fix defined-but-not-used warnings from lex/yacc.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3954>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3954>

turnip: Fix compiler warning about casting a nondispatchable handle.

Fixes: 1c5d84fcae71 ("turnip: hook up cmdbuffer event set/wait")
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3916>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3916>

gitlab-ci: Move to 5.5 kernel plus fixes for Panfrost

There's two fixes that help with stability when running dEQP on Kevin
Chromebooks.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3876>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3876>

panfrost: Remove some more prints to stdout

They can confuse test runners.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3876>

gitlab-ci: Run GLES3 tests in dEQP on Panfrost

We are able to run only 1/5th of the tests in around the same time that
dEQP-GLES2 takes, so do that for now while more DUTs are installed.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3876>

mesa/st: toggle EXT_texture_norm16 based on format support

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2556
Fixes: 7f467d4f738 ("mesa: GL_EXT_texture_norm16 extension plumbing")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3941>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3941>

i965: toggle on EXT_texture_norm16

Fixes: 7f467d4f738 ("mesa: GL_EXT_texture_norm16 extension plumbing")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3941>

mesa: introduce boolean toggle for EXT_texture_norm16

Fixes: 7f467d4f738 ("mesa: GL_EXT_texture_norm16 extension plumbing")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3941>

nir/lower_double_ops: add note for lowering mod

Add a note to clarify that while Vulkan allows mod(x,y) to be in [0, y]
range, OpenGL does not allow it, so the lowering ensures the result is
always in [0, y) range, as this lowering is shared by the Vulkan and
OpenGL implementation.

Reviewed-by: Elie Tournier <elie.tournier@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3315>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3315>

radv: fix creating null devices if KHR_display is enabled

Found this while replaying pipelines with Fossilize, it worked
fine with vkpipeline-db.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3959>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3959>

gitlab-ci: Add add a set of lima flakes

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Andreas Baierl <ichgeh@imkreisrum.de>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3957>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3957>

radv: make use of ac_gpu_info::max_wave64_per_simd

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3899>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3899>

radv/gfx10: adjust the number of VGPRs used to compute waves

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3899>

radv/gfx10: adjust the LDS size used to compute waves

It's 128KB per CU in WGP.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3899>

radv/gfx10: adjust SGPRs/VGPRs related info

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3899>

radv/gfx10: adjust the number of simd per compute unit

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3899>

ac: add more ac_gpu_info related shader fields

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3899>

ac,radeonsi: add ac_gpu_info::lds_size_per_cu

Both RadeonSI and RADV use the WGP mode, so we can assume 128KB on
GFX10.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3899>

radv: implement a dummy winsys for creating devices without AMDGPU

To allow developers to test the compiler backends without having
any AMD GPUs. To create a null device, set eg.
RADV_FORCE_FAMILY=polaris10 in your environment.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3872>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3872>

egl: Factor out dri2_add_pbuffer_configs_for_visuals {device,surfaceless}.

v2: dri2_add_configs_for_visuals -> dri2_add_pbuffer_configs_for_visuals

Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3790>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3790>

egl: Fix A2RGB10 platform_{device,surfaceless} PBuffer configs.

The __DRI_IMAGE_FORMAT_* part wants to be handled for the *101010
type formats as well. Factor out a common function for that task.
That again makes the piglit egl_ext_device_base test work again
for hardware drivers.

v2: Factor out a common function for that task.
v3: dri2_pbuffer_visuals -> dri2_pbuffer_visuals

Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Fixes: 9acb94b6236 "egl: Enable 10bpc EGLConfigs for platform_{device,surfaceless}"
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3790>

turnip: enable fullDrawIndexUint32/independentBlend/dualSrcBlend/logicOp

These are already implemented but missing from VkPhysicalDeviceFeatures.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3923>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3923>

turnip: enable sampleRateShading feature

There's still a TODO related to key->sample_shading, but it doesn't look
like it changes anything in ir3, so it works without that.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3923>

intel/tools: Do not print type/qualifiers/name for c_literal

External tools may wish to choose their own type, qualifiers, and name,
so do not emit our own.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3952>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3952>

intel/tools: Allow i965_disasm to disassemble c_literal input type

Added extra argument named 'type' which can be 'bin' (default if
ommited) or 'c_literal' for input type.

Change 'binary-path' argument name to 'input-path'.

v2:
- Use util_dynarray for assembly (Matt Turner)
- Read data in 8 bytes chunk (Matt Turner)
- Fix help option (Akeem Abodunrin)

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3952>

intel/tools: Print c_literals 4 byte wide

We already print hex value a byte wide, instead of printing c_literal
byte wide, we can print it 4 byte wide, which gives us 2 different
combinations.

v2: Fix the aliasing issue (Matt Turner)

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3952>

intel/tools: Add test for state register as source

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3952>

intel/tools: Add test for address register as source

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3952>

intel/tools: Set correct address register file and number in i965_asm

We need to use already created brw_reg and set correct file type,
register number and sub register number.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3952>