Aaron Watry [Thu, 21 Aug 2014 19:50:51 +0000 (14:50 -0500)]
st/clover: Change platform name from Default to Clover
Signed-off-by: Aaron Watry <awatry at gmail.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Emil Velikov [Wed, 20 Aug 2014 19:52:07 +0000 (20:52 +0100)]
dri/radeon: nuke the remaining references to sarea
Remainder of the dri1 times.
Cc: Marek Olšák <marek.olsak@amd.com>
Cc: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Emil Velikov [Wed, 20 Aug 2014 18:51:30 +0000 (19:51 +0100)]
dri/radeon: cleanup the radeon_context vtbl
Remove the set-but-unused, and set-but-empty vtable entries.
Most likely a leftover from the dri1 days.
Cc: Marek Olšák <marek.olsak@amd.com>
Cc: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Emil Velikov [Wed, 20 Aug 2014 18:29:42 +0000 (19:29 +0100)]
include: move sarea.h next to it's only user
The header is used by DRI1 drivers, which we've removed a while
back. Now only the dri1 loader in libGL is using it, so let's
move it in src/glx, and prefix it accordingly.
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Emil Velikov [Sat, 22 Mar 2014 12:01:52 +0000 (12:01 +0000)]
dri/radeon: drop obsolete radeon_{dri,macros}.h headers
Both have been unused for at least a couple of years.
For example the last user of radeon_macros.h was removed with
commit
8c11f0a88300f7bc3f05a12789c781ba0f4b3cc6
Author: Eric Anholt <eric@anholt.net>
Date: Fri Oct 14 13:27:02 2011 -0700
radeon: Drop the legacy BO manager code.
Cc: Marek Olšák <marek.olsak@amd.com>
Cc: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Vinson Lee [Thu, 21 Aug 2014 19:22:18 +0000 (12:22 -0700)]
SCons: Rename dri2_query_renderer.c to dri_common_query_renderer.c.
Fix SCons build error introduced with commit
3fe7daec14282dc8e2f5c8cc547927e305009677.
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Connor Abbott [Sat, 16 Aug 2014 00:12:06 +0000 (17:12 -0700)]
glsl/linker: pass through the is_intrinsic flag
This flag was set to true for the atomic counter intrinsics, but it
never got plumbed through the linker, so by the time it got to the
backends it would always be set to the false. The current i965 backend
code doesn't use is_intrinsic, so this should not change any existing
code, but it's useful for codepaths that want to distinguish between
intrinsics and non-intrinsics without using strcmp.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Connor Abbott <connor.abbott@intel.com>
Carl Worth [Thu, 21 Aug 2014 17:44:35 +0000 (10:44 -0700)]
docs: Update instructions for creating a release
This captures all of the steps I have been following in making releases for
the past year or so. This way, the instructions should be sound for anyone who
would like to take over the release process going forward.
Roland Scheidegger [Wed, 20 Aug 2014 23:27:49 +0000 (01:27 +0200)]
llvmpipe: change LP_MAX_SHADER_INSTRUCTIONS definition
This change will double cache size for branches which have a lower
LP_MAX_SHADER_VARIANTS limit (it will not do anything on master).
The reason is that nowadays shaders tend to be quite a bit larger than they
were (they were big when llvmpipe didn't have a fs loop, got much smaller with
that loop, and since then have gradually increased quite a bit though still
smaller than without the fs loop for various reasons - among them being d3d10
compliance, usage of 8-wide vectors, non-swizzled blend code). Thus effectively
less shaders would be cached (unless they were very small and the variant limit
was hit first). Also, since we're getting rid of the IR nowadays, the cached
shaders shouldn't need all that much memory actually.
Carl Worth [Thu, 21 Aug 2014 16:46:57 +0000 (09:46 -0700)]
docs: Add my notes on stable-branch patch criteria
This captures the set of rules I have been using for stable-branch management,
(starting with a discussion on the mesa-dev mailing list on July 2013, and
then refined through my own experience of performing stable-branch releases
since then).
Carl Worth [Thu, 21 Aug 2014 16:03:02 +0000 (09:03 -0700)]
Makefile: Switch from md5sums to sha256sums
We switched to these several stable releases ago, (since the MD5 algorithm has
been broken for some time), but only now did I get around to fixing this in
the Makefile rather than just performing this step manually.
CC: "10.2 10.3" <mesa-stable@lists.freedesktop.org>
Jon TURNEY [Sun, 17 Aug 2014 16:22:22 +0000 (17:22 +0100)]
glx: Fix build since
679c2ef "glx/drisw: add support for DRI2rendererQueryExtension", when only building drisw renderer
v2:
- Move dri*_query_renderer_* into their respective dri*_priv.h headers
- Drop then unnneeded include of dri2.h from dri2_query_renderer.c
- Rename dri2_query_renderer.c as dri_common_query_renderer.c, as it's contents
now are used for more than dri[23]
Signed-off-by: Jon TURNEY <jon.turney@dronecode.org.uk>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Carl Worth [Thu, 21 Aug 2014 15:37:26 +0000 (08:37 -0700)]
Increment version to 10.4.0-devel
Now that the 10.3 branch has been created
Alex Deucher [Thu, 21 Aug 2014 15:16:15 +0000 (11:16 -0400)]
radeonsi: add new SI pci ids
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: mesa-stable@lists.freedesktop.org
Alex Deucher [Thu, 21 Aug 2014 15:13:17 +0000 (11:13 -0400)]
radeonsi: add new CIK pci ids
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: mesa-stable@lists.freedesktop.org
Glenn Kennard [Wed, 20 Aug 2014 19:55:37 +0000 (21:55 +0200)]
r600g: Fix flat/smooth shade state toggle
If only the flat/smooth shade state changed between
two render calls the prior code would miss updating the
hardware state.
Also add check for sprite coord, potentially same type
of issue otherwise for it.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=81967
Signed-off-by: Glenn Kennard <glenn.kennard@gmail.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Tom Stellard [Tue, 19 Aug 2014 23:27:38 +0000 (16:27 -0700)]
r600g/compute: Don't initialize vertex_buffer_state masks to 0x2
cs_vertex_buffer_state.enabled_mask and
cs_vertex_buffer_state.dirty_mask are both updated when
r600_set_constant_buffer() is called, so we don't need to manually
update these values.
This fixes a crash with OpenCL programs that have a kernel with no
arguments.
https://bugs.freedesktop.org/show_bug.cgi?id=82671
CC: "10.2" <mesa-stable@lists.freedesktop.org>
Tom Stellard [Tue, 19 Aug 2014 23:07:24 +0000 (16:07 -0700)]
r600g/compute: Use the first parameter in evergreen_set_global_binding()
Tom Stellard [Tue, 19 Aug 2014 21:04:32 +0000 (14:04 -0700)]
pipe-loader: Fix memory leak v2
v2:
- Change driver_name to char*
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
CC: "10.2" <mesa-stable@lists.freedesktop.org>
Tom Stellard [Tue, 19 Aug 2014 20:18:19 +0000 (13:18 -0700)]
radeon: Add work-around for missing Hainan support in clang < 3.6 v2
v2:
- Add missing break.
https://bugs.freedesktop.org/show_bug.cgi?id=82709
CC: "10.2" <mesa-stable@lists.freedesktop.org>
Michel Dänzer [Thu, 21 Aug 2014 10:30:22 +0000 (06:30 -0400)]
st/clover: Fix build against LLVM SVN >= r215967 v2
v2: Tom Stellard
- Properly destroy the Module
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Kenneth Graunke [Tue, 19 Aug 2014 00:20:21 +0000 (17:20 -0700)]
i965,meta: Stop unlocking the texture to try and prevent deadlocks.
Unlocking the texture is not safe: another thread could come in and grab
it. Now that we use a recursive mutex, this should work. This also fixes
texture lock deadlocks in the new meta fast clear path.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Tested-by: Chris Forbes <chrisf@ijw.co.nz>
Kenneth Graunke [Tue, 19 Aug 2014 00:20:20 +0000 (17:20 -0700)]
mesa: Use a recursive mutex for the texture lock.
This avoids problems with things like meta operations calling functions
that want to take the lock while the lock is already held. Basically,
the point is to guard against API reentrancy across threads...not to
guard against ourselves.
Dave Airlie opposed this change, but it makes master usable again and no
one proposed a better solution. We can revert this if/when someone
does.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Tested-by: Chris Forbes <chrisf@ijw.co.nz>
Carl Worth [Mon, 18 Aug 2014 23:26:34 +0000 (16:26 -0700)]
glcpp: Fix glcpp-test-cr-lf "make check" test for Mac OS X
There were two problems with the way this script used sed on OS X:
1. The OS X sed doesn't interpret "\r" in a replacement list as a
carriage-return character, (instead it was inserting a literal
'r' character).
We fix this by putting an actual ^M character into the source of
the script, (rather than a two-character escape sequence hoping
for sed to do the right thing).
2. When generating the test files with LF-CR ("\n\r") newlines, the
OS X sed was adding an undesired final newline ("\n") at the end
of the file. We avoid this by first using sed to add the ^M
before the newlines, then using tr to swap the \r and \n
characters. This way, sed never sees any lines ending with
anything but \n, so it doesn't get confused and doesn't add any
bogus extra newlines.
Tested-by: Vinson Lee <vlee@freedesktop.org>
Vinson's testing confirmed that this patch fixes FreeBSD as well.
Carl Worth [Mon, 18 Aug 2014 23:26:09 +0000 (16:26 -0700)]
glcpp: Use printf instead of "echo -n" in glcpp-test
I noticed that with /bin/sh on Mac OS X, "echo -n" does not work as
desired, (it actually prints "-n" rather than suppressing the final
newline). There is a /bin/echo that could be used (it actually works)
instead of the builtin echo.
But I decided it's more robust to just use printf rather than
hardcoding /bin/echo into the script.
Matt Turner [Fri, 15 Aug 2014 19:32:23 +0000 (12:32 -0700)]
i965/vec4: Allow reswizzling writemasks when swizzle is single-valued.
total instructions in shared programs:
4288033 ->
4266151 (-0.51%)
instructions in affected programs: 930915 -> 909033 (-2.35%)
Jon TURNEY [Sun, 17 Aug 2014 16:21:27 +0000 (17:21 +0100)]
Teach os_get_total_physical_memory about Cygwin
Signed-off-by: Jon TURNEY <jon.turney@dronecode.org.uk>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Michel Dänzer [Tue, 19 Aug 2014 02:00:16 +0000 (11:00 +0900)]
r300g: Fix path to test programs for out-of-tree builds
Fixes make check in that case.
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Vinson Lee [Wed, 20 Aug 2014 06:17:40 +0000 (23:17 -0700)]
gallivm: Fix build with LLVM >= 3.6 r215967.
This LLVM 3.6 commit changed EngineBuilder constructor.
commit
3f4ed32b4398eaf4fe0080d8001ba01e6c2f43c8
Author: Rafael Espindola <rafael.espindola@gmail.com>
Date: Tue Aug 19 04:04:25 2014 +0000
Make it explicit that ExecutionEngine takes ownership of the modules.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215967
91177308-0d34-0410-b5e6-
96231b3b80d8
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-and-Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Timothy Arceri [Tue, 19 Aug 2014 23:56:42 +0000 (13:56 -1000)]
glsl: Use the without_array predicate in some more places
Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Timothy Arceri <t_arceri@yahoo.com.au>
Kristian Høgsberg [Mon, 18 Aug 2014 19:31:14 +0000 (12:31 -0700)]
i965: Flush the RC and TC before doing a fast clear resolve
The docs say "When performing a render target resolve, PIPE_CONTROL with end
of pipe sync must be delivered.", which doesn't actually tell us whether we
need to do it before or after. Blorp did it before and after, and doing it
before certainly makes sense. The resolve operation needs to read from the
MCS and if we don't flush the render cache it won't get up-to-date data.
On the other hand, doing it after should not be necessary, since we call
brw_render_cache_set_check_flush() after the resolve.
Fixes rendering corruption in kwin's cover switch effect and various steam
games.
Missing flush spotted by Ken.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Signed-off-by: Kristian Høgsberg <krh@bitplanet.net>
Carl Worth [Tue, 19 Aug 2014 22:21:09 +0000 (15:21 -0700)]
docs: Import 10.2.6 release notes, add news item.
Chris Forbes [Tue, 19 Aug 2014 11:33:24 +0000 (23:33 +1200)]
docs: Mark off ARB_conditional_render_inverted for i965
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Chris Forbes [Tue, 19 Aug 2014 11:30:50 +0000 (23:30 +1200)]
i965: Enable ARB_conditional_render_inverted on Gen6+.
The extension requires GL 3.0, so enable on just the generations
exposing that.
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Chris Forbes [Tue, 19 Aug 2014 11:23:08 +0000 (23:23 +1200)]
mesa: Add support for inverted s/w conditional rendering
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Matt Turner [Sun, 17 Aug 2014 22:13:54 +0000 (15:13 -0700)]
i965/vec4: Add a pass to reduce swizzles.
total instructions in shared programs:
4344280 ->
4288033 (-1.29%)
instructions in affected programs: 397468 -> 341221 (-14.15%)
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Mon, 18 Aug 2014 22:51:47 +0000 (15:51 -0700)]
vc4: Plumb the texture index from TGSI through to the sampler uniforms.
This commit and the last one fix ARB_fragment_program/sparse-samplers and
6 other tests.
Eric Anholt [Mon, 18 Aug 2014 22:50:48 +0000 (15:50 -0700)]
vc4: Avoid a null-deref if a sampler index isn't used.
Part of fixing ARB_fragment_program/sparse-samplers
Brian Paul [Tue, 19 Aug 2014 13:51:07 +0000 (07:51 -0600)]
mesa: fix NULL pointer deref bug in _mesa_drawbuffers()
This is a follow-on fix to commit
39b40ad144. Fixes a crash if the
user calls glDrawBuffers(0, NULL).
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82814
Cc: "10.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Glenn Kennard [Sun, 17 Aug 2014 20:26:19 +0000 (22:26 +0200)]
r600g: Fix missing SET_TEXTURE_OFFSETS
SB needs a bit of special handling to handle
instructions without obvious side effects, to
avoid it deleting them.
Fixes failing non-const ARB_gpu_shader5
textureOffsets piglits with sb enabled.
Signed-off-by: Glenn Kennard <glenn.kennard@gmail.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Alexander von Gluck IV [Mon, 18 Aug 2014 21:40:34 +0000 (21:40 +0000)]
gallium/target: Add needed mesautil lib to haiku-softpipe
Acked-by: Brian Paul <brianp@vmware.com>
Alexander von Gluck IV [Mon, 18 Aug 2014 21:01:48 +0000 (21:01 +0000)]
gallium/aux: Fill in Haiku get process name code
Acked-by: Brian Paul <brianp@vmware.com>
Alexander von Gluck IV [Mon, 18 Aug 2014 19:47:24 +0000 (19:47 +0000)]
haiku/swrast: Add missing src include search path for missing util/macros.h
Acked-by: Brian Paul <brianp@vmware.com>
Tobias Klausmann [Sat, 16 Aug 2014 01:43:19 +0000 (03:43 +0200)]
docs: Update status of ARB_conditional_render_inverted
Done for: nvc0, softpipe and llvmpipe
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>
Tobias Klausmann [Sun, 17 Aug 2014 15:16:08 +0000 (17:16 +0200)]
llvmpipe/softpipe: enable ARB_conditional_render_inverted
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>
Tobias Klausmann [Sat, 16 Aug 2014 01:44:26 +0000 (03:44 +0200)]
nvc0: Handle ARB_conditional_render_inverted and enable it
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>
Tobias Klausmann [Sun, 17 Aug 2014 22:41:12 +0000 (00:41 +0200)]
mesa/st: Support ARB_conditional_render_inverted modes
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>
Tobias Klausmann [Sun, 17 Aug 2014 01:37:19 +0000 (03:37 +0200)]
gallium: Add and handle PIPE_CAP_CONDITIONAL_RENDER_INVERTED
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>
Tobias Klausmann [Sat, 16 Aug 2014 01:25:28 +0000 (03:25 +0200)]
mesa: add ARB_conditional_render_inverted flags
Also add an extension bit so we can safely enable
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>
Tobias Klausmann [Tue, 19 Aug 2014 00:20:27 +0000 (02:20 +0200)]
glapi: add GL_ARB_conditional_render_inverted
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>
Chia-I Wu [Tue, 19 Aug 2014 11:52:07 +0000 (19:52 +0800)]
ilo: fix PIPE_CAP_VIDEO_MEMORY
I changed Emil's patch in
f921131a5cebc233749a86cdd44b409c0cecc4ef to report
raw values in the winsys, but forgot to convert the values to megabytes in the
pipe driver.
Chia-I Wu [Sun, 17 Aug 2014 06:13:35 +0000 (14:13 +0800)]
ilo: enable HiZ in more cases on GEN6
With layer offsetting killed, we no longer need to restrict HiZ to
non-mipmapped and non-arary depth buffers.
Chia-I Wu [Sun, 17 Aug 2014 06:09:43 +0000 (14:09 +0800)]
ilo: remove layer offsetting
Follow i965 to kill layer offsetting for GEN6.
Chia-I Wu [Fri, 8 Aug 2014 07:36:36 +0000 (15:36 +0800)]
ilo: migrate to ilo_layout
Embed an ilo_layout in ilo_texture, and remove now duplicated members.
Chia-I Wu [Fri, 8 Aug 2014 04:42:50 +0000 (12:42 +0800)]
ilo: add new resource layout code
Based on the old code, the new layout code describes the layout with the new,
well-documented, ilo_layout. It also gains new features such as MCS support
and extended ARYSPC_LOD0 that i965 comes up with (see
6345a94a9b134b1321b3b290bacde228b12af415).
Niels Ole Salscheider [Thu, 14 Aug 2014 18:22:26 +0000 (20:22 +0200)]
gallium/radeon: Do not use u_upload_mgr for buffer downloads
Instead create a staging texture with pipe_buffer_create and
PIPE_USAGE_STAGING.
u_upload_mgr sets the usage of its staging buffer to PIPE_USAGE_STREAM.
But since
150ac07b855b5c5f879bf6ce9ca421ccd1a6c938 CPU -> GPU streaming buffers
are created in VRAM. Therefore the staging texture (in VRAM) does not offer any
performance improvements for buffer downloads.
Signed-off-by: Niels Ole Salscheider <niels_ole@salscheider-online.de>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Marek Olšák [Mon, 18 Aug 2014 21:16:08 +0000 (23:16 +0200)]
r600g: copy IA_MULTI_VGT_PARAM programming from radeonsi for Cayman
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Marek Olšák [Mon, 18 Aug 2014 21:14:34 +0000 (23:14 +0200)]
radeonsi: bump PRIMGROUP_SIZE for some cases
Recommended by hw people.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Marek Olšák [Fri, 15 Aug 2014 20:45:10 +0000 (22:45 +0200)]
radeonsi: set PARTIAL_VS_WAVE(0) when appropriate
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Marek Olšák [Fri, 15 Aug 2014 14:32:03 +0000 (16:32 +0200)]
radeonsi: set IA_MULTI_VGT_PARAM on SI the same as on CIK (v2)
Nothing's changed for CIK here.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Marek Olšák [Sun, 17 Aug 2014 23:09:31 +0000 (01:09 +0200)]
radeonsi: simplify si_num_banks function
This makes it easier to use.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Marek Olšák [Sun, 17 Aug 2014 22:55:40 +0000 (00:55 +0200)]
radeonsi: use r600_draw_rectangle from r600g
Rectangles are easier than triangles for the rasterizer.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Marek Olšák [Sun, 17 Aug 2014 14:25:01 +0000 (16:25 +0200)]
radeonsi: save scissor state and sample mask for u_blitter
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Marek Olšák [Sun, 17 Aug 2014 22:51:47 +0000 (00:51 +0200)]
radeonsi: don't set CB_SHADER_MASK=1 if there are no color outputs
This hack isn't needed anymore because of the previous u_blitter commit.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Marek Olšák [Sun, 17 Aug 2014 22:47:01 +0000 (00:47 +0200)]
gallium/u_blitter: don't use an empty fragment shader if there's a colorbuffer
This is custom code used by some drivers.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Marek Olšák [Sat, 16 Aug 2014 23:46:31 +0000 (01:46 +0200)]
gallium/util: handle PIPE_BUFFER in util_pipe_tex_to_tgsi_tex
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Marek Olšák [Sat, 16 Aug 2014 23:36:57 +0000 (01:36 +0200)]
rbug: only add textures to the list
rbug-gui cannot display buffers, so it's pointless to add them.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Marek Olšák [Sat, 16 Aug 2014 23:36:11 +0000 (01:36 +0200)]
rbug: fix a crash in sampler_view_destroy caused by incorrect context
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Marek Olšák [Sat, 16 Aug 2014 23:34:33 +0000 (01:34 +0200)]
rbug: send the actual number of layers to the client
This sends the correct value for array textures.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Marek Olšák [Sat, 16 Aug 2014 23:33:46 +0000 (01:33 +0200)]
rbug: implement streamout context functions
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Marek Olšák [Sat, 16 Aug 2014 23:33:27 +0000 (01:33 +0200)]
rbug: fix crash in set_vertex_buffers
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Marek Olšák [Sat, 16 Aug 2014 23:32:43 +0000 (01:32 +0200)]
rbug: remove contexts from the list properly
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Emil Velikov [Tue, 19 Aug 2014 09:02:35 +0000 (10:02 +0100)]
ilo: fold drm_intel_get_aperture_sizes() within probe_winsys()
... and store the value in intel_winsys_info/ilo_dev_info.
Suggested-by: Chia-I Wu <olvaffe@gmail.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
olv: check for errors and report raw values
Matt Turner [Tue, 15 Jul 2014 02:48:15 +0000 (19:48 -0700)]
i965/cfg: Add a foreach_block_and_inst_safe macro.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Matt Turner [Fri, 11 Jul 2014 00:30:40 +0000 (17:30 -0700)]
i965/cfg: Add a foreach_inst_in_block_safe macro.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Matt Turner [Mon, 14 Jul 2014 18:15:51 +0000 (11:15 -0700)]
i965/cfg: Add a foreach_block_safe macro.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Matt Turner [Sat, 12 Jul 2014 04:16:13 +0000 (21:16 -0700)]
i965: Pass a cfg pointer to generate_{code,assembly}.
The loop over all instructions is now two-fold, over all of the blocks
and all of the instructions in each block.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Matt Turner [Sat, 12 Jul 2014 05:31:39 +0000 (22:31 -0700)]
i965: Add and use foreach_block macro.
Use this as an opportunity to rename 'block_num' to 'num'. block->num is
clear, and block->block_num has always been redundant.
Matt Turner [Fri, 11 Jul 2014 23:17:47 +0000 (16:17 -0700)]
i965/cfg: Embed link in bblock_t for main block list.
The next patch adds a foreach_block (block, cfg) macro, which works
better if it provides a direct bblock_t pointer, rather than a
bblock_link pointer that you have to use to find the actual block.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Matt Turner [Sun, 10 Aug 2014 17:28:34 +0000 (10:28 -0700)]
i965/fs: Optimize gl_FrontFacing calculation on Gen4/5.
Doesn't use fewer instructions, but it does avoid writing the flag
register and if we want to switch the representation of true for Gen4/5
in the future, we can just delete the AND instruction.
Matt Turner [Sun, 10 Aug 2014 16:04:49 +0000 (09:04 -0700)]
i965/fs: Optimize gl_FrontFacing calculation on Gen6+.
total instructions in shared programs:
4288650 ->
4282838 (-0.14%)
instructions in affected programs: 595018 -> 589206 (-0.98%)
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Matt Turner [Sat, 9 Aug 2014 04:00:31 +0000 (21:00 -0700)]
i965: Use ~0 to represent true on Gen >= 6.
total instructions in shared programs:
4292303 ->
4288650 (-0.09%)
instructions in affected programs: 299670 -> 296017 (-1.22%)
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Matt Turner [Sat, 9 Aug 2014 04:04:26 +0000 (21:04 -0700)]
i965/fs: Optimize emit_bool_to_cond_code for logical exprs.
AND, OR, and XOR can generate the conditional code directly.
total instructions in shared programs:
4293335 ->
4292303 (-0.02%)
instructions in affected programs: 121408 -> 120376 (-0.85%)
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Matt Turner [Sat, 9 Aug 2014 02:44:22 +0000 (19:44 -0700)]
i965: Use UniformBooleanTrue value for boolean literal true.
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Matt Turner [Sat, 9 Aug 2014 02:46:05 +0000 (19:46 -0700)]
glsl: Use UniformBooleanTrue value for uniform initializers.
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Matt Turner [Fri, 8 Aug 2014 18:58:16 +0000 (11:58 -0700)]
mesa: Upload boolean uniforms using UniformBooleanTrue.
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Matt Turner [Sat, 9 Aug 2014 04:19:42 +0000 (21:19 -0700)]
i965: Remove dead call to _mesa_associate_uniform_storage().
Dead since the call to _mesa_generate_parameters_list_for_uniforms
was removed in commit
12751ef2. So this was why all of that code that
was supposed to fix up the value of a uniform bool to wasn't happening.
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Matt Turner [Fri, 15 Aug 2014 17:08:14 +0000 (10:08 -0700)]
mapi: Inline shared-glapi/tests/Makefile.
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Matt Turner [Fri, 15 Aug 2014 17:01:10 +0000 (10:01 -0700)]
mapi: Inline glapi/tests/Makefile.
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Matt Turner [Thu, 14 Aug 2014 20:58:04 +0000 (13:58 -0700)]
mapi: Inline glapi/Makefile.
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Matt Turner [Thu, 14 Aug 2014 20:47:16 +0000 (13:47 -0700)]
mapi: Inline es2api/Makefile.
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Matt Turner [Thu, 14 Aug 2014 19:30:22 +0000 (12:30 -0700)]
mapi: Inline es1api/Makefile.
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Matt Turner [Thu, 14 Aug 2014 19:20:12 +0000 (12:20 -0700)]
mapi: Inline shared-glapi/Makefile.
Matt Turner [Thu, 14 Aug 2014 23:07:26 +0000 (16:07 -0700)]
build: Let install-lib-links.mk handle .la files in subdirectories.
The next patches are going to combine some of the mapi subdirectories'
Makefiles into a single Makefile, giving better build parallelism.
lib_LTLIBRARIES will be set to something like
lib_LTLIBRARIES = shared-glapi/libglapi.la es2api/libGLESv2.la
and the current code in install-lib-links.mk simply prepends .libs/ and
replaces the .la in order to create the filenames that it needs to ln/cp
into the LIBDIR. This doesn't work when the .la file is actually in a
subdirectory.
This patch fixes this and puts .libs/ in the right place.
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Matt Turner [Sun, 17 Aug 2014 07:45:27 +0000 (00:45 -0700)]
i965: Enable instruction compaction on Gen8+.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Matt Turner [Sun, 15 Jun 2014 18:29:22 +0000 (11:29 -0700)]
i965: Add support for compacting 3-src instructions on Gen8.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Matt Turner [Wed, 18 Jun 2014 22:43:23 +0000 (15:43 -0700)]
i965: Add support for compacting 1- and 2-src instructions on Gen8.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Matt Turner [Sat, 19 Apr 2014 20:38:59 +0000 (13:38 -0700)]
i965/gen8: Add 3-src instruction compaction tables.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Matt Turner [Sat, 19 Apr 2014 20:20:55 +0000 (13:20 -0700)]
i965/gen8: Add instruction compaction tables.
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Matt Turner [Tue, 17 Jun 2014 19:14:44 +0000 (12:14 -0700)]
i965: Update JIP/UIP compaction code to operate on bytes.
JIP/UIP were previously in units of compacted instructions. On Gen8
they're in units of bytes.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>