yosys.git
5 years agoVisual Studio build fix
Miodrag Milanovic [Wed, 31 Jul 2019 07:10:24 +0000 (09:10 +0200)]
Visual Studio build fix

5 years agoFix linking issue for new mxe and pthread
Miodrag Milanovic [Wed, 31 Jul 2019 16:02:27 +0000 (18:02 +0200)]
Fix linking issue for new mxe and pthread

5 years agoFix yosys linking for mxe
Miodrag Milanovic [Wed, 31 Jul 2019 15:31:07 +0000 (17:31 +0200)]
Fix yosys linking for mxe

5 years agoNew mxe hacks needed to support 2ca237e
Miodrag Milanovic [Wed, 31 Jul 2019 15:30:48 +0000 (17:30 +0200)]
New mxe hacks needed to support 2ca237e

5 years agoFix formatting for msys2 mingw build using GetSize
Miodrag Milanovic [Wed, 31 Jul 2019 09:49:48 +0000 (11:49 +0200)]
Fix formatting for msys2 mingw build using GetSize

5 years agoUpdate CHANGELOG
David Shah [Fri, 26 Jul 2019 15:45:51 +0000 (16:45 +0100)]
Update CHANGELOG

Signed-off-by: David Shah <dave@ds0.me>
5 years agoMerge pull request #1175 from whitequark/write_verilog-fix-case-attr-position
Clifford Wolf [Tue, 9 Jul 2019 20:51:25 +0000 (22:51 +0200)]
Merge pull request #1175 from whitequark/write_verilog-fix-case-attr-position

write_verilog: fix placement of case attributes

5 years agoUpdate CHANGELOG
David Shah [Tue, 9 Jul 2019 17:51:23 +0000 (18:51 +0100)]
Update CHANGELOG

Signed-off-by: David Shah <dave@ds0.me>
5 years agoMerge pull request #1163 from whitequark/more-case-attrs
Clifford Wolf [Tue, 9 Jul 2019 14:57:16 +0000 (16:57 +0200)]
Merge pull request #1163 from whitequark/more-case-attrs

More support for case rule attributes

5 years agoMerge pull request #1162 from whitequark/rtlil-case-attrs
Clifford Wolf [Tue, 9 Jul 2019 14:56:29 +0000 (16:56 +0200)]
Merge pull request #1162 from whitequark/rtlil-case-attrs

Allow attributes on individual switch cases in RTLIL

5 years agoMerge pull request #1159 from btut/fix/1090_segfault_cell_and_wire
Clifford Wolf [Fri, 5 Jul 2019 09:57:41 +0000 (11:57 +0200)]
Merge pull request #1159 from btut/fix/1090_segfault_cell_and_wire

Throw runtime exception when trying to convert inexistend C++ object to Python

5 years agoMerge pull request #1147 from YosysHQ/clifford/fix1144
Clifford Wolf [Wed, 3 Jul 2019 10:30:37 +0000 (12:30 +0200)]
Merge pull request #1147 from YosysHQ/clifford/fix1144

Improve specify dummy parser

5 years agoMerge pull request #1154 from whitequark/manual-sync-always
Clifford Wolf [Wed, 3 Jul 2019 08:45:29 +0000 (10:45 +0200)]
Merge pull request #1154 from whitequark/manual-sync-always

manual: explain the purpose of `sync always`

5 years agoMerge pull request #1153 from YosysHQ/dave/fix_multi_mux
David Shah [Tue, 2 Jul 2019 15:47:54 +0000 (16:47 +0100)]
Merge pull request #1153 from YosysHQ/dave/fix_multi_mux

memory_dff: Fix checking of feedback mux input when more than one mux

5 years agoFix read_verilog assert/assume/etc on default case label, fixes YosysHQ/SymbiYosys#53
Clifford Wolf [Tue, 2 Jul 2019 09:36:26 +0000 (11:36 +0200)]
Fix read_verilog assert/assume/etc on default case label, fixes YosysHQ/SymbiYosys#53

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoautotest.sh to define _AUTOTB when test_autotb
Eddie Hung [Fri, 28 Jun 2019 21:18:56 +0000 (14:18 -0700)]
autotest.sh to define _AUTOTB when test_autotb

5 years agoMerge pull request #1146 from gsomlo/gls-test-abc-ext
Clifford Wolf [Fri, 28 Jun 2019 08:30:31 +0000 (10:30 +0200)]
Merge pull request #1146 from gsomlo/gls-test-abc-ext

tests: use optional ABCEXTERNAL when specified

5 years agoCheckout yosys-0.9-rc branch of yosys-tests
Eddie Hung [Tue, 2 Jul 2019 17:06:56 +0000 (10:06 -0700)]
Checkout yosys-0.9-rc branch of yosys-tests

5 years agoAdd missing CHANGELOG entries
Eddie Hung [Fri, 28 Jun 2019 18:16:15 +0000 (11:16 -0700)]
Add missing CHANGELOG entries

5 years agoMerge pull request #1139 from YosysHQ/dave/check-sim-iverilog
Eddie Hung [Thu, 27 Jun 2019 19:31:15 +0000 (12:31 -0700)]
Merge pull request #1139 from YosysHQ/dave/check-sim-iverilog

tests: Check that Icarus can parse arch sim models

5 years agoGrr
Eddie Hung [Thu, 27 Jun 2019 18:53:42 +0000 (11:53 -0700)]
Grr

5 years agoCapitalisation
Eddie Hung [Thu, 27 Jun 2019 18:26:44 +0000 (11:26 -0700)]
Capitalisation

5 years agoMake CHANGELOG clearer
Eddie Hung [Thu, 27 Jun 2019 18:25:57 +0000 (11:25 -0700)]
Make CHANGELOG clearer

5 years agoMerge pull request #1143 from YosysHQ/clifford/fix1135
Eddie Hung [Thu, 27 Jun 2019 18:48:48 +0000 (11:48 -0700)]
Merge pull request #1143 from YosysHQ/clifford/fix1135

Add "pmux2shiftx -norange"

5 years agoAdd simcells.v, simlib.v, and some output
Eddie Hung [Thu, 27 Jun 2019 18:13:49 +0000 (11:13 -0700)]
Add simcells.v, simlib.v, and some output

5 years agoAdd #1135 testcase
Eddie Hung [Thu, 27 Jun 2019 18:02:52 +0000 (11:02 -0700)]
Add #1135 testcase

5 years agosynth_xilinx -arch -> -family, consistent with older synth_intel
Eddie Hung [Thu, 27 Jun 2019 14:24:47 +0000 (07:24 -0700)]
synth_xilinx -arch -> -family, consistent with older synth_intel

5 years agoMerge pull request #1142 from YosysHQ/clifford/fix1132
Eddie Hung [Thu, 27 Jun 2019 14:21:31 +0000 (07:21 -0700)]
Merge pull request #1142 from YosysHQ/clifford/fix1132

Fix handling of partial covers in muxcover

5 years agoMerge pull request #1138 from YosysHQ/koriakin/xc7nocarrymux
Eddie Hung [Thu, 27 Jun 2019 13:04:56 +0000 (06:04 -0700)]
Merge pull request #1138 from YosysHQ/koriakin/xc7nocarrymux

synth_xilinx: Add -nocarry and -nowidelut options

5 years agoCopy tests from eddie/fix1132
Eddie Hung [Thu, 27 Jun 2019 13:01:50 +0000 (06:01 -0700)]
Copy tests from eddie/fix1132

5 years agoAdd "pmux2shiftx -norange", fixes #1135
Clifford Wolf [Thu, 27 Jun 2019 08:59:12 +0000 (10:59 +0200)]
Add "pmux2shiftx -norange", fixes #1135

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoFix handling of partial covers in muxcover, fixes #1132
Clifford Wolf [Thu, 27 Jun 2019 07:42:49 +0000 (09:42 +0200)]
Fix handling of partial covers in muxcover, fixes #1132

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoGrrr
Eddie Hung [Wed, 26 Jun 2019 17:47:03 +0000 (10:47 -0700)]
Grrr

5 years agotests: Check that Icarus can parse arch sim models
David Shah [Wed, 26 Jun 2019 17:17:52 +0000 (18:17 +0100)]
tests: Check that Icarus can parse arch sim models

Signed-off-by: David Shah <dave@ds0.me>
5 years agoFix spacing
Eddie Hung [Wed, 26 Jun 2019 17:09:18 +0000 (10:09 -0700)]
Fix spacing

5 years agoOops. Actually use nocarry flag as spotted by @koriakin
Eddie Hung [Wed, 26 Jun 2019 17:06:33 +0000 (10:06 -0700)]
Oops. Actually use nocarry flag as spotted by @koriakin

5 years agoMerge pull request #1137 from mmicko/cell_sim_fix
Clifford Wolf [Wed, 26 Jun 2019 17:06:10 +0000 (19:06 +0200)]
Merge pull request #1137 from mmicko/cell_sim_fix

Simulation model verilog fix

5 years agoSimulation model verilog fix
Miodrag Milanovic [Wed, 26 Jun 2019 16:34:34 +0000 (18:34 +0200)]
Simulation model verilog fix

5 years agosynth_ecp5 rename -nomux to -nowidelut, but preserve former
Eddie Hung [Wed, 26 Jun 2019 16:33:48 +0000 (09:33 -0700)]
synth_ecp5 rename -nomux to -nowidelut, but preserve former

5 years agoMerge branch 'xc7nocarrymux' of https://github.com/koriakin/yosys into koriakin/xc7no...
Eddie Hung [Wed, 26 Jun 2019 16:33:38 +0000 (09:33 -0700)]
Merge branch 'xc7nocarrymux' of https://github.com/koriakin/yosys into koriakin/xc7nocarrymux

5 years agoImprove opt_clean handling of unused public wires
Clifford Wolf [Wed, 26 Jun 2019 15:54:17 +0000 (17:54 +0200)]
Improve opt_clean handling of unused public wires

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoImprove BTOR2 handling of undriven wires
Clifford Wolf [Wed, 26 Jun 2019 15:42:00 +0000 (17:42 +0200)]
Improve BTOR2 handling of undriven wires

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoFix segfault on failed VERILOG_FRONTEND::const2ast, closes #1131
Clifford Wolf [Wed, 26 Jun 2019 09:09:43 +0000 (11:09 +0200)]
Fix segfault on failed VERILOG_FRONTEND::const2ast, closes #1131

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoDo not clean up buffer cells with "keep" attribute, closes #1128
Clifford Wolf [Wed, 26 Jun 2019 09:00:44 +0000 (11:00 +0200)]
Do not clean up buffer cells with "keep" attribute, closes #1128

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoEscape scope names starting with dollar sign in smtio.py
Clifford Wolf [Wed, 26 Jun 2019 08:58:39 +0000 (10:58 +0200)]
Escape scope names starting with dollar sign in smtio.py

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoAdd more ECP5 Diamond flip-flops.
whitequark [Tue, 25 Jun 2019 16:37:36 +0000 (16:37 +0000)]
Add more ECP5 Diamond flip-flops.

This includes all I/O registers, and a few more regular FFs where it
was convenient.

5 years agoAdd testcase from #335, fixed by #1130
Eddie Hung [Tue, 25 Jun 2019 15:43:58 +0000 (08:43 -0700)]
Add testcase from #335, fixed by #1130

5 years agoMerge pull request #1130 from YosysHQ/eddie/fix710
Clifford Wolf [Tue, 25 Jun 2019 15:34:44 +0000 (17:34 +0200)]
Merge pull request #1130 from YosysHQ/eddie/fix710

memory_dff: walk through more than one mux for computing read enable

5 years agoFix spacing
Eddie Hung [Tue, 25 Jun 2019 15:33:17 +0000 (08:33 -0700)]
Fix spacing

5 years agoMove only one consumer check outside of while loop
Eddie Hung [Tue, 25 Jun 2019 15:29:55 +0000 (08:29 -0700)]
Move only one consumer check outside of while loop

5 years agoMerge pull request #1129 from YosysHQ/eddie/ram32x1d
Eddie Hung [Tue, 25 Jun 2019 15:22:57 +0000 (08:22 -0700)]
Merge pull request #1129 from YosysHQ/eddie/ram32x1d

Add RAM32X1D support

5 years agoMerge pull request #1075 from YosysHQ/eddie/muxpack
Clifford Wolf [Tue, 25 Jun 2019 15:21:59 +0000 (17:21 +0200)]
Merge pull request #1075 from YosysHQ/eddie/muxpack

Add new "muxpack" command for packing chains of $mux cells

5 years agoWalk through as many muxes as exist for rd_en
Eddie Hung [Tue, 25 Jun 2019 01:33:06 +0000 (18:33 -0700)]
Walk through as many muxes as exist for rd_en

5 years agoAdd test
Eddie Hung [Tue, 25 Jun 2019 01:32:58 +0000 (18:32 -0700)]
Add test

5 years agoAdd RAM32X1D support
Eddie Hung [Mon, 24 Jun 2019 23:16:50 +0000 (16:16 -0700)]
Add RAM32X1D support

5 years agoMerge pull request #1124 from mmicko/json_ports
Clifford Wolf [Mon, 24 Jun 2019 06:52:12 +0000 (08:52 +0200)]
Merge pull request #1124 from mmicko/json_ports

Add upto and offset to JSON ports

5 years agoMerge remote-tracking branch 'origin/master' into eddie/muxpack
Eddie Hung [Sat, 22 Jun 2019 21:40:55 +0000 (14:40 -0700)]
Merge remote-tracking branch 'origin/master' into eddie/muxpack

5 years agoAdd 'muxcover -dmux=<cost>' and '-nopartial' to CHANGELOG
Eddie Hung [Sat, 22 Jun 2019 03:30:24 +0000 (20:30 -0700)]
Add 'muxcover -dmux=<cost>' and '-nopartial' to CHANGELOG

5 years agoMerge pull request #1108 from YosysHQ/clifford/fix1091
Eddie Hung [Sat, 22 Jun 2019 00:13:41 +0000 (17:13 -0700)]
Merge pull request #1108 from YosysHQ/clifford/fix1091

Add support for partial matches to muxcover

5 years agoCope with $reduce_or common in case
Eddie Hung [Fri, 21 Jun 2019 19:31:14 +0000 (12:31 -0700)]
Cope with $reduce_or common in case

5 years agoAdd more tests
Eddie Hung [Fri, 21 Jun 2019 19:31:04 +0000 (12:31 -0700)]
Add more tests

5 years agoFix testcase
Eddie Hung [Fri, 21 Jun 2019 19:13:00 +0000 (12:13 -0700)]
Fix testcase

5 years agoFix spacing
Eddie Hung [Fri, 21 Jun 2019 18:52:51 +0000 (11:52 -0700)]
Fix spacing

5 years agoAdd doc
Eddie Hung [Fri, 21 Jun 2019 18:52:28 +0000 (11:52 -0700)]
Add doc

5 years agoAdd more muxpack tests, with overlapping entries
Eddie Hung [Fri, 21 Jun 2019 18:45:53 +0000 (11:45 -0700)]
Add more muxpack tests, with overlapping entries

5 years agoFix up ExclusiveDatabase with @cliffordwolf's help
Eddie Hung [Fri, 21 Jun 2019 18:45:31 +0000 (11:45 -0700)]
Fix up ExclusiveDatabase with @cliffordwolf's help

5 years agoMerge branch 'master' into eddie/muxpack
Eddie Hung [Fri, 21 Jun 2019 18:17:19 +0000 (11:17 -0700)]
Merge branch 'master' into eddie/muxpack

5 years agoFix json formatting
Miodrag Milanovic [Fri, 21 Jun 2019 18:01:40 +0000 (20:01 +0200)]
Fix json formatting

5 years agoAdd upto and offset to JSON ports
Miodrag Milanovic [Fri, 21 Jun 2019 17:47:25 +0000 (19:47 +0200)]
Add upto and offset to JSON ports

5 years agoMerge pull request #1123 from mmicko/fix_typo
Clifford Wolf [Fri, 21 Jun 2019 17:25:35 +0000 (19:25 +0200)]
Merge pull request #1123 from mmicko/fix_typo

Fix json frontend loading upto

5 years agoReplace "muxcover -freedecode" with "muxcover -dmux=cost"
Clifford Wolf [Fri, 21 Jun 2019 17:24:41 +0000 (19:24 +0200)]
Replace "muxcover -freedecode" with "muxcover -dmux=cost"

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoFix typo
Miodrag Milanovic [Fri, 21 Jun 2019 17:09:34 +0000 (19:09 +0200)]
Fix typo

5 years agoMerge pull request #1085 from YosysHQ/eddie/shregmap_improve
Eddie Hung [Fri, 21 Jun 2019 15:56:56 +0000 (08:56 -0700)]
Merge pull request #1085 from YosysHQ/eddie/shregmap_improve

Improve shregmap to handle case where first flop is common to two chains

5 years agoMerge pull request #1122 from YosysHQ/clifford/jsonports
Clifford Wolf [Fri, 21 Jun 2019 14:58:12 +0000 (16:58 +0200)]
Merge pull request #1122 from YosysHQ/clifford/jsonports

Added JSON upto and offset

5 years agoAdded JSON upto and offset
Clifford Wolf [Fri, 21 Jun 2019 13:22:17 +0000 (15:22 +0200)]
Added JSON upto and offset

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoMerge pull request #1121 from YosysHQ/ecp5-ccu2c-inv
Clifford Wolf [Fri, 21 Jun 2019 13:07:39 +0000 (15:07 +0200)]
Merge pull request #1121 from YosysHQ/ecp5-ccu2c-inv

ecp5: Improve mapping of $alu when BI is used

5 years agoecp5: Improve mapping of $alu when BI is used
David Shah [Fri, 21 Jun 2019 08:44:13 +0000 (09:44 +0100)]
ecp5: Improve mapping of $alu when BI is used

Signed-off-by: David Shah <dave@ds0.me>
5 years agoMerge pull request #1117 from bwidawsk/more-home
Clifford Wolf [Fri, 21 Jun 2019 08:13:51 +0000 (10:13 +0200)]
Merge pull request #1117 from bwidawsk/more-home

Add a few more filename rewrites

5 years agoMerge pull request #1119 from YosysHQ/eddie/fix1118
Clifford Wolf [Fri, 21 Jun 2019 08:13:13 +0000 (10:13 +0200)]
Merge pull request #1119 from YosysHQ/eddie/fix1118

Make genvar a signed type

5 years agoMerge pull request #1116 from YosysHQ/eddie/fix1115
Clifford Wolf [Fri, 21 Jun 2019 08:12:32 +0000 (10:12 +0200)]
Merge pull request #1116 from YosysHQ/eddie/fix1115

Sign extend unsized 'bx and 'bz values

5 years agoAdd "muxcover -freedecode"
Clifford Wolf [Fri, 21 Jun 2019 08:02:10 +0000 (10:02 +0200)]
Add "muxcover -freedecode"

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoFix gcc invalidation behaviour for write_aiger
Eddie Hung [Fri, 21 Jun 2019 04:56:02 +0000 (21:56 -0700)]
Fix gcc invalidation behaviour for write_aiger

5 years agoImprovements in muxcover
Clifford Wolf [Thu, 20 Jun 2019 09:30:27 +0000 (11:30 +0200)]
Improvements in muxcover

- Slightly under-estimate cost of decoder muxes
- Prefer larger muxes at tree root at same cost
- Don't double-count input cost for partial muxes
- Add debug log output

5 years agoMissing a `clean` and `opt_expr -mux_bool` in test
Eddie Hung [Wed, 19 Jun 2019 17:15:41 +0000 (10:15 -0700)]
Missing a `clean` and `opt_expr -mux_bool` in test

5 years agoAdd test
Eddie Hung [Wed, 19 Jun 2019 17:07:34 +0000 (10:07 -0700)]
Add test

5 years agoAdd support for partial matches to muxcover, fixes #1091
Clifford Wolf [Wed, 19 Jun 2019 11:15:54 +0000 (13:15 +0200)]
Add support for partial matches to muxcover, fixes #1091

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoActually, there might not be any harm in updating sigmap...
Eddie Hung [Fri, 21 Jun 2019 00:03:05 +0000 (17:03 -0700)]
Actually, there might not be any harm in updating sigmap...

5 years agoAdd comment as per @cliffordwolf
Eddie Hung [Thu, 20 Jun 2019 23:57:54 +0000 (16:57 -0700)]
Add comment as per @cliffordwolf

5 years agoAdd test
Eddie Hung [Thu, 20 Jun 2019 23:07:22 +0000 (16:07 -0700)]
Add test

5 years agoMake genvar a signed type
Eddie Hung [Thu, 20 Jun 2019 23:04:12 +0000 (16:04 -0700)]
Make genvar a signed type

5 years agoAdd CHANGELOG entry
Eddie Hung [Thu, 20 Jun 2019 19:45:40 +0000 (12:45 -0700)]
Add CHANGELOG entry

5 years agoExtend sign extension tests
Eddie Hung [Thu, 20 Jun 2019 19:43:59 +0000 (12:43 -0700)]
Extend sign extension tests

5 years agoMaintain "is_unsized" state of constants
Eddie Hung [Thu, 20 Jun 2019 19:43:39 +0000 (12:43 -0700)]
Maintain "is_unsized" state of constants

5 years agoRevert "Fix sign extension when sign is 1'bx"
Eddie Hung [Thu, 20 Jun 2019 19:40:05 +0000 (12:40 -0700)]
Revert "Fix sign extension when sign is 1'bx"

This reverts commit 0221f3e1c5b427678c5679027ee47ec7c0b8321d.

5 years agoAdd a few more filename rewrites
Ben Widawsky [Thu, 20 Jun 2019 17:27:59 +0000 (10:27 -0700)]
Add a few more filename rewrites

This now allows a full pipeline to work, something such as:
yosys -p "synth_ecp5 -json ~/work/fpga/prjtrellis/examples/ecp5_evn/blinky.v"

Otherwise, you will get something along the lines of:
ERROR: Can't open output file `~/work/fpga/prjtrellis/examples/ecp5_evn/blinky.v' for writing: No such file or directory

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
5 years agoRemove leftover comment
Eddie Hung [Thu, 20 Jun 2019 17:15:04 +0000 (10:15 -0700)]
Remove leftover comment

5 years agoAdd test
Eddie Hung [Thu, 20 Jun 2019 17:10:43 +0000 (10:10 -0700)]
Add test

5 years agoFix sign extension when sign is 1'bx
Eddie Hung [Thu, 20 Jun 2019 17:04:42 +0000 (10:04 -0700)]
Fix sign extension when sign is 1'bx

5 years agoFix typo, fixes #1095
Clifford Wolf [Thu, 20 Jun 2019 13:34:52 +0000 (15:34 +0200)]
Fix typo, fixes #1095

Signed-off-by: Clifford Wolf <clifford@clifford.at>
5 years agoImprove shregmap help message, fixes #1113
Clifford Wolf [Thu, 20 Jun 2019 13:23:55 +0000 (15:23 +0200)]
Improve shregmap help message, fixes #1113

Signed-off-by: Clifford Wolf <clifford@clifford.at>