Lisa Hsu [Tue, 15 Mar 2005 16:28:24 +0000 (11:28 -0500)]
fetch.cc:
undo ron's fix that i checked in, it caused the deadlock.
--HG--
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dab85d748ba651d3c2debdd6577c53b998f0d96e
Lisa Hsu [Mon, 14 Mar 2005 22:58:02 +0000 (17:58 -0500)]
helpful DPRINTF changes - more info is good!
--HG--
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a2d820bb97cab2c635a7192562daedd8d7784ec8
Lisa Hsu [Mon, 14 Mar 2005 16:16:27 +0000 (11:16 -0500)]
print the daddr to pciconfigall DPRINTF.
--HG--
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d13ce459d5dac026e596f0bb3ba801b1dbed9ed0
Lisa Hsu [Mon, 14 Mar 2005 16:15:41 +0000 (11:15 -0500)]
Ron's fix to some of the No supplier problems, don't deal with badaddrs.
--HG--
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442edd3c49333fc59953dd089eaaaee4f7b23deb
Lisa Hsu [Mon, 14 Mar 2005 15:23:43 +0000 (10:23 -0500)]
fix the etherdev2 connection so that nat runs work.
--HG--
extra : convert_revision :
8ad4d460836b456b29e5b4ab03081d4af622fb38
Nathan Binkert [Sat, 12 Mar 2005 14:42:08 +0000 (09:42 -0500)]
fix syntax error that affected split configurations.
--HG--
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db462e57736ccd3b6d21a06f2014eb0850a9ae90
Nathan Binkert [Fri, 11 Mar 2005 23:50:04 +0000 (18:50 -0500)]
I don't know why from m5 import * doesn't work. Steve?
--HG--
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b89dcd4f329973545dc8a5660daeda9bca7050a1
Nathan Binkert [Fri, 11 Mar 2005 23:47:11 +0000 (18:47 -0500)]
move the conversion stuff that was in configs/kernel/Config.py into
the m5 package as convert.py
add a smartdict class which stores strings and can intelligently
interpret those string variables as several other types.
make the env dict use the smartdict class
python/m5/config.py:
move a bunch of conversion functions into convert.py
turn the env dict into a smartdict
adapt the _CheckedInt stuff to deal with derived types
python/m5/objects/BaseCPU.mpy:
env is now a smartdict and can properly convert to bool
--HG--
extra : convert_revision :
8abcd35a5ab14b82f280aea59020953869e33365
Nathan Binkert [Fri, 11 Mar 2005 23:32:36 +0000 (18:32 -0500)]
Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/m5
into ziff.eecs.umich.edu:/z/binkertn/research/m5/current
--HG--
extra : convert_revision :
abc24d21097770ad323a2c0d537d3e9424db0d7d
Nathan Binkert [Fri, 11 Mar 2005 23:30:44 +0000 (18:30 -0500)]
Make ConfigNodes as intermediate containers work again.
python/m5/config.py:
move the type stuff into the Node constructor and
only try to grab self.type if the realtype is a SimObject
--HG--
extra : convert_revision :
00f6ece47e3812f67f9e1f062fe9c060bd6dd1cf
Nathan Binkert [Fri, 11 Mar 2005 23:28:38 +0000 (18:28 -0500)]
stick all python stuff into a top level python directory.
create an m5 package in python/m5
move the objects package into the m5 package
move the m5config into the m5 package as config
leave both importers outside of the package.
SConscript:
sim/main.cc:
move sim/pyconfig/* -> python
python/SConscript:
m5config.py -> m5/config.py (now automatically embedded)
objects -> python/m5/objects
embed all python files in python/m5
python/m5/config.py:
importer renamed mpy_importer
move code to m5/__init__.py
test/genini.py:
deal with new python organization
keep track of paths we want to add and add them after parameters
are parsed.
--HG--
rename : sim/pyconfig/SConscript => python/SConscript
rename : sim/pyconfig/m5config.py => python/m5/config.py
rename : objects/AlphaConsole.mpy => python/m5/objects/AlphaConsole.mpy
rename : objects/AlphaTLB.mpy => python/m5/objects/AlphaTLB.mpy
rename : objects/BadDevice.mpy => python/m5/objects/BadDevice.mpy
rename : objects/BaseCPU.mpy => python/m5/objects/BaseCPU.mpy
rename : objects/BaseCache.mpy => python/m5/objects/BaseCache.mpy
rename : objects/BaseSystem.mpy => python/m5/objects/BaseSystem.mpy
rename : objects/Bus.mpy => python/m5/objects/Bus.mpy
rename : objects/CoherenceProtocol.mpy => python/m5/objects/CoherenceProtocol.mpy
rename : objects/Device.mpy => python/m5/objects/Device.mpy
rename : objects/DiskImage.mpy => python/m5/objects/DiskImage.mpy
rename : objects/Ethernet.mpy => python/m5/objects/Ethernet.mpy
rename : objects/Ide.mpy => python/m5/objects/Ide.mpy
rename : objects/IntrControl.mpy => python/m5/objects/IntrControl.mpy
rename : objects/MemTest.mpy => python/m5/objects/MemTest.mpy
rename : objects/Pci.mpy => python/m5/objects/Pci.mpy
rename : objects/PhysicalMemory.mpy => python/m5/objects/PhysicalMemory.mpy
rename : objects/Platform.mpy => python/m5/objects/Platform.mpy
rename : objects/Process.mpy => python/m5/objects/Process.mpy
rename : objects/Repl.mpy => python/m5/objects/Repl.mpy
rename : objects/Root.mpy => python/m5/objects/Root.mpy
rename : objects/SimConsole.mpy => python/m5/objects/SimConsole.mpy
rename : objects/SimpleDisk.mpy => python/m5/objects/SimpleDisk.mpy
rename : objects/Tsunami.mpy => python/m5/objects/Tsunami.mpy
rename : objects/Uart.mpy => python/m5/objects/Uart.mpy
extra : convert_revision :
aebf6ccda33028b1125974ca8b6aeab6f7570f30
Erik Hallnor [Fri, 11 Mar 2005 23:14:47 +0000 (18:14 -0500)]
Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/m5
into zizzer.eecs.umich.edu:/z/ehallnor/work/m5
--HG--
extra : convert_revision :
a19b2143fe78625238ee0a8a4fac8193f673d933
Ron Dreslinski [Fri, 11 Mar 2005 23:07:07 +0000 (18:07 -0500)]
Added config files for splash2 benchmarks. Parameters:
ROOTDIR = root directory of the splash2 code
NP = number of proccessors
BENCHMARK = name of the splash2 benchmark (Cholesky, FFT, LUContig, LUNoncontig, Radix, Barnes, FMM, OceanContig, OceanNoncontig, Raytrace, WaterNSquared, or WaterSpatial)
SYSTEM = Type of system to simulate detailed or simple
Note: They use MOESI protocol and do_events is enabled (Multiple L1's and a shared L2)
--HG--
extra : convert_revision :
c39aa73825ea8108b6c32abd4a4fa4c23391ab09
Erik Hallnor [Fri, 11 Mar 2005 17:40:12 +0000 (12:40 -0500)]
Fixup after merging.
--HG--
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7736a0e62dac7ca1d5c64a1847469d17d2221b35
Erik Hallnor [Fri, 11 Mar 2005 17:29:47 +0000 (12:29 -0500)]
Need to invalidate blocks by calling the invalidateBlk function, not setting status to 0.
--HG--
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b46ad0b1d665c60bef03cb711a964cb75e4e1e29
Ron Dreslinski [Thu, 10 Mar 2005 19:53:34 +0000 (14:53 -0500)]
Merge zizzer:/z/m5/Bitkeeper/m5
into zizzer.eecs.umich.edu:/.automount/zazzer/z/rdreslin/m5bk/timing_L1
--HG--
extra : convert_revision :
b75a46439477b3f21333a3cc9f1721923839d14c
Ali Saidi [Thu, 10 Mar 2005 19:20:21 +0000 (14:20 -0500)]
Merge zizzer:/bk/m5 into zeep.eecs.umich.edu:/z/saidi/work/m5
--HG--
extra : convert_revision :
35d9f747fcc75b80b9e4c8674f94c8c18c259f00
Ali Saidi [Thu, 10 Mar 2005 19:20:12 +0000 (14:20 -0500)]
Removed unecessary constructor call at each return.
arch/alpha/isa_traits.hh:
updated copyright date
--HG--
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30c5fc0eb94138ebd4ee047ebdbff5121f95e5f1
Nathan Binkert [Thu, 10 Mar 2005 18:52:39 +0000 (13:52 -0500)]
Fixup checkpoint directory name
--HG--
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8b3d03a7902484889d58319f453c181c360154ea
Nathan Binkert [Thu, 10 Mar 2005 18:51:00 +0000 (13:51 -0500)]
Add better support for using checkpoints.
--HG--
extra : convert_revision :
4bd3f473be0bfae9ad2c39d982a579aedd68b6f1
Nathan Binkert [Thu, 10 Mar 2005 18:38:44 +0000 (13:38 -0500)]
update genini so it is more like m5
test/genini.py:
import m5config after environment variables are setup so
the behaviour is more like that of the simulator and so
what are normally compile-time variables like FULL_SYSTEM
can be properly set from the command line.
--HG--
extra : convert_revision :
1951d3015b091338724b66a3a86a818f9ac97b26
Ron Dreslinski [Thu, 10 Mar 2005 16:56:07 +0000 (11:56 -0500)]
Merge zizzer:/z/m5/Bitkeeper/m5
into zizzer.eecs.umich.edu:/.automount/zazzer/z/rdreslin/m5bk/timing_L1
--HG--
extra : convert_revision :
a5ee8e5187503203058da35ca44918f1ff7ae1eb
Ali Saidi [Thu, 10 Mar 2005 07:06:27 +0000 (02:06 -0500)]
Updated to be frequency independent
--HG--
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d1cf4183b650e10acb9c9954286b066b12e89855
Ali Saidi [Thu, 10 Mar 2005 07:01:43 +0000 (02:01 -0500)]
fix typo in SyscallReturn Object
--HG--
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97d34a02a29a9ac3e2256d92194e3a46b9e8021e
Ali Saidi [Wed, 9 Mar 2005 20:56:29 +0000 (15:56 -0500)]
Merge zizzer:/bk/m5 into zeep.eecs.umich.edu:/z/saidi/work/m5
--HG--
extra : convert_revision :
a61ddd67647fc6a6e8e12d918cc71ae9da69f869
Ali Saidi [Wed, 9 Mar 2005 20:55:59 +0000 (15:55 -0500)]
Added new ping and memory latency stride 8 test
--HG--
extra : convert_revision :
29ab825ea971a0fd06f7e2cdc001892cef884669
Ali Saidi [Wed, 9 Mar 2005 20:52:10 +0000 (15:52 -0500)]
Changed all syscalls to use syscall return object.
arch/alpha/alpha_linux_process.cc:
arch/alpha/alpha_tru64_process.cc:
cpu/exec_context.hh:
sim/process.hh:
sim/syscall_emul.cc:
sim/syscall_emul.hh:
Changed all syscalls to use syscall return object
arch/alpha/isa_traits.hh:
Added syscall return object that packages return value and return
status into an object.
sim/process.cc:
renamed variable name to nm so base class function name() can be called
--HG--
extra : convert_revision :
6609c5ffecc9e3519d7a0cd160879fd21d54abfc
Nathan Binkert [Wed, 9 Mar 2005 19:42:30 +0000 (14:42 -0500)]
Add support for using the variables that m5 was compiled with for
determining which parameters belong to a class. This allows us to
remove the disable flag since it is not the correct model
for variable checking anyway.
objects/BaseCPU.mpy:
Use the FULL_SYSTEM environment variable to enable or disable
parameters.
sim/pyconfig/m5config.py:
remove the disable flag since it is not the correct model
for variable checking.
--HG--
extra : convert_revision :
a8ccb78ba16d23006225df282a09187d32557608
Nathan Binkert [Wed, 9 Mar 2005 19:39:35 +0000 (14:39 -0500)]
We should import m5config *after* we do the CPPDEFINES stuff,
otherwise m5config and the object descriptions cannot take
advantage of them.
sim/pyconfig/SConscript:
We should import m5config *after* we do the CPPDEFINES stuff,
otherwise m5config and the object descriptions cannot take
advantage of them. This means that we can't use the env dict
alias. We should instead use os.environ.
--HG--
extra : convert_revision :
392f99a3c15cfba74a5cde79a709ecfad3820e63
Ron Dreslinski [Wed, 9 Mar 2005 18:44:19 +0000 (13:44 -0500)]
Merge zizzer:/z/m5/Bitkeeper/m5
into zizzer.eecs.umich.edu:/.automount/zazzer/z/rdreslin/m5bk/timing_L1
--HG--
extra : convert_revision :
0121d59e46f0961f753c2e1bd0fa1c63642d859e
Lisa Hsu [Wed, 9 Mar 2005 16:04:19 +0000 (11:04 -0500)]
fix typo in the fixed etherlink serialization.
dev/etherlink.cc:
fix type in serialization.
--HG--
extra : convert_revision :
87f47db14b90f414fef9a0db869da4d7ef72216a
Steve Reinhardt [Wed, 9 Mar 2005 05:22:42 +0000 (00:22 -0500)]
Fix tracediff to work with new parameter and output directory structure.
util/tracediff:
Fix to work with new parameter and output directory structure.
--HG--
extra : convert_revision :
421ed14fa02df7c9e95eb93f4d36b9ff046f1e39
Steve Reinhardt [Wed, 9 Mar 2005 05:17:20 +0000 (00:17 -0500)]
Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/m5
into zizzer.eecs.umich.edu:/z/stever/bk/m5-head
--HG--
extra : convert_revision :
daaeb6a596b08fbedd6a14833dcb3825c637d486
Steve Reinhardt [Wed, 9 Mar 2005 05:17:09 +0000 (00:17 -0500)]
Fix a couple of bugs introduced (or tickled) by the .ini sorting change.
sim/pyconfig/m5config.py:
Don't sort child nodes, as this can change timing in memory system.
(Really ought to be fixed in memory system, but we'll just take the
sort back out for now to avoid intoducing gratuitous changes.)
--HG--
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07e950c25911443cbc7a84435969ca596fb04348
Nathan Binkert [Wed, 9 Mar 2005 04:06:54 +0000 (23:06 -0500)]
Pass all scons defined pre-processor macro variables to the
python configuration stuff as environment variables.
sim/pyconfig/SConscript:
generate a python file that updates the env dict with all
variables in the CPPDEFINES so the python code can use those
variables in configuration scripts.
--HG--
extra : convert_revision :
50b0719b044f7adc87ce6ae1571d156ca0c5644c
Nathan Binkert [Wed, 9 Mar 2005 03:07:26 +0000 (22:07 -0500)]
Split the string importer from the rest of the mpy parsing
and importing stuff to avoid some confusion.
sim/pyconfig/SConscript:
Split the string importer from the rest of the importer code.
The importer.py code can be embedded like m5config.py
sim/pyconfig/m5config.py:
import what we need from importer
--HG--
extra : convert_revision :
9d57f43381b55e717b5b10adfb8f0a522280ac57
Lisa Hsu [Tue, 8 Mar 2005 22:38:08 +0000 (17:38 -0500)]
Merge zizzer:/bk/m5 into zed.eecs.umich.edu:/z/hsul/work/m5/pact05
--HG--
extra : convert_revision :
bfaaeebd7ec4ee8ee182909e928581f95ac2af93
Lisa Hsu [Tue, 8 Mar 2005 22:25:32 +0000 (17:25 -0500)]
make some changes to bonnie - now that the simulator uses more memory the old config didn't fit anymore in pools VM, this does fit.
--HG--
extra : convert_revision :
b5fef2896276be675f79791b084ba97dd953d4ca
Nathan Binkert [Tue, 8 Mar 2005 17:48:37 +0000 (12:48 -0500)]
By default, we don't want to be sampling
--HG--
extra : convert_revision :
77c1ec0f2425d24704a587ad2097dfaa6bab4a5c
Nathan Binkert [Tue, 8 Mar 2005 17:47:55 +0000 (12:47 -0500)]
Fix serialization of the EtherLink object
dev/etherlink.cc:
- The EtherLink::Link object is no lonver serializable, so it is now
necessary to prepend the object's name (as determined by the parent)
to all parameters.
- Fix the serialization of the LinkDelayEvent so it actually works
- Rename some variables to make serialization simpler
dev/etherlink.hh:
- Make the EtherLink::Link object *not* derive from serializeable.
Instead, the serialize function will take a base name from
the parent EtherLink object and prepend that base name to each of
its variable names when serializing. This is similar to the
PacketData and PacketFifo classes.
- Make the EtherLink::Link object keep a pointer to its parent and its
link number so the LinkDelayEvent can be properly serialized.
- Rename some variables to make serialization simpler.
--HG--
extra : convert_revision :
e5aa54cd9e07b5e033989809100e1640abfb8bed
Nathan Binkert [Tue, 8 Mar 2005 17:37:08 +0000 (12:37 -0500)]
Fix the singalling from server to client so that the
benchmark begins properly.
configs/boot/nat-netperf-maerts-client.rcS:
Fix the echo message
configs/boot/nat-netperf-server.rcS:
Wait a second before signalling the natbox to make sure it's
had time to boot.
Fix echo message.
--HG--
extra : convert_revision :
f9d32c98f24b9617ebf917790a4ca554b7b02bba
Nathan Binkert [Tue, 8 Mar 2005 17:35:17 +0000 (12:35 -0500)]
Only try to import cpt.mpy if we need it.
--HG--
extra : convert_revision :
bee61a5026221d47fa00705ccd96595e1415f220
Steve Reinhardt [Tue, 8 Mar 2005 01:56:17 +0000 (20:56 -0500)]
Merge zizzer:/bk/m5 into vm1.reinhardt.house:/z/stever/bk/m5
--HG--
extra : convert_revision :
d5b97b8f5af42115989e7f9f4baa421d61a13b70
Steve Reinhardt [Tue, 8 Mar 2005 01:56:02 +0000 (20:56 -0500)]
More restructuring on Python config code for auto-generating
of Param structs.
objects/CoherenceProtocol.mpy:
objects/Ide.mpy:
Update for new Enum syntax.
sim/pyconfig/m5config.py:
More modest restructuring heading for auto-generating
of param structs.
- Revamped Enum handling: Enums are regular classes so they
know their names now (makes it easier for generating C++
equivalents).
- Created MetaSimObject class and moved some SimObject-specific
stuff there (i.e. does not apply to ConfigNodes in general).
--HG--
extra : convert_revision :
a93b40dda3b038ebe8bffecac97e9079c22af561
Ron Dreslinski [Mon, 7 Mar 2005 23:04:49 +0000 (18:04 -0500)]
Merge zizzer:/z/m5/Bitkeeper/m5
into zizzer.eecs.umich.edu:/.automount/zazzer/z/rdreslin/m5bk/timing_L1
--HG--
extra : convert_revision :
34c73338a0552b59d4264a1cbc091ad3fc9a3a41
Nathan Binkert [Mon, 7 Mar 2005 18:05:41 +0000 (13:05 -0500)]
Make it easier to find a jobfile.
util/pbs/jobfile.py:
Search for the jobfile in sys.path
--HG--
extra : convert_revision :
50d2c2c13b6b9de4f6bc4e833961e309a98b0d2b
Ron Dreslinski [Mon, 7 Mar 2005 15:58:15 +0000 (10:58 -0500)]
Merge zizzer:/z/m5/Bitkeeper/m5
into zizzer.eecs.umich.edu:/.automount/zazzer/z/rdreslin/m5bk/timing_L1
--HG--
extra : convert_revision :
2b73bffea88cb0e3bb5dff232a15afea8498f4e3
Steve Reinhardt [Sun, 6 Mar 2005 00:28:43 +0000 (19:28 -0500)]
Sort fields in .ini files generated by Python config
to make it easier to diff output from modified versions.
sim/pyconfig/m5config.py:
Sort .ini outputs for repeatable results across versions.
--HG--
extra : convert_revision :
fa918f2c53635eca3a02ce02af9b320eacd1f057
Lisa Hsu [Sat, 5 Mar 2005 20:16:29 +0000 (15:16 -0500)]
the client and server aren't rate-matched anymore and the timing of the netcats are off - add a sleep 1 to make it actually work.
--HG--
extra : convert_revision :
3fa730a94d9270945d34061513ab9ce0ab60e7ba
Lisa Hsu [Thu, 3 Mar 2005 16:43:20 +0000 (11:43 -0500)]
fix naming error - before we set CLIENT_MEMORY_SIZE and then when we wanted that value, used CLIENT_MEMSIZE! This caused the NFS failure I was seeing.
--HG--
extra : convert_revision :
845fd7f42d7df771c59ce9a3e77667aff22967c2
Steve Reinhardt [Wed, 2 Mar 2005 20:14:18 +0000 (15:14 -0500)]
Make AddToPath and LoadMpyFile visible inside .mpy modules
even though they're not in m5config anymore.
--HG--
extra : convert_revision :
1e49d5a432790ad1c92e47f1b5e6f1b34a422fa0
Ali Saidi [Wed, 2 Mar 2005 05:53:23 +0000 (00:53 -0500)]
Merge zizzer:/bk/m5 into zeep.eecs.umich.edu:/z/saidi/work/m5
--HG--
extra : convert_revision :
cc69c3009fe34de4b4a658a383ce1d2750f227f6
Steve Reinhardt [Wed, 2 Mar 2005 03:32:14 +0000 (22:32 -0500)]
Two fixes to try and get TLB miss cost more in line with real platform:
1) Add fault_handler_delay param to FullCPU to wait N cycles after
committing faulting instruction before fetching fault handler.
2) Make hw_rei a serializing instruction (flushes pipe, basically).
arch/alpha/isa_desc:
Make hw_rei a serializing instruction (guarantees previous insts
complete before hw_rei will issue).
--HG--
extra : convert_revision :
704cef65b3869be9eee724055cedb22114a78359
Lisa Hsu [Tue, 1 Mar 2005 21:59:42 +0000 (16:59 -0500)]
add the new func unit into the overall list.
--HG--
extra : convert_revision :
2d425ec36de0443e094640fdbbc43754bfc7ed2e
Nathan Binkert [Tue, 1 Mar 2005 16:07:44 +0000 (11:07 -0500)]
add some comments.
sim/pyconfig/m5config.py:
Add some comments to indicate what the decorators mean.
--HG--
extra : convert_revision :
fbcbcbe4ad8cd62f2bd12af6b1f141c66752b870
Ali Saidi [Tue, 1 Mar 2005 07:08:39 +0000 (02:08 -0500)]
Add FUDesc for IprAccess
--HG--
extra : convert_revision :
42c5f8765185aba6a5ca59180d93c579ef759449
Ali Saidi [Tue, 1 Mar 2005 06:16:54 +0000 (01:16 -0500)]
Merge zizzer:/bk/m5 into zeep.eecs.umich.edu:/z/saidi/work/m5
--HG--
extra : convert_revision :
439e7d84ea9a66177b0cc2cab4cd77ecb90aa6fe
Ali Saidi [Tue, 1 Mar 2005 06:03:37 +0000 (01:03 -0500)]
Updated Monet Configuration and validations tests
--HG--
extra : convert_revision :
d58aed18f8f809185ad2639eb92465a5fc6695de
Steve Reinhardt [Tue, 1 Mar 2005 05:41:19 +0000 (00:41 -0500)]
Fix stats incompatibility with g++ 3.4.
base/statistics.hh:
Get rid of operator%... g++ 3.4 complains that this isn't defined
for doubles (which makes sense). We never use it anyway.
--HG--
extra : convert_revision :
3ca724e1cc42559226549835f6cd3509308e02ca
Steve Reinhardt [Tue, 1 Mar 2005 05:39:57 +0000 (00:39 -0500)]
Add a new operation class for IPR accesses, and have IPR-accessing
instructions use it (instead of IntALU, as before). Default config
has a single non-pipelined 3-cycle unit. A bit conservative for the
ev6 (some are 1, some are 3).
arch/alpha/isa_desc:
Make hw_mfpr and hw_mtpr use IprAccessOp op class.
cpu/full_cpu/op_class.hh:
Add IprAccess.
--HG--
extra : convert_revision :
d4103da3343a586936839e29981fd15d6930d442
Steve Reinhardt [Sat, 26 Feb 2005 02:44:33 +0000 (21:44 -0500)]
Make all StaticInst methods const. StaticInst objects represent a
particular binary machine instruction and should be immutable after
they are constructed.
cpu/simple_cpu/simple_cpu.hh:
Make StaticInst parameters const.
--HG--
extra : convert_revision :
e535fa10c842ce173336323f39d9108c1847f8ba
Ron Dreslinski [Fri, 25 Feb 2005 20:12:05 +0000 (15:12 -0500)]
Merge zizzer:/z/m5/Bitkeeper/m5
into zizzer.eecs.umich.edu:/.automount/zazzer/z/rdreslin/m5bk/timing_L1
--HG--
extra : convert_revision :
e7d839327b07393bfcda0b77758b0832eaf1c1c0
Steve Reinhardt [Fri, 25 Feb 2005 19:49:39 +0000 (14:49 -0500)]
Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/m5
into zizzer.eecs.umich.edu:/z/stever/bk/m5
--HG--
extra : convert_revision :
312d9edd677afef6c973c0cb45af4f827a2b881a
Ron Dreslinski [Fri, 25 Feb 2005 19:39:55 +0000 (14:39 -0500)]
Merge zizzer:/z/m5/Bitkeeper/m5
into zizzer.eecs.umich.edu:/.automount/zazzer/z/rdreslin/m5bk/timing_L1
--HG--
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e314c70da4a9f4e05c9a8afec1de85000618ea4d
Nathan Binkert [Fri, 25 Feb 2005 19:38:00 +0000 (14:38 -0500)]
Make the SimConsole device dump its output to a file by default
--HG--
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59cc7c3234d1bc96919d08dc0ec7584d8aff1d6f
Steve Reinhardt [Fri, 25 Feb 2005 17:41:08 +0000 (12:41 -0500)]
Fix timing modeling of faults: functionally the very next instruction after
a faulting instruction is the fault handler, which appears as an independent
instruction to the timing model. New code will stall fetch and not fetch the
fault handler as long as there's a faulting instruction in the pipeline (i.e.,
the faulting inst has to commit first).
Also fix Ali's bad-address assertion that doesn't apply to full system.
Added some more debugging support in the process. Hopefully we'll move to the new
cpu model soon and we won't need it anymore.
arch/alpha/alpha_memory.cc:
Reorganize lookup() so we can trace the result of the lookup as well.
arch/alpha/isa_traits.hh:
Add NoopMachInst (so we can insert them in the pipeline on ifetch faults).
base/traceflags.py:
Replace "Dispatch" flag with "Pipeline" (since I added similar
DPRINTFs in other pipe stages).
cpu/exetrace.cc:
Change default for printing mis-speculated instructions to true (since
that's often what we want, and right now you can't change it from the
command line...).
--HG--
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a29a98a373076d62bbbb1d6f40ba51ecae436dbc
Ali Saidi [Thu, 24 Feb 2005 20:59:29 +0000 (15:59 -0500)]
Merge zizzer:/bk/m5 into zeep.eecs.umich.edu:/z/saidi/work/m5
--HG--
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a63405fac7237014c4ef8b765d31d59d3e1bb500
Ali Saidi [Thu, 24 Feb 2005 20:57:52 +0000 (15:57 -0500)]
if we have an invalid addr and it's not a miss-speculation panic
--HG--
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4c906f68c6168100f7e8f2030b1f957c88900768
Ron Dreslinski [Thu, 24 Feb 2005 18:43:33 +0000 (13:43 -0500)]
Fix an error with Exclusive state and timing coherence
Add more useful comments
Add a missing header file
--HG--
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8eeb89de50aa1e11396bbf1d88184a66efd74c44
Ron Dreslinski [Thu, 24 Feb 2005 17:08:57 +0000 (12:08 -0500)]
Merge out, the L2 is now part of the system, not connected to the processor
--HG--
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996d3085b632e93a88ef111dfe853745d6836147
Ron Dreslinski [Thu, 24 Feb 2005 16:43:03 +0000 (11:43 -0500)]
Fix it so that using a sampler works with the occ and ocp configurations.
--HG--
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a990503a6c01a156230d8910ad86876d09b4f1b3
Ron Dreslinski [Thu, 24 Feb 2005 16:34:58 +0000 (11:34 -0500)]
Print an error message if a Checkpoint number was defined, but no checkpoint file was sourced
--HG--
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302c1d6720c0ee24fcfc266cd99f501af734a452
Nathan Binkert [Wed, 23 Feb 2005 17:26:35 +0000 (12:26 -0500)]
Fix the python panic message
sim/pyconfig/m5config.py:
Fix panic
--HG--
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56d93398e992ed6e95380f6dcdb61cbee54b3893
Ali Saidi [Wed, 23 Feb 2005 16:47:49 +0000 (11:47 -0500)]
Merge zizzer:/bk/m5 into zeep.eecs.umich.edu:/z/saidi/work/m5
--HG--
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f149b8ea762d4a83ef76b3bb95f28e0709391ecf
Ali Saidi [Wed, 23 Feb 2005 16:46:28 +0000 (11:46 -0500)]
added two validation rcs files
--HG--
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19e57e5192be3435d72652e3b36aac3b6e43d81c
Ali Saidi [Wed, 23 Feb 2005 16:45:25 +0000 (11:45 -0500)]
Added mmap start and end so detailed CPU can know if an access is
in a mmaped region
--HG--
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e4ee0520c84d94a0d2e804d02035228766abe71f
Ali Saidi [Wed, 23 Feb 2005 16:43:18 +0000 (11:43 -0500)]
Updated Monet configurations
--HG--
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8f9c875541adcf685effcfb2e138f2dbb8463137
Steve Reinhardt [Wed, 23 Feb 2005 04:53:34 +0000 (23:53 -0500)]
Small initial steps toward generating C++ param structs
from Python object descriptions. Mostly cleanup of Python
code based on things I encountered trying to figure out
what's going on. Main reason I'm committing this now is
to transfer work from my laptop to zizzer.
sim/pyconfig/m5config.py:
Small steps toward param struct generation: all param
objects should now have a _cppname attribute that holds
their corresponding C++ type name.
Made Param ptype attribute an actual type instead of a
string. String is still stored in ptype_string.
Get rid of AddToPath() and Import() (redundant copies
are in importer, and that seems to be the more logical
place for them).
Add a few comments, delete some unused code.
test/genini.py:
A few fixes to make the environment more compatible
with what really happens when configs are executed
from the m5 binary.
--HG--
extra : convert_revision :
9fc8f72cd0c22ba3deada02f37484787342534f2
Ron Dreslinski [Mon, 21 Feb 2005 23:07:30 +0000 (18:07 -0500)]
Merge zizzer:/z/m5/Bitkeeper/m5
into zizzer.eecs.umich.edu:/.automount/zazzer/z/rdreslin/m5bk/timing_L1
--HG--
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0b0583e9404ed922141049f1043e7a149984e567
Nathan Binkert [Mon, 21 Feb 2005 23:06:09 +0000 (18:06 -0500)]
Set the proper job name for statistics if we're using a JOBNAME
and JOBFILE
--HG--
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44253a39f40efcbbcda226701b0e97d8ea46cf1e
Nathan Binkert [Mon, 21 Feb 2005 22:32:57 +0000 (17:32 -0500)]
formatting fixes
--HG--
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8b9bfed29b66e8bce11448f175273f5ebb6876b2
Ron Dreslinski [Mon, 21 Feb 2005 21:50:38 +0000 (16:50 -0500)]
Merge zizzer:/z/m5/Bitkeeper/m5
into zizzer.eecs.umich.edu:/.automount/zazzer/z/rdreslin/m5bk/timing_L1
--HG--
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db688679bfd9c670ef44611de71640c3bf564fc0
Nathan Binkert [Sat, 19 Feb 2005 16:46:41 +0000 (11:46 -0500)]
Clean up CPU stuff and make it use params structs
cpu/base_cpu.cc:
cpu/base_cpu.hh:
Convert the CPU stuff to use a params struct
cpu/memtest/memtest.cc:
The memory tester is really not a cpu, so don't derive from
BaseCPU since it just makes things a pain in the butt. Keep
track of max loads in the memtest class now that the base class
doesn't do it for us.
Don't have any default parameters.
cpu/memtest/memtest.hh:
The memory tester is really not a cpu, so don't derive from
BaseCPU since it just makes things a pain in the butt. Keep
track of max loads in the memtest class now that the base class
doesn't do it for us.
cpu/simple_cpu/simple_cpu.cc:
Convert to use a params struct.
remove default parameters
cpu/simple_cpu/simple_cpu.hh:
convert to use a params struct
cpu/trace/opt_cpu.cc:
cpu/trace/opt_cpu.hh:
cpu/trace/trace_cpu.cc:
cpu/trace/trace_cpu.hh:
this isn't really a cpu. don't derive from BaseCPU
objects/MemTest.mpy:
we only need one max_loads parameter
sim/main.cc:
Don't check for the number of CPUs since we may be doing something
else going on. If we don't have anything to simulate, the
simulator will exit anyway.
--HG--
extra : convert_revision :
2195a34a9ec90b5414324054ceb3bab643540dd5
Ron Dreslinski [Fri, 18 Feb 2005 18:10:37 +0000 (13:10 -0500)]
Merge zizzer:/z/m5/Bitkeeper/m5
into zizzer.eecs.umich.edu:/.automount/zazzer/z/rdreslin/m5bk/timing_L1
--HG--
extra : convert_revision :
8fb4bbf165b8c65a54db5fea18ec5aa95172a173
Ron Dreslinski [Fri, 18 Feb 2005 17:16:49 +0000 (12:16 -0500)]
Fix misscalculation about the number of cpu's a sampler is connected to
--HG--
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f231be327a8adb25d0de35c2ea294f4ef2dc99f7
Kevin Lim [Fri, 18 Feb 2005 00:22:42 +0000 (19:22 -0500)]
Include errno.h to fix compile errors in gcc 3.4
sim/main.cc:
Include errno.h
--HG--
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ff91579ae590b3c1d11f7468b71f295e6f3edd68
Nathan Binkert [Thu, 17 Feb 2005 19:02:03 +0000 (14:02 -0500)]
rename the simple cpu's multiplier parameter. call it width.
it makes more sense and is less confusing.
cpu/simple_cpu/simple_cpu.cc:
cpu/simple_cpu/simple_cpu.hh:
width is a better name than multiplier
--HG--
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ea2fa4faa160f5657aece41df469bbc9f7244b21
Ron Dreslinski [Thu, 17 Feb 2005 17:52:55 +0000 (12:52 -0500)]
Fix typo from my hand merge, missing a paren
--HG--
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7199cd3195ee841f0311ff464dbb4325bb32329c
Ron Dreslinski [Thu, 17 Feb 2005 17:14:04 +0000 (12:14 -0500)]
Merge zizzer:/z/m5/Bitkeeper/m5
into zizzer.eecs.umich.edu:/.automount/zazzer/z/rdreslin/m5bk/timing_L1
--HG--
extra : convert_revision :
88afcacc41f5b0fae0ed1ac1821b7ca88c407e85
Ron Dreslinski [Thu, 17 Feb 2005 17:13:37 +0000 (12:13 -0500)]
More changes so that asynchronus blocks work properly
--HG--
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54f4d91be03da90bc77f65b62e5871e9dba6b904
Nathan Binkert [Thu, 17 Feb 2005 08:40:17 +0000 (03:40 -0500)]
Fix compile on linux
sim/main.cc:
For some unknown reason linux's basename doesn't take a const char *
--HG--
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30289195881e16a05429f7025abab7914a9e3eb6
Nathan Binkert [Thu, 17 Feb 2005 07:50:34 +0000 (02:50 -0500)]
Make code more portable.
sim/main.cc:
basename is in libgen
--HG--
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1af6ff2f492b4deee9e56edfa5ee6ea235cd4eb0
Nathan Binkert [Thu, 17 Feb 2005 07:48:56 +0000 (02:48 -0500)]
Several tweaks to make binning work in any simulation
configuration so that we can always have binning on.
base/statistics.cc:
If we're binning, and there is no bin active at the time
we check all stats stuff, create a bin.
base/statistics.hh:
FS_MEASURE doesn't exist anymore
base/stats/text.cc:
don't print out bin names if there is only one bin
sim/process.cc:
don't zero stats. It happens automatically.
Don't activate the context at the time it is registered,
instead activate the first context in a startup callback.
sim/process.hh:
Add startup callback to initialize the first exec context
--HG--
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bcb23cdb184b0abf7cecd79902f8a59b50f71fe4
Ali Saidi [Tue, 15 Feb 2005 01:47:23 +0000 (20:47 -0500)]
Merge zizzer:/bk/m5 into zeep.eecs.umich.edu:/z/saidi/work/m5
--HG--
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c807a78d9c3f3be51763dab9685aa4b7361c585c
Ali Saidi [Tue, 15 Feb 2005 01:47:05 +0000 (20:47 -0500)]
undoing change per nates request
--HG--
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c5c2fd88dfd8d893da51c2b80907260ec14a7593
Nathan Binkert [Tue, 15 Feb 2005 01:22:27 +0000 (20:22 -0500)]
Make it so we append jobs to the joblist in the for loop not
outside of the loop so we get all of the jobs, not just the
last one.
util/pbs/send.py:
fix indent
--HG--
extra : convert_revision :
eee9546b4945ff949fdfdf339fc95a23603b47d3
Ali Saidi [Mon, 14 Feb 2005 23:54:38 +0000 (18:54 -0500)]
output dir changes to python files
util/pbs/job.py:
pass output dir to m5 directly
--HG--
extra : convert_revision :
00d1568bb2da3b3e646fc75b4884314bf4cb2d71
Ali Saidi [Mon, 14 Feb 2005 04:05:47 +0000 (23:05 -0500)]
Merge
--HG--
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10c28ac66c7e71615a239783e21ab36a47de992c
Ali Saidi [Mon, 14 Feb 2005 04:03:04 +0000 (23:03 -0500)]
build mysql version if libraries exist
add dprintf on alignment faults
fix RR benchmark rcS script name
Add Dual test without rcS script
Update Monet to be closer to the real thing
Fix p4/monet configs
Add a way to read the DRIR register with at 32bit access for validation
SConscript:
build/SConstruct:
always use mysql if the libraries are installed
arch/alpha/alpha_memory.cc:
Add a DPRINTF to print alignment faults when they happen
dev/tsunami_cchip.cc:
Add a way to read the DRIR for validation.
--HG--
extra : convert_revision :
8c112c958f36b785390c46e70a889a79c6bea015
Nathan Binkert [Fri, 11 Feb 2005 14:48:23 +0000 (09:48 -0500)]
Merge zizzer.eecs.umich.edu:/bk/m5
into ziff.eecs.umich.edu:/z/binkertn/research/m5/merge
--HG--
extra : convert_revision :
5d73046310a64b80a6ba3832df3b30b55532d707