gallivm: Workaround http://llvm.org/PR18600

We have code generation paths that carry out swizzles of AoS vectors via
bitwise shifts, as these tend to generate more efficient code than
straightforward byte shuffles.  But when the input is a constant the
additional bitwise arithmetic operations somehow don't really get
constant propagated properly, evenutally causing assertion failure in
InstCombine pass.

Therefore avoid the bug by using the trivial shuffles for constant
inputs.

Although the sample LLVM IR can cause a crash with any LLVM version,
this was only seen in practice with LLVM 3.2.

Reviewed-by: Matthew McClure <mcclurem@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>

glsl: Avoid combining statements from different basic blocks.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=74113
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

glsl: Set proper swizzle when a channel is missing in vectorizing.

Previously, for example if the x channel was missing from a series of
assignments we were attempting to vectorize, the wrong swizzle mask
would be applied.

   a.y = b.y;
   a.z = b.z;
   a.w = b.w;

would be incorrectly transformed into

   a.yzw = b.xyz;

Fixes two transform feedback tests in the ES3 conformance suite.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=73978
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=73954
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

glsl: Use bitfieldInsert in ldexp() lowering.

Shaves a few instructions off of lowered ldexp().

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

glsl: Add constant evaluation of ir_binop_bfm.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

glcpp: Resolve implicit GLSL version to 100 if the API is ES.

Fixes a regression since b2d1c579 where ES shaders without a #version
declaration would fail to compile if their precision declaration was
wrapped in the standard #ifdef GL_ES check.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=74066
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

glcpp: Check version_resolved in the proper place.

The check was in the wrong place, such that if a shader incorrectly put
a preprocessor token before the #version declaration, the version would
be resolved twice, leading to a segmentation fault when attempting to
redefine the __VERSION__ macro.

 #extension GL_ARB_sample_shading: require
 #version 130
 void main() {}

Also, rename glcpp_parser_resolve_version to
             glcpp_parser_resolve_implicit_version to avoid confusion.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Carl Worth <cworth@cworth.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

r600g: s/r600_llvm_gpu_string/r600_get_llvm_processor_name/

Fixes build failure introduced by commit
65dc588bfd3b8145131340ffe77f216be58378ac ('r600g,radeonsi: consolidate
get_compute_param'), which consolidated the former into the latter.

radeonsi: cleanup includes, add missing license

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

radeonsi: remove open-coded PS_PARTIAL_FLUSH event

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

radeonsi: move some inline functions from si_pipe.h to si_state.c

And si_tex_aniso_filter is unused.

v2: remove INLINE occurences

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

radeonsi: remove si_resource.h

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

radeonsi: remove si.h

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

radeonsi: move si_upload_const_buffer to a better place

This gets rid of another file.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

radeonsi: inline si_translate_index_buffer

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

radeonsi: inline si_upload_index_buffer

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

r600g,radeonsi: consolidate remaining obviously duplicated pipe_screen code

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

r600g,radeonsi: consolidate get_compute_param

v2: added fprintf to r600_get_llvm_processor_name

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

r600g,radeonsi: consolidate get_paramf and get_video_param

radeonsi now reports PIPE_VIDEO_CAP_SUPPORTS_PROGRESSIVE = true if UVD support
isn't available. It's what all the other drivers do.

Also, some #include directives were missing in radeon_uvd.h.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

r600g,radeonsi: consolidate variables for CS tracing

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

r600g,radeonsi: consolidate get_timestamp, get_driver_query_info

This enables more queries for the Gallium HUD with radeonsi.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

r600g,radeonsi: consolidate get_name and get_vendor queries

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

radeon: place context-related functions first in r600_pipe_common.c

To follow the unwritten convention of r600g and radeonsi.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

r600g,radeonsi: consolidate the contents of r600_resource.c

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

radeonsi: advertise the pipeline statistics query

Implemented by the common code. You can now visualize the statistics
with the HUD, see GALLIUM_HUD=help for all available queries. For example:

GALLIUM_HUD=clipper-primitives-generated

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

radeonsi: use queries from r600g

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

r600g: remove a no-op while loop

for (;;) {

} while ();

I was surprised to see such a statement.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

r600g: convert query emission code to radeon_emit

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

r600g: only emit NOP relocations for queries if VM is disabled

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

r600g: move queries to drivers/radeon

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

mesa: Fix Type A _INT formats to MESA_FORMAT naming standard

Replace Type A _INT formats names with _SINT to match naming spec,
and update type C formats as follows:
    s/MESA_FORMAT_R_INT8\b/MESA_FORMAT_R_SINT8/g
    s/MESA_FORMAT_R_INT16\b/MESA_FORMAT_R_SINT16/g
    s/MESA_FORMAT_R_INT32\b/MESA_FORMAT_R_SINT32/g
    s/MESA_FORMAT_RG_INT8\b/MESA_FORMAT_RG_SINT8/g
    s/MESA_FORMAT_RG_INT16\b/MESA_FORMAT_RG_SINT16/g
    s/MESA_FORMAT_RG_INT32\b/MESA_FORMAT_RG_SINT32/g
    s/MESA_FORMAT_RGB_INT8\b/MESA_FORMAT_RGB_SINT8/g
    s/MESA_FORMAT_RGB_INT16\b/MESA_FORMAT_RGB_SINT16/g
    s/MESA_FORMAT_RGB_INT32\b/MESA_FORMAT_RGB_SINT32/g
    s/MESA_FORMAT_RGBA_INT8\b/MESA_FORMAT_RGBA_SINT8/g
    s/MESA_FORMAT_RGBA_INT16\b/MESA_FORMAT_RGBA_SINT16/g
    s/MESA_FORMAT_RGBA_INT32\b/MESA_FORMAT_RGBA_SINT32/g
    s/\bMESA_FORMAT_RED_RGTC1\b/MESA_FORMAT_R_RGTC1_UNORM/g
    s/\bMESA_FORMAT_SIGNED_RED_RGTC1\b/MESA_FORMAT_R_RGTC1_SNORM/g
    s/\bMESA_FORMAT_RG_RGTC2\b/MESA_FORMAT_RG_RGTC2_UNORM/g
    s/\bMESA_FORMAT_SIGNED_RG_RGTC2\b/MESA_FORMAT_RG_RGTC2_SNORM/g
    s/\bMESA_FORMAT_L_LATC1\b/MESA_FORMAT_L_LATC1_UNORM/g
    s/\bMESA_FORMAT_SIGNED_L_LATC1\b/MESA_FORMAT_L_LATC1_SNORM/g
    s/\bMESA_FORMAT_LA_LATC2\b/MESA_FORMAT_LA_LATC2_UNORM/g
    s/\bMESA_FORMAT_SIGNED_LA_LATC2\b/MESA_FORMAT_LA_LATC2_SNORM/g

mesa: Fix MESA_FORMAT names containg SIGNED

Update comments. Replace format names containing SIGNED with
SNORM appended w/decoration per the format name spec:

    s/MESA_FORMAT_SIGNED_R8\b/MESA_FORMAT_R_SNORM8/g
    s/MESA_FORMAT_SIGNED_RG88_REV\b/MESA_FORMAT_R8G8_SNORM/g
    s/MESA_FORMAT_SIGNED_RGBX8888\b/MESA_FORMAT_X8B8G8R8_SNORM/g
    s/MESA_FORMAT_SIGNED_RGBA8888\b/MESA_FORMAT_A8B8G8R8_SNORM/g
    s/MESA_FORMAT_SIGNED_RGBA8888_REV\b/MESA_FORMAT_R8G8B8A8_SNORM/g
    s/MESA_FORMAT_SIGNED_R16\b/MESA_FORMAT_R_SNORM16/g
    s/MESA_FORMAT_SIGNED_GR1616\b/MESA_FORMAT_R16G16_SNORM/g
    s/MESA_FORMAT_SIGNED_RGB_16\b/MESA_FORMAT_RGB_SNORM16/g
    s/MESA_FORMAT_SIGNED_RGBA_16\b/MESA_FORMAT_RGBA_SNORM16/g
    s/MESA_FORMAT_SIGNED_A8\b/MESA_FORMAT_A_SNORM8/g
    s/MESA_FORMAT_SIGNED_I8\b/MESA_FORMAT_I_SNORM8/g
    s/MESA_FORMAT_SIGNED_L8\b/MESA_FORMAT_L_SNORM8/g
    s/MESA_FORMAT_SIGNED_A16\b/MESA_FORMAT_A_SNORM16/g
    s/MESA_FORMAT_SIGNED_I16\b/MESA_FORMAT_I_SNORM16/g
    s/MESA_FORMAT_SIGNED_L16\b/MESA_FORMAT_L_SNORM16/g
    s/MESA_FORMAT_SIGNED_AL88\b/MESA_FORMAT_L8A8_SNORM/g
    s/MESA_FORMAT_SIGNED_RG88\b/MESA_FORMAT_G8R8_SNORM/g
    s/MESA_FORMAT_SIGNED_RG1616\b/MESA_FORMAT_G16R16_SNORM/g

mesa: Fix MESA_FORMAT names with ALPH, INTENSITY, and LUMINANCE

Compressed spelled out color components ALPHA, INTENSITY, and LUMINANCE to A, I, and L:
    s/MESA_FORMAT_ALPHA_UINT8\b/MESA_FORMAT_A_UINT8/g'
    s/MESA_FORMAT_ALPHA_UINT16\b/MESA_FORMAT_A_UINT16/g'
    s/MESA_FORMAT_ALPHA_UINT32\b/MESA_FORMAT_A_UINT32/g'
    s/MESA_FORMAT_ALPHA_INT32\b/MESA_FORMAT_A_SINT32/g'
    s/MESA_FORMAT_ALPHA_INT16\b/MESA_FORMAT_A_SINT16/g'
    s/MESA_FORMAT_ALPHA_INT8\b/MESA_FORMAT_A_SINT8/g'
    s/MESA_FORMAT_INTENSITY_UINT8\b/MESA_FORMAT_I_UINT8/g'
    s/MESA_FORMAT_INTENSITY_UINT16\b/MESA_FORMAT_I_UINT16/g'
    s/MESA_FORMAT_INTENSITY_UINT32\b/MESA_FORMAT_I_UINT32/g'
    s/MESA_FORMAT_INTENSITY_INT32\b/MESA_FORMAT_I_SINT32/g'
    s/MESA_FORMAT_INTENSITY_INT16\b/MESA_FORMAT_I_SINT16/g'
    s/MESA_FORMAT_INTENSITY_INT8\b/MESA_FORMAT_I_SINT8/g'
    s/MESA_FORMAT_LUMINANCE_UINT8\b/MESA_FORMAT_L_UINT8/g'
    s/MESA_FORMAT_LUMINANCE_UINT16\b/MESA_FORMAT_L_UINT16/g'
    s/MESA_FORMAT_LUMINANCE_UINT32\b/MESA_FORMAT_L_UINT32/g'
    s/MESA_FORMAT_LUMINANCE_INT32\b/MESA_FORMAT_L_SINT32/g'
    s/MESA_FORMAT_LUMINANCE_INT16\b/MESA_FORMAT_L_SINT16/g'
    s/MESA_FORMAT_LUMINANCE_INT8\b/MESA_FORMAT_L_SINT8/g'
    s/MESA_FORMAT_LUMINANCE_ALPHA_UINT8\b/MESA_FORMAT_LA_UINT8/g'
    s/MESA_FORMAT_LUMINANCE_ALPHA_UINT16\b/MESA_FORMAT_LA_UINT16/g'
    s/MESA_FORMAT_LUMINANCE_ALPHA_UINT32\b/MESA_FORMAT_LA_UINT32/g'
    s/MESA_FORMAT_LUMINANCE_ALPHA_INT32\b/MESA_FORMAT_LA_SINT32/g'
    s/MESA_FORMAT_LUMINANCE_ALPHA_INT16\b/MESA_FORMAT_LA_SINT16/g'
    s/MESA_FORMAT_LUMINANCE_ALPHA_INT8\b/MESA_FORMAT_LA_SINT8/g'
    s/MESA_FORMAT_ALPHA_FLOAT16\b/MESA_FORMAT_A_FLOAT16/g'
    s/MESA_FORMAT_ALPHA_FLOAT32\b/MESA_FORMAT_A_FLOAT32/g'
    s/MESA_FORMAT_INTESITY_FLOAT16\b/MESA_FORMAT_I_FLOAT16/g'
    s/MESA_FORMAT_INTESITY_FLOAT32\b/MESA_FORMAT_I_FLOAT32/g'
    s/MESA_FORMAT_INTENSITY_FLOAT16\b/MESA_FORMAT_I_FLOAT16/g'
    s/MESA_FORMAT_INTENSITY_FLOAT32\b/MESA_FORMAT_I_FLOAT32/g'
    s/MESA_FORMAT_LUMINANCE_FLOAT16\b/MESA_FORMAT_L_FLOAT16/g'
    s/MESA_FORMAT_LUMINANCE_FLOAT32\b/MESA_FORMAT_L_FLOAT32/g'
    s/MESA_FORMAT_LUMINANCE_ALPHA_FLOAT16\b/MESA_FORMAT_LA_FLOAT16/g'
    s/MESA_FORMAT_LUMINANCE_ALPHA_FLOAT32\b/MESA_FORMAT_LA_FLOAT32/g'

mesa: Change many Type P MESA_FORMATs to meet naming spec

Conversion of Type P formats as follows (w/related comment fixes):
    s/MESA_FORMAT_RGB565\b/MESA_FORMAT_B5G6R5_UNORM/g
    s/MESA_FORMAT_RGB565_REV\b/MESA_FORMAT_R5G6B5_UNORM/g
    s/MESA_FORMAT_ARGB4444\b/MESA_FORMAT_B4G4R4A4_UNORM/g
    s/MESA_FORMAT_ARGB4444_REV\b/MESA_FORMAT_A4R4G4B4_UNORM/g
    s/MESA_FORMAT_RGBA5551\b/MESA_FORMAT_A1B5G5R5_UNORM/g
    s/MESA_FORMAT_XBGR8888_SNORM\b/MESA_FORMAT_R8G8B8X8_SNORM/g
    s/MESA_FORMAT_XBGR8888_SRGB\b/MESA_FORMAT_R8G8B8X8_SRGB/g
    s/MESA_FORMAT_ARGB1555\b/MESA_FORMAT_B5G5R5A1_UNORM/g
    s/MESA_FORMAT_ARGB1555_REV\b/MESA_FORMAT_A1R5G5B5_UNORM/g
    s/MESA_FORMAT_AL44\b/MESA_FORMAT_L4A4_UNORM/g
    s/MESA_FORMAT_RGB332\b/MESA_FORMAT_B2G3R3_UNORM/g
    s/MESA_FORMAT_ARGB2101010\b/MESA_FORMAT_B10G10R10A2_UNORM/g
    s/MESA_FORMAT_Z24_S8\b/MESA_FORMAT_S8_UINT_Z24_UNORM/g
    s/MESA_FORMAT_S8_Z24\b/MESA_FORMAT_Z24_UNORM_S8_UINT/g
    s/MESA_FORMAT_X8_Z24\b/MESA_FORMAT_Z24_UNORM_X8_UINT/g
    s/MESA_FORMAT_Z24_X8\b/MESA_FORMAT_X8Z24_UNORM/g
    s/MESA_FORMAT_RGB9_E5_FLOAT\b/MESA_FORMAT_R9G9B9E5_FLOAT/g
    s/MESA_FORMAT_R11_G11_B10_FLOAT\b/MESA_FORMAT_R11G11B10_FLOAT/g
    s/MESA_FORMAT_Z32_FLOAT_X24S8\b/MESA_FORMAT_Z32_FLOAT_S8X24_UINT/g
    s/MESA_FORMAT_ABGR2101010_UINT\b/MESA_FORMAT_R10G10B10A2_UINT/g
    s/MESA_FORMAT_XRGB4444_UNORM\b/MESA_FORMAT_B4G4R4X4_UNORM/g
    s/MESA_FORMAT_XRGB1555_UNORM\b/MESA_FORMAT_B5G5R5X1_UNORM/g
    s/MESA_FORMAT_XRGB2101010_UNORM\b/MESA_FORMAT_B10G10R10X2_UNORM/g
    s/MESA_FORMAT_AL88\b/MESA_FORMAT_L8A8_UNORM/g
    s/MESA_FORMAT_AL88_REV\b/MESA_FORMAT_A8L8_UNORM/g
    s/MESA_FORMAT_AL1616\b/MESA_FORMAT_L16A16_UNORM/g
    s/MESA_FORMAT_AL1616_REV\b/MESA_FORMAT_A16L16_UNORM/g
    s/MESA_FORMAT_RG88\b/MESA_FORMAT_G8R8_UNORM/g
    s/MESA_FORMAT_GR88\b/MESA_FORMAT_R8G8_UNORM/g
    s/MESA_FORMAT_GR1616\b/MESA_FORMAT_R16G16_UNORM/g
    s/MESA_FORMAT_RG1616\b/MESA_FORMAT_G16R16_UNORM/g
    s/MESA_FORMAT_SRGBA8\b/MESA_FORMAT_A8B8G8R8_SRGB/g
    s/MESA_FORMAT_SARGB8\b/MESA_FORMAT_B8G8R8A8_SRGB/g
    s/MESA_FORMAT_SLA8\b/MESA_FORMAT_L8A8_SRGB/g

Conflicts:
src/mesa/drivers/dri/i965/brw_surface_formats.c
src/mesa/main/format_pack.c
src/mesa/main/format_unpack.c
src/mesa/main/formats.c
src/mesa/main/texformat.c
src/mesa/main/texstore.c

mesa: Change many Type A MESA_FORMATs to meet naming standard

Update comments. Conversion of the following Type A formats:
    s/MESA_FORMAT_RGB888\b/MESA_FORMAT_BGR_UNORM8/g
    s/MESA_FORMAT_BGR888\b/MESA_FORMAT_RGB_UNORM8/g
    s/MESA_FORMAT_A8\b/MESA_FORMAT_A_UNORM8/g
    s/MESA_FORMAT_A16\b/MESA_FORMAT_A_UNORM16/g
    s/MESA_FORMAT_L8\b/MESA_FORMAT_L_UNORM8/g
    s/MESA_FORMAT_L16\b/MESA_FORMAT_L_UNORM16/g
    s/MESA_FORMAT_I8\b/MESA_FORMAT_I_UNORM8/g
    s/MESA_FORMAT_I16\b/MESA_FORMAT_I_UNORM16/g
    s/MESA_FORMAT_R8\b/MESA_FORMAT_R_UNORM8/g
    s/MESA_FORMAT_R16\b/MESA_FORMAT_R_UNORM16/g
    s/MESA_FORMAT_Z16\b/MESA_FORMAT_Z_UNORM16/g
    s/MESA_FORMAT_Z32\b/MESA_FORMAT_Z_UNORM32/g
    s/MESA_FORMAT_S8\b/MESA_FORMAT_S_UINT8/g
    s/MESA_FORMAT_SRGB8\b/MESA_FORMAT_BGR_SRGB8/g
    s/MESA_FORMAT_RGBA_16\b/MESA_FORMAT_RGBA_UNORM16/g
    s/MESA_FORMAT_SL8\b/MESA_FORMAT_L_SRGB8/g
    s/MESA_FORMAT_Z32_FLOAT\b/MESA_FORMAT_Z_FLOAT32/g
    s/MESA_FORMAT_XBGR16161616_UNORM\b/MESA_FORMAT_RGBX_UNORM16/g
    s/MESA_FORMAT_XBGR16161616_SNORM\b/MESA_FORMAT_RGBX_SNORM16/g
    s/MESA_FORMAT_XBGR16161616_FLOAT\b/MESA_FORMAT_RGBX_FLOAT16/g
    s/MESA_FORMAT_XBGR16161616_UINT\b/MESA_FORMAT_RGBX_UINT16/g
    s/MESA_FORMAT_XBGR16161616_SINT\b/MESA_FORMAT_RGBX_SINT16/g
    s/MESA_FORMAT_XBGR32323232_FLOAT\b/MESA_FORMAT_RGBX_FLOAT32/g
    s/MESA_FORMAT_XBGR32323232_UINT\b/MESA_FORMAT_RGBX_UINT32/g
    s/MESA_FORMAT_XBGR32323232_SINT\b/MESA_FORMAT_RGBX_SINT32/g
    s/MESA_FORMAT_XBGR8888_UINT\b/MESA_FORMAT_RGBX_UINT8/g
    s/MESA_FORMAT_XBGR8888_SINT\b/MESA_FORMAT_RGBX_SINT8/g

mesa: Rename 4 color component unsigned byte MESA_FORMATs

Change all 4 color component unsigned byte formats to meet spec for P
Type formats:
    s/MESA_FORMAT_RGBA8888\b/MESA_FORMAT_A8B8G8R8_UNORM/g
    s/MESA_FORMAT_RGBA8888_REV\b/MESA_FORMAT_R8G8B8A8_UNORM/g
    s/MESA_FORMAT_ARGB8888\b/MESA_FORMAT_B8G8R8A8_UNORM/g
    s/MESA_FORMAT_ARGB8888_REV\b/MESA_FORMAT_A8R8G8B8_UNORM/g
    s/MESA_FORMAT_RGBX8888\b/MESA_FORMAT_X8B8G8R8_UNORM/g
    s/MESA_FORMAT_RGBX8888_REV\b/MESA_FORMAT_R8G8B8X8_UNORM/g
    s/MESA_FORMAT_XRGB8888\b/MESA_FORMAT_B8G8R8X8_UNORM/g
    s/MESA_FORMAT_XRGB8888_REV\b/MESA_FORMAT_X8R8G8B8_UNORM/g

mesa: change gl_format to mesa_format

s/\bgl_format\b/mesa_format/g. Use better name for Mesa Formats enum

docs: Update GL3.txt due to recent work

v2: Note that Fredrik Höglund is working on GL_ARB_multi_bind, not
Maxence Le Doré.  Suggested by Matt.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>

glcpp: Make sure GL_AMD_shader_trinary_minmax is defined

The define was only available if
gl_extensions::AMD_shader_trinary_minmax was set, but no driver set it.
Since the extension is advertised by default, remove that field too.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Cc: Maxence Le Doré <maxence.ledore@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>

mesa: Clean up bad code formatting left from previous commit

Also s/_EXT// on enums that are now part of core.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

mesa: GL_EXT_framebuffer_blit is not optional

Every driver supports it.  All current and future Gallium drivers always
support it, and all existing classic drivers support it.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

radeon: Enable GL_EXT_framebuffer_blit

The dd_function_table::BlitFramebuffer is already initialized to
_mesa_meta_BlitFramebuffer, so it should just work.

Tested on a Radeon 7500 (OpenGL renderer string: Mesa DRI R100 (RV200
5157) TCL DRI2).  I couldn't do a full piglit run because it would tank
the system with or without this patch.  I just ran all the blit tests
(-t blit to piglit-run.py).  Only fbo-sys-sub-blit failed.  All of the
other tests that weren't skipped (i.e., all the multisample and sRGB
tests skip) passed.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

r200: Enable GL_EXT_framebuffer_blit

The dd_function_table::BlitFramebuffer is already initialized to
_mesa_meta_BlitFramebuffer, so it should just work.

Tested on a FireGL 8800 (OpenGL renderer string: Mesa DRI R200 (R200
5148) TCL DRI).

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

radeon / r200: Pass the API into _mesa_initialize_context

Otherwise an application that requested an OpenGL ES 1.x context would
actually get a desktop OpenGL context.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Cc: "9.1 9.2 10.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

mesa: Validate internalFormat with target in glTexStorage paths

Fixes the glTexStorage3D failure in
ext_packed_depth_stencil-depth-stencil-texture and
oes_packed_depth_stencil-depth-stencil-texture_gles2.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

mesa: Refactor internalFormat / target checks to a separate function

We need almost identical code in the glTexStorage path.

v2: Fix typo in a comment noticed by Topi.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

mesa: Generate the correct error for a depth format with a 3D texture

All versions of the OpenGL spec are quite clear that
GL_INVALID_OPERATION should be generated.  I added a quotation from the
3.3 core profile spec.

Fixes the glTexImage3D subcases of
ext_packed_depth_stencil-depth-stencil-texture and
oes_packed_depth_stencil-depth-stencil-texture_gles2.  The same subtests
of oes_packed_depth_stencil-depth-stencil-texture_gles1 fail, but they
fail with a different wrong error code.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

glx: Update glxext.h to revision 24777.

It readds the GLXContextID typedef, but under #ifndef GLX_VERSION_1_3
and glx.h already defines GLX_VERSION_1_3.

Bugzilla: https://cvs.khronos.org/bugzilla/show_bug.cgi?id=11454
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

loader: Add missing \n on message printing

Cover both loader and glx/dri_glx
Drop \n from the default loader logger

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>

dri: Reuse dri_message to implement our other message handlers.

Reviewed-by: Keith Packard <keithp@keithp.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>

dri: Fix the logger error message handling.

Since the loader changes, there has been a compiler warning that the
prototype didn't match.  It turns out that if a loader error message was
ever thrown, you'd segfault because of trying to use the warning level as
a format string.

Reviewed-by: Keith Packard <keithp@keithp.com>
Tested-by: Keith Packard <keithp@keithp.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>

dri2: Trust our own driver name lookup over the server's.

This allows Mesa to choose to rename driver .sos (or split drivers),
without needing a flag day with the corresponding 2D driver.

v2: Undo the loader-only-for-dri3 change.

Reviewed-by: Keith Packard <keithp@keithp.com> [v1]
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net> [v1]

dri2: Open the fd before loading the driver.

I want to stop trusting the server for the driver name, and instead decide
on our own based on the fd, so I needed this code motion.

Reviewed-by: Keith Packard <keithp@keithp.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>

dri3: Fix two little memory leaks.

Noticed when valgrinding an unrelated bug.

Reviewed-by: Keith Packard <keithp@keithp.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>

loader: Use dlsym to get our udev symbols instead of explicit linking.

Steam links against libudev.so.0, while we're linking against
libudev.so.1.  The result is that the symbol names (which are the same in
the two libraries) end up conflicting, and some of the usage of .so.1
calls the .so.0 bits, which have different internal structures, and
segfaults happen.

By using a dlopen() with RTLD_LOCAL, we can explicitly look for the
symbols we want, while they get the symbols they want.

Reviewed-by: Keith Packard <keithp@keithp.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Tested-by: Alexandre Demers <alexandre.f.demers@gmail.com>
Tested-by: Mike Lothian <mike@fireburn.co.uk>

r600g/compute: Emit DEALLOC_STATE on cayman after dispatching a compute shader.

This is necessary to prevent the next SURFACE_SYNC packet from
hanging the GPU.

https://bugs.freedesktop.org/show_bug.cgi?id=73418

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
CC: "9.2" "10.0" <mesa-stable@lists.freedesktop.org>

docs: sync up nv50/nvc0 status on GL4.x extensions

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>

docs: update GL3.txt, relnotes to reflect current nv50/nvc0 status

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>

nv50, nvc0: update reported glsl version to 330

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>

mesa/st: expose ARB_texture_rgb10_a2ui if R10G10B10A2_UINT is supported v2

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

nv50: add more RGB10A2 formats

st/mesa: fix GS varyings for PIPE_CAP_TGSI_TEXCOORD

nv50: enable seamless cube maps on all hw

Some of the hardware support is missing. The NVIDIA-provided driver,
which claims seamless cube map support fails the relevant tests as well.
As this is the last extension before we can have OpenGL 3.2, doing this
allows us to expose geometry shaders without doing the additional
work involved in supporting ARB_geometry_shader4.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>

nv50: report glsl 1.50 now that gp tests pass

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>

nv50: add support for texelFetch'ing MS textures, ARB_texture_multisample

Creates two areas in the AUX constbuf:
 - Sample offsets for MS textures
 - Per-texture MS settings

When executing a texelFetch with a MS sampler, looks up that texture's
settings and adjusts the parameters given to the texfetch instruction.

With this change, all the ARB_texture_multisample piglits pass, so turn
on PIPE_CAP_TEXTURE_MULTISAMPLE.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>

nv50: copy nvc0's get_sample_position implementation

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>

nv50: add comments about CB_AUX contents

Updates a few inconsistencies as well, like the size of the buffer,
location of the runout, etc.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>

nvc0: don't forget to also clear additional layers

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>

nv50: don't forget to also clear additional layers

Fixes most of the tests/spec/gl-3.2/layered-rendering/* piglits.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>

nv50: allocate an extra code bo to avoid dmesg spam

Each code BO is a heap that allocates at the end first, and so GPs are
allocated at the very end of the allocated space. When executing, we see
PAGE_NOT_PRESENT errors for the next page. Just over-allocate to make
sure that there's something there.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>

nv50: GP_REG_ALLOC_RESULT must be positive

Set max_out to 1 when there are no outputs.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>

nv50: VP_RESULT_MAP_SIZE has to be positive

Make sure that we never try to use a 0-sized map. This can happen when
using a gp, so add a dummy mapping when computing vp_gp_mapping in that
case.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>

nv50: enable primitive id generation when it is an FP input without GP

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>

nv50: handle gl_Layer writes in GP

Marks gl_Layer as only having one component, and makes sure to keep
track of where it is and emit it in the output map, since it is not an
input to the FP.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>

nv50: properly set the PRIMITIVE_ID enable flag when it is a gp input.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>

nv50/ir: add support for gl_PrimitiveIDIn

Note that the primitive id is stored in a[0x18], while usually the
geometry instructions are of the form a[$a1 + 0x4] which gets mapped to
p[] space. We need to avoid the change from a[] to p[] here, so it's
keyed on whether the access is indirect or not.

Note that there's also a use-case for accessing e.g. a[$r1], however
that's not supported for now. (Could be added by checking the register
file of the indirect parameter.)

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>

nv50/ir: fix support for shader input + immediate in gp

This only works for up to $a3, hopefully we won't go that high.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>

nv50/ir: disallow shader input + cbuf in same instruction in gp

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>

nv50/ir: disallow predicates on emit/restart ops

nv50: allow vert_count to be >255

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>

nv50: add support for geometry shaders

Layer output probably doesn't work yet, but other than that everything seems
to be working.

Signed-off-by: Bryan Cain <bryancain3@gmail.com>
[calim: fix up minor bugs, code formatting]
Signed-off-by: Christoph Bumiller <e0425955@student.tuwien.ac.at>
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>

nv50/ir: delay calculation of indirect addresses

Instead of emitting an SHL 4 io an address register on the TGSI ARL and UARL
instructions, emit the shift when the loaded address is actually used.  This
is necessary because input vertex and attribute indices in geometry shaders on
nv50 need to be shifted left by 2 instead of 4.

Signed-off-by: Bryan Cain <bryancain3@gmail.com>
[calim: various updates to the indirect address logic]
Signed-off-by: Christoph Bumiller <e0425955@student.tuwien.ac.at>
[imirkin: remove OP_MAD change that calim made, add OP_RESTART handling
          same as OP_EMIT for code flow analysis]
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>

nv50/ir: fix PFETCH and add RDSV to get VSTRIDE for GPs

nv50/ir: txg not available on nvaa/nvac

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>

nv50, nvc0: only clear out the buffers that we were asked to clear

Fixes fbo-drawbuffers-none glClearBuffer piglit test.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>

nv50, nvc0: clear out RT on a null cbuf

This is needed since commit 9baa45f78b (st/mesa: bind NULL colorbuffers
as specified by glDrawBuffers).

This implementation is highly based on a larger commit by
Christoph Bumiller <e0425955@student.tuwien.ac.at> in his gallium-nine
branch.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>

nv50: don't leak heap on tls alloc failure

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>

nouveau/codegen: set dType to S32 for OP_NEG U32

It doesn't make sense to do an OP_NEG from U32 to U32. This was
manifested on nv50 in glsl-fs-atan-3 which was generating a

UMAD TEMP[0].x, TEMP[0].xxxx, -TEMP[5].xxxx, TEMP[0].xxxx

instruction. (For some reason, nvc0 causes a different shader to be
generated.) This led to a

cvt neg u32 $r1 u32 $r1

Which did not yield the desired result. This changes the final output to

cvt neg s32 $r1 u32 $r1

which produces the desired output and the piglit tests passes. My
assumption is that this is also what we want on nvc0, but could not test
as there was no suitable shader that generated the problem instruction.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>

util/u_vbuf: correct map offset calculation for crazy offsets

When the min_index is very large (or very negative), the multipliation
can overflow 32 bits and result in an incorrect map pointer
modification.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

translate: deal with size overflows by casting to ptrdiff_t

This was discovered as a result of the draw-elements-base-vertex-neg
piglit test, which passes very negative offsets in, followed up by large
indices. The nouveau code correctly adjusts the pointer, but the
translate code needs to do the proper inverse correction. Similarly fix
up the SSE code to do a 64-bit multiply to compute the proper offset.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Brian Paul <brianp@vmware.com>

gallium/rtasm: handle mmap failures appropriately

For a variety of reasons mmap (selinux and pax to name
a few) and can fail and with current code. This will
result in a crash in the driver, if not worse.

This has been the case since the inception of the
gallium copy of rtasm.

Cc: 9.1 9.2 10.0 <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=73473
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Jakob Bornecrantz <jakob@vmware.com>

haiku: change atomic int to non-volatile

* Our atomic calls changed recently and no longer want atomic int
  pointers to be volatile
* Spellcheck

i965: Don't store qpitch / 4 as mt->qpitch for compressed surfaces.

Broadwell requires software to specify QPitch in a bunch of packets,
so we decided to store it in the miptree.  However, when I did that
refactoring, I missed a subtlety: the hardware expects QPitch to be
"in units of rows in the uncompressed surface".

This is the value we originally compute.  However, for compressed
surfaces, we then divided it by 4 (the block height), to obtain the
physical layout.  This is no longer the QPitch Broadwell expects.

So, store the original undivided value in mt->qpitch, but continue to
use the divided value in brw_miptree_layout_texture_array().  For
non-Broadwell platforms, this should have no impact at all.

Helps fix Piglit's "getteximage-targets S3TC CUBE" test on Broadwell.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>

c11: Do not use pthread_mutex_timedlock on NetBSD.

This patch fixes the NetBSD build.

NetBSD does not have pthread_mutex_timedlock.

  CC       glapi_dispatch.lo
threads_posix.h: In function 'mtx_timedlock':
threads_posix.h:216:5: error: implicit declaration of function 'pthread_mutex_timedlock'

Signed-off-by: Vinson Lee <vlee@freedesktop.org>

glsl: Simplify built-in generator functions for min3/max3/mid3.

The type of all three parameters are identical, so we don't need to
specify it three times.  The predicate is always identical too, so we
don't need to make it a parameter, either.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

glsl: Fix chained assignments of vector channels.

Simple shaders such as:

    void splat(vec2 v, float f) {
        v[0] = v[1] = f;
    }

failed to compile with the following error:
error: value of type vec2 cannot be assigned to variable of type float

First, we would process v[1] = f, and transform:
LHS: (expression float vector_extract (var_ref v) (constant int (1)))
RHS: (var_ref f)
into:
LHS: (var_ref v)
RHS: (expression vec2 vector_insert (var_ref v) (constant int (1))
                 (var_ref f))

Note that the LHS type is now vec2, not a float.  This is surprising,
but not the real problem.

After emitting assignments, this ultimately becomes:
(declare (temporary) vec2 assignment_tmp)
(assign (xy)
  (var_ref assignment_tmp)
  (expression vec2 vector_insert (var_ref v) (constant int (1))
              (var_ref f)))
  (assign (xy) (var_ref v) (var_ref assignment_tmp))

We would then return (var_ref assignment_tmp) as the rvalue, which has
the wrong type---it should be float, but is instead a vec2.

To fix this, we simply return (vector_extract (var_ref assignment_temp)
<the appropriate channel>) to pull out the desired float value.

Fixes Piglit's chained-assignment-with-vector-constant-index.vert and
chained-assignment-with-vector-dynamic-index.vert tests.

Cc: mesa-stable@lists.freedesktop.org
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=74026
Reported-by: Dan Ginsburg <dang@valvesoftware.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>

glsl: Rename "expr" to "lhs_expr" in vector_extract munging code.

When processing assignments, we have both an LHS and RHS.  At a glance,
"lhs_expr" clearly refers to the LHS, while a generic name like "expr"
is ambiguous.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>

Update .gitignore for Catalan translations build artifacts

Causes git to ignore the new build artifacts introduced by commit
d5e5367e8992c2e5322d35fba8d86c33a0db6825 (driconf: Add Catalan
translations).

mesa: Increment the list pointer while freeing instruction data

Since the list pointer was never incremented when a OPCODE_PIXEL_MAP
opcode was encountered, the data for the instruction would get freed
over and over and over... resulting in a crash.

Fixes gl-1.0-beginend-coverage.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=72214
Reviewed-by: Brian Paul <brianp@vmware.com>
Cc: Lu Ha <huax.lu@intel.com>

svga: rename "tex_usage" to "bindings", add comments

Trivial.