nvc0/ir: make sure to align the second arg of TXD to 4, as we do for TEX

This was handled in handleTEX(), however the way the logic works, those
extra arguments aren't added on by then, so it did nothing. Instead we
must duplicate that bit here. GK110 appears to complain about
MISALIGNED_GPR, however it's reasonable to believe that GK104 has the
same requirements.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=95403
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

nv50,nvc0: add support for cull distances

Cull distances are just a special case of clip distances as far as the
hardware is concerned. Make sure that the relevant "planes" are enabled,
and flip the clip mode to cull for those.

Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>
[imirkin: add enables on nvc0, add nv50 support]
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>

st/mesa: disable cull distance for now

The pass that st/mesa relies on to combine clip and cull distances has
been reverted, so we can't expose ARB_cull_distance until that is
resolved.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

i965: Use blorp for all clears

We used to use a meta path on gen8 but we haven't since c7cf17ae758.  We
might as well delete the meta path since blorp works on all gens.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>

i965: Use blorp for all stencil blits

We used to use a meta path because blorp didn't support 16x MSAA.  Now it
does, so we don't need the meta paths anymore.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>

i965: Use blorp for all updownsample blits

We used to use a meta path because blorp didn't support 16x MSAA.  Now it
does, so we don't need the meta paths anymore.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>

i965/blorp: Add support for 16x MSAA

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>

i965: move brw_meta_set_fast_clear_color to brw_meta_util.c

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>

i965; Move brw_meta_get_*_rect to brw_meta_util.c

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>

i965: Move brw_is_color_fast_clear_compatible to brw_meta_util

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>

i965: Move brw_get_rb_for_slice to brw_meta_util

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>

i965/blorp: Get rid of the blorp_prog_data_int() helper

The helper was initially created to allow us to set reasonable defaults as
we mutated the brw_blorp_prog_data structure in preparation for NIR.  Now
that everything is going through brw_blorp_compile_nir_shader() which fully
fills out the brw_blorp_prog_data structure, we don't need the helper.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>

i965/blorp: Delete the old blorp shader emit code

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>

i965/blorp: Stop doing f2i(i2f(sample_id))

NIR gets kind of awkward when you have a 3-component vector with two floats
and one int.  This led to us accidentally going through float for the
sample index.  It doesn't hurt anything but it also isn't needed.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>

i965/blorp: Refactor coordinate munging

The original code-flow tried to map original blorp.  This puts things more
where they belong and simplifies some of the logic.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>

i965/blorp: Add bilinear blending support to the NIR path

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>

i965/blorp: Add support for averaging resolves to the NIR path

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>

i965/blorp: Add MSAA encode/decode support to the NIR path

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>

i965/blorp: Add support for W-[de]tiling to the NIR path

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>

i965/blorp: Add support for discard-based bounds checks to the NIR path

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>

i965/blorp: Add initial support for NIR-based blit shaders

Many of the more complex cases still fall back to the old shader builder.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>

i965/blorp: Refactor getting the blit kernel into a helper

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>

i965/blorp: Use NIR for clear shaders

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=95373
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>

i965/blorp: Create the program key in get_clear_kernel

There's no reason to be passing a whole struct around just for a single
boolean.  We can create it later when we actually need to use it as a key.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>

i965/blorp: Add a helper for compiling NIR shaders

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>

blorp: Add initial state setup support for SIMD8 dispatch

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>

i965/blorp: Add a param array to prog_data

This array allows the push constants to be re-arranged on upload.  The
actual arrangement will, eventually, come from the back-end compiler.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>

i965/blorp: Add a prog_data_init helper

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>

i965/fs: Implement the new NIR MCS texturing

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

nir: Add texture opcodes and source types for multisample compression

Intel hardware does a form of multisample compression that involves an
auxilary surface called the MCS.  When an MCS is in use, you have to first
sample from the MCS with a special opcode and then pass the result of that
operation into the next sample instrucion.  Normally, we just do this
ourselves in the back-end, but we want to expose that functionality to NIR
so that we can use MCS values directly in NIR-based blorp.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

nir/builder: Add a helper for grabbing multiple channels from an ssa def

This is similar to nir_channel except that it lets you grab more than one
channel by providing a mask.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

nir/builder: Generate the alu helpers directly in python

There's no reason for having a macro *and* a python generator.  We can
easily just do the whole thing in python.  This has the advantage that we
are no longer definining ALU# macros which conflict with the ones in
brw_fs_builder.h.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/fs: Use MRF0 for the repclear message

This is what BLORP does.  Making them match cuts down on the noise when
looking at AUB diffs.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/blorp: Simplify the sample layout calculation

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/fs: Organize prog_data by ksp number rather than SIMD width

The hardware packets organize kernel pointers and GRF start by slots that
don't map directly to dispatch width.  This means that all of the state
setup code has to re-arrange the data from prog_data into these slots.
This logic has been duplicated 4 times in the GL driver and one more time
in the Vulkan driver.  Let's just put it all in brw_fs.cpp.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/gen7_wm: Move where we set the fast clear op

This better matches gen8 state setup

Acked-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/fs: Stop setting dispatch_grf_start_reg from the visitor

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/fs: Clean up the logic in compile_fs a bit

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/state: Clean up WM/PS state to pull more things out of prog_data

Now that we have a persample_shading bit in prog_data we can reduce the
amount the state setup code needs to be looking at the GL state.  In
particular, it no longer pulls anything directly out of the
gl_fragment_program and no longer depends on NEW_FRAGMENT_PROGRAM.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/fs: Rework the persample shading key/prog_data bits

This commit reworks and simplifies the way we handle persample shading in
the shader key and prog_data.  The previous approach had three different
key bits that had slightly different and hard-to-decern meanings while the
new bits are far more clear.  This commit changes it to two easily
understood bits that communicate everything we need:

 1) key->persample_interp: means that the user has requested persample
    interpolation through the API.  This is equivalent to having
    SAMPLE_SHADING enabled and having MIN_SAMPLE_SHADING_VALUE set high
    enough that you actually get multiple per-sample invocations.

 2) key->multisample_fbo: means that the shader will be running on an
    actual multi-sampled framebuffer.

This commit also adds a new "persample_dispatch" bit to prog_data which
indicates that the shader should be run in persample mode.  This way the
state setup code doesn't have to look at the fragment program or GL state
and can just pull that data out of the prog_data.

In theory, this shuffle could mean more recompiles.  However, in practice,
we were shoving enough state into the key before that we were probably
hitting a recompile on every per-sample shader anyway.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

nir: Add an info bit for uses_sample_qualifier

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965: Fix undefined df bits in brw_reg comparisons.

Commit 5310bca024f77da40ea6f4c275455f9cb0528f9e added a new "double df"
field to the brw_reg struct, adding an extra 4 bytes of data that isn't
usually initialized (or may contain irrelevant garbage if the struct is
mutated).  This means that it's no longer safe to memcmp().

Instead, add a brw_regs_equal() function which ignores the extra df bits
unless they matter.  To keep the implementation cheap, we wrap the first
set of fields in a union/struct so that we can use a single DWord
comparison.

v2: Drop unnecessary casts (caught by Francisco Jerez).

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>

i965: disable cull distance temporarily.

I'll fix this up on Monday, so leave the docs changes in place.

Signed-off-by: Dave Airlie <airlied@redhat.com>

Revert "glsl: Extend lowering pass for gl_ClipDistance to support other arrays (v4)"

This reverts commit ad355652c20b245f5f2faa8622e71461e3121a7f.

This broke a bunch of clip tests.

docs: Mark GL_OES_shader_io_blocks as started

Watch the oes_shader_io_blocks of my fd.o Mesa GIT repo for progress.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>

docs: update ARB_cull_distance status.

Signed-off-by: Kristian Høgsberg Kristensen <kristian.h.kristensen@intel.com>

i965: Add support for GL_ARB_cull_distance

Signed-off-by: Kristian Høgsberg Kristensen <kristian.h.kristensen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

st/mesa: flip y coordinate of interpolateAtOffset for winsys

This fixes a few dEQP tests like

dEQP-GLES31.functional.shaders.multisample_interpolation.interpolate_at_offset.no_qualifiers.default_framebuffer

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Dave Airlie <airlied@redhat.com>

glsl: make sure that textureProj(bias) variants are only exposed in fs

Many were already marked as fs_only, but not all. This fixes the
remaining ir_txb entries.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

glsl: be more strict when validating shader inputs

interpolateAt* can only take input variables or an element of an input
variable array. No structs.

Further, GLSL 4.40 relaxes the requirement to allow swizzles, so enable
that as well.

This fixes the following dEQP tests:

dEQP-GLES31.functional.shaders.multisample_interpolation.interpolate_at_sample.negative.interpolate_struct_member
dEQP-GLES31.functional.shaders.multisample_interpolation.interpolate_at_centroid.negative.interpolate_struct_member
dEQP-GLES31.functional.shaders.multisample_interpolation.interpolate_at_offset.negative.interpolate_struct_member

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Chris Forbes <chrisforbes@google.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

glsl: make sure that interpolateAt arguments are variables

In the case of a constant, it might have been propagated through and
variable_referenced() returns NULL. Error out in that case.

Fixes 3 dEQP tests:

dEQP-GLES31.functional.shaders.multisample_interpolation.interpolate_at_sample.negative.interpolate_constant
dEQP-GLES31.functional.shaders.multisample_interpolation.interpolate_at_centroid.negative.interpolate_constant
dEQP-GLES31.functional.shaders.multisample_interpolation.interpolate_at_offset.negative.interpolate_constant

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Eduardo Lima Mitev <elima@igalia.com>
Reviewed-by: Chris Forbes <chrisforbes@google.com>

mesa/st: Add support for GL_ARB_cull_distance (v2)

v2: don't bother with cull dist varyings except to assert.

Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

gallium: Add a pipe cap for arb_cull_distance

This lets us safely enable or disable the extension as needed

Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

glsl: Add arb_cull_distance support (v3)

v2: make too large array a compile error
v3: squash mesa/prog patch to avoid static compiler errors in bisect

Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>

glsl: Extend lowering pass for gl_ClipDistance to support other arrays (v4)

This will come in handy when we want to lower gl_CullDistance into
gl_CullDistanceMESA.

[airlied: drop separate APIs for clip/cull - just use single API
to call both passes.]

v3: reexamine my sanity, this was pretty broken, the new code
creates one copy of gl_ClipDistanceMESA, as the clip distance
varying and lowers everything into that in two passes, one for clips
one for culls.
v4: rework using the passes in clip/cull sizes, instead of the
array sizes.

Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>

glsl: rename lower_clip_distance to lower_distance.

This just renames the file in anticipation of adding cull lowering,
and renames the internals.

Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>

mesa/main: Add support for GL_ARB_cull_distance (v2)

airlied:
v2: rename LowerClipDistance to LowerCombinedClipCullDistnace.
I don't think we want any other behaviour with any current hw.

Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>

glapi: Add GL_ARB_cull_distance

Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>

anv/copy: Fix copying Images from Buffers with larger dimensions

This function previously assumed that the Buffer and Image had matching
dimensions. However, it is possible to copy from a Buffer with larger
dimensions than the Image. Modify the copy function to enable this.

v2: Use ternary instead of MAX for setting bufferExtent (Jason Ekstrand)

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=95292
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Tested-by: Matthew Waters <matthew@centricular.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

.mailmap: Fix my email addresses.

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@ubuntu.com>

radeonsi/sid_tables: rename reg_table to sid_reg_table

This is purely cosmetic, making it easier to assign blame for space used
in the binary in case somebody else makes a similar cleanup effort in the
future.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radeonsi/sid_tables: store offset into global fields table instead of pointer

This avoids relocations in the final binary.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radeonsi/sid_tables: store strings by offset instead of by pointer

This saves some space and avoids the need for relocations.

Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

r600: remove TABLE_SIZE macro

Use ARRAY_SIZE instead.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

r600: move alu_op_table to .c file

So that it gets compiled and emitted only once, saving space is the final
binary.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

r600: move cf_op_table to .c file

So that it gets compiled and emitted only once, saving space is the final
binary.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

r600: move fetch_op_table to .c file

So that it gets compiled and emitted only once, saving space is the final
binary.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

r600: protect r600_isa.h with extern "C"

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

gallium/ddebug: Implement launch_grid.

Does not implement dumping info.

Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

gallium/ddebug: Support compute states.

v2: Reuse the macro for bind & delete.

Note that may not be able to share the delete long-term as
pipe_compute_state contains members not in pipe_shader_state,
and we need to distinguish the pointer location if we add that
struct to the union.

Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

gallium/ddebug: Add passthrough for get_compute_param.

Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

nir: Remove empty visit_call_src and visit_load_const_src functions

The guts were removed in dfb3abba.  It has been almost exactly a year,
so I dont think we're going to "decide we want [predication] back."

Silences several "unused parameter" warnings:

nir/nir.c: In function ‘visit_call_src’:
nir/nir.c:1052:32: warning: unused parameter ‘instr’ [-Wunused-parameter]
 visit_call_src(nir_call_instr *instr, nir_foreach_src_cb cb, void *state)
                                ^
nir/nir.c:1052:58: warning: unused parameter ‘cb’ [-Wunused-parameter]
 visit_call_src(nir_call_instr *instr, nir_foreach_src_cb cb, void *state)
                                                          ^
nir/nir.c:1052:68: warning: unused parameter ‘state’ [-Wunused-parameter]
 visit_call_src(nir_call_instr *instr, nir_foreach_src_cb cb, void *state)
                                                                    ^
nir/nir.c: In function ‘visit_load_const_src’:
nir/nir.c:1058:44: warning: unused parameter ‘instr’ [-Wunused-parameter]
 visit_load_const_src(nir_load_const_instr *instr, nir_foreach_src_cb cb,
                                            ^
nir/nir.c:1058:70: warning: unused parameter ‘cb’ [-Wunused-parameter]
 visit_load_const_src(nir_load_const_instr *instr, nir_foreach_src_cb cb,
                                                                      ^
nir/nir.c:1059:28: warning: unused parameter ‘state’ [-Wunused-parameter]
                      void *state)
                            ^

v2: Add some comments in nir_foreach_src suggested by Jason.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Cc: Connor Abbott <cwabbott0@gmail.com>

nir: Silence unused parameter warnings

These cases had the parameter removed:

nir/nir_lower_vec_to_movs.c: In function ‘try_coalesce’:
nir/nir_lower_vec_to_movs.c:124:66: warning: unused parameter ‘shader’ [-Wunused-parameter]
 try_coalesce(nir_alu_instr *vec, unsigned start_idx, nir_shader *shader)
                                                                  ^
nir/nir_lower_io.c: In function ‘load_op’:
nir/nir_lower_io.c:147:32: warning: unused parameter ‘state’ [-Wunused-parameter]
 load_op(struct lower_io_state *state,
                                ^

These cases had the parameter (void) silenced because the parameter was
necessary for an interface:

nir/glsl_to_nir.cpp:1900:32: warning: unused parameter 'ir' [-Wunused-parameter]
 nir_visitor::visit(ir_barrier *ir)
                                ^
nir/nir.c: In function ‘remove_use_cb’:
nir/nir.c:802:35: warning: unused parameter ‘state’ [-Wunused-parameter]
 remove_use_cb(nir_src *src, void *state)
                                   ^
nir/nir.c: In function ‘remove_def_cb’:
nir/nir.c:811:37: warning: unused parameter ‘state’ [-Wunused-parameter]
 remove_def_cb(nir_dest *dest, void *state)
                                     ^

Number of total warnings in my build reduced from 2543 to 2538
(reduction of 5).

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

vl/dri: fix close fd error out

fd should be set to -1 only if it got closed by pipe_loader_release.

Signed-off-by: Leo Liu <leo.liu@amd.com>

nvc0: fix indentation in nvc0_invalidate_resource_storage()

Trivial.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

nvc0: save some CPU cycles in nvc0_context_unreference_resources()

This reduces the number of loop iterations for invalidating buffers
and images.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

nvc0: invalidate texture buffers for compute

This is a pretty rare situation but this can happen though.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

swr: properly expose compressed format support

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

anv: Don't advertise shaderImageGatherExtended

We don't actually support all of the extended gather functionality so we
shouldn't be advertising it.

nir: glsl_get_bit_size() should take glsl_type

It's what all the call-sites once, so gets rid of a bunch of inlined
glsl_get_base_type() at the call-sites.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

i965/gen9: Enable lossless compression

I tried first creating the auxiliary buffer the same time with the
color buffer. That, however, led me into a situation where we would
later create the rest of the mip-levels and the compression would
need to be disabled (it is only supported for single level buffers).

Here we try to create it on demand just before the hardware starts
to render. This is similar what we do with fast clear buffers,
their creation is deferred until the first clear.
This setup also gives the opportunity to detect if the miptree
represents the temporaty texture used internally in the mesa core.
This texture is mostly written by cpu and therefore enabling
compression for it doesn't make much sense.

Note that a heuristic is included. Floating point formats are not
enabled yet as they are only seen to hurt performance.

Some highlights with window system driver kept fixed to default
and only the application driver changing:

Manhattan: 8.32152% +/- 0.355881%
Offscreen: 9.09713% +/- 0.340763%

Glb trex: 8.46231% +/- 0.460624%
Offscreen: 9.31872% +/- 0.463743%

v2 (Ben): Re-use msaa layout type for single sampled case.
v3: Moved the deferred allocation of mcs to brw_try_draw_prims() and
    brw_blorp_blit_miptrees() instead.
v4: (Ken): Drop MIPTREE_LAYOUT_ACCELERATED_UPLOAD when allocating mcs.
    Do not enable for scanout buffers

Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>

i965: Set render state for lossless compressed

v2: Add support for blorp and removed the support for meta
v3 (Ben): Add assertion on compressed non-fast clear - must
          be partial clear.

Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>

i965/wm: Don't sample lossless compressed as multisampled

Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>

i965/gen9: Setup MCS for compressed texture surfaces

Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>

i965/blorp: Do not resolve lossless compressed blit sources

Blorp blits use sampling engine which is capable of resolving
on the fly. Buffers are still resolved for blitter engine. Current
understanding is that blitter doesn't understand lossless compression.

Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>

i965/blorp: Prepare blits for lossless compression

Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>

i965: Deferred allocation of mcs for lossless compressed

Until now mcs was associated to single sampled buffers only for
fast clear purposes and it was therefore the responsibility of the
clear logic to allocate the aux buffer when needed. Now that normal
3D render or blorp blit may render with mcs enabled also, they need
to prepare the mcs just as well.

v2: Do not enable for scanout buffers
v3 (Ben):
   - Fix typo in commit message.
   - Check for gen < 9 and return early in brw_predraw_set_aux_buffers()
   - Check for gen < 9 and return early in intel_miptree_prepare_mcs()
v4: Check for msaa_layput and number of samples to determine if
    lossless compression is to used. Otherwise one cannot distuingish
    between fast clear with and without compression.

Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>

i965: Add flag telling if miptree is for client consumption

Consider later on adding specific disable flags such as

MIPTREE_LAYOUT_DISABLE_AUX_MCS   = 1 << 3, /* CCS_D */
MIPTREE_LAYOUT_DISABLE_AUX_CCS_E = 1 << 4,
MIPTREE_LAYOUT_DISABLE_AUX       = MIPTREE_LAYOUT_DISABLE_AUX_MCS |
                                   MIPTREE_LAYOUT_DISABLE_AUX_CCS_E,

and equivalent boolean/enums into miptree.

Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>

i965: Add helper for lossless compression support

v2: Check explicitly against base type of GL_FLOAT instead of
    using _mesa_is_format_integer_color(). Otherwise we miss
    GL_UNSIGNED_NORMALIZED.
v3 (Ben): Also call intel_miptree_supports_non_msrt_fast_clear()
          in order to really check everything.

Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>

i965/gen9: Prepare surface state setup for lossless compression

v2 (Ben): Use combination of msaa_layout and number of samples
          instead of introducing explicit type for lossless
          compression (intel_miptree_is_lossless_compressed()).
v3 (Ben): Do not set fast claer state in surface state setup.
          Moved into brw_postdraw_set_buffers_need_resolve()
          using a separate patch.
v4: Support for blorp
v5 (Ben): Re-use gen8_get_aux_mode()

Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>

i965/gen8: Expose auxiliary mode resolver

Also use the opportunity to drop the unused surface type argument.

Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>

i965: Relax assertion of halign == 16 for lossless compressed aux

Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>

i965/blorp: Set full resolve for lossless compressed

v2 (Ben): Introduce union for fast clear and resolve ops

Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>

i965/blorp: Do not skip fast color clear with new color

This hasn't been visible before. It showed up with lossless
compression with:

dEQP-GLES3.functional.fbo.color.repeated_clear.sample.tex2d.rgb8

Current fast clear logic kicks color resolves even for gpu sampling.
In the test case this results into trashing of the fast color clear
state between two subsequent clears, and therefore each clear is
performed correctly.
With lossless compression the resolves are unnecessary and therefore
the clear state indicates that the buffer is already cleared. Without
considering if the previous color value was the same as the new,
clears that need to be performed are skipped and the buffer ends up
holding old pixel values.

v2 (Ken): Fix the comparison for gen < 9

Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>

i965: Enable scalar GS by default.

I'd originally left this off because Orbital Explorer was hanging the
GPU, but it seems to be working these days.  There have been a bunch
of changes since then, so we probably fixed something.

On my Broadwell laptop, both Synmark/GSCloth and Orbital Explorer seem
to run at approximately the same framerate in either mode.  This is
despite large reductions in instruction count for Synmark, and large
increases for Orbital Explorer.  It apparently just doesn't matter.

Switching to scalar mode will gain us fp64 support in the next release,
as vec4-mode support isn't yet ready.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>

i965: Reduce the SIMD8 GS push constant threshold from 32 to 24.

Three Shadow of Mordor geometry shaders increase by a single
instruction, but the number of spills/fills in Orbital Explorer
is reduced from 194:1279 -> 82:454.  No other programs are affected.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>

i965: Delete bogus assertion in emit_gs_input_load().

This looks like leftover cruft from an earlier attempt at writing
point size hacks.  Each vertex has its own copy of gl_PointSize,
so accessing any vertex other than 0 would cause this to fail.

The tests seem to work fine without it.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>

i965: Support instanced GS inputs in the scalar backend.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>

i965: Use an early return for the push case in emit_gs_input_load().

Just trying to keep things from getting too ugly in the next commit.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>

i965: Drop BRW_NEW_BLORP from stipple and line parameter packets.

BLORP never touches these, and they're all non-pipelined.  Some
are fairly large packets as well.

I haven't tried to benchmark this; the effect is likely to be small.
However, we may as well stop the pointless papercuts; maybe they'll
add up someday.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>