Ilia Mirkin [Mon, 17 Aug 2015 06:11:55 +0000 (02:11 -0400)]
gk110/ir: fix sched calculator to consider all registers in the ISA
GK110/GK208 have 256 registers, not 64. Find out the number of registers
from the target to avoid unnecessary iteration for pre-GK110.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Timothy Arceri [Sat, 15 Aug 2015 03:29:19 +0000 (13:29 +1000)]
mesa: rename texture function now that its static
Reviewed-by: Brian Paul <brianp@vmware.com>
Tapani Pälli [Fri, 14 Aug 2015 10:36:40 +0000 (13:36 +0300)]
glsl: add missing MS sampler builtin types for GLSL ES 3.10
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Marta Lofstedt [Fri, 14 Aug 2015 11:30:45 +0000 (13:30 +0200)]
mesa: Implement glMemoryBarrierByRegion
The function glMemoryBarrierByRegion is part of OpenGL ES 3.1
and OpenGL 4.5 core and compatibility profiles.
Signed-off-by: Marta Lofstedt <marta.lofstedt@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Ilia Mirkin [Mon, 17 Aug 2015 04:53:04 +0000 (00:53 -0400)]
nvc0: program smooth line width when multisampling is enabled
There are separate line widths for smooth and aliased lines. The smooth
one is selected when multisampling is enabled even if line smoothing
isn't explicitly turned on.
Fixes the ext_framebuffer_multisample-line-smooth piglits
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ilia Mirkin [Sun, 26 Jul 2015 04:56:34 +0000 (00:56 -0400)]
nvc0: bind a fake tess control program when there isn't one available
Apparently this is necessary in order for tess factors to work in a tess
eval program without a tess control program bound. Probably because it
uses the fake program's shader header to work out the number of patch
constants.
Fixes vs-tes-tessinner-tessouter-inputs
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ilia Mirkin [Fri, 24 Jul 2015 05:25:13 +0000 (01:25 -0400)]
gm107/ir: avoid letting the lowering pass get out of sync
There's a lot of functionality duplicated in the gm107 lowering pass
from the nvc0 pass. As that one gets updated, the gm107 one falls
behind. Avoid this by sharing the code.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ilia Mirkin [Sun, 16 Aug 2015 02:05:15 +0000 (22:05 -0400)]
nv50,nvc0: take level into account when doing eng2d multi-layer blits
This fixes arb_get_texture_sub_image-get, and any situation where the 2d
engine was being used for multi-layer blits to a non-0 level.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.6" <mesa-stable@lists.freedesktop.org>
Ilia Mirkin [Sun, 16 Aug 2015 01:42:02 +0000 (21:42 -0400)]
st/mesa: also move yoffset to zoffset for 1d array textures
Do the same as in st_TexSubImage. This fixes
arb_get_texture_sub_image-get on llvmpipe when it is set to prefer
blits, and nouveau when it uses the 3d engine for blits.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Kenneth Graunke [Tue, 12 May 2015 08:12:46 +0000 (01:12 -0700)]
nir: Add a glsl_uint_type() wrapper.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Timothy Arceri <t_arceri@yahoo.com.au>
Ilia Mirkin [Sat, 8 Aug 2015 03:11:45 +0000 (23:11 -0400)]
freedreno/a3xx: add per-texture seamless cubemap control
The default is to enable seamless cubemap filtering, but there's a bit
to turn it off.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ilia Mirkin [Mon, 3 Aug 2015 06:13:33 +0000 (02:13 -0400)]
freedreno/a4xx: add cube map array support
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Rob Clark [Thu, 13 Aug 2015 17:53:43 +0000 (13:53 -0400)]
freedreno/a4xx: fix srgb render targets
Also fixes mipmap level generation for srgb textures.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Fri, 14 Aug 2015 00:38:01 +0000 (20:38 -0400)]
freedreno: update generated headers
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Vinson Lee [Fri, 14 Aug 2015 22:19:49 +0000 (15:19 -0700)]
scons: Always define __STDC_LIMIT_MACROS.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91591
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Ilia Mirkin [Fri, 14 Aug 2015 14:49:46 +0000 (10:49 -0400)]
freedreno: expose OES exts for float linear filtering
a4xx can do both float and half-float, while a3xx can only do half-float
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ilia Mirkin [Fri, 14 Aug 2015 19:58:28 +0000 (15:58 -0400)]
nvc0: disable tessellation on maxwell
The address calculations are all different (e.g. see GP), there appear
to be sync's in programs, and probably a bunch of other differences.
Just disable it for now.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Eric Anholt [Sat, 7 Feb 2015 00:24:36 +0000 (16:24 -0800)]
nir: Add support for CSE on textures.
NIR instruction count results on i965:
total instructions in shared programs:
1261954 ->
1261937 (-0.00%)
instructions in affected programs: 455 -> 438 (-3.74%)
One in yofrankie, two in tropics. Apparently i965 had also optimized all
of these out anyway.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Eric Anholt [Wed, 12 Aug 2015 00:10:35 +0000 (17:10 -0700)]
nir: Zero out texture instructions when creating them.
There are so many flags in textures, that the CSE pass would have a hard
time referencing the correct set when figuring out if two texture ops are
the same. By zeroing, we can avoid that fragility.
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Eric Anholt [Tue, 14 Apr 2015 04:36:24 +0000 (21:36 -0700)]
vc4: Move all of our fixed function fragment color handling to NIR.
This massively reduces our dependency on VC4-specific optimization passes.
shader-db:
total uniforms in shared programs: 32077 -> 32067 (-0.03%)
uniforms in affected programs: 149 -> 139 (-6.71%)
total instructions in shared programs: 98208 -> 98182 (-0.03%)
instructions in affected programs: 2154 -> 2128 (-1.21%)
Eric Anholt [Fri, 31 Jul 2015 16:02:01 +0000 (09:02 -0700)]
vc4: Add a helper for making driver-specific NIR load_uniform for GL state
In order to move more of our lowering into NIR, we need the ability to
reference various pipeline state (like texture rectangle scaling factors
or blend colors), so we just set those up as a load_uniform with a big
offset to indicate that it's not within the shader's uniform storage and
is one of our state values.
Eric Anholt [Fri, 31 Jul 2015 22:35:22 +0000 (15:35 -0700)]
nir: Don't try to scalarize unpack ops.
Avoids regressions in vc4 when trying to do our blending in NIR.
v2: Add the other unpack ops I meant to when writing the original commit
message.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Eric Anholt [Tue, 4 Aug 2015 23:25:24 +0000 (16:25 -0700)]
nir: Add a nir_opt_undef() to handle csels with undef.
We may find a cause to do more undef optimization in the future, but for
now this fixes up things after if flattening. vc4 was handling this
internally most of the time, but a GLB2.7 shader that did a conditional
discard and assign gl_FragColor in the else was still emitting some extra
code.
total instructions in shared programs: 100809 -> 100795 (-0.01%)
instructions in affected programs: 37 -> 23 (-37.84%)
v2: Use nir_instr_rewrite_src() to update def/use on src[0] (by Thomas
Helland).
v3: Make sure to flag metadata dirties, and copy the swizzle and abs/neg
over to src[0], too (by anholt).
Reviewed-by: Thomas Helland <thomashelland90@gmail.com> (v2)
Tested-by: Thomas Helland <thomashelland90@gmail.com> (v2)
Ilia Mirkin [Fri, 14 Aug 2015 18:10:36 +0000 (14:10 -0400)]
gm107/ir: indirect handle goes first on maxwell also
Fixes fs-simple-texture-size.shader_test
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.6" <mesa-stable@lists.freedesktop.org>
Ilia Mirkin [Tue, 11 Aug 2015 16:19:54 +0000 (12:19 -0400)]
nv30: add depth bounds test support for hw that has it
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ilia Mirkin [Tue, 11 Aug 2015 15:59:56 +0000 (11:59 -0400)]
nv50: add depth bounds test support
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ilia Mirkin [Tue, 11 Aug 2015 15:46:22 +0000 (11:46 -0400)]
nvc0: add depth bounds test support
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Marek Olšák [Thu, 13 Aug 2015 21:46:13 +0000 (23:46 +0200)]
docs/relnotes: document amdgpu, GL 4.1 and other new features
Marek Olšák [Thu, 16 Apr 2015 20:59:41 +0000 (22:59 +0200)]
radeonsi: add all new VI PCI IDs including Fiji
Marek Olšák [Mon, 10 Aug 2015 14:23:53 +0000 (16:23 +0200)]
radeonsi: revert a wrong DB bug workaround for VI
The bug was misunderstood. Besides that, the bug affects a DB feature we
don't use yet.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Boyuan Zhang [Wed, 8 Jul 2015 20:54:48 +0000 (16:54 -0400)]
radeon/uvd: implement HEVC support
add context buffer to fix H265 uvd decode issue.
fix H265 corruption issue caused by incorrect assigned ref_pic_list.
v2: disable interlace for HEVC
add CZ sps flag workaround
fix coding style
Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Leo Liu [Mon, 13 Jul 2015 17:36:27 +0000 (13:36 -0400)]
radeon/vce: disable VCE dual instance for harvest part
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Leo Liu [Thu, 25 Jun 2015 14:14:14 +0000 (10:14 -0400)]
radeon/vce: implement VCE dual instance support
VCE dual instances are encoding in parallel, it needs two frames for
encoding with their own parameters in one IB. Master instance will check
the task info to find another frame, assign it to the slave instance
Signed-off-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Leo Liu [Thu, 25 Jun 2015 16:12:12 +0000 (12:12 -0400)]
radeon/video: config encode stacked frame number based on HW
since VCE 3.0 with dual instances, we need stack frames for them.
Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Christian König [Mon, 15 Jun 2015 18:19:48 +0000 (20:19 +0200)]
radeon/vce: make reloc offset signed
We need a negative offset for FW 50.
Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Leo Liu [Mon, 1 Jun 2015 17:48:24 +0000 (13:48 -0400)]
radeon/vce: add config task and put task info into encoder v2
The config task has own task ID, extract the configuration functions
into config task.
v2 (chk): calculate offset automatically
Signed-off-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Leo Liu [Mon, 15 Jun 2015 19:20:20 +0000 (15:20 -0400)]
radeon/vce: fix VCE fail after rebase
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Leo Liu [Mon, 15 Jun 2015 18:11:57 +0000 (14:11 -0400)]
radeon/vce: add dual pipe support for VI
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Leo Liu [Fri, 29 May 2015 17:43:00 +0000 (13:43 -0400)]
radeon/vce: add new firmware support for VI and CI
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Leo Liu [Wed, 15 Apr 2015 16:36:32 +0000 (12:36 -0400)]
radeon/vce: implement VCE two pipe support
v2: rebase by Marek
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Leo Liu [Thu, 12 Mar 2015 20:24:57 +0000 (16:24 -0400)]
radeon/uvd: make 30M as minimum for MPEG4 dpb buffer size
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Leo Liu [Thu, 12 Mar 2015 20:13:44 +0000 (16:13 -0400)]
radeon/uvd: recalculate dbp buffer size
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Leo Liu [Mon, 9 Mar 2015 20:24:48 +0000 (16:24 -0400)]
radeon/video: add 4K support for decode/encode parameters
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Leo Liu [Mon, 15 Dec 2014 17:51:50 +0000 (12:51 -0500)]
gallium/radeon: add h264 performance HW decoder support
v2: -make tonga use new h264 performance HW decoder;
-integrate it scaling buffer to msg_fb buffer
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Thu, 10 Apr 2014 15:18:32 +0000 (17:18 +0200)]
gallium/radeon: use VM for VCE
v2: (leo) add checking for driver backend
v3: (leo) change variable name from use_amdgpu to use_vm
v4: rebase by Marek
Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Wed, 9 Apr 2014 17:41:06 +0000 (19:41 +0200)]
gallium/radeon: use VM for UVD
v2: (leo) add checking for driver backend
v3: (leo) change variable name from use_amdgpu to use_vm
v4: rebase by Marek
Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Wed, 29 Jul 2015 19:40:46 +0000 (15:40 -0400)]
radeonsi: add support for FIJI (v4)
v2: incorporate comments from Marek
v3: add missing fiji case in winsys init
use tonga raster config (double check this)
v4: rebase on harvest patch
Reviewed-by: Marek Olšák <marek.olsak@amd.com> (v3)
Reviewed-by: Christian König <christian.koenig@amd.com> (v3)
Reviewed-by: David Zhang <david1.zhang@amd.com> (v3)
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Wed, 8 Jul 2015 02:18:13 +0000 (22:18 -0400)]
winsys/amdgpu: add addrlib support for Fiji (v2)
v2: fix tonga chip check
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: David Zhang <david1.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Thu, 9 Jul 2015 02:19:55 +0000 (22:19 -0400)]
radeonsi: add harvest support for CI/VI parts (v3)
Properly calculate the PA_SC_RASTER_CONFIG[_1] settings
for harvest chips.
v2: - fix default raster config settings for CZ and KV
- Suggestions from Michel
v3: - handle multiple packers properly for CI+
- GRBM_GFX_INDEX is privileged on VI+
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> (v2)
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Marek Olšák [Sat, 27 Jun 2015 11:57:25 +0000 (13:57 +0200)]
gallium/radeon: enable the GPU load query for amdgpu
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Wed, 10 Jun 2015 15:43:24 +0000 (11:43 -0400)]
radeonsi: properly handler raster_config setup on CZ
Need to take into account the number of RBs.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Wed, 10 Jun 2015 15:39:30 +0000 (11:39 -0400)]
radeonsi: properly set the raster_config for KV
This enables the second RB on asics that support it which
should boost performance.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: mesa-stable@lists.freedesktop.org
Marek Olšák [Thu, 30 Apr 2015 15:02:38 +0000 (17:02 +0200)]
radeonsi: add amdgpu support for querying the GPU reset state
Reviewed-by: Christian König <christian.koenig@amd.com>
Marek Olšák [Thu, 16 Apr 2015 18:44:54 +0000 (20:44 +0200)]
radeonsi: add VI hardware support
Marek Olšák [Sat, 11 Jul 2015 11:22:22 +0000 (13:22 +0200)]
radeonsi: add definitions for VI status registers
Useful for debugging hangs with the read-register interface.
I checked that this adds the same register fields as the kernel driver.
Acked-by: Michel Dänzer <michel.daenzer@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Marek Olšák [Thu, 16 Apr 2015 18:12:24 +0000 (20:12 +0200)]
radeonsi: add VI register definitions
Marek Olšák [Thu, 16 Apr 2015 18:35:27 +0000 (20:35 +0200)]
radeonsi: fix DRM version checks for amdgpu DRM 3.0.0
Marek Olšák [Thu, 16 Apr 2015 17:41:33 +0000 (19:41 +0200)]
winsys/amdgpu: add addrlib - texture addressing and alignment calculator
This is an internal project that Catalyst uses and now open source will do
too.
v2: squashed these commits in:
- winsys/amdgpu: fix warnings in addrlib
- winsys/amdgpu: set PIPE_CONFIG and NUM_BANKS in tiling_flags
Marek Olšák [Thu, 16 Apr 2015 20:43:23 +0000 (22:43 +0200)]
winsys/amdgpu: add a new winsys for the new kernel driver
v2: - lots of changes according to Emil Velikov's comments
- implemented radeon_winsys::read_registers
v3: - a lot of new work, many of them adapt to libdrm interface changes
Squashed patches:
winsys/amdgpu: implement radeon_winsys context support
winsys/amdgpu: add reference counting for contexts
winsys/amdgpu: add userptr support
winsys/amdgpu: allocate IBs like normal buffers
winsys/amdgpu: add IBs to the buffer list, adapt to interface changes
winsys/amdgpu: don't use KMS handles as reloc hash keys
winsys/amdgpu: sync buffer accesses to different rings
winsys/amdgpu: use dependencies instead of waiting for last fence v2
gallium/radeon: unify buffer_wait and buffer_is_busy in the winsys interface (amdgpu part)
winsys/amdgpu: track fences per ring and be thread-safe
winsys/amdgpu: simplify waiting on a variable in amdgpu_fence_wait
gallium/radeon: allow the winsys to choose the IB size (amdgpu part)
winsys/amdgpu: switch to new amdgpu_cs_query_fence_status interface
winsys/amdgpu: handle fence and dependencies merge
winsys/amdgpu follow libdrm change to move user fence into UMD
winsys/amdgpu: use amdgpu_bo_va_op for va map/unmap v2
winsys/amdgpu: use the new tiling flags
winsys/amdgpu: switch to new GTT_USWC definition
winsys/amdgpu: expose amdgpu_cs_query_reset_state to drivers
winsys/amdgpu: fix valgrind warnings
winsys/amdgpu: don't use VRAM with APUs that don't have much of it
winsys/amdgpu: require LLVM 3.6.1 for VI because of bug fixes there
winsys/amdgpu: remove amdgpu_winsys::num_cpus
winsys/amdgpu: align BO size to page size
winsys/amdgpu: reduce BO cache timeout
winsys/amdgpu: remove useless flushing and waiting in amdgpu_bo_set_tiling
winsys/amdgpu: use amdgpu_device_handle as a unique device ID instead of fd
winsys/amdgpu: use safer access to amdgpu_fence_wait::signalled
winsys/amdgpu: allow maximum IB size of 4 MB
winsys/amdgpu: add ip_instance into amdgpu_fence
gallium/radeon: add RING_COMPUTE instead of RADEON_FLUSH_COMPUTE
winsys/amdgpu: set the ring type at CS initilization
winsys/amdgpu: query the GART page size from the kernel
winsys/amdgpu: correctly wait for shared buffers to become idle
winsys/amdgpu: set the amdgpu_cs_fence structure only once at fence creation
winsys/amdgpu: add a specific error message for cs_submit -> -ENOMEM
winsys/amdgpu: check num_active_ioctls before calling amdgpu_bo_wait_for_idle
winsys/amdgpu: clear user fence BO after allocating it
winsys/amdgpu: fix user fences
winsys/amdgpu: make amdgpu_winsys_create public
winsys/amdgpu: remove thread offloading
winsys/amdgpu: flatten the amdgpu_cs_context structure and simplify more
v4: require libdrm 2.4.63
Christian König [Wed, 29 Apr 2015 13:35:02 +0000 (15:35 +0200)]
st/vdpau: add HEVC support v2
v2: fix return code
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Leo Liu [Thu, 25 Jun 2015 17:19:56 +0000 (13:19 -0400)]
st/omx/enc: stack frame tasks for the gathering
Put tasks to the FIFO queue for results
Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Leo Liu [Fri, 29 May 2015 18:50:44 +0000 (14:50 -0400)]
st/omx/enc: flush after eos handling v2
v2 (chk): reorder the flush
Signed-off-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Tue, 28 Apr 2015 13:31:37 +0000 (15:31 +0200)]
vl: add HEVC profiles and defines
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Leo Liu [Thu, 25 Jun 2015 16:09:11 +0000 (12:09 -0400)]
vl: add cap for stacking frames
Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Marek Olšák [Wed, 12 Aug 2015 23:51:37 +0000 (01:51 +0200)]
swrast: fix EXT_depth_bounds_test
zMin and zMax can't use _DepthMaxF, because the test is done in Z32_UNORM.
Probably a useless patch given how popular swrast is nowadays, but it helped
create and validate the piglit test.
v2: add an explicit cast to GLuint
Reviewed-by: Brian Paul <brianp@vmware.com>
Marek Olšák [Mon, 10 Aug 2015 00:23:21 +0000 (02:23 +0200)]
radeonsi: add support for EXT_depth_bounds_test
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Marek Olšák [Mon, 10 Aug 2015 00:18:43 +0000 (02:18 +0200)]
st/mesa: add EXT_depth_bounds_test
Reviewed-by: Brian Paul <brianp@vmware.com>
Marek Olšák [Mon, 10 Aug 2015 00:11:48 +0000 (02:11 +0200)]
gallium: add an interface for EXT_depth_bounds_test
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Marek Olšák [Mon, 10 Aug 2015 17:53:22 +0000 (19:53 +0200)]
st/mesa: small cleanup in st_extensions.c
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Edward O'Callaghan <eocallaghan at alterapraxis.com>
Marek Olšák [Mon, 10 Aug 2015 17:37:01 +0000 (19:37 +0200)]
gallium: add support for GLES texture float extensions (v3)
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=74329
v2: add a CAP for half floats
drivers should not expose the CAPs if they don't support the formats
v3: update relnotes
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Zoltan Gilian [Tue, 7 Jul 2015 21:38:27 +0000 (23:38 +0200)]
r600,compute: setup compute sampler states and views
v2: Add compute mode flag to sampler state setup (Marek).
Drop branches which avoid reference counting (Marek).
Simplify unset branch condition (Marek).
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Michel Dänzer [Fri, 14 Aug 2015 06:16:12 +0000 (15:16 +0900)]
st/clover: Fix build against LLVM 3.8 SVN r244928
raw_svector_ostream::flush() is now unnecessary and forbidden:
CXX llvm/libclllvm_la-invocation.lo
../../../../../src/gallium/state_trackers/clover/llvm/invocation.cpp: In function 'clover::module {anonymous}::build_module_llvm(llvm::Module*, unsigned int (&)[7])':
../../../../../src/gallium/state_trackers/clover/llvm/invocation.cpp:574:29: error: use of deleted function 'void llvm::raw_svector_ostream::flush()'
bitcode_ostream.flush();
^
In file included from /home/daenzer/src/llvm-git/llvm/include/clang/Basic/VirtualFileSystem.h:22:0,
from /home/daenzer/src/llvm-git/llvm/include/clang/Basic/FileManager.h:20,
from /home/daenzer/src/llvm-git/llvm/include/clang/Basic/SourceManager.h:38,
from /home/daenzer/src/llvm-git/llvm/include/clang/Frontend/CompilerInstance.h:16,
from ../../../../../src/gallium/state_trackers/clover/llvm/invocation.cpp:25:
/home/daenzer/src/llvm-git/llvm/include/llvm/Support/raw_ostream.h:512:8: note: declared here
void flush() = delete;
^
Makefile:862: recipe for target 'llvm/libclllvm_la-invocation.lo' failed
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Tapani Pälli [Thu, 13 Aug 2015 06:30:35 +0000 (09:30 +0300)]
mesa: set correct error for non-renderable multisample textures
v2: same common error on gles31 and desktop OpenGL
(spotted by Erik Faye-Lund)
Signed-off-by: Marta Lofstedt <marta.lofstedt@linux.intel.com>
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Timothy Arceri <t_arceri@yahoo.com.au>
Ben Widawsky [Fri, 7 Aug 2015 20:58:37 +0000 (13:58 -0700)]
i965/skl: Remove early platform support
We do not want bug reports from this early stepping of SKL. Few if any were ever
shipped outside of Intel to early enabling partners, and none will be sold.
There is a functional change here. If you're using new mesa on an old
kernel/libdrm, the revid will be -1, and we'll use new SKL values instead of
early ones (a hopefully irrelevant improvement IMO).
v2: Remove hunk which warned before dying. Instead, default to normal SKL
support (Ken)
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Neil Roberts <neil@linux.intel.com>
Frank Binns [Wed, 12 Aug 2015 15:36:00 +0000 (16:36 +0100)]
egl: improve attribute checking for eglCreateContext
The EGL 1.4 spec states for eglCreateContext:
"attribute EGL_CONTEXT_CLIENT_VERSION is only valid when the current
rendering API is EGL_OPENGL_ES_API"
Additionally, if the EGL_KHR_create_context EGL extension is supported
(this is mandatory in EGL 1.5) then the EGL_CONTEXT_MAJOR_VERSION_KHR,
which is an alias for EGL_CONTEXT_CLIENT_VERSION, and
EGL_CONTEXT_MINOR_VERSION_KHR attributes are also accepted by
eglCreateContext with the extension spec stating:
"The values for attributes EGL_CONTEXT_MAJOR_VERSION_KHR and
EGL_CONTEXT_MINOR_VERSION_KHR specify the requested client API
version. They are only meaningful for OpenGL and OpenGL ES
contexts, and specifying them for other types of contexts will
generate an error."
Add the necessary checks against the extension and rendering APIs when
validating these attributes as part of eglCreateContext.
Signed-off-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
[Emil Velikov: Add newline before the spec quote (Matt)]
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Frank Binns [Wed, 12 Aug 2015 15:35:59 +0000 (16:35 +0100)]
egl: don't allow eglGetConfigs to set num_configs param to a negative value
When a buffer is provided to eglGetConfigs it's supposed to set the value
of the num_config parameter to the total number of configs that have been
copied into this buffer. For some reason the EGL spec doesn't consider it
to be an error to pass this function a buffer while specifying its size to
be less than 0. Given this, one would expect this combination to result in
the num_config parameter being set to 0 but this wasn't the case. This was
due to the buffer size being copied straight into num_configs without being
clamped to 0.
This was causing the following dEQP EGL test to fail:
dEQP-EGL.functional.query_config.get_configs.get_configs_bounds
Signed-off-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Frank Binns [Tue, 4 Aug 2015 13:32:45 +0000 (14:32 +0100)]
egl/x11: don't abort when creating a DRI2 drawable fails
When calling either eglCreateWindowSurface or eglCreatePixmapSurface it
was possible for an application to be aborted as a result of it failing
to create a DRI2 drawable on the server. This could happen due to an
application passing in an invalid native drawable handle, for example.
v2: Handle the case where an error has been set on the connection
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Frank Binns [Tue, 4 Aug 2015 13:32:44 +0000 (14:32 +0100)]
egl/x11: set EGL_BAD_NATIVE_(PIXMAP|WINDOW) for invalid pixmaps/windows
Both eglCreatePixmapSurface and eglCreateWindowSurface were incorrectly
setting the EGL error to be EGL_BAD_ALLOC when an invalid native drawable
handle was being passed in. The EGL spec states the following for
eglCreatePixmapSurface:
"If pixmap is not a valid native pixmap handle, then an EGL_BAD_-
NATIVE_PIXMAP error should be generated."
(eglCreateWindowSurface has similar text)
Correctly set the EGL error value based on xcb_get_geometry_reply returning
an error structure containing something other than BadAlloc.
v2: Check for BadAlloc error and update commit message to reflect this
Signed-off-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Frank Binns [Tue, 4 Aug 2015 13:32:43 +0000 (14:32 +0100)]
egl/x11: fix use of EGL_BAD_NATIVE_WINDOW
Commit
4ed23fd590 introduced some calls to _eglError inappropriately
passing it EGL_BAD_NATIVE_WINDOW. This was actually harmless in two of the
cases as _eglError gets called later on with a more appropriate error code
but (just to be safe) switch these to _eglLog calls instead.
The final case is a little trickier as it actually needs to set an error
of which the following are available (according to the EGL spec):
EGL_BAD_MATCH, EGL_BAD_CONFIG, EGL_BAD_NATIVE_(PIXMAP|WINDOW) and
EGL_BAD_ALLOC.
Of these, EGL_BAD_ALLOC seems to be the most appropriate given that
failure can occur either as a result of xcb_get_setup failing due to an
earlier error on the connection (where the most commonly occurring error
code is XCB_CONN_CLOSED_MEM_INSUFFICIENT) or as a result of the
xcb_screen_iterator_t 'rem' field being 0.
In addition to this, commit
af2aea40d2 unconditionally set the error to
EGL_BAD_NATIVE_WINDOW when creating a window or pixmap surface with a NULL
native handle. Change this to correctly set the error based on surface
type.
v2: Updated patch description (Emil Velikov)
Return EGL_BAD_NATIVE_PIXMAP when eglCreatePixmapSurface is called
with a NULL native pixmap handle
Signed-off-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Timothy Arceri [Thu, 13 Aug 2015 08:42:54 +0000 (18:42 +1000)]
mesa: remove extern from texture function
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Timothy Arceri [Wed, 12 Aug 2015 07:01:52 +0000 (17:01 +1000)]
glsl: make linker error message more informative
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Topi Pohjolainen [Thu, 25 Jun 2015 11:00:41 +0000 (14:00 +0300)]
i965: Stop aux data compare preventing program binary re-use
Items in the program cache consist of three things: key, the data
representing the instructions and auxiliary data representing
uniform storage. The data consisting of instructions is stored into
a drm buffer object while the key and the auxiliary data reside in
malloced section. Now the cache uploading is equipped with a check
that iterates over existing items and seeks to find a another item
using identical instruction data than the one being just uploaded.
If such is found there is no need to add another section into the
drm buffer object holding identical copy of the existing one. The
item just being uploaded should instead simply point to the same
offset in the underlying drm buffer object.
Unfortunately the check for the matching instruction data is
coupled with a check for matching auxiliary data also. This
effectively prevents the cache from ever containing two items
that could share a section in the drm buffer object.
The constraint for the instruction data and auxiliary data to
match is, fortunately, unnecessary strong. When items are stored
into the cache they will anyway contain their own copy of the
auxiliary data (even if they matched - which they in real world
never will). The only thing the items would be sharing is the
instruction data and hence we should only check for that to match
and nothing else.
No piglit regression in jenkins.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Topi Pohjolainen [Thu, 25 Jun 2015 11:35:26 +0000 (14:35 +0300)]
i965: Only write program to cache when it doesn't exist yet
Current logic re-writes the same data when existing data is found.
Not that this actually matters at the moment in practice, the
contraint for finding matching data is too severe to ever allow
data to be shared between two items in the cache.
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Topi Pohjolainen [Thu, 25 Jun 2015 11:31:03 +0000 (14:31 +0300)]
i965: Rename brw_upload_item_data to brw_alloc_item_data
and simplify the interface to take directly the size and to return
the offset. The routine does nothing more than allocate, it doesn't
upload anything.
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Tapani Pälli [Wed, 12 Aug 2015 08:13:40 +0000 (11:13 +0300)]
mesa: update MaxShaderStorageBlockSize to 2^27
Extension spec originally required 2^24 but 2^27 is the minimum value
required by OpenGL 4.5 and OpenGL ES 3.1 specifications.
Fixes:
ES31-CTS.shader_storage_buffer_object.basic-max
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Timothy Arceri <t_arceri@yahoo.com.au>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Tapani Pälli [Mon, 3 Aug 2015 07:46:33 +0000 (10:46 +0300)]
mesa: fix name returned for XFB varyings
_mesa_get_program_resource_name has logic to append '[0]' in name
if variable is an array, this should be skipped for XFB varyings
that have array index already appended.
v2: fix comment, change also GL_NAME_LENGTH query to match
the behaviour
Fixes:
ES31-CTS.program_interface_query.transform-feedback-types
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Martin Peres <martin.peres@linux.intel.com>
Edward O'Callaghan [Wed, 29 Jul 2015 11:49:45 +0000 (21:49 +1000)]
mesa: Fix printf format specifier warn of the ptrdiff_t
See §7.19.6.1, paragraph 7 of the ISO C specification.
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Marek Olšák [Tue, 11 Aug 2015 19:37:59 +0000 (21:37 +0200)]
r600g: allow setting geometry shader sampler states
We were ignoring them. This is both hilarious and sad.
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Edward O'Callaghan <eocallaghan at alterapraxis.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Marek Olšák [Tue, 11 Aug 2015 20:36:51 +0000 (22:36 +0200)]
r600g: fix polygon offset scale
The value was copied from r300g, which uses 1/12 subpixels, but this hw
uses 1/16 subpixels.
Should fix piglit: gl-1.4-polygon-offset (formerly a glean test)
(untested, ported from radeonsi)
Reviewed-by: Edward O'Callaghan <eocallaghan at alterapraxis.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Cc: mesa-stable@lists.freedesktop.org
Marek Olšák [Tue, 11 Aug 2015 20:36:51 +0000 (22:36 +0200)]
radeonsi: fix polygon offset scale
The value was copied from r300g, which uses 1/12 subpixels, but this hw
uses 1/16 subpixels.
Fixes piglit: gl-1.4-polygon-offset (formerly a glean test)
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Cc: mesa-stable@lists.freedesktop.org
Marek Olšák [Mon, 10 Aug 2015 00:28:01 +0000 (02:28 +0200)]
radeonsi: enable VS_OUT_MISC_SIDE_BUS_ENA
This is recommended for better performance.
Diag tests always enable this.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Marek Olšák [Sun, 9 Aug 2015 23:50:11 +0000 (01:50 +0200)]
radeonsi: add support for gl_PrimitiveID in the fragment shader
It must be obtained from the VS.
The GS scenario A must be enabled for PrimID to be generated for the VS.
+ 4 piglits
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Marek Olšák [Sun, 9 Aug 2015 22:52:21 +0000 (00:52 +0200)]
radeonsi: move VGT_GS_MODE to the VS state
The VS will want to select GS scenario A here (VS with PrimitiveID).
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Rob Clark [Wed, 12 Aug 2015 15:39:24 +0000 (11:39 -0400)]
freedreno/a4xx: format updates
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Tue, 11 Aug 2015 20:47:16 +0000 (16:47 -0400)]
freedreno/a3xx+a4xx: add texture buffer object support
Basic texture buffer support. Should be straightforward to add first/
last_element support. And with a bit of work in ir3 emulate larger
texture buffer sizes. But this seems to be enough for stk gl31 render
paths.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Tue, 11 Aug 2015 20:33:14 +0000 (16:33 -0400)]
ttn: add buffer texture type
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Tue, 11 Aug 2015 20:11:04 +0000 (16:11 -0400)]
freedreno/ir3: 'keeps' need neighbors found too
This shows up with a glamor shader, which does a TXF and uses the result
for conditional kill. Before we wouldn't group the fanin (collect)
neighbors which need to be allocated adjacently at RA, resulting in
badness.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Tue, 11 Aug 2015 20:09:48 +0000 (16:09 -0400)]
freedreno/ir3/print: print left/right neighbors too
When debugging compiler, this is useful to see.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Tue, 11 Aug 2015 15:47:46 +0000 (11:47 -0400)]
freedreno/ir3: use nir pass to lower const to scalar
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Tue, 11 Aug 2015 12:48:34 +0000 (08:48 -0400)]
freedreno/a4xx: point-size and spritelist fixes
a4xx needs similar treatment as
995f55a6
Also fixup a few point-size and vpsrepl issues and drop fix_blit_fp()
hack previously needed for mem2gmem.
Signed-off-by: Rob Clark <robclark@freedesktop.org>