mesa.git
10 years agowinsys/radeon: move radeon_cs_dump.h to drm
Emil Velikov [Fri, 15 Aug 2014 22:07:01 +0000 (23:07 +0100)]
winsys/radeon: move radeon_cs_dump.h to drm

... to ease packaging (make dist).
Update it to fetch libdrm's include/libs via pkg-config.

Cc: Marek Olšák <marek.olsak@amd.com>
Cc: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
10 years agogallium/radeon: cleanup header inclusion
Emil Velikov [Sat, 16 Aug 2014 16:58:25 +0000 (17:58 +0100)]
gallium/radeon: cleanup header inclusion

 - Add top_srcdir/src/gallium/winsys to GALLIUM_DRIVER_C{XXFLAGS}.
 - Remove top_srcdir/src/gallium/drivers/radeon from the includes.

As a result:
 - Common radeon headers are prefixed with 'radeon/'
 - Winsys header inclusion is prefixed 'radeon/drm'

Cc: Marek Olšák <marek.olsak@amd.com>
Cc: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
10 years agowinsys/svga: build: cleanup the includes
Emil Velikov [Sat, 16 Aug 2014 19:37:30 +0000 (20:37 +0100)]
winsys/svga: build: cleanup the includes

gallium/drivers is already part fo GALLIUM_WINSYS_CFLAGS.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
10 years agowinsys/i915: remove the software winsys
Emil Velikov [Sat, 16 Aug 2014 18:49:28 +0000 (19:49 +0100)]
winsys/i915: remove the software winsys

We stopped building it recently as it was unused and not tested.
Good bye, it's been nice knowing you :)

Cc: Stephane Marchesin <stephane.marchesin@gmail.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Acked-by: Stephane Marchesin <stephane.marchesin@gmail.com>
10 years agogallium/ilo: cleanup intel_winsys.h
Emil Velikov [Sat, 16 Aug 2014 18:34:10 +0000 (19:34 +0100)]
gallium/ilo: cleanup intel_winsys.h

Make the header location, inclusion and contents more common with
its i915,r* and nouveau counterparts:

 - Move the header within drivers/ilo.
 - Separate out intel_winsys_create_for_fd into 'drm_public' header.
 - Cleanup the compiler includes.

v2: Move the header to drivers/ilo. Suggested by Chia-I.
v3: Correct intel_winsys.h inclusion. Spotted by Chia-I.

Cc: Chia-I Wu <olvaffe@gmail.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
10 years agodocs: mark GL_MAX_VERTEX_ATTRIB_STRIDE as done
Timothy Arceri [Thu, 14 Aug 2014 21:45:50 +0000 (07:45 +1000)]
docs: mark GL_MAX_VERTEX_ATTRIB_STRIDE as done

Signed-off-by: Timothy Arceri <t_arceri@yahoo.com.au>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
10 years agogallium: add cap for MAX_VERTEX_ATTRIB_STRIDE
Timothy Arceri [Wed, 20 Aug 2014 07:09:58 +0000 (21:09 -1000)]
gallium: add cap for MAX_VERTEX_ATTRIB_STRIDE

Signed-off-by: Timothy Arceri <t_arceri@yahoo.com.au>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
10 years agomesa: implement GL_MAX_VERTEX_ATTRIB_STRIDE
Timothy Arceri [Thu, 14 Aug 2014 14:16:09 +0000 (00:16 +1000)]
mesa: implement GL_MAX_VERTEX_ATTRIB_STRIDE

V2: moved test for the VertexAttrib*Pointer() functions
 to update_array(), and made constant available for drivers to set

Signed-off-by: Timothy Arceri <t_arceri@yahoo.com.au>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
10 years agost/clover: Fix build against LLVM SVN >= r216583
Michel Dänzer [Thu, 28 Aug 2014 03:05:21 +0000 (12:05 +0900)]
st/clover: Fix build against LLVM SVN >= r216583

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
10 years agodraw: fix base instance handling in llvm path
Roland Scheidegger [Mon, 25 Aug 2014 20:05:16 +0000 (22:05 +0200)]
draw: fix base instance handling in llvm path

The base instance needs to be passed to the jited function, otherwise the
instanced data fetch will only work with the same start instance when the
jit function was created (and baking that into the key instead is not a viable
option).
This fixes piglit arb_base_instance-drawarrays (modulo some unrelated
core/compat context trouble I get for the test).
And fix the pipe cap bit in llvmpipe for it now that it actually works (it
already worked for softpipe).

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
10 years agodocs: fix up status of softpipe, llvmpipe
Roland Scheidegger [Mon, 25 Aug 2014 16:21:53 +0000 (18:21 +0200)]
docs: fix up status of softpipe, llvmpipe

The docs were never really up to date for them, missing just about everything.
So mark them off as all done for GL 3.3 (though softpipe is in fact quite
broken for some newer things especially wrt texturing, and both don't have
compliant, real msaa support). And add the extensions missing too (no
guarantee of completeness).

Reviewed-by: Dave Airlie <airlied@gmail.com>
10 years agoglsl: Add strings.h on non-MSC platforms
Alexander von Gluck IV [Wed, 27 Aug 2014 20:37:46 +0000 (20:37 +0000)]
glsl: Add strings.h on non-MSC platforms

* IEEE Std 1003.1-2001 placed strcasecmp() in strings.h.
* ISO C99 doesn't mention strcase* in string.h
* On all platforms I could find, strcasecmp is in strings.h and string.h
  as a compatibility layer for software written pre-2001 POSIX
* Technically strcasecmp should be only in strings.h and the man
  pages back this up.
* Tested build on CentOS and Haiku

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
10 years agoradeon/uvd: remove comment about RV770
Alex Deucher [Wed, 27 Aug 2014 03:08:07 +0000 (23:08 -0400)]
radeon/uvd: remove comment about RV770

It doesn't seem to support field based decode after testing.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
10 years agoradeon/uvd: fix field handling on R6XX style UVD
Christian König [Sun, 24 Aug 2014 10:22:08 +0000 (12:22 +0200)]
radeon/uvd: fix field handling on R6XX style UVD

The first UVD generation can only do frame based output.

Signed-off-by: Christian König <christian.koenig@amd.com>
10 years agovl/compositor: set the scissor before clearing the render target
Christian König [Wed, 13 Aug 2014 19:01:33 +0000 (21:01 +0200)]
vl/compositor: set the scissor before clearing the render target

Otherwise we clear areas that shouldn't be cleared.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
10 years agost/vdpau: fix vlVdpOutputSurfaceRender(Output|Bitmap)Surface
Christian König [Wed, 13 Aug 2014 18:21:06 +0000 (20:21 +0200)]
st/vdpau: fix vlVdpOutputSurfaceRender(Output|Bitmap)Surface

Correctly handle that the source_surface is only optional.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=80561

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
10 years agoilo: use genhw command opcodes
Chia-I Wu [Thu, 21 Aug 2014 04:51:08 +0000 (12:51 +0800)]
ilo: use genhw command opcodes

Replace ILO_GPE_MI and ILO_GPE_CMD with magic values by descriptive genhw
macros.

10 years agoilo: rename intel_bo_map_unsynchronized()
Chia-I Wu [Tue, 26 Aug 2014 05:41:11 +0000 (13:41 +0800)]
ilo: rename intel_bo_map_unsynchronized()

Rename it to intel_bo_map_gtt_async().

10 years agoilo: remove max_batch_size
Chia-I Wu [Tue, 26 Aug 2014 05:31:29 +0000 (13:31 +0800)]
ilo: remove max_batch_size

It is used to derive an artificial limit on max relocs per bo.  We choose not
to export it anymore.

10 years agoilo: replace domains by reloc flags
Chia-I Wu [Tue, 26 Aug 2014 04:36:33 +0000 (12:36 +0800)]
ilo: replace domains by reloc flags

It is simpler and is supported by the kernel.  It cannot be used with
libdrm_intel yet though.

10 years agodocs: Update who is working on tessellation
Chris Forbes [Mon, 25 Aug 2014 19:51:11 +0000 (07:51 +1200)]
docs: Update who is working on tessellation

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
10 years agoglsl: Remove bogus "OUPTUT" token
Chris Forbes [Fri, 22 Aug 2014 08:59:42 +0000 (20:59 +1200)]
glsl: Remove bogus "OUPTUT" token

This is never used. There is another token "OUTPUT" which the lexer can
generate, though. This has been around since the dawn of time; is most
likely a typo.

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
10 years agoradeonsi: handle PIPE_BIND_BLENDABLE
Marek Olšák [Sat, 23 Aug 2014 09:19:29 +0000 (11:19 +0200)]
radeonsi: handle PIPE_BIND_BLENDABLE

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
10 years agor600g: only set PIPE_BIND_BLENDABLE if colorbuffer rendering is supported
Marek Olšák [Sat, 23 Aug 2014 09:18:43 +0000 (11:18 +0200)]
r600g: only set PIPE_BIND_BLENDABLE if colorbuffer rendering is supported

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
10 years agor300g: handle PIPE_BIND_BLENDABLE
Marek Olšák [Fri, 22 Aug 2014 17:49:00 +0000 (19:49 +0200)]
r300g: handle PIPE_BIND_BLENDABLE

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
10 years agovc4: Stop doing qpu_inst(add, NOP) or qpu_inst(NOP, mul).
Eric Anholt [Mon, 25 Aug 2014 00:58:24 +0000 (17:58 -0700)]
vc4: Stop doing qpu_inst(add, NOP) or qpu_inst(NOP, mul).

Now that the extra WADDR is set, we can knock this off.  Saves a lot of
typing, and makes this code much more legible.

10 years agovc4: Set the other WADDR in the qpu instruction helpers.
Eric Anholt [Mon, 25 Aug 2014 00:53:00 +0000 (17:53 -0700)]
vc4: Set the other WADDR in the qpu instruction helpers.

Now you don't need to qpu_inst() your instruction with a NOP to get the
other waddr set.

10 years agovc4: Merge qpu_a_NOP() and qpu_m_NOP to a single qpu_NOP() helper.
Eric Anholt [Mon, 25 Aug 2014 00:47:02 +0000 (17:47 -0700)]
vc4: Merge qpu_a_NOP() and qpu_m_NOP to a single qpu_NOP() helper.

Now that qpu_inst() ignores the WADDR from the other half of the
instruction, we can set both the ADD and MUL WADDRs in the NOP helper.
Thanks to that, we also no longer need to qpu_inst(NOP, NOP).

10 years agovc4: Ignore WADDRs from the other half of the instruction when merging.
Eric Anholt [Mon, 25 Aug 2014 00:43:02 +0000 (17:43 -0700)]
vc4: Ignore WADDRs from the other half of the instruction when merging.

This allows setting the opposite-side WADDR to NOP (a non-zero value) in
qpu_* helpers, so that we don't need to qpu_inst() merge them with NOPs
all the time just to get the waddr set.

10 years agovc4: Fix LT/GE set-0-or-1 compares.
Eric Anholt [Sun, 24 Aug 2014 21:41:06 +0000 (14:41 -0700)]
vc4: Fix LT/GE set-0-or-1 compares.

We were using the integer sub, which worked for the common case of EQ and
NE.  Fixes fs-lessThan-ivec2-ivec2 and other tests.

10 years agou_vbuf: Add a few more format fallbacks.
Eric Anholt [Fri, 22 Aug 2014 17:50:15 +0000 (10:50 -0700)]
u_vbuf: Add a few more format fallbacks.

Fixes piglit draw-vertices and gl-2.0-vertexattribpointer on vc4, where
I'm only advertising R32F to RGBA32F support so far.

Note: regresses gl-1.5-normal3b3s-invariance due to introduced flushes and
missing depth buffer load/store support in the driver.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
10 years agou_vbuf: Simplify the format fallback translation.
Eric Anholt [Fri, 22 Aug 2014 17:34:55 +0000 (10:34 -0700)]
u_vbuf: Simplify the format fallback translation.

Individual caps made supporting new fallbacks more complicated than it
needed to be.  Instead, just make a table of fallbacks at context init
time.

v2: Fix inverted "do we need to install vbuf?" flagging caught by Marek.

Reviewed-by: Marek Olšák <marek.olsak@amd.com> (v2)
10 years agofreedreno/a2xx: fix segfault
Rob Clark [Sun, 24 Aug 2014 17:06:37 +0000 (13:06 -0400)]
freedreno/a2xx: fix segfault

Signed-off-by: Rob Clark <robclark@freedesktop.org>
10 years agofreedreno/a3xx: handle first/last level properly
Rob Clark [Sat, 23 Aug 2014 15:35:31 +0000 (11:35 -0400)]
freedreno/a3xx: handle first/last level properly

Fixes some assumptions about first_level being zero.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
10 years agofreedreno: implement pipe_flush_resource()
Rob Clark [Sat, 23 Aug 2014 13:33:50 +0000 (09:33 -0400)]
freedreno: implement pipe_flush_resource()

Signed-off-by: Rob Clark <robclark@freedesktop.org>
10 years agofreedreno: don't ignore src/dst level
Rob Clark [Fri, 22 Aug 2014 22:33:15 +0000 (18:33 -0400)]
freedreno: don't ignore src/dst level

Don't ignore src/dst_level in pipe_copy_region.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
10 years agovc4: Fix save/restore of the VS/FS in the blitter.
Eric Anholt [Fri, 22 Aug 2014 23:49:02 +0000 (16:49 -0700)]
vc4: Fix save/restore of the VS/FS in the blitter.

When I made the shader cache take the .fs member and moved the binding
point to .bind_fs, I failed to update these.  Fixes crashes in
copyteximage-related tests.

10 years agovc4: Clear padding of ioctl arguments.
Eric Anholt [Fri, 22 Aug 2014 23:36:29 +0000 (16:36 -0700)]
vc4: Clear padding of ioctl arguments.

Fixes valgrind complaints from valgrind being unaware of our ioctls.

10 years agoauxilary/os: Add Solaris support in os_get_total_physical_memory.
Vinson Lee [Fri, 22 Aug 2014 17:18:40 +0000 (10:18 -0700)]
auxilary/os: Add Solaris support in os_get_total_physical_memory.

The patch fixes the build on Oracle Solaris.

  CC     os/os_misc.lo
"os/os_misc.c", line 59: #error: unexpected platform in os_sysinfo.c

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
10 years agogallium/targets: Haiku, Fix some improper type warnings
Alexander von Gluck IV [Thu, 21 Aug 2014 20:00:59 +0000 (20:00 +0000)]
gallium/targets: Haiku, Fix some improper type warnings

10 years agogallium/targets: Clean up Haiku softpipe renderer visual
Alexander von Gluck IV [Thu, 21 Aug 2014 19:53:02 +0000 (19:53 +0000)]
gallium/targets: Clean up Haiku softpipe renderer visual

* Drop creating gl_config first as it's only really used
  to create the state tracker visual.

10 years agoglcpp: Don't use alternation in the lookahead for empty pragmas.
Carl Worth [Mon, 18 Aug 2014 18:36:12 +0000 (11:36 -0700)]
glcpp: Don't use alternation in the lookahead for empty pragmas.

We've found that there's a buffer overrun bug in flex that's triggered by
using alternation in a lookahead pattern.

Fortunately, we don't need to match the exact {NEWLINE} expression to
detect an empty pragma. It suffices to verify that there are no non-space
characters before any newline character. So we can use a simple [\r\n] to
get the desired behavior while avoiding the flex bug.

Fixes the regression of piglit's 17000-consecutive-chars-identifier test,
(which has been crashing since commit
04e40fd337a244ee77ef9553985e9398ff0344af ).

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82472
Signed-off-by: Carl Worth <cworth@cworth.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
CC: <mesa-stable@lists.freedesktop.org>
10 years agoi965: Disable try_emit_b2f_of_compare on Gen4-6.
Kenneth Graunke [Sat, 16 Aug 2014 22:18:21 +0000 (15:18 -0700)]
i965: Disable try_emit_b2f_of_compare on Gen4-6.

The optimization relies on CMP setting the destination to 0, which is
equivalent to 0.0f.  However, early platforms only set the least
significant byte, leaving the other bits undefined.  So, we must disable
the optimization on those platforms.

Oddly, Sandybridge wasn't reported as broken.  The PRM states that it
only sets the LSB, but the internal documentation says that it follows
the IVB behavior.  Since it wasn't reported as broken, we believe it
really does follow the IVB behavior.

v2: Allow the optimization on Sandybridge (requested by Matt).

+32 piglits on Ironlake.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?=79963
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Matt Turner <mattst88@gmail.com>
10 years agoi965/fs: Preserve CFG in predicated break pass.
Matt Turner [Thu, 17 Jul 2014 17:50:31 +0000 (10:50 -0700)]
i965/fs: Preserve CFG in predicated break pass.

Operating on this code,

B0: ...
    cmp.ne.f0(8)
    (+f0) if(8)
B1: break(8)
B2: endif(8)

We can delete B2 without attempting to merge any blocks, since the
break/continue instruction necessarily ends the previous block.

After deleting the if instruction, we attempt to merge blocks B0 and B1.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
10 years agoi965/fs: Rename variable in predicated break pass.
Matt Turner [Thu, 17 Jul 2014 18:14:02 +0000 (11:14 -0700)]
i965/fs: Rename variable in predicated break pass.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
10 years agoi965/fs: Preserve CFG in the SEL peephole.
Matt Turner [Thu, 17 Jul 2014 04:51:19 +0000 (21:51 -0700)]
i965/fs: Preserve CFG in the SEL peephole.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
10 years agoi965: Preserve CFG when deleting dead control flow.
Matt Turner [Wed, 16 Jul 2014 22:29:41 +0000 (15:29 -0700)]
i965: Preserve CFG when deleting dead control flow.

This pass deletes an IF/ELSE/ENDIF or IF/ENDIF sequence, or the ELSE in
an ELSE/ENDIF sequence.

In the typical case (where IF and ENDIF) aren't the only instructions in
their basic blocks, we can simply remove the instructions (implicitly
deleting the block containing only the ELSE), and attempt to merge
blocks B0 and B2 together.

B0: ...
    (+f0) if(8)
B1: else(8)
B2: endif(8)
    ...

If the IF or ENDIF instructions are the only instructions in their
respective basic blocks (which are deleted by the removal of the
instructions), we'll want to instead merge the next blocks.

Both B0 and B2 are possibly removed by the removal of if & endif.
Same situation for if/endif. E.g., in the following example we'd remove
blocks B1 and B2, and then attempt to combine B0 and B3.

B0: ...
B1: (+f0) if(8)
B2: endif(8)
B3: ...

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
10 years agoi965/cfg: Add functions to combine basic blocks.
Matt Turner [Tue, 15 Jul 2014 21:51:43 +0000 (14:51 -0700)]
i965/cfg: Add functions to combine basic blocks.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
10 years agoi965/cfg: Point to bblock_t containing associated control flow
Matt Turner [Wed, 16 Jul 2014 22:20:15 +0000 (15:20 -0700)]
i965/cfg: Point to bblock_t containing associated control flow

... rather than pointing directly to the associated instruction. This
will let us set the block containing the IF statement's else-pointer to
NULL, when we delete a useless ELSE instruction, as in the case

   (+f0) if(8)
   ...
   else(8)
   endif(8)

Also, remove the pointer to the ENDIF, since it's unused, and it was
also potentially wrong, in the case of a basic block containing both an
ENDIF and an IF instruction:

   endif(8)
   cmp.ne.f0(8) ...
   (+f0) if(8)

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
10 years agoi965/fs: Preserve CFG in register allocation.
Matt Turner [Tue, 15 Jul 2014 18:45:20 +0000 (11:45 -0700)]
i965/fs: Preserve CFG in register allocation.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
10 years agoi965: Use basic-block aware insertion/removal functions.
Matt Turner [Sun, 13 Jul 2014 04:18:39 +0000 (21:18 -0700)]
i965: Use basic-block aware insertion/removal functions.

To avoid invalidating and recreating the control flow graph. Also stop
invalidating the CFG in places we didn't add or remove an instruction.

cfg calculations:     202951 -> 80307 (-60.43%)

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
10 years agoi965: Add invalidate_cfg parameter to invalidate_live_intervals().
Matt Turner [Sun, 13 Jul 2014 00:49:32 +0000 (17:49 -0700)]
i965: Add invalidate_cfg parameter to invalidate_live_intervals().

Will let us avoid invalidating the CFG if the optimization pass has
removed instructions using the new basic block methods.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
10 years agoi965: Add basic-block aware backend_instruction::insert_* methods.
Matt Turner [Sun, 13 Jul 2014 04:18:08 +0000 (21:18 -0700)]
i965: Add basic-block aware backend_instruction::insert_* methods.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
10 years agoi965: Add a basic-block aware backend_instruction::remove method.
Matt Turner [Sun, 13 Jul 2014 04:16:34 +0000 (21:16 -0700)]
i965: Add a basic-block aware backend_instruction::remove method.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
10 years agoi965/cfg: Add a function to remove a block from the cfg.
Matt Turner [Mon, 14 Jul 2014 05:17:50 +0000 (22:17 -0700)]
i965/cfg: Add a function to remove a block from the cfg.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
10 years agoi965/cfg: Add functions to test if a block is a successor/predecessor.
Matt Turner [Wed, 16 Jul 2014 19:14:41 +0000 (12:14 -0700)]
i965/cfg: Add functions to test if a block is a successor/predecessor.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
10 years agovc4: Add support for fragment discards.
Eric Anholt [Thu, 21 Aug 2014 20:12:19 +0000 (13:12 -0700)]
vc4: Add support for fragment discards.

Fixes piglit glsl-fs-discard-01 and -03, and allows a lot of mesa demos to
start running.  glsl-fs-discard-02 has a problem where the first tile is
not getting stored on the first render.

10 years agovc4: Make some helpers for setting condition codes in instructions.
Eric Anholt [Thu, 21 Aug 2014 20:17:58 +0000 (13:17 -0700)]
vc4: Make some helpers for setting condition codes in instructions.

10 years agovc4: Avoid using undefined values when there's no color write.
Eric Anholt [Thu, 21 Aug 2014 19:47:14 +0000 (12:47 -0700)]
vc4: Avoid using undefined values when there's no color write.

The simulator assertion fails when you read-before-write a temporary
value, and there's no point in doing the packing if there was no color
written.

10 years agovc4: Emit the scoreboard wait just when it's needed.
Eric Anholt [Wed, 20 Aug 2014 21:51:08 +0000 (14:51 -0700)]
vc4: Emit the scoreboard wait just when it's needed.

This should improve performance on real hardware by allowing more shader
instances to run in parallel.  It also fixes assertion failures in tests
that don't emit a fragment color, since otherwise we didn't have enough
instructions to fit our signals in.

10 years agovc4: Fix FLR for integer values less than 0.
Eric Anholt [Wed, 20 Aug 2014 21:44:36 +0000 (14:44 -0700)]
vc4: Fix FLR for integer values less than 0.

If we didn't truncate at all, then we don't need to fix for truncation
happening in the wrong direction.

Fixes piglit builtin-functions/*-floor-*

10 years agovc4: Fix totally broken assertions about inter-instruction reg conflicts.
Eric Anholt [Wed, 20 Aug 2014 21:20:17 +0000 (14:20 -0700)]
vc4: Fix totally broken assertions about inter-instruction reg conflicts.

The spec citation talked about A and B, and I proceeded to pay no
attention to whether the waddrs were for A or B.  As a result, this pair
of instructions would claim to conflict:

mov ra4, ra4 ; nop nop, r0, r0
mov.ns ra4, rb4 ; nop nop, r0, r0

10 years agovc4: Add support for all the texture and FBO formats we can.
Eric Anholt [Wed, 20 Aug 2014 06:14:51 +0000 (23:14 -0700)]
vc4: Add support for all the texture and FBO formats we can.

Now that tiling is in place, we can expose the other formats.  Depth is
still broken (need to make changes in the shader), but if you don't expose
it things crash all over.  SNORM is dropped, but we could re-add it later
with some shader fixes to handle converting between [0,1] and [-1,1].

10 years agovc4: Add support for texture tiling.
Eric Anholt [Tue, 19 Aug 2014 16:40:37 +0000 (09:40 -0700)]
vc4: Add support for texture tiling.

This still treats everything as RGBA8888 for the most part, same as
before.  This is a prerequisite for handling other texture formats, since
only RGBA8888 has a raster-layout mode.

10 years agovc4: Fix a typo in the validation for miplevels.
Eric Anholt [Wed, 20 Aug 2014 17:59:38 +0000 (10:59 -0700)]
vc4: Fix a typo in the validation for miplevels.

It meant that LUMALPHA was being marked as *many* miplevels, and
unsurprisingly wouldn't validate.  On the other hand, some miplevel counts
wouldn't get the small mips validated at all.

10 years agovc4: Convert to using an enum for texture data types
Eric Anholt [Tue, 19 Aug 2014 16:47:20 +0000 (09:47 -0700)]
vc4: Convert to using an enum for texture data types

10 years agovc4: Stop complaining about unknown texture channel types.
Eric Anholt [Wed, 20 Aug 2014 16:31:26 +0000 (09:31 -0700)]
vc4: Stop complaining about unknown texture channel types.

It doesn't matter to this code -- the sampler always returns 8-bit unorm
rgba.

10 years agovc4: Include stdio/stdlib in headers so I don't have to include it per file.
Eric Anholt [Tue, 19 Aug 2014 17:34:15 +0000 (10:34 -0700)]
vc4: Include stdio/stdlib in headers so I don't have to include it per file.

There are a few tools I want to have always available, and fprintf() and
abort() are among them.

10 years agoi965: Fix JIP/UIP calculations.
Matt Turner [Fri, 22 Aug 2014 06:02:49 +0000 (23:02 -0700)]
i965: Fix JIP/UIP calculations.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82846
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82929

10 years agost/clover: Change platform name from Default to Clover
Aaron Watry [Thu, 21 Aug 2014 19:50:51 +0000 (14:50 -0500)]
st/clover: Change platform name from Default to Clover

Signed-off-by: Aaron Watry <awatry at gmail.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
10 years agodri/radeon: nuke the remaining references to sarea
Emil Velikov [Wed, 20 Aug 2014 19:52:07 +0000 (20:52 +0100)]
dri/radeon: nuke the remaining references to sarea

Remainder of the dri1 times.

Cc: Marek Olšák <marek.olsak@amd.com>
Cc: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
10 years agodri/radeon: cleanup the radeon_context vtbl
Emil Velikov [Wed, 20 Aug 2014 18:51:30 +0000 (19:51 +0100)]
dri/radeon: cleanup the radeon_context vtbl

Remove the set-but-unused, and set-but-empty vtable entries.
Most likely a leftover from the dri1 days.

Cc: Marek Olšák <marek.olsak@amd.com>
Cc: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
10 years agoinclude: move sarea.h next to it's only user
Emil Velikov [Wed, 20 Aug 2014 18:29:42 +0000 (19:29 +0100)]
include: move sarea.h next to it's only user

The header is used by DRI1 drivers, which we've removed a while
back. Now only the dri1 loader in libGL is using it, so let's
move it in src/glx, and prefix it accordingly.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
10 years agodri/radeon: drop obsolete radeon_{dri,macros}.h headers
Emil Velikov [Sat, 22 Mar 2014 12:01:52 +0000 (12:01 +0000)]
dri/radeon: drop obsolete radeon_{dri,macros}.h headers

Both have been unused for at least a couple of years.
For example the last user of radeon_macros.h was removed with

commit 8c11f0a88300f7bc3f05a12789c781ba0f4b3cc6
Author: Eric Anholt <eric@anholt.net>
Date:   Fri Oct 14 13:27:02 2011 -0700

    radeon: Drop the legacy BO manager code.

Cc: Marek Olšák <marek.olsak@amd.com>
Cc: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
10 years agoSCons: Rename dri2_query_renderer.c to dri_common_query_renderer.c.
Vinson Lee [Thu, 21 Aug 2014 19:22:18 +0000 (12:22 -0700)]
SCons: Rename dri2_query_renderer.c to dri_common_query_renderer.c.

Fix SCons build error introduced with commit
3fe7daec14282dc8e2f5c8cc547927e305009677.

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
10 years agoglsl/linker: pass through the is_intrinsic flag
Connor Abbott [Sat, 16 Aug 2014 00:12:06 +0000 (17:12 -0700)]
glsl/linker: pass through the is_intrinsic flag

This flag was set to true for the atomic counter intrinsics, but it
never got plumbed through the linker, so by the time it got to the
backends it would always be set to the false. The current i965 backend
code doesn't use is_intrinsic, so this should not change any existing
code, but it's useful for codepaths that want to distinguish between
intrinsics and non-intrinsics without using strcmp.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Connor Abbott <connor.abbott@intel.com>
10 years agodocs: Update instructions for creating a release
Carl Worth [Thu, 21 Aug 2014 17:44:35 +0000 (10:44 -0700)]
docs: Update instructions for creating a release

This captures all of the steps I have been following in making releases for
the past year or so. This way, the instructions should be sound for anyone who
would like to take over the release process going forward.

10 years agollvmpipe: change LP_MAX_SHADER_INSTRUCTIONS definition
Roland Scheidegger [Wed, 20 Aug 2014 23:27:49 +0000 (01:27 +0200)]
llvmpipe: change LP_MAX_SHADER_INSTRUCTIONS definition

This change will double cache size for branches which have a lower
LP_MAX_SHADER_VARIANTS limit (it will not do anything on master).
The reason is that nowadays shaders tend to be quite a bit larger than they
were (they were big when llvmpipe didn't have a fs loop, got much smaller with
that loop, and since then have gradually increased quite a bit though still
smaller than without the fs loop for various reasons - among them being d3d10
compliance, usage of 8-wide vectors, non-swizzled blend code). Thus effectively
less shaders would be cached (unless they were very small and the variant limit
was hit first). Also, since we're getting rid of the IR nowadays, the cached
shaders shouldn't need all that much memory actually.

10 years agodocs: Add my notes on stable-branch patch criteria
Carl Worth [Thu, 21 Aug 2014 16:46:57 +0000 (09:46 -0700)]
docs: Add my notes on stable-branch patch criteria

This captures the set of rules I have been using for stable-branch management,
(starting with a discussion on the mesa-dev mailing list on July 2013, and
then refined through my own experience of performing stable-branch releases
since then).

10 years agoMakefile: Switch from md5sums to sha256sums
Carl Worth [Thu, 21 Aug 2014 16:03:02 +0000 (09:03 -0700)]
Makefile: Switch from md5sums to sha256sums

We switched to these several stable releases ago, (since the MD5 algorithm has
been broken for some time), but only now did I get around to fixing this in
the Makefile rather than just performing this step manually.

CC: "10.2 10.3" <mesa-stable@lists.freedesktop.org>
10 years agoglx: Fix build since 679c2ef "glx/drisw: add support for DRI2rendererQueryExtension...
Jon TURNEY [Sun, 17 Aug 2014 16:22:22 +0000 (17:22 +0100)]
glx: Fix build since 679c2ef "glx/drisw: add support for DRI2rendererQueryExtension", when only building drisw renderer

v2:
- Move dri*_query_renderer_* into their respective dri*_priv.h headers
- Drop then unnneeded include of dri2.h from dri2_query_renderer.c
- Rename dri2_query_renderer.c as dri_common_query_renderer.c, as it's contents
now are used for more than dri[23]

Signed-off-by: Jon TURNEY <jon.turney@dronecode.org.uk>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
10 years agoIncrement version to 10.4.0-devel
Carl Worth [Thu, 21 Aug 2014 15:37:26 +0000 (08:37 -0700)]
Increment version to 10.4.0-devel

Now that the 10.3 branch has been created

10 years agoradeonsi: add new SI pci ids
Alex Deucher [Thu, 21 Aug 2014 15:16:15 +0000 (11:16 -0400)]
radeonsi: add new SI pci ids

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: mesa-stable@lists.freedesktop.org
10 years agoradeonsi: add new CIK pci ids
Alex Deucher [Thu, 21 Aug 2014 15:13:17 +0000 (11:13 -0400)]
radeonsi: add new CIK pci ids

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: mesa-stable@lists.freedesktop.org
10 years agor600g: Fix flat/smooth shade state toggle
Glenn Kennard [Wed, 20 Aug 2014 19:55:37 +0000 (21:55 +0200)]
r600g: Fix flat/smooth shade state toggle

If only the flat/smooth shade state changed between
two render calls the prior code would miss updating the
hardware state.

Also add check for sprite coord, potentially same type
of issue otherwise for it.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=81967
Signed-off-by: Glenn Kennard <glenn.kennard@gmail.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
10 years agor600g/compute: Don't initialize vertex_buffer_state masks to 0x2
Tom Stellard [Tue, 19 Aug 2014 23:27:38 +0000 (16:27 -0700)]
r600g/compute: Don't initialize vertex_buffer_state masks to 0x2

cs_vertex_buffer_state.enabled_mask and
cs_vertex_buffer_state.dirty_mask are both updated when
r600_set_constant_buffer() is called, so we don't need to manually
update these values.

This fixes a crash with OpenCL programs that have a kernel with no
arguments.

https://bugs.freedesktop.org/show_bug.cgi?id=82671

CC: "10.2" <mesa-stable@lists.freedesktop.org>
10 years agor600g/compute: Use the first parameter in evergreen_set_global_binding()
Tom Stellard [Tue, 19 Aug 2014 23:07:24 +0000 (16:07 -0700)]
r600g/compute: Use the first parameter in evergreen_set_global_binding()

10 years agopipe-loader: Fix memory leak v2
Tom Stellard [Tue, 19 Aug 2014 21:04:32 +0000 (14:04 -0700)]
pipe-loader: Fix memory leak v2

v2:
  - Change driver_name to char*

Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
CC: "10.2" <mesa-stable@lists.freedesktop.org>
10 years agoradeon: Add work-around for missing Hainan support in clang < 3.6 v2
Tom Stellard [Tue, 19 Aug 2014 20:18:19 +0000 (13:18 -0700)]
radeon: Add work-around for missing Hainan support in clang < 3.6 v2

v2:
  - Add missing break.

https://bugs.freedesktop.org/show_bug.cgi?id=82709

CC: "10.2" <mesa-stable@lists.freedesktop.org>
10 years agost/clover: Fix build against LLVM SVN >= r215967 v2
Michel Dänzer [Thu, 21 Aug 2014 10:30:22 +0000 (06:30 -0400)]
st/clover: Fix build against LLVM SVN >= r215967 v2

v2: Tom Stellard
  - Properly destroy the Module

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
10 years agoi965,meta: Stop unlocking the texture to try and prevent deadlocks.
Kenneth Graunke [Tue, 19 Aug 2014 00:20:21 +0000 (17:20 -0700)]
i965,meta: Stop unlocking the texture to try and prevent deadlocks.

Unlocking the texture is not safe: another thread could come in and grab
it.  Now that we use a recursive mutex, this should work.  This also fixes
texture lock deadlocks in the new meta fast clear path.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Tested-by: Chris Forbes <chrisf@ijw.co.nz>
10 years agomesa: Use a recursive mutex for the texture lock.
Kenneth Graunke [Tue, 19 Aug 2014 00:20:20 +0000 (17:20 -0700)]
mesa: Use a recursive mutex for the texture lock.

This avoids problems with things like meta operations calling functions
that want to take the lock while the lock is already held.  Basically,
the point is to guard against API reentrancy across threads...not to
guard against ourselves.

Dave Airlie opposed this change, but it makes master usable again and no
one proposed a better solution.  We can revert this if/when someone
does.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Tested-by: Chris Forbes <chrisf@ijw.co.nz>
10 years agoglcpp: Fix glcpp-test-cr-lf "make check" test for Mac OS X
Carl Worth [Mon, 18 Aug 2014 23:26:34 +0000 (16:26 -0700)]
glcpp: Fix glcpp-test-cr-lf "make check" test for Mac OS X

There were two problems with the way this script used sed on OS X:

  1. The OS X sed doesn't interpret "\r" in a replacement list as a
     carriage-return character, (instead it was inserting a literal
     'r' character).

     We fix this by putting an actual ^M character into the source of
     the script, (rather than a two-character escape sequence hoping
     for sed to do the right thing).

  2. When generating the test files with LF-CR ("\n\r") newlines, the
     OS X sed was adding an undesired final newline ("\n") at the end
     of the file. We avoid this by first using sed to add the ^M
     before the newlines, then using tr to swap the \r and \n
     characters. This way, sed never sees any lines ending with
     anything but \n, so it doesn't get confused and doesn't add any
     bogus extra newlines.

Tested-by: Vinson Lee <vlee@freedesktop.org>
Vinson's testing confirmed that this patch fixes FreeBSD as well.

10 years agoglcpp: Use printf instead of "echo -n" in glcpp-test
Carl Worth [Mon, 18 Aug 2014 23:26:09 +0000 (16:26 -0700)]
glcpp: Use printf instead of "echo -n" in glcpp-test

I noticed that with /bin/sh on Mac OS X, "echo -n" does not work as
desired, (it actually prints "-n" rather than suppressing the final
newline). There is a /bin/echo that could be used (it actually works)
instead of the builtin echo.

But I decided it's more robust to just use printf rather than
hardcoding /bin/echo into the script.

10 years agoi965/vec4: Allow reswizzling writemasks when swizzle is single-valued.
Matt Turner [Fri, 15 Aug 2014 19:32:23 +0000 (12:32 -0700)]
i965/vec4: Allow reswizzling writemasks when swizzle is single-valued.

total instructions in shared programs: 4288033 -> 4266151 (-0.51%)
instructions in affected programs:     930915 -> 909033 (-2.35%)

10 years agoTeach os_get_total_physical_memory about Cygwin
Jon TURNEY [Sun, 17 Aug 2014 16:21:27 +0000 (17:21 +0100)]
Teach os_get_total_physical_memory about Cygwin

Signed-off-by: Jon TURNEY <jon.turney@dronecode.org.uk>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
10 years agor300g: Fix path to test programs for out-of-tree builds
Michel Dänzer [Tue, 19 Aug 2014 02:00:16 +0000 (11:00 +0900)]
r300g: Fix path to test programs for out-of-tree builds

Fixes make check in that case.

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
10 years agogallivm: Fix build with LLVM >= 3.6 r215967.
Vinson Lee [Wed, 20 Aug 2014 06:17:40 +0000 (23:17 -0700)]
gallivm: Fix build with LLVM >= 3.6 r215967.

This LLVM 3.6 commit changed EngineBuilder constructor.

commit 3f4ed32b4398eaf4fe0080d8001ba01e6c2f43c8
Author: Rafael Espindola <rafael.espindola@gmail.com>
Date:   Tue Aug 19 04:04:25 2014 +0000

    Make it explicit that ExecutionEngine takes ownership of the modules.

    git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215967 91177308-0d34-0410-b5e6-96231b3b80d8

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-and-Tested-by: Michel Dänzer <michel.daenzer@amd.com>
10 years agoglsl: Use the without_array predicate in some more places
Timothy Arceri [Tue, 19 Aug 2014 23:56:42 +0000 (13:56 -1000)]
glsl: Use the without_array predicate in some more places

Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Timothy Arceri <t_arceri@yahoo.com.au>
10 years agoi965: Flush the RC and TC before doing a fast clear resolve
Kristian Høgsberg [Mon, 18 Aug 2014 19:31:14 +0000 (12:31 -0700)]
i965: Flush the RC and TC before doing a fast clear resolve

The docs say "When performing a render target resolve, PIPE_CONTROL with end
of pipe sync must be delivered.", which doesn't actually tell us whether we
need to do it before or after.  Blorp did it before and after, and doing it
before certainly makes sense.  The resolve operation needs to read from the
MCS and if we don't flush the render cache it won't get up-to-date data.

On the other hand, doing it after should not be necessary, since we call
brw_render_cache_set_check_flush() after the resolve.

Fixes rendering corruption in kwin's cover switch effect and various steam
games.

Missing flush spotted by Ken.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Signed-off-by: Kristian Høgsberg <krh@bitplanet.net>