James Greenhalgh [Tue, 20 Dec 2016 16:17:27 +0000 (16:17 +0000)]
[Patch] Turn -fexcess-precision=fast on when in -ffast-math
* common.opt (excess_precision): Tag as SetByCombined.
* opts.c (set_fast_math_flags): Also set
flag_excess_precision_cmdline.
(fast_math_flags_set_p): Also check flag_excess_precision_cmdline.
* doc/invoke.texi (-fexcess-precision): Drop text saying the
option has no effect under -ffast-math, make it clear that
-ffast-math will cause -fexcess-precision=fast by default even for
standards compliant modes.
(-ffast-math): Document that this sets -fexcess-precision=fast.
From-SVN: r243824
Richard Biener [Tue, 20 Dec 2016 12:50:09 +0000 (12:50 +0000)]
gimple-parser.c (c_parser_gimple_compound_statement): Improve error recovery.
2016-12-20 Richard Biener <rguenther@suse.de>
c/
* gimple-parser.c (c_parser_gimple_compound_statement): Improve
error recovery.
(c_parser_gimple_statement): Only build assigns for non-error
stmts.
(c_parser_gimple_postfix_expression_after): Improve error recovery.
From-SVN: r243823
Richard Biener [Tue, 20 Dec 2016 12:49:31 +0000 (12:49 +0000)]
passes.c (execute_one_pass): Handle going out of SSA w/o hitting pass_startwith.
2016-12-20 Richard Biener <rguenther@suse.de>
* passes.c (execute_one_pass): Handle going out of SSA w/o
hitting pass_startwith. Handle skipping property providers.
* gcc.dg/gimplefe-19.c: New testcase.
From-SVN: r243822
Kyrylo Tkachov [Tue, 20 Dec 2016 09:39:44 +0000 (09:39 +0000)]
[ARM] PR target/78694: Avoid invalid RTL sharing in minipool code
PR target/78694
* config/arm/arm.c (dump_minipool): Copy mp->value before emitting it
in the minipool to avoid invalid RTL sharing.
* gcc.c-torture/compile/pr78694.c: New test.
From-SVN: r243820
Eric Botcazou [Tue, 20 Dec 2016 08:50:21 +0000 (08:50 +0000)]
Fix PR testsuite/71232 entry.
From-SVN: r243819
Eric Botcazou [Tue, 20 Dec 2016 08:45:52 +0000 (08:45 +0000)]
re PR tree-optimization/71237 (scev tests failing after pass reorganization)
PR testsuite/71237
* gnat.dg/vect1.adb: Add -fno-vect-cost-model to dg-options.
* gnat.dg/vect2.adb: Likewise.
* gnat.dg/vect3.adb: Likewise.
* gnat.dg/vect4.adb: Likewise.
* gnat.dg/vect5.adb: Likewise.
* gnat.dg/vect6.adb: Likewise.
From-SVN: r243818
GCC Administrator [Tue, 20 Dec 2016 00:16:18 +0000 (00:16 +0000)]
Daily bump.
From-SVN: r243817
Francois-Xavier Coudert [Mon, 19 Dec 2016 22:29:43 +0000 (22:29 +0000)]
trans-decl.c (create_main_function): Remove unused elements to the set_options call.
* trans-decl.c (create_main_function): Remove unused elements to
the set_options call.
* runtime/compile_options.c (set_options): Remove unused elements.
From-SVN: r243814
Aaron Sawdey [Mon, 19 Dec 2016 21:32:16 +0000 (21:32 +0000)]
rs6000-protos.h (expand_strn_compare): Declare.
* config/rs6000/rs6000-protos.h (expand_strn_compare): Declare.
* config/rs6000/rs6000.md (UNSPEC_CMPB): New unspec.
(cmpb<mode>3): pattern for generating cmpb.
(cmpstrnsi): pattern to expand strncmp ().
* config/rs6000/rs6000.opt (mstring-compare-inline-limit): Add a new
target option for controlling how much code inline expansion of
strncmp() will be allowed to generate.
* config/rs6000/rs6000.c (expand_strncmp_align_check): generate code
for runtime page crossing check of strncmp () args.
(expand_strn_compare): Function to do builtin expansion of strncmp ().
From-SVN: r243813
David Malcolm [Mon, 19 Dec 2016 20:33:05 +0000 (20:33 +0000)]
print_rtx_function: update example in comment
The patch updates the example dump in the comment for
print_rtx_function to reflect various changes:
- r241593: addition of insn UIDs
- r241908: removal of trailing "(nil)" and other default values
- r242023: addition of "param" directives
- r243798: change of format of regnos in non-virtual pseudos
(from "$2" to "<2>")
gcc/ChangeLog:
* print-rtl-function.c (print_rtx_function): Update
example in comment to reflect current format.
From-SVN: r243812
Uros Bizjak [Mon, 19 Dec 2016 20:23:08 +0000 (21:23 +0100)]
i386.md (*popcounthi2_1): New insn_and_split pattern.
* config/i386/i386.md (*popcounthi2_1): New insn_and_split pattern.
testsuite/ChangeLog:
* gcc.target/i386/pr59874-3.c: New test.
From-SVN: r243811
Sandra Loosemore [Mon, 19 Dec 2016 20:08:31 +0000 (15:08 -0500)]
cpp.texi: Clean up anachronistic C99 references and remove discussion of very old GCC...
2016-12-19 Sandra Loosemore <sandra@codesourcery.com>
gcc/
* doc/cpp.texi: Clean up anachronistic C99 references and remove
discussion of very old GCC versions.
(Differences from previous versions): Delete entire section.
From-SVN: r243810
David Edelsohn [Mon, 19 Dec 2016 19:13:15 +0000 (14:13 -0500)]
Fix formatting.
From-SVN: r243809
Will Schmidt [Mon, 19 Dec 2016 19:10:10 +0000 (19:10 +0000)]
Move my updates to the correct ChangeLog.
2016-12-19 Will Schmidt <will_schmidt@vnet.ibm.com>
Move my updates to the correct ChangeLog. (ChangeLog->gcc/ChangeLog)
From-SVN: r243808
Will Schmidt [Mon, 19 Dec 2016 19:03:48 +0000 (19:03 +0000)]
rs6000.c: Add handling for early expansion of vector multiply builtins.
2016-12-19 Will Schmidt <will_schmidt@vnet.ibm.com>
* config/rs6000/rs6000.c: Add handling for early expansion of
vector multiply builtins.
[gcc/testsuite]
2016-12-19 Will Schmidt <will_schmidt@vnet.ibm.com>
* gcc.dg/vmx/mult-even-odd-be-order.c : Mark
variables as volatile.
* gcc.target/powerpc/fold-vec-mult-char.c : New.
* gcc.target/powerpc/fold-vec-mult-float.c : New.
* gcc.target/powerpc/fold-vec-mult-floatdouble.c : New.
* gcc.target/powerpc/fold-vec-mult-int.c : New.
* gcc.target/powerpc/fold-vec-mult-int128-p8.c : New.
* gcc.target/powerpc/fold-vec-mult-int128-p9.c : New.
* gcc.target/powerpc/fold-vec-mult-longlong.c : New.
* gcc.target/powerpc/fold-vec-mult-short.c : New.
From-SVN: r243807
Will Schmidt [Mon, 19 Dec 2016 18:58:19 +0000 (18:58 +0000)]
rs6000.c (rs6000_gimple_fold_builtin): Add handling for early expansion of vector subtract builtins.
2016-12-19 Will Schmidt <will_schmidt@vnet.ibm.com>
* config/rs6000/rs6000.c (rs6000_gimple_fold_builtin): Add handling for
early expansion of vector subtract builtins.
[gcc/testsuite]
2016-12-19 Will Schmidt <will_schmidt@vnet.ibm.com>
* gcc.target/powerpc/fold-vec-sub-char.c: New.
* gcc.target/powerpc/fold-vec-sub-float.c: New.
* gcc.target/powerpc/fold-vec-sub-floatdouble.c: New.
* gcc.target/powerpc/fold-vec-sub-int.c: New.
* gcc.target/powerpc/fold-vec-sub-int128.c: New.
* gcc.target/powerpc/fold-vec-sub-longlong.c: New.
* gcc.target/powerpc/fold-vec-sub-short.c: New.
From-SVN: r243806
Ian Lance Taylor [Mon, 19 Dec 2016 18:00:35 +0000 (18:00 +0000)]
runtime: copy cgo support from Go 1.7 runtime
Remove support for _cgo_allocate. It was removed from the gc
toolchain in Go 1.5, so it is unlikely that anybody is trying to use it.
Reviewed-on: https://go-review.googlesource.com/34557
From-SVN: r243805
Janne Blomqvist [Mon, 19 Dec 2016 16:20:09 +0000 (18:20 +0200)]
Remove unused functions, take 2.
2016-12-19 Janne Blomqvist <jb@gcc.gnu.org>
* Actually remove files that should have been removed by r243799.
This line, and those below, will be ignored--
M libgfortran/ChangeLog
D libgfortran/generated/exponent_r10.c
D libgfortran/generated/exponent_r16.c
D libgfortran/generated/exponent_r4.c
D libgfortran/generated/exponent_r8.c
D libgfortran/generated/fraction_r10.c
D libgfortran/generated/fraction_r16.c
D libgfortran/generated/fraction_r4.c
D libgfortran/generated/fraction_r8.c
D libgfortran/generated/nearest_r10.c
D libgfortran/generated/nearest_r16.c
D libgfortran/generated/nearest_r4.c
D libgfortran/generated/nearest_r8.c
D libgfortran/generated/rrspacing_r10.c
D libgfortran/generated/rrspacing_r16.c
D libgfortran/generated/rrspacing_r4.c
D libgfortran/generated/rrspacing_r8.c
D libgfortran/generated/set_exponent_r10.c
D libgfortran/generated/set_exponent_r16.c
D libgfortran/generated/set_exponent_r4.c
D libgfortran/generated/set_exponent_r8.c
D libgfortran/generated/spacing_r10.c
D libgfortran/generated/spacing_r16.c
D libgfortran/generated/spacing_r4.c
D libgfortran/generated/spacing_r8.c
D libgfortran/generated/transpose_c10.c
D libgfortran/generated/transpose_c16.c
D libgfortran/generated/transpose_c4.c
D libgfortran/generated/transpose_c8.c
D libgfortran/generated/transpose_i16.c
D libgfortran/generated/transpose_i4.c
D libgfortran/generated/transpose_i8.c
D libgfortran/generated/transpose_r10.c
D libgfortran/generated/transpose_r16.c
D libgfortran/generated/transpose_r4.c
D libgfortran/generated/transpose_r8.c
D libgfortran/intrinsics/malloc.c
D libgfortran/intrinsics/transpose_generic.c
D libgfortran/m4/exponent.m4
D libgfortran/m4/fraction.m4
D libgfortran/m4/nearest.m4
D libgfortran/m4/rrspacing.m4
D libgfortran/m4/set_exponent.m4
D libgfortran/m4/spacing.m4
D libgfortran/m4/transpose.m4
From-SVN: r243804
Francois-Xavier Coudert [Mon, 19 Dec 2016 16:09:12 +0000 (16:09 +0000)]
trans.h: Remove gfor_fndecl_stop_numeric_f08.
* trans.h: Remove gfor_fndecl_stop_numeric_f08.
* trans-decl.c: Remove gfor_fndecl_stop_numeric_f08.
* trans-stmt.c (gfc_trans_stop): Use gfor_fndecl_stop_numeric
instead of gfor_fndecl_stop_numeric_f08.
* gfortran.map: Remove _gfortran_stop_numeric_f08.
* runtime/stop.c: Rename stop_numeric_f08 into stop_numeric.
From-SVN: r243803
François-Xavier Coudert [Mon, 19 Dec 2016 16:04:19 +0000 (16:04 +0000)]
* Makefile.in: Regenerate.
From-SVN: r243802
Francois-Xavier Coudert [Mon, 19 Dec 2016 16:03:53 +0000 (16:03 +0000)]
Makefile.am: Remove ISO_C_BINDING runtime functions.
* Makefile.am: Remove ISO_C_BINDING runtime functions.
* Makefile.in: Regenerate.
* gfortran.map: Remove all __iso_c_binding_c_f_pointer_* symbols.
* intrinsics/iso_c_binding.h: Remove.
* intrinsics/iso_c_binding.c: Remove.
* intrinsics/iso_c_generated_procs.c: Remove.
From-SVN: r243801
Francois-Xavier Coudert [Mon, 19 Dec 2016 16:00:42 +0000 (16:00 +0000)]
Makefile.am: Remove intrinsics/bit_intrinsics.c.
* Makefile.am: Remove intrinsics/bit_intrinsics.c.
* Makefile.in: Regenerate.
* gfortran.map: Remove _gfortran_clz128 and _gfortran_ctz128.
* intrinsics/bit_intrinsics.c: Remove.
From-SVN: r243800
Janne Blomqvist [Mon, 19 Dec 2016 15:32:17 +0000 (17:32 +0200)]
Remove unused libgfortran functions
Now that the libgfortran ABI major version has been bumped, we can
remove functions for which the frontend nowadays generates inline
code.
This removes the malloc, free, exponent, fraction, nearest, rrspacing,
spacing, set_exponent and transpose intrinsics. Also the unused
store_exe_path function is removed.
2016-12-19 Janne Blomqvist <jb@gcc.gnu.org>
* Makefile.am: Remove exponent, fraction, nearest, rrspacing,
set_exponent, spacing, transpose, malloc, transpose_generic.
* Makefile.in: Regenerate.
* generated/exponent_r10.c: Remove.
* generated/exponent_r16.c: Remove.
* generated/exponent_r4.c: Remove.
* generated/exponent_r8.c: Remove.
* generated/fraction_r10.c: Remove.
* generated/fraction_r16.c: Remove.
* generated/fraction_r4.c: Remove.
* generated/fraction_r8.c: Remove.
* generated/nearest_r10.c: Remove.
* generated/nearest_r16.c: Remove.
* generated/nearest_r4.c: Remove.
* generated/nearest_r8.c: Remove.
* generated/rrspacing_r10.c: Remove.
* generated/rrspacing_r16.c: Remove.
* generated/rrspacing_r4.c: Remove.
* generated/rrspacing_r8.c: Remove.
* generated/set_exponent_r10.c: Remove.
* generated/set_exponent_r16.c: Remove.
* generated/set_exponent_r4.c: Remove.
* generated/set_exponent_r8.c: Remove.
* generated/spacing_r10.c: Remove.
* generated/spacing_r16.c: Remove.
* generated/spacing_r4.c: Remove.
* generated/spacing_r8.c: Remove.
* generated/transpose_c10.c: Remove.
* generated/transpose_c16.c: Remove.
* generated/transpose_c4.c: Remove.
* generated/transpose_c8.c: Remove.
* generated/transpose_i16.c: Remove.
* generated/transpose_i4.c: Remove.
* generated/transpose_i8.c: Remove.
* generated/transpose_r10.c: Remove.
* generated/transpose_r16.c: Remove.
* generated/transpose_r4.c: Remove.
* generated/transpose_r8.c: Remove.
* gfortran.map: Remove exponent, fraction, nearest, rrspacing,
set_exponent, spacing, transpose, malloc, free, transpose_generic,
store_exe_path.
* intrinsics/malloc.c: Remove.
* intrinsics/transpose_generic.c: Remove.
* libgfortran.h (store_exe_path): Remove.
* m4/exponent.m4: Remove.
* m4/fraction.m4: Remove.
* m4/nearest.m4: Remove.
* m4/rrspacing.m4: Remove.
* m4/set_exponent.m4: Remove.
* m4/spacing.m4: Remove.
* m4/transpose.m4: Remove.
* runtime/main.c (store_exe_path): Remove.
From-SVN: r243799
David Malcolm [Mon, 19 Dec 2016 15:24:47 +0000 (15:24 +0000)]
print-rtl.c: use '<' and '>' rather than % for pseudos in compact mode
gcc/ChangeLog:
* print-rtl.c (rtx_writer::print_rtx_operand_code_r): For
non-virtual pseudos in compact mode, wrap the regno in '<' and '>'
rather than using a '%' prefix.
* rtl-tests.c (selftest::test_dumping_regs): Update for above change.
From-SVN: r243798
Francois-Xavier Coudert [Mon, 19 Dec 2016 13:41:32 +0000 (13:41 +0000)]
chmod.c (chmod_internal): Fix case where mode_t is different from unsigned int.
* intrinsics/chmod.c (chmod_internal): Fix case where mode_t is
different from unsigned int.
From-SVN: r243796
Ville Voutilainen [Mon, 19 Dec 2016 12:55:33 +0000 (14:55 +0200)]
Make the perfect-forwarding constructor of a two-element tuple sfinae away when the first argument is an allocator_arg.
Make the perfect-forwarding constructor of a two-element tuple
sfinae away when the first argument is an allocator_arg.
* include/std/tuple (tuple(_U1&&, _U2&&)): Constrain.
* testsuite/20_util/tuple/cons/allocator_with_any.cc: New.
* testsuite/20_util/tuple/element_access/get_neg.cc: Adjust.
From-SVN: r243795
Janus Weil [Mon, 19 Dec 2016 10:26:04 +0000 (11:26 +0100)]
re PR fortran/78545 (Possible correction to online LTIME documentation)
2016-12-19 Janus Weil <janus@gcc.gnu.org>
PR fortran/78545
* intrinsic.texi: Minor documentation fixes for non-standard
time-related intrinsics. Add references to standard intrinsics and
linkify some existing references.
From-SVN: r243794
Dominik Vogt [Mon, 19 Dec 2016 09:53:56 +0000 (09:53 +0000)]
PR target/78748: S/390: Fix ICE with ANDC splitter.
gcc/ChangeLog:
2016-12-19 Dominik Vogt <vogt@linux.vnet.ibm.com>
PR target/78748
* config/s390/s390.md ("*andc_split_<mode>"): Allow memory destination
only if it coincides with operand 2.
gcc/testsuite/ChangeLog:
2016-12-19 Dominik Vogt <vogt@linux.vnet.ibm.com>
PR target/78748
* gcc.c-torture/compile/pr78748.c: New test.
From-SVN: r243793
Dominik Vogt [Mon, 19 Dec 2016 09:51:11 +0000 (09:51 +0000)]
combine: Omit redundant AND in change_zero_ext.
This is another micro-optimisation in change_zero_ext. If an
(and (lshiftrt ... (N)) (M))
generated by change_zero_ext is equivalent to just
(lshiftrt ... (N))
(because the AND constant selects the N rightmost bits of the
result), strip off the AND.
gcc/ChangeLog:
2016-12-19 Dominik Vogt <vogt@linux.vnet.ibm.com>
* combine.c (change_zero_ext): Skip generation of redundant AND.
From-SVN: r243792
Krister Walfridsson [Mon, 19 Dec 2016 09:39:17 +0000 (09:39 +0000)]
netbsd.h (LINK_EH_SPEC): Define.
2016-12-19 Krister Walfridsson <krister.walfridsson@gmail.com>
* config/netbsd.h (LINK_EH_SPEC): Define.
From-SVN: r243791
Krister Walfridsson [Mon, 19 Dec 2016 09:21:09 +0000 (09:21 +0000)]
config.host (*-*-netbsd*): Add t-eh-dw2-dip to tmake_file.
2016-12-19 Krister Walfridsson <krister.walfridsson@gmail.com>
* config.host (*-*-netbsd*): Add t-eh-dw2-dip to tmake_file.
* crtstuff.c (BSD_DL_ITERATE_PHDR_AVAILABLE): Define for NetBSD.
* unwind-dw2-fde-dip.c (USE_PT_GNU_EH_FRAME, ElfW): Likewise.
From-SVN: r243790
Chenghua Xu [Mon, 19 Dec 2016 07:35:33 +0000 (07:35 +0000)]
Add myself under Write After Approval.
From-SVN: r243789
GCC Administrator [Mon, 19 Dec 2016 00:16:16 +0000 (00:16 +0000)]
Daily bump.
From-SVN: r243788
Dominique d'Humieres [Sun, 18 Dec 2016 18:03:36 +0000 (19:03 +0100)]
re PR fortran/78545 (Possible correction to online LTIME documentation)
2016-12-18 Dominique d'Humieres <dominiq@lps.ens.fr>
PR fortran/78545
* intrinsic.texi: Fix documentation for GMTIME and LTIME.
* intrinsics/date_and_time.c: Fix comments for GMTIME and LTIME.
From-SVN: r243785
Janus Weil [Sun, 18 Dec 2016 13:22:13 +0000 (14:22 +0100)]
re PR fortran/78848 ([OOP] ICE on writing CLASS variable with non-typebound DTIO procedure)
2016-12-18 Janus Weil <janus@gcc.gnu.org>
PR fortran/78848
* trans-io.c (get_dtio_proc): Generate non-typebound DTIO call for class
variables, if no typebound DTIO procedure is available.
2016-12-18 Janus Weil <janus@gcc.gnu.org>
PR fortran/78848
* gfortran.dg/dtio_22.f90: New test.
From-SVN: r243784
Janus Weil [Sun, 18 Dec 2016 11:03:41 +0000 (12:03 +0100)]
re PR fortran/78592 (ICE in gfc_find_specific_dtio_proc, at fortran/interface.c:4939)
2016-12-18 Janus Weil <janus@gcc.gnu.org>
PR fortran/78592
* interfac.c (gfc_find_specific_dtio_proc): Fixup for r243005, making
sure that the generic list is followed through until the end.
2016-12-18 Janus Weil <janus@gcc.gnu.org>
PR fortran/78592
* gfortran.dg/dtio_21.f90: New test.
From-SVN: r243783
Eric Botcazou [Sun, 18 Dec 2016 08:33:38 +0000 (08:33 +0000)]
lra-constraints.c (process_address): Add forward declaration.
* lra-constraints.c (process_address): Add forward declaration.
(simplify_operand_subreg): In the MEM case, if the adjusted memory
reference is not sufficient aligned and the address was invalid,
reload the address before reloading the original memory reference.
Fix long lines and add a final return for the sake of clarity.
From-SVN: r243782
GCC Administrator [Sun, 18 Dec 2016 00:16:17 +0000 (00:16 +0000)]
Daily bump.
From-SVN: r243781
Steven G. Kargl [Sat, 17 Dec 2016 23:10:01 +0000 (23:10 +0000)]
re PR fortran/78746 (charlen_03, charlen_10 ICE)
2016-12-17 Steven G. Kargl <kargl@gcc.gnu.org>
PR fortran/78746
* charlen_03.f90: Remove test.
* charlen_10.f90: Ditto.
From-SVN: r243778
Jakub Jelinek [Sat, 17 Dec 2016 19:10:39 +0000 (20:10 +0100)]
re PR sanitizer/78832 (-fcompare-debug failure (length) with -fsanitize=address)
PR sanitizer/78832
* sanopt.c (sanitize_asan_mark_unpoison): Remove next variable, use
continue if gsi_next should be skipped.
(sanitize_asan_mark_poison): Remove prev variable, use continue if
gsi_prev should be skipped. When removing ASAN_MARK, do gsi_prev
first and gsi_remove on a previously made copy of the iterator.
* gcc.dg/asan/pr78832.c: New test.
From-SVN: r243777
Thomas Koenig [Sat, 17 Dec 2016 17:03:49 +0000 (17:03 +0000)]
re PR fortran/78239 (ICE in char_len_param_value, at fortran/decl.c:926, with -fimplicit-none)
2016-12-17 Thomas Koenig <tkoenig@gcc.gnu.org>
PR fortran/78239
* decl.c (char_len_param_value): Actually commit
previous change.
From-SVN: r243776
Matthias Klose [Sat, 17 Dec 2016 12:42:03 +0000 (12:42 +0000)]
gmon: Remove empty directory.
2016-12-17 Matthias Klose <doko@ubuntu.com>
* config/arc/gmon: Remove empty directory.
From-SVN: r243775
Andrew Senkevich [Sat, 17 Dec 2016 11:42:05 +0000 (12:42 +0100)]
avx512bwintrin.h: Add new k-mask intrinsics.
* config/i386/avx512bwintrin.h: Add new k-mask intrinsics.
* config/i386/avx512dqintrin.h: Ditto.
* config/i386/avx512fintrin.h: Ditto.
* config/i386/i386-builtin.def (__builtin_ia32_kaddqi,
__builtin_ia32_kaddhi, __builtin_ia32_kaddsi,
__builtin_ia32_kadddi): New.
* config/i386/sse.md (kadd<mode>): New.
testsuite/ChangeLog:
* gcc.target/i386/avx512bw-kaddd-1.c: New test.
* gcc.target/i386/avx512bw-kaddq-1.c: Ditto.
* gcc.target/i386/avx512dq-kaddb-1.c: Ditto.
* gcc.target/i386/avx512f-kaddw-1.c: Ditto.
From-SVN: r243774
Thomas Koenig [Sat, 17 Dec 2016 11:13:16 +0000 (11:13 +0000)]
re PR fortran/78239 (ICE in char_len_param_value, at fortran/decl.c:926, with -fimplicit-none)
2016-12-17 Thomas Koenig <tkoenig@gcc.gnu.org>
PR fortran/78239
* decl.c(char_len_param_value): Also check for -fimplicit-none
when determining if implicit none is in force.
2016-12-17 Thomas Koenig <tkoenig@gcc.gnu.org>
PR fortran/78239
* gfortran.dg/fimplicit_none_1.f90: New test.
* gfortran.dg/fimplicit_none_2.f90: New test.
From-SVN: r243773
Uros Bizjak [Sat, 17 Dec 2016 11:05:46 +0000 (12:05 +0100)]
i386.md (*tzcnt<mode>_1): Merge *tzcnt<mode>_1_falsedep_1 and *tzcnt<mode>_1 to define_insn_and_split pattern.
* config/i386/i386.md (*tzcnt<mode>_1): Merge *tzcnt<mode>_1_falsedep_1
and *tzcnt<mode>_1 to define_insn_and_split pattern. Adjust split
condition to split after epilogue_completed.
(ctz<mode>2): Remove expander.
(ctz<mode>2): Merge *ctz<mode>2_falsedep_1 and *ctz<mode>2 to
define_insn_and_split pattern. Adjust split condition to split
after epilogue_completed.
(clz<mode>2_lznct): Remove expander.
(clz<mode>2_lzcnt): Merge *clz<mode>2_lzcnt_falsedep_1 and
*clz<mode>2 to define_insn_and_split pattern. Adjust split
condition to split after epilogue_completed.
(<lt_zcnt>_<mode>): Remove expander.
(<lt_zcnt>_<mode>): Merge *<lt_zcnt>_<mode>_falsedep_1 and
*<lt_zcnt>_<mode> to define_insn_and_split pattern. Adjust split
condition to split after epilogue_completed.
(<lt_zcnt>_hi): New insn pattern.
(popcount<mode>2): Remove expander.
(popcount<mode>2): Merge *popcount<mode>2_falsedep_1 and
*popcount<mode>2 to define_insn_and_split pattern. Adjust split
condition to split after epilogue_completed.
(popcounthi2): New insn pattern.
From-SVN: r243772
Kelvin Nilsen [Sat, 17 Dec 2016 00:18:32 +0000 (00:18 +0000)]
byte-in-either-range-0.c: New test.
gcc/testsuite/ChangeLog:
2016-12-16 Kelvin Nilsen <kelvin@gcc.gnu.org>
* gcc.target/powerpc/byte-in-either-range-0.c: New test.
* gcc.target/powerpc/byte-in-either-range-1.c: New test.
* gcc.target/powerpc/byte-in-range-0.c: New test.
* gcc.target/powerpc/byte-in-range-1.c: New test.
* gcc.target/powerpc/byte-in-set-0.c: New test.
* gcc.target/powerpc/byte-in-set-1.c: New test.
* gcc.target/powerpc/byte-in-set-2.c: New test.
gcc/ChangeLog:
2016-12-16 Kelvin Nilsen <kelvin@gcc.gnu.org>
* config/rs6000/altivec.md (UNSPEC_CMPRB): New unspec value.
(UNSPEC_CMPRB2): New unspec value.
(UNSPEC_CMPEQB): New unspec value.
(cmprb): New expansion.
(*cmprb_internal): New insn.
(*setb_internal): New insn.
(cmprb2): New expansion.
(*cmprb2_internal): New insn.
(cmpeqb): New expansion.
(*cmpeqb_internal): New insn.
* config/rs6000/rs6000-builtin.def (BU_P9_2): New macro.
(BU_P9_64BIT_2): Likewise.
(BU_P9_OVERLOAD_2): Likewise.
(CMPRB): Add byte-in-range built-in function.
(CMBRB2): Add byte-in-either-range built-in function.
(CMPEQB): Add byte-in-set built-in function.
(CMPRB): Add overload support for byte-in-range function.
(CMPRB2): Add overload support for byte-in-either-range function.
(CMPEQB): Add overload support for byte-in-set built-in function.
* config/rs6000/rs6000-c.c (P9_BUILTIN_CMPRB): Macro expansion to
define argument types for new builtin.
(P9_BUILTIN_CMPRB2): Likewise.
(P9_BUILTIN_CMPEQB): Likewise.
* doc/extend.texi (PowerPC AltiVec Built-in Functions): Rearrange
the order of presentation for certain built-in functions
(scalar_extract_exp, scalar_extract_sig, scalar_insert_exp)
(scalar_cmp_exp_gt, scalar_cmp_exp_lt, scalar_cmp_exp_eq)
(scalar_cmp_exp_unordered, scalar_test_data_class)
(scalar_test_neg) to improve locality and flow. Document
the new __builtin_scalar_byte_in_set,
__builtin_scalar_byte_in_range, and
__builtin_scalar_byte_in_either_range functions.
From-SVN: r243770
GCC Administrator [Sat, 17 Dec 2016 00:16:20 +0000 (00:16 +0000)]
Daily bump.
From-SVN: r243769
Than McIntosh [Fri, 16 Dec 2016 22:11:28 +0000 (22:11 +0000)]
compiler: add containing Bfunction to some backend interfaces.
Change the interfaces for backend methods that create statements to
always pass in the enclosing Bfunction for the statement. Having the
function available simplifies things if a temporary variable has to be
created during the construction of a statement.
This also includes a change to the Mark_lvalue_varexprs helper
class to handle indirections on the left hand side of assignments
(e.g. "*x.y = ...").
Reviewed-on: https://go-review.googlesource.com/34471
* go-gcc.cc (Gcc_backend::expression_statement): Add Bfunction*
parameter.
(Gcc_backend::init_statement): Likewise.
(Gcc_backend::assignment_statement): Likewise.
(Gcc_backend::if_statement): Likewise.
From-SVN: r243766
Jerry DeLisle [Fri, 16 Dec 2016 20:27:51 +0000 (20:27 +0000)]
re PR fortran/78662 ([F03] Incorrect parsing of quotes in the char-literal-constant of the DT data descriptor)
2016-12-16 Jerry DeLisle <jvdelisle@gcc.gnu.org>
PR fortran/78622
* io.c (format_lex): Continue of string delimiter seen.
* io/transfer.c (get_dt_format): New static function to alloc
and set the DT iotype string, handling doubled quotes.
(formatted_transfer_scalar_read,
formatted_transfer_scalar_write): Use new function.
* gfortran.dg/dtio_20.f03: New test.
From-SVN: r243765
Jakub Jelinek [Fri, 16 Dec 2016 19:41:13 +0000 (20:41 +0100)]
re PR fortran/78757 (ICE with function returning a pointer to a character)
PR fortran/78757
* trans-expr.c (gfc_conv_procedure_call): Emit DECL_EXPR for the
type pstr var points to.
* gfortran.dg/char_result_16.f90: New test.
From-SVN: r243761
Joseph Myers [Fri, 16 Dec 2016 19:01:47 +0000 (19:01 +0000)]
* fr.po: Update.
From-SVN: r243759
Jonathan Wakely [Fri, 16 Dec 2016 18:13:20 +0000 (18:13 +0000)]
Reuse Doxygen comments for map::erase overloads
* include/bits/stl_map.h (map::erase(iterator)): Add Doxygen markup
to reuse documentation for erase(const_iterator) overload.
* include/bits/stl_multimap.h (multimap::erase(iterator)): Likewise.
From-SVN: r243758
Jonathan Wakely [Fri, 16 Dec 2016 18:13:09 +0000 (18:13 +0000)]
Add assertion to _Rb_tree::erase to check for end iterators
* include/bits/stl_tree.h (_Rb_tree::_M_erase_aux(const_iterator)):
Add assertion for undefined argument.
(_Rb_tree::_M_erase_aux(const_iterator, const_iterator)): Call
_M_erase_aux directly instead of through erase.
(_Rb_tree::_M_erase_aux(const Key&)): Likewise.
* testsuite/23_containers/map/modifiers/erase/end_neg.cc: New test.
From-SVN: r243757
Kyrylo Tkachov [Fri, 16 Dec 2016 16:26:08 +0000 (16:26 +0000)]
[AArch64] Split X-reg UBFIZ into W-reg LSL when possible
* config/aarch64/aarch64.md: New define_split above bswap<mode>2.
* gcc.target/aarch64/ubfiz_lsl_1.c: New test.
From-SVN: r243756
Kyrylo Tkachov [Fri, 16 Dec 2016 16:24:26 +0000 (16:24 +0000)]
[AArch64] Split X-reg UBFX into W-reg LSR when possible
* config/aarch64/aarch64.md: New define_split above insv<mode>.
* gcc.target/aarch64/ubfx_lsr_1.c: New test.
From-SVN: r243755
Jakub Jelinek [Fri, 16 Dec 2016 16:04:20 +0000 (17:04 +0100)]
Revert accidentally changed file.
From-SVN: r243754
Jakub Jelinek [Fri, 16 Dec 2016 15:57:43 +0000 (16:57 +0100)]
re PR c/78408 (C loop initial declarations generate wrong code)
PR c/78408
* tree-ssa-ccp.c: Include tree-dfa.h.
(optimize_memcpy): New function.
(pass_fold_builtins::execute): Use it. Remove useless conditional
break after BUILT_IN_VA_*.
* gcc.dg/pr78408-1.c: New test.
* gcc.dg/pr78408-2.c: New test.
From-SVN: r243753
Marek Polacek [Fri, 16 Dec 2016 14:19:44 +0000 (14:19 +0000)]
re PR tree-optimization/78819 (Wrong code with VRP caused by register assertions along default switch labels)
PR tree-optimization/78819
* tree-vrp.c (find_switch_asserts): Return if the insertion limit is 0.
Don't register an assertion if the default case shares a label with
another case.
* gcc.dg/tree-ssa/vrp112.c: New test.
From-SVN: r243746
Wilco Dijkstra [Fri, 16 Dec 2016 13:14:46 +0000 (13:14 +0000)]
The negdi2 patterns for ARM and Thumb-2 are duplicated because Thumb-2 doesn't support RSC with an immediate.
The negdi2 patterns for ARM and Thumb-2 are duplicated because Thumb-2
doesn't support RSC with an immediate. We can however emulate RSC with
zero using a shifted SBC. If we add this to subsi3_carryin the negdi
patterns can be merged, simplifying things a bit. This should generate
identical code in all cases.
gcc/
* config/arm/arm.md (subsi3_carryin): Add Thumb-2 RSC #0.
(arm_negdi2) Rename to negdi2_insn, allow on Thumb-2.
* config/arm/thumb2.md (thumb2_negdi2): Remove pattern.
From-SVN: r243745
Wilco Dijkstra [Fri, 16 Dec 2016 12:59:41 +0000 (12:59 +0000)]
Thumb uses a special register allocation order to increase the use of low registers.
Thumb uses a special register allocation order to increase the use of low
registers. Oddly enough, LR appears before R12, which means that LR must
be saved and restored even if R12 is available. Swapping R12 and LR means
this simple example now uses R12 as a temporary (just like ARM):
int f(long long a, long long b)
{
if (a < b) return 1;
return a + b;
}
gcc/
* config/arm/arm.c (thumb_core_reg_alloc_order): Swap R12 and R14.
From-SVN: r243744
Claudiu Zissulescu [Fri, 16 Dec 2016 12:56:32 +0000 (13:56 +0100)]
[ARC] Remove old prof patterns.
gcc/
2016-12-16 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc.md (call_prof): Remove.
(call_value_prof): Likewise.
(sibcall_prof): Likewise.
(sibcall_value_prof): Likewise.
From-SVN: r243743
Claudiu Zissulescu [Fri, 16 Dec 2016 12:56:21 +0000 (13:56 +0100)]
[ARC] Rework code for profiling.
gcc/
2016-12-16 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc.h (LINK_SPEC): Tidy up.
(ENDFILE_SPEC): Likewise.
(LIB_SPEC): Likewise.
(STARTFILE_SPEC): Include gcrt0 when profiling.
(FUNCTION_PROFILER): Use __mcount.
* config/arc/arc.opt (mucb-mcount): Remove.
* doc/invoke.texi (ARC): Remove mucb-mcount doc.
* arc/arc-protos.h (arc_profile_call): Remove.
* config/arc/arc.c (write_profile_sections): Likewise.
(arc_profile_call): Likewise.
(unspec_prof_hash): Likewise.
(unspec_prof_htab_eq): Likewise.
(arc_legitimate_constant_p): Remove UNSPEC_PROF.
(arc_reorg): Remove call to write_profile_sections.
* config/arc/arc.md (call): Remove call to arc_profile_call.
(call_value): Likewise.
(sibcall): Likewise.
(sibcall_value): Likewise.
(define_constants): Remove UNSPEC_PROF.
libgcc/
* config.host (arc*-*-linux-uclibc*): Remove libgmon, crtg, and
crtgend.
(arc*-*-elf*): Likewise.
* config/arc/t-arc: Remove old gmon lib targets.
* config/arc/crtg.S: Remove.
* config/arc/crtgend.S: Likewise.
* config/arc/gmon/atomic.h: Likewise.
* config/arc/gmon/auxreg.h: Likewise.
* config/arc/gmon/dcache_linesz.S: Likewise.
* config/arc/gmon/gmon.c: Likewise.
* config/arc/gmon/machine-gmon.h: Likewise.
* config/arc/gmon/mcount.c: Likewise.
* config/arc/gmon/prof-freq-stub.S: Likewise.
* config/arc/gmon/prof-freq.c: Likewise.
* config/arc/gmon/profil.S: Likewise.
* config/arc/gmon/sys/gmon.h: Likewise.
* config/arc/gmon/sys/gmon_out.h: Likewise.
* config/arc/t-arc-newlib: Likewise.
* config/arc/t-arc700-uClibc: Renamed to t-arc-uClibc.
From-SVN: r243742
Claudiu Zissulescu [Fri, 16 Dec 2016 12:56:09 +0000 (13:56 +0100)]
[ARC] Rework ARC600 64-bit multiplication patterns.
Previously users of mulsidi_600 and umulsidi_600 had to take care of
moving the multiplication result into the final destination themselves
(from the MUL64_OUT_REG register). This commit converts these two
instruction patterns into insn_and_split patterns that now take the
final destination as an extra operand. The insn_and_split patterns
generate the multiplication using two new multiplication instruction
patterns, then generate the move of the result from the MUL64_OUT_REG
register into the final destination.
This is a clean up commit, there should be no user visible changes
after this commit.
2016-12-16 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc.md (mulsidi_600): Change to insn_and_split,
generate new mul64 insn for core multiplication work.
(umulsidi_600): Likewise, but use mulu64 insn.
(mul64): New pattern, content taken from old mulsidi_600 insn
pattern.
(mulu64): Likewise, but using umulsidi_600.
(mulsidi3): Remove move to destination, this is now handled by
mulsidi_600 insn_and_split.
(umulsidi3): Likewise, but using umulsidi_600.
From-SVN: r243741
Eric Botcazou [Fri, 16 Dec 2016 12:21:45 +0000 (12:21 +0000)]
opt61.adb: New test.
* gnat.dg/opt61.adb: New test.
* gnat.dg/opt61_pkg.ad[sb]: New helper.
From-SVN: r243740
Ville Voutilainen [Fri, 16 Dec 2016 11:34:45 +0000 (13:34 +0200)]
Implement LWG 2769, Redundant const in the return type of any_cast(const any&).
Implement LWG 2769, Redundant const in the return type of
any_cast(const any&).
* include/std/any (_AnyCast): New.
(any_cast(const any&)): Use it and add an explicit cast for return.
(any_cast(any&)): Likewise.
(any_cast(any&&)): Likewise.
* testsuite/20_util/any/misc/any_cast.cc: Add a test for a type
that has an explicit copy constructor.
*testsuite/20_util/any/misc/any_cast_neg.cc: Adjust.
From-SVN: r243739
Richard Biener [Fri, 16 Dec 2016 09:40:03 +0000 (09:40 +0000)]
re PR c++/71694 (store-data race with bitfields and tail-padding in C++)
2016-12-16 Richard Biener <rguenther@suse.de>
PR c++/71694
* langhooks-def.h (lhd_unit_size_without_reusable_padding): Declare.
(LANG_HOOKS_UNIT_SIZE_WITHOUT_REUSABLE_PADDING): Define.
(LANG_HOOKS_FOR_TYPES_INITIALIZER): Adjust.
* langhooks.h (struct lang_hooks_for_types): Add
unit_size_without_reusable_padding.
* langhooks.c (lhd_unit_size_without_reusable_padding): New.
* stor-layout.c (finish_bitfield_representative): Use
unit_size_without_reusable_padding langhook to decide on the
last representatives size.
cp/
* cp-objcp-common.h (cp_unit_size_without_reusable_padding): Declare.
(LANG_HOOKS_UNIT_SIZE_WITHOUT_REUSABLE_PADDING): Define.
* cp-objcp-common.c (cp_unit_size_without_reusable_padding): New.
* g++.dg/pr71694.C: New testcase.
From-SVN: r243738
Richard Biener [Fri, 16 Dec 2016 09:38:18 +0000 (09:38 +0000)]
re PR middle-end/71632 (hang at -O3 on x86_64-linux-gnu)
2016-12-16 Richard Biener <rguenther@suse.de>
PR middle-end/71632
* expr.c (expand_cond_expr_using_cmove): Bail out early if
we end up recursing via TER.
* gcc.dg/pr71632.c: New testcase.
From-SVN: r243737
Martin Sebor [Fri, 16 Dec 2016 02:57:22 +0000 (02:57 +0000)]
PR bootstrap/78817 - stage2 bootstrap failure in vec.h:1613:5: error: argument 1 null where non-null expected after r243661
gcc/ChangeLog:
* vec.h (vec<T, va_heap, vl_ptr>::safe_grow_cleared): Assert
a pointer is non-null.
From-SVN: r243736
Ian Lance Taylor [Fri, 16 Dec 2016 00:34:37 +0000 (00:34 +0000)]
compiler: fix comments + fieldnames to match libgo source
A couple of the comments in the type descriptor code were out of date
with respect to the names in libgo/go/runtime/type.go. Fix up the
comments and field names to bring them into sync.
Reviewed-on: https://go-review.googlesource.com/34472
From-SVN: r243735
GCC Administrator [Fri, 16 Dec 2016 00:16:16 +0000 (00:16 +0000)]
Daily bump.
From-SVN: r243734
Ian Lance Taylor [Thu, 15 Dec 2016 23:44:13 +0000 (23:44 +0000)]
compiler: fix off-by-1 array type len in Type::gc_symbol_constructor
Array type being built to hold GC var initializer was being created
with an extra/unneeded slot. Fix up the code to insure that the array
length matches the length of the initializer list.
Reviewed-on: https://go-review.googlesource.com/34413
From-SVN: r243731
Ian Lance Taylor [Thu, 15 Dec 2016 22:47:43 +0000 (22:47 +0000)]
re PR go/78763 (go1: internal compiler error: in do_get_backend, at go/gofrontend/expressions.cc:8352)
PR go/78763
compiler: call determine_types even for constant expressions
We need to call determine_types even for constant expressions, since a
constant expression may include code like unsafe.Sizeof(0). Something
needs to determine the type of the untyped 0, and that should be the
determine_types pass.
Implementing that triggered a compiler crash on test/const1.go because
it permitted some erroneous constants to make it all the way to the
backend. Catch that case by checking whether we get a constant
overflow error, and marking the expression invalid if we do. This is
a good change in any case, as previously we reported the same constant
overflow error multiple times, and now we only report it once.
Fixes GCC PR 78763.
Reviewed-on: https://go-review.googlesource.com/34496
From-SVN: r243729
Andrew Senkevich [Thu, 15 Dec 2016 22:39:33 +0000 (22:39 +0000)]
avx512bwintrin.h: Add new k-mask intrinsics.
* config/i386/avx512bwintrin.h: Add new k-mask intrinsics.
* config/i386/avx512dqintrin.h: Ditto.
* config/i386/avx512fintrin.h: Ditto.
* config/i386/i386-builtin.def (__builtin_ia32_kmovb,
__builtin_ia32_kmovd, __builtin_ia32_kmovq): New.
(__builtin_ia32_kmov16): Rename to __builtin_ia32_kmovw.
* config/i386/sse.md (kmov<mskmodesuffix>): New.
testsuite/ChangeLog:
* gcc.target/i386/avx512bw-kmovd-1.c: New test.
* gcc.target/i386/avx512bw-kmovd-2.c: Ditto.
* gcc.target/i386/avx512bw-kmovd-3.c: Ditto.
* gcc.target/i386/avx512bw-kmovd-4.c: Ditto.
* gcc.target/i386/avx512bw-kmovq-1.c: Ditto.
* gcc.target/i386/avx512bw-kmovq-2.c: Ditto.
* gcc.target/i386/avx512bw-kmovq-3.c: Ditto.
* gcc.target/i386/avx512bw-kmovq-4.c: Ditto.
* gcc.target/i386/avx512dq-kmovb-2.c: Ditto.
* gcc.target/i386/avx512dq-kmovb-3.c: Ditto.
* gcc.target/i386/avx512dq-kmovb-4.c: Ditto.
* gcc.target/i386/avx512dq-kmovb-5.c: Ditto.
* gcc.target/i386/avx512f-kmovw-2.c: Ditto.
* gcc.target/i386/avx512f-kmovw-3.c: Ditto.
* gcc.target/i386/avx512f-kmovw-4.c: Ditto.
* gcc.target/i386/avx512f-kmovw-5.c: Ditto.
From-SVN: r243728
Uros Bizjak [Thu, 15 Dec 2016 22:23:46 +0000 (23:23 +0100)]
i386.md (ffs<mode>2): Generate CCCmode flags register for TARGET_BMI.
* config/i386/i386.md (ffs<mode>2): Generate CCCmode flags register
for TARGET_BMI.
(ffssi2_no_cmove): Ditto.
(*tzcnt<mode>_1_falsedep_1): New insn_and_split pattern.
(*tzcnt<mode>_1_falsedep): New insn pattern.
(LT_ZCNT): New mode iterator.
(lt_zcnt): New mode attribute.
(lt_zcnt_type): New mode attribute.
(<lt_zcnt>_<mode>): Macroize expander from bmi_tzcnt_<mode> and
lzcnt_<mode> using LT_ZCNT mode iterator.
(*<lt_zcnt>_<mode>_falsedep_1): Macroize insn from
*bmi_tzcnt_<mode>_falsedep_1 and *lzcnt_<mode>_falsedep_1
using LT_ZCNT mode iterator.
(*<lt_zcnt>_<mode>_falsedep): Macroize insn from
*bmi_tzcnt_<mode>_falsedep and *lzcnt_<mode>_falsedep
using LT_ZCNT mode iterator.
(*<lt_zcnt>_<mode>): Macroize insn from *bmi_tzcnt_<mode>
and *lzcnt_<mode> using LT_ZCNT mode iterator.
* config/i386/i386-builtin.def (__builtin_ia32_tzcnt_u16)
(__builtin_ia32_tzcnt_u32, __builtin_ia32_tzcnt_u64, __builtin_ctzs):
Update for rename.
From-SVN: r243727
Janus Weil [Thu, 15 Dec 2016 20:54:18 +0000 (21:54 +0100)]
re PR fortran/78798 ([cleanup] some int-valued functions should be bool)
2016-12-15 Janus Weil <janus@gcc.gnu.org>
PR fortran/78798
* gfortran.h (gfc_compare_derived_types,gfc_compare_types,
gfc_compare_interfaces,gfc_has_vector_subscript): Return bool instead
of int.
* interface.c (compare_components): Ditto.
(gfc_compare_union_types): Rename to compare_union_types, declare as
static, return bool.
(gfc_compare_derived_types): Return bool instead of int.
(gfc_compare_types): Ditto.
(compare_type): Ditto.
(compare_rank): Ditto.
(compare_type_rank): Ditto.
(compare_type_rank_if): Ditto.
(count_types_test): Ditto.
(generic_correspondence): Ditto.
(gfc_compare_interfaces): Ditto.
(check_interface0): Ditto.
(check_interface1): Ditto.
(compare_allocatable): Ditto.
(compare_parameter): Ditto.
(gfc_has_vector_subscript): Ditto.
(compare_actual_formal): Ditto.
From-SVN: r243726
Jakub Jelinek [Thu, 15 Dec 2016 20:51:39 +0000 (21:51 +0100)]
ipa-cp.c (class ipcp_bits_lattice): Formatting fixes.
* ipa-cp.c (class ipcp_bits_lattice): Formatting fixes.
(print_ipcp_constant_value): Likewise.
(ipcp_cloning_candidate_p): Likewise.
(ipcp_bits_lattice::get_value_and_mask): Likewise.
(ipcp_bits_lattice::meet_with_1): Likewise.
(ipcp_bits_lattice::meet_with): Likewise.
(initialize_node_lattices): Likewise.
(ipcp_lattice::add_value): Likewise.
(propagate_vals_accross_pass_through): Renamed to ...
(propagate_vals_across_pass_through): ... this function.
(propagate_vals_accross_ancestor): Renamed to ...
(propagate_vals_across_ancestor): ... this.
(propagate_scalar_accross_jump_function): Renamed to ...
(propagate_scalar_across_jump_function): ... this.
Adjust calls to above functions.
(propagate_context_accross_jump_function): Renamed to ...
(propagate_context_across_jump_function): ... this.
(propagate_bits_accross_jump_function): Renamed to ...
(propagate_bits_accross_jump_function): ... this. Formatting fixes.
(propagate_vr_accross_jump_function): Renamed to ...
(propagate_vr_across_jump_function): ... this.
(merge_agg_lats_step): Formatting fixes.
(propagate_constants_accross_call): Renamed to ...
(propagate_constants_across_call): ... this. Adjust calls to above
functions.
(ipa_get_indirect_edge_target_1): Formatting fixes.
(gather_context_independent_values): Likewise.
(estimate_local_effects): Likewise.
(add_all_node_vals_to_toposort): Likewise.
(propagate_constants_topo): Adjust calls to above functions.
(get_replacement_map): Formatting fixes.
(dump_profile_updates): Likewise.
(update_profiling_info): Likewise.
(update_specialized_profile): Likewise.
(create_specialized_node): Likewise.
(find_more_contexts_for_caller_subset): Likewise.
(decide_whether_version_node): Likewise.
(identify_dead_nodes): Likewise.
(ipcp_decision_stage): Likewise.
(ipcp_store_bits_results): Likewise.
(ipcp_store_vr_results): Likewise.
(ipcp_driver): Likewise.
From-SVN: r243725
Jakub Jelinek [Thu, 15 Dec 2016 20:42:11 +0000 (21:42 +0100)]
P0490R0 GB 20: decomposition declaration should commit to tuple interpretation early
P0490R0 GB 20: decomposition declaration should commit to tuple
interpretation early
* decl.c (get_tuple_size): Make static. If inst is error_mark_node
or non-complete type, return NULL_TREE, otherwise if
lookup_qualified_name fails or doesn't fold into INTEGER_CST, return
error_mark_node.
(get_tuple_element_type, get_tuple_decomp_init): Make static.
(cp_finish_decomp): Pass LOC to get_tuple_size. If it returns
error_mark_node, complain and fail.
* g++.dg/cpp1z/decomp10.C (f1): Adjust expected diagnostics.
From-SVN: r243724
Nathan Sidwell [Thu, 15 Dec 2016 19:50:25 +0000 (19:50 +0000)]
re PR c++/77585 (g++ incorrectly decides that member function is called without object in generic lambda)
PR c++/77585
* pt.c (instantiate_decl): Push to class scope lambda resides
within when instantiating a generic lambda function.
PR c++/77585
* g++.dg/cpp1y/pr77585.C: New.
From-SVN: r243723
David Malcolm [Thu, 15 Dec 2016 18:05:05 +0000 (18:05 +0000)]
Fix use-after-free lexing unterminated raw strings (PR preprocessor/78811)
gcc/ChangeLog:
PR preprocessor/78680
PR preprocessor/78811
* input.c (struct selftest::lexer_test): Add field
m_implicitly_expect_EOF.
(selftest::lexer_error_sink): New class.
(selftest::lexer_error_sink::s_singleton): New global.
(selftest::lexer_test::lexer_test): Initialize new field
"m_implicitly_expect_EOF".
(selftest::lexer_test::~lexer_test): Conditionalize the
check for the EOF token on the new field.
(selftest::test_lexer_string_locations_raw_string_unterminated):
New function.
(selftest::input_c_tests): Call the new test.
libcpp/ChangeLog:
PR preprocessor/78680
PR preprocessor/78811
* lex.c (_cpp_lex_direct): Only determine the end-location of
the token and build a range for non-reserved start locations.
Do not do it for EOF tokens.
From-SVN: r243721
Wilco Dijkstra [Thu, 15 Dec 2016 17:51:46 +0000 (17:51 +0000)]
Using leaf_function_p in a backend is dangerous as it incorrectly returns false...
Using leaf_function_p in a backend is dangerous as it incorrectly returns
false if it is called while in a sequence (for example during prolog/epilog
generation). Replace all uses with crtl->is_leaf as this is now initialized
early enough in ira.c. This typically causes no code generation differences
unless there was a bug due to leaf_function_p returning the wrong value.
gcc/
* config/arm/arm.h (TARGET_BACKTRACE): Use crtl->is_leaf.
* config/arm/arm.c (arm_option_check_internal): Improve comment.
(thumb_force_lr_save): Use crtl->is_leaf.
(arm_get_frame_offsets): Remove comment. Use crtl->is_leaf.
(thumb_far_jump_used_p): Remove comment.
(arm_frame_pointer_required): Use crtl->is_leaf.
From-SVN: r243720
Richard Earnshaw [Thu, 15 Dec 2016 17:04:46 +0000 (17:04 +0000)]
[arm] Add missing arm-isa.h
From-SVN: r243718
Jakub Jelinek [Thu, 15 Dec 2016 16:47:47 +0000 (17:47 +0100)]
extend.texi: Clean up @xref{...} uses.
* doc/extend.texi: Clean up @xref{...} uses.
* doc/invoke.texi: Likewise.
From-SVN: r243717
Richard Earnshaw [Thu, 15 Dec 2016 16:04:08 +0000 (16:04 +0000)]
[arm] Permit 'auto' in -mfpu
Now we finally have the infrastructure in place we can now derive
details of the FPU from a CPU entry. This patch enables this for the
existing cores that already have an explicit FPU in their product names.
* arm-fpus.def: Add CNAME field to all FPU definitions.
* genopt.sh: Use explicit enumeration tags for FPU entries.
* arm-tables.opt: Regenerated.
* arm.opt (mfpu): Provide initial value.
* arm-opts.h (enum fpu_type): Build the enumeration from the list of
available FPUs. Add 'auto' entry on the end.
* arm.c (arm_configure_build_target): Only do explicit configuration
of the FPU features if the selected FPU is not 'auto'.
(arm_option_override): Adjust initialization of arm_fpu_index.
Emit an error if we have a hard float ABI request, but the processor
does not support floating-point.
(arm_option_print): Handle -mfpu=auto.
(arm_valid_target_attribute_rec): Don't permit fpu=auto in pragmas
or function attributes.
(arm_identify_fpu_from_isa): Handle effective soft-float when
the FPU is automatically detected.
* arm-cores.def (arm1136jf-s): Add feature ISA_FP_DBL.
(arm1176jzf-s): Likewise.
(mpcore): Likewise.
(arm1156t2f-s): Likewise.
From-SVN: r243716
Richard Earnshaw [Thu, 15 Dec 2016 16:03:06 +0000 (16:03 +0000)]
[arm] Remove FEATURES field from FPU descriptions
Now that everything uses the new ISA features, we can remove the
FEATURES field from the FPU descriptions, along with all the macros
and definitions associated with it.
* arm-fpus.def (ARM_FPU): Remove features field from all definitions.
* arm.h (arm_fpu_feature_set): Delete typedef.
(FPU_FL_NONE): Delete.
(FPU_FL_NEON): Delete.
(FPU_FL_FP16): Delete.
(FPU_FL_CRYPTO): Delete.
(FPU_FL_DBL): Delete.
(FPU_FL_D32): Delete.
(FPU_FL_VFPv2): Delete.
(FPU_FL_VFPv3): Delete.
(FPU_FL_VFPv4): Delete.
(FPU_FL_VFPv5): Delete.
(FPU_FL_AMRv8): Delete.
(FPU_VFPv2): Delete.
(FPU_VFPv3): Delete.
(FPU_VFPv4): Delete.
(FPU_VFPv5): Delete.
(FPU_ARMv8): Delete.
(FPU_DBL): Delete.
(FPU_D32): Delete.
(FPU_NEON): Delete.
(FPU_CRYPTO): Delete.
(FPU_FP16): Delete.
(arm_fpu_desc): Delete features field.
* arm.c (all_fpus): Don't initialize feature field.
From-SVN: r243715
Richard Earnshaw [Thu, 15 Dec 2016 16:01:55 +0000 (16:01 +0000)]
[arm] Use ISA feature sets for determining inlinability
Now that we can construct the build target isa from the cl_target_options
data we can use this to determine inlinability. This eliminates the
final remaining use of the FPU features field.
* arm.c (arm_can_inline_p): Use ISA features for determining
inlinability.
From-SVN: r243714
Richard Earnshaw [Thu, 15 Dec 2016 16:00:30 +0000 (16:00 +0000)]
[arm] Use cl_target_options for configuring the active target
It now becomes apparent that it would be better to use the the
cl_target_options as the basis for calling arm_configure_build_target;
it already contains exactly the same fields that we need. I chose not
to rewrite the earlier patches as that would make the progression of
changes seem less logical than it currently is, with several early
changes having no immediate justification.
* arm-protos.h (arm_configure_build_target): Change second argument
to cl_target_options.
* arm.c (arm_configure_build_target): Likewise.
(arm_option_restore): Update accordingly.
(arm_option_override): Create the target_option_default_node before
calling arm_configure_build_target. Use it in call of latter.
Resynchronize after all other overrides have been calculated.
(arm_valid_target_attribute_tree): Use the target options for
reconfiguration. Resynchronize after performing override checks.
* arm-c.c (arm_pragma_target_parse): Use target optiosn from cur_tree
to reconfigure the build target.
From-SVN: r243713
Richard Earnshaw [Thu, 15 Dec 2016 15:59:20 +0000 (15:59 +0000)]
[arm] Use arm_active_target for most FP feature tests
Now that the isa feature bits are all available in arm_active_target
we can use that for most of the feature tests that are needed.
* arm.h (TARGET_VFPD32): Use arm_active_target.
(TARGET_VFP3): Likewise.
(TARGET_VFP5): Likewise.
(TARGET_VFP_SINGLE): Likewise.
(TARGET_VFP_DOUBLE): Likewise.
(TARGET_NEON_FP16): Likewise.
(TARGET_FP16): Likewise.
(TARGET_FMA): Likewise.
(TARGET_FPU_ARMV8): Likewise.
(TARGET_CRYPTO): Likewise.
(TARGET_NEON): Likewise.
(TARGET_FPU_FEATURES): Delete.
* arm.c (arm_option_check_internal): Check for iwmmxt conflict with
Neon using arm_active_target.
From-SVN: r243712
Richard Earnshaw [Thu, 15 Dec 2016 15:58:02 +0000 (15:58 +0000)]
[arm] Eliminate TARGET_FPU_NAME
Rather than assuming a specific fpu name has been selected, we work
out the FPU from the ISA properties. This is necessary since once we
have default FPUs selected by the processor, there will be no explicit
entry in the table of fpus to refer to.
This also fixes a bug with the code I added recently to permit new
aliases for existing FPU names: the new names cannot be passed to the
assembler since it does not recognize them. By mapping the ISA
features back to the canonical names we avoid having to teach the
assembler about the new names.
* arm.h (TARGET_FPU_NAME): Delete.
* arm.c (arm_identify_fpu_from_isa): New function.
(arm_declare_function_name): Use it to get the name for the FPU.
From-SVN: r243711
Richard Earnshaw [Thu, 15 Dec 2016 15:56:29 +0000 (15:56 +0000)]
[arm] Initialize fpu capability bits in arm_active_target
Now that we can describe the FPU with the standard ISA bits we need to
initialize them. However, the FPU settings can be changed with target build
attributes, so we also need to reset them if things change. This requires
a bit of juggling about with the existing code to ensure that the active
target is reconfigured after each change to the target options.
* arm-protos.h: Include sbitmap.h
(arm_configure_build_target): Make public.
* arm.c (arm_configure_build_target): Now not static.
(arm_valid_target_attribute_rec): Move internal option check to...
(arm_valid_target_attribute_tree0: ... here. Also reconfingure the
active target.
(arm_override_options_after_change): Call arm_configure_build_target.
(isa_all_fpubits): Renamed from isa_fpubits.
(arm_option_restore): New function.
(TARGET_OPTION_RESTORE): Register it.
(arm_configure_build_target): Initialize the FPU capability bits in
the isa.
(arm_option_override): Move the code that forces the setting of the
FPU option before the call to arm_configure_build_target.
* arm.opt (march): Mark as Save.
(mcpu, mtune): Likewise.
* arm-c.c (arm_pragma_target_parse): Reconfigure the build target
after pragmas change the target options.
From-SVN: r243710
Richard Earnshaw [Thu, 15 Dec 2016 15:54:53 +0000 (15:54 +0000)]
[arm] Add isa features to FPU descriptions
Similar to the new CPU and architecture ISA feature lists, we now add
similar capabilities to each FPU description. We don't use these yet,
that will come in later patches. These follow the same style as the
newly modified flag sets, but use slightly different defaults that
more accurately reflect the ISA specifications.
* arm-isa.h (isa_feature): Add bits for VFPv4, FPv5, fp16conv,
fP_dbl, fp_d32 and fp_crypto.
(ISA_ALL_FPU): Add all the new bits.
(ISA_VFPv2, ISA_VFPv3, ISA_VFPv4, ISA_FPv5): New macros.
(ISA_FP_ARMv8, ISA_FP_DBL, ISA_FP_D32, ISA_NEON, ISA_CRYPTO): Likewise.
* arm-fpus.def: Add ISA features to all FPUs.
* arm.h: (arm_fpu_desc): Add new field for ISA bits.
* arm.c (all_fpus): Initialize it.
* arm-tables.opt: Regenerated.
From-SVN: r243709
Richard Earnshaw [Thu, 15 Dec 2016 15:53:50 +0000 (15:53 +0000)]
[arm] Remove FPU rev field
Similar to the main ISA, we convert the FPU revision into a set of feature
bits. This permits a more complex set of capability relationships to be
expressed more easily. For now we continue to use the traditional bitmasks.
* arm.h (FPU_FL_VFPv2) New feature bit.
(FPU_FL_VFPv3, FPU_FL_VFPv4, FPU_FL_VFPv5, FPU_FL_ARMv8): Likewise.
(FPU_VFPv2, FPU_VFPv3, FPU_VFPv4, FPU_VFPv5, FPU_ARMv8): New helper
macros.
(FPU_DBL, FPU_D32, FPU_NEON, FPU_CRYPTO, FPU_FP16): Likewise.
(TARGET_FPU_REV): Delete.
(TARGET_VFP3): Use feature bits.
(TARGET_VFP5): Likewise.
(TARGET_FMA): Likewise.
(TARGET_FPU_ARMV8): Likewise.
(struct arm_fpu_desc): Delete rev field.
* arm-fpus.def: Delete REV entry, use new feature bits and macros.
* arm.c (all_fpus): Delete rev field.
From-SVN: r243708
Richard Earnshaw [Thu, 15 Dec 2016 15:52:42 +0000 (15:52 +0000)]
[arm] Eliminate vfp_reg_type
Remove the VFP_REGS field by converting its meanings into flag
attributes. The new flag attributes build on each other describing
increasing capabilities. This allows us to do a better job when
inlining functions with differing requiremetns on the fpu environment:
we can now inline A into B if B has at least the same register set
properties as B (previously we required identical register set
properties).
* arm.h (vfp_reg_type): Delete.
(TARGET_FPU_REGS): Delete.
(arm_fpu_desc): Delete regs field.
(FPU_FL_NONE, FPU_FL_NEON, FPU_FL_FP16, FPU_FL_CRYPTO): Use unsigned
values.
(FPU_FL_DBL, FPU_FL_D32): Define.
(TARGET_VFPD32): Use feature test.
(TARGET_VFP_SINGLE): Likewise.
(TARGET_VFP_DOUBLE): Likewise.
* arm-fpus.def: Update all entries for new feature bits.
* arm.c (all_fpus): Update initializer macro.
(arm_can_inline_p): Remove test on fpu regs.
From-SVN: r243707
Richard Earnshaw [Thu, 15 Dec 2016 15:51:35 +0000 (15:51 +0000)]
[arm] Delete unused arm_fp_model
The arm_fp_model enumeration type has only had one useful value since
the FPA support was removed, and it's no-longer used anywhere. This
patch just cleans that up by removing it.
* arm.h (arm_fp_model): Delete.
From-SVN: r243706
Richard Earnshaw [Thu, 15 Dec 2016 15:50:24 +0000 (15:50 +0000)]
[arm] Remove remaining references to arm feature sets
Nothing uses the old feature sets now, so we can delete them entirely.
* arm-cores.def: Remove FLAGS field from all core definitions.
* arm-arches.def: Likewise.
* arm-opts.h (enum processor_type): Remove FLAGS parameter from
ARM_CORES macro.
(arm_arch_core_flags): Likewise, plus ARM_ARCH macro.
* arm-protos.h (FL_*): Delete.
(arm_feature_set): Delete.
(ARM_FSET_*): Delete.
* arm.c (struct processors): Delete flags field.
(all_cores): Delete FLAGS parameter from macro, don't initialize flags.
(all architectures): Likewise.
From-SVN: r243705
Richard Earnshaw [Thu, 15 Dec 2016 15:49:13 +0000 (15:49 +0000)]
[arm] Rework arm-common to use new feature bits.
This converts the recently added implicit -mthumb support code to use
the new data structures. Since we have a very simple query and no
initialized copies of the sbitmaps, for now we simply scan the list of
features to look for the one of interest.
* arm-opts.h (struct arm_arch_core_flag): Add new field ISA.
Initialize it.
(arm_arch_core_flag): Delete flags field.
(arm_arch_core_flags): Don't initialize flags field.
* common/config/arm/arm-common.c (check_isa_bits_for): New function.
(arm_target_thumb_only): Use new isa bits arrays.
From-SVN: r243704
Richard Earnshaw [Thu, 15 Dec 2016 15:47:58 +0000 (15:47 +0000)]
[arm] Remove insn_flags.
This patch finishes the job of removing insn_flags and moves the logic
over to using the new data structures. I've added a new boolean
variable to detect when we have ARMv7ve-like capabilities and thus
have 64-bit atomic operations since that would be a complex query and
expensive to do in full. It might be better to add a specific bit to
the ISA data structures to indicate this capability directly.
* arm-protos.h (insn_flags): Delete declaration.
(arm_arch7ve): Declare.
* arm.c (insn_flags): Delete.
(arm_arch7ve): New variable.
(arm_selected_cpu): Delete.
(arm_option_check_internal): Use new ISA bitmap.
(arm_option_override_internal): Likewise.
(arm_configure_build_target): Declare arm_selected_cpu locally.
(arm_option_override): Use new ISA bitmap. Initialize arm_arch7ve.
Rearrange variable intialization by general function.
* arm.h (TARGET_HAVE_LPAE): Use arm_arch7ve.
From-SVN: r243703
Richard Earnshaw [Thu, 15 Dec 2016 15:46:41 +0000 (15:46 +0000)]
[arm] Use arm_active_target when configuring builtins
This patch uses the new ISA data structure to determine which builtins
to add. It entirely eliminates the need for insn_flags to be a global
variable, but we're about to delete that in the following patches, so
for now we leave it as a global.
* arm-builtins.c: Include sbitmap.h.
(def_mbuiltin): Change first parameter to a flag bit. Use it to test
available features in the current target.
(struct builtin_description): Change type of feature field.
(IWMMXT_BUILTIN): Use the isa_features types.
(IWMMXT2_BUILTIN): Likewise.
(IWMMXT_BUILTIN2): Likewise.
(IWMMXT2_BUILTIN2): Likewise.
(CRC32_BUILTIN): Likewise.
(CRYPTO_BUILTIN): Likewise.
(iwmmx_builtin): Likewise.
(iwmmx2_builtin): Likewise.
(arm_iwmmxt_builtin): Check for specific feature bits.
From-SVN: r243702
Richard Earnshaw [Thu, 15 Dec 2016 15:45:23 +0000 (15:45 +0000)]
[arm] Add new isa quirk bit for Cortex-M3 ldrd issue.
With the new data structures it is trivial to add a new field and we
aren't (too) limited as to the number we have. This patch adds a new
bit to describe the need for a particular compiler behaviour
modification: in this case a quirk in the cortex-m3.
* arm-isa.h (enum isa_feature): Add isa_quirk_cm3_ldrd.
(ISA_ALL_QUIRKS): New macro.
* arm-cores.def (cortex-m3): Add isa_quirk_cm3_ldrd to isa feature list.
* arm.c (isa_quirkbits): New feature-list bitmap.
(arm_configure_build_target): Ignore quirk bits when comparing an
architecture feature list with a CPU feature list.
(arm_option_override): Initialize_isa_quirkbits. If the user has
not specified -m[no-]fix-cortex-m3-ldrd, automatically enable the
feature if isa_quirk_cm3_ldrd appears in the isa feature list.
From-SVN: r243701
Richard Earnshaw [Thu, 15 Dec 2016 15:44:01 +0000 (15:44 +0000)]
[arm] Reduce usage of arm_selected_cpu.
Make more use of the new data structure for initializing existing
variables.
* arm.c (arm_option_override): Use arm_active_target as source of
information for arm_base_arch and arm_arch_name.
* (arm_file_start): Use arm_active_target for core name.
From-SVN: r243700
Richard Earnshaw [Thu, 15 Dec 2016 15:42:43 +0000 (15:42 +0000)]
[arm] Use arm_active_target for architecture and tune
We now start to make more use of the new data structure. This allows
us to eliminate two of the existing static variables,
arm_selected_arch and arm_selected tune.
* arm.c (arm_selected_tune): Delete static variable.
(arm_selected_arch): Likewise.
(arm_configure_build_target): Declare local versions of arm_selected
target and arm_selected_arch. Initialize more fields in target
data structure.
(arm_option_override): Use arm_active_target instead of
arm_selected_tune and arm_selected_arch.
(asm_file_start): Use arm_active_target.
From-SVN: r243699
projects / gcc.git / log