nvc0: fix the driver cb size when draw parameters are used

The size of the driver constant buffer for each stage should be 2048
and not 512 because it has been increased recently for buffers/images.
While we are at it, do the same change for indirect draws.

This fixes all ARB_shader_draw_parameters tests on GM107.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: 12.0 <mesa-stable@lists.freedesktop.org>

nvc0/ir: fix images indirect access on Fermi

This fixes the following piglits:

arb_arrays_of_arrays-basic-imagestore-mixed-const-non-const-uniform-index
arb_arrays_of_arrays-basic-imagestore-mixed-const-non-const-uniform-index2

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: 12.0 <mesa-stable@lists.freedesktop.org>

st/mesa: remove st_dump_program_for_shader_db

replaced by MESA_SHADER_CAPTURE_PATH in core Mesa

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

gallivm: set LLVMNoUnwindAttribute on all intrinsics

RadeonSI stats: Mostly 0% difference, but Valley shows a small improvement:

 Application            Files    SGPRs     VGPRs   SpillSGPR SpillVGPR Code Size    LDS    Max Waves   Waits
 unigine_valley           278    0.00 %   -0.29 %    0.00 %    0.00 %    0.01 %    0.00 %    0.17 %    0.00 %

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>

i965: fix ignored qualifiers warning

Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

gallium/u_queue: assert that users must wait on fences before destroying them

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>

gallium/u_queue: guard fence->signalled checks with fence->mutex

I have seen a hang during application shutdown that could be explained by the
following race condition which this patch fixes:

1. Worker thread enters util_queue_fence_signal, sets fence->signalled = true.
2. Main thread calls util_queue_job_wait, which returns immediately.
3. Main thread deletes the job and fence structures, leaving garbage behind.
4. Worker thread calls pipe_condvar_broadcast, which gets stuck forever because
   it is accessing garbage.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>

anv/dump: Fix post-blit memory barrier

Swap srcAccessMask and dstAccessMask.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

anv/dump: Fix vkCmdPipelineBarrier flags

'true' is not valid for VkDependencyFlags.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

anv/dump: Add support for dumping framebuffers

Reviewed-by: Chad Versace <chad.versace@intel.com>

anv/dump: Add a barrier for the source image

Reviewed-by: Chad Versace <chad.versace@intel.com>

anv/dump: Refactor the guts into helpers

Reviewed-by: Chad Versace <chad.versace@intel.com>

anv/dump: Use anv_minify instead of hand-rolling it

Reviewed-by: Chad Versace <chad.versace@intel.com>

anv/dump: Take an aspect in dump_image_to_ppm

Reviewed-by: Chad Versace <chad.versace@intel.com>

radeonsi: fix bad assertion in si_emit_sample_mask

The blitter sets mask == 1, which is fine since it doesn't use smoothing.
Fixes a regression introduced in commit 5bcfbf91.

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>

glx: Fix for commit 2c86668694.

Ian suggested these changes in his review and I made them, but I pushed
the old version of the patch.

docs: add news item and link release notes for 12.0.0/12.0.1

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

docs: add sha256 checksums for 12.0.1

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit edfc17a19a17e8dae41a703a9cb4b9eb3c255c34)

docs: add release notes for 12.0.1

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 04277f058d00238937e664cf546c43b16cea7b2b)

docs: add sha256 checksums for 12.0.0

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 3a146a789c5aa45e0de52bff764c2b371dd253aa)

docs: Update 12.0.0 release notes

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 8b06176f310f65628ce136b90a99005278ba5e0d)

glx: Undo memory allocation checking damage.

This partially reverts commit d41f5396f3cb619729021390c273f838d92f11fb.

That untested commit broke the tex-skipped-unit piglit test and the
arbvparray Mesa demo when run with indirect GLX.

state->array_state is used during initialization, so its assignment cannot be
moved to the end of the function.

The backtrace looked like:

Program received signal SIGSEGV, Segmentation fault.
0x00007ffff77c7a5c in __glXGetActiveTextureUnit (state=0x6270e0) at indirect_vertex_array.c:1952
1952           return state->array_state->active_texture_unit;
(gdb) bt
0  0x00007ffff77c7a5c in __glXGetActiveTextureUnit (state=0x6270e0) at indirect_vertex_array.c:1952
1  0x00007ffff77cbf62 in get_client_data (gc=0x626f50, cap=34018, data=0x7fffffffd7a0) at single2.c:159
2  0x00007ffff77cce51 in __indirect_glGetIntegerv (val=34018, i=0x7fffffffd830) at single2.c:498
3  0x00007ffff77c4340 in __glXInitVertexArrayState (gc=0x626f50) at indirect_vertex_array.c:193

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

glx: Fix indirect multi-texture GL_DOUBLE coordinate arrays.

There is no draw arrays protocol support for multi-texture coordinate
arrays, so it is implemented by sending batches of immediate mode
commands from emit_element_none in indirect_vertex_array.c.  This sends
the target texture unit (which has been previously setup in the
array_state header field), followed by the texture coordinates.  But for
GL_DOUBLE coordinates the texture unit must be sent *after* the texture
coordinates. This is documented in the glx protocol description, and can
also be seen in the indirect.c immediate mode commands generated from
gl_API.xml. Sending the target texture unit in the wrong place can crash
the remote X server.

To fix this required some more extensive changes to
indirect_vertex_array.c and indirect_vertex_array_priv.h, in order to
remove the texture unit value out of the array_state "header" field, and
send it separately.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=61907

glx: Correct opcode typos in __indirect_glTexCoordPointer.

At the same time, replace opcode numbers with names in
__indirect_glVertexAttribPointer.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=61907

glx: Call __glXInitVertexArrayState() with a usable gc.

For each indirect context the indirect vertex array state must be initialised
by __glXInitVertexArrayState in indirect_vertex_array.c.  As noted in the
routine header it requires that the glx context has been setup prior to the
call, in order to test the server version and extensions.

Currently __glXInitVertexArrayState is called from indirect_bind_context in
indirect_glx.c, as follows:

   state = gc->client_state_private;
   if (state->array_state == NULL) {
      glGetString(GL_EXTENSIONS);
      glGetString(GL_VERSION);
      __glXInitVertexArrayState(gc);
   }

But, the gc context is not yet usable at this stage, so the server queries
fail, and __glXInitVertexArrayState is called without the server version and
extension information it needs.  This breaks multi-texturing as
glXInitVertexArrayState doesn't get GL_MAX_TEXTURE_UNITS.  It probably also
breaks setup of other arrays: fog, secondary colour, vertex attributes.

To fix this I have moved the call to __glXInitVertexArrayState to the end of
MakeContextCurrent in glxcurrent.c, where the glx context is usable.

Fixes a regression caused by commit 4fbdde889c. Fixes ARB_vertex_program
usage in the arbvparray Mesa demo when run with indirect GLX and also
the tex-skipped-unit piglit test when run with indirect GLX.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Acked-by: Ian Romanick <ian.d.romanick@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=61907

radeon/uvd: simplify sending context buffer message

Just send it whenever it is allocated.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>

radeon/uvd: fix contex buffer destruction in the error path

Destroying a not allocated buffer is harmless.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>

radeon/uvd: move polaris fw check into radeon_video.c v2

It's actually not very clever to claim to support H.264
and then fail to create a decoder.

v2: prefix FW macro with UVD_.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>

radeon/video: fix coding style in radeon_video.c v2

v2: fix other tabs as well.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>

svga: simplify/fix 1D/2D array resource copies

Fixes the one of the piglit arb_copy_image-targets tests for 1D arrays.
Previously, we were applying the 1D array z/face adjustment twice.

Also simplify the copy_region_vgpu10() function.  It never has to copy
multiple array layers/slices.  The Mesa code for glCopyImageSubData does
the loop over slices/faces.

Reviewed-by: Charmaine Lee <charmainel@vmware.com>

mesa: print number of samples in renderbuffer_storage error msg

Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>

svga: remove unused variable

Reviewed-by: Charmaine Lee <charmainel@vmware.com>

svga: add dumping for more device commands

Signed-off-by: Brian Paul <brianp@vmware.com>

svga: silence a couple unused variable warnings

Signed-off-by: Brian Paul <brianp@vmware.com>

svga: rebind using render target surfaces in hw draw state

Currently when we rebind framebuffer resources at the beginning of
the command buffer, we use the color buffer surfaces saved in the context
hw clear state. But the surfaces could be different from the actual
emitted render target surfaces if any of the color buffer surfaces
is also used for shader resource, in that case, we create
a backed surface for the collided render target surface. So to rebind
the framebuffer resources correctly, use the render target surfaces saved
in the context hw draw state.

Tested with Heaven, Lightsmark2008, MTT piglit, glretrace, conform.

Reviewed-by: Brian Paul <brianp@vmware.com>

svga: invalidate gb surface before it is reused

With this patch, a guest-backed surface will be invalidated
using the SVGA_3D_CMD_INVALIDATE_GB_SURFACE command before
the surface is reused. This fixes the updating dirty image error
from the device when a surface is reused.

v2: Instead of invalidating the surface when it is reused,
    send the invalidate command before the surface is put into
    the recycle pool.

v3: (1) surface invalidate is a noop operation in Linux winsys, since
        surface invalidation is not needed for DMA path.
    (2) Instead of invalidating the surface content in
        svga_screen_surface_destroy() when a surface is to be destroyed,
        it is done in svga_screen_cache_flush() when the surface is
        no longer referenced in a command buffer and is ready to
        be moved to the unused list. At this point, the surface will
        be moved to the invalidate list. When the surface invalidation
        is submitted, the surface will be moved to the unused list.

Tested with piglit, glretrace.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Sinclair Yeh <syeh@vmware.com>

svga: fix use of provoking vertex control

If the SVGA3D_DEVCAP_DX_PROVOKING_VERTEX query returns false, never
define rasterizer state objects with provokingVertexLast set.  Despite
what the device reports, it may interpret the provokingVertexLast flag
anyway.  This fixes an issue when using capability clamping.

Tested with piglit provoking-vertex and glsl-fs-flat-color tests.

VMware bug 1550143.

Reviewed-by: <charmainel@vmware.com>

vl: add half pixel to v_tex before adding offsets

Since pixel center lies at 0.5, add half_pixel to vtex
before adding offsets to it.

Signed-off-by: Nayan Deshmukh <nayan26deshmukh@gmail.com>
Reviewed-by: Christian König <christian.koenig@amd.com>

nvc0/ir: remove unused resource info loading helpers

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

nvc0/ir: refactor the surfaces info loading logic

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

nvc0/ir: move the shift left op inside loadTexHandle()

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

radeonsi: disable multi-threading when shader dumps are enabled

Otherwise, shader dumps can become interleaved and unusable.

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

radeonsi: use multi-threaded compilation in debug contexts

We only have to stay single-threaded when debug output must be synchronous.
This yields better parallelism in shader-db runs for me.

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

st/mesa: set debug callback async flag

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

gallium: add async flag to pipe_debug_callback

v2: fix typo db -> cb

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

radeonsi: catch a potential state tracker error with non-MSAA FBs

At least st/mesa ensures this, so I'd rather not handle deviations in radeonsi.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

radeonsi: explicitly choose center locations for 1xAA on Polaris

Unlike SC, the small primitive filter does not automatically use center
locations in 1xAA mode, so this is needed to avoid artifacts caused by
the small primitive filter discarding triangles that it shouldn't.

As a side effect of how the effective number of samples is now calculated,
this patch also avoids submitting the sample locations for line/poly smoothing
when they're not really needed.

Cc: 12.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

r600g: call cayman_emit_msaa_sample_locs only when needed

In the case of nr_samples <= 1, that function is (currently) a no-op anyway.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

mesa: Mark R*32F formats as filterable when an extension is present.

GL_OES_texture_float_linear marks R32F, RG32F, RGB32F, and RGBA32F
as texture filterable.

Fixes glGenerateMipmap GL errors when visiting a WebGL demo in Chromium:
http://www.iamnop.com/particles

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

i965/blorp: fix indentation level

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>

i965: Fix remaining flush vs invalidate race conditions in brw_emit_pipe_control_flush.

This hardware race condition has caused problems several times already
(see "i965: Fix cache pollution race during L3 partitioning set-up.",
"i965: Fix brw_render_cache_set_check_flush's PIPE_CONTROLs." and
"i965: intel_texture_barrier reimplemented").  The problem is that
whenever we attempt to both flush and invalidate multiple caches with
a single pipe control command the flush and invalidation happen in
reverse order, so the contents flushed from the R/W caches aren't
guaranteed to become visible from the invalidated caches after the
PIPE_CONTROL command completes execution if some concurrent rendering
workload happened to pollute any of the invalidated R/O caches in the
short window of time between the invalidation and flush.

This makes sure that brw_emit_pipe_control_flush() has the effect
expected by most callers of making the contents flushed from any R/W
caches visible from the invalidated R/O caches.

Cc: "12.0 11.1 11.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

i965: Make room in the batch epilogue for three more pipe controls.

Review carefully, it sucks to have to keep track of the number of
command packet dwords emitted in the batch epilogue manually.  The
MI_REPORT_PERF_COUNT_BATCH_DWORDS calculation was obviously wrong.

Cc: "12.0 11.1 11.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

i965: Emit SKL VF cache invalidation W/A from brw_emit_pipe_control_flush.

There were two places in the driver doing a pipe control VF cache
flush, one of them was missing this workaround, move it down into
brw_emit_pipe_control_flush to make sure we don't miss it again.

Cc: "12.0 11.1 11.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>

i965: Emit SNB write cache flush W/A from brw_emit_pipe_control_flush.

Shouldn't cause any functional changes at this point, but we have
forgotten to apply this workaround several times in the past, make
sure it doesn't happen again.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>

egl: restrict swap_available dri2_egl_display field to X11

This field is only ever set and read by the X11 platform.

Signed-off-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>

egl: Fix the bad surface attributes combination checking for pbuffers. (v3)

Fixes a regression induced by commit a0674ce5c41903ccd161e89abb149621bfbc40d2:
When EGL_TEXTURE_FORMAT and EGL_TEXTURE_TARGET were both specified (and
both != EGL_NO_TEXTURE), an error was instantly triggered, before the
other one had even a chance to be checked, which is obviously not the
intended behaviour.

v2: Full commit hash, remove useless variables.
v3: [chadv] Add Fixes footers.

Fixes: piglit "spec/egl 1.4/eglcreatepbuffersurface and then glclear"
Fixes: piglit "spec/egl 1.4/largest possible eglcreatepbuffersurface and then glclear"
Signed-off-by: Guillaume Charifi <guillaume.charifi@sfr.fr>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>

egl/display: remove unnecessary code and make it easier to read

Remove the two first level `if` as they will always be true, and
flatten the two remaining `if`.
No functional change.

Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>

mesa: Make single-buffered GLES representation internally consistent

There are a few places in the code where clearing and reading are done on
incorrect buffers for GLES contexts.  See comments for details.  This
fixes 75 GLES3 dEQP tests on the surfaceless platform with no regressions.

v2: Corrected unclear comment
v3: Make the change in context.c instead of get.c
v4: Removed whitespace

Reviewed-by: Stéphane Marchesin <marcheu@chromium.org>
Reviewed-by: Chad Versace <chad.versace@intel.com>

bugzilla_mesa.sh: Drop "Bug " from sed command

After a recent Bugzilla update the word is no longer in the title. Thus
the script ended up producing bogus HTML.

Cc: "11.2 12.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

mesa: don't install GLX files if GLX is not built

Cc: "11.2 12.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Akihiko Odaki <akihiko.odaki.4i@stu.hosei.ac.jp>
[Emil Velikov: Drop guards around dri_interface.h, add stable tag]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

nir: add glsl_dvec_type() helper

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

osmesa: Export OSMesaCreateContextAttribs.

Since the function is exported like any other
public api function and put in the header
as if you could link against it, export it also
from shared objects.

Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Reviewed-by: Brian Paul <brianp@vmware.com>
Cc: "11.2 12.0" <mesa-stable@lists.freedesktop.org>

i965: consolidate generation check

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>

i965: don't copy VS attribute work arounds for HSW+

These workarounds are not required for HSW and above so stop
copying them at VS key generation which is called at draw time.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965: add double packing support to tess stages

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965: add double support packing support to gs inputs

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

nir: add glsl_double_type() helper

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965: add indirect packing support to gs load inputs

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965: add indirect packing support for tcs and tes

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965: add component packing support for tcs

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965: add component packing support for tes

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965: add component packing support for gs

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

nir: use the same driver location for packed varyings

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

nir: add new intrinsic field for storing component offset

This offset is used for packing.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/docs: update Intel Linux Graphics URLs

Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>

anv: gitignore anv_timestamp.h

radeon/llvm: Use alloca instructions for larger arrays

We were storing arrays in vectors, which was leading to some really bad
spill code for large arrays.  allocas instructions are a better fit for
arrays and LLVM optimizations are more geared toward dealing with
allocas instead of vectors.

For arrays that have 16 or less 32-bit elements, we will continue to use
vectors, because this will force LLVM to store them in registers and
use indirect registers, which is usually faster for small arrays.

In the future we should use allocas for all arrays and teach LLVM
how to store allocas in registers.

This fixes the piglit test:

spec/glsl-1.50/execution/geometry/max-input-component

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

radeon/llvm: Add helpers for loading and storing data from arrays.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

radeon/llvm: Remove uses_temp_indirect_addressing() function

bld->indirect_files is never set, so this function always returns false.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

anv: vulkan: remove the anv_device.$(OBJEXT) rule

Atm the actual rule will expand to foo.o which is used for static
libraries only.

Thus the automake manual recommendation [to use OBJEXT] won't help us,
since since we're working with a shared library.

Thus let's 'demote' the file and add it back to BUILT_SOURCES. This will
manage all the complexity for us, at the (existing expense) of working
only with the all, check and install targets.

The crazy (why the issue was hard to spot):
If the dependencies (.deps/*.Plo) are already created one can alter the
anv_device.$(OBJEXT) line and/or nuke it all together. That won't lead
to any warnings/issues, even though the Makefile is regenerated.

Moral of the story:
Always rm -rf top_builddir or don't resolve the dependencies manually
and use BUILT_SOURCES.

Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96825
Fixes: d7a604c3f7a ("anv: use cache uuid based on the build timestamp.")
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Mark Janes <mark.a.janes@intel.com>

vbo: fix attr reset

In bc4e0c4 (vbo: Use a bitmask to track the active arrays in vbo_exec*.)
we stopped looping over all the attributes and resetting all slots.
Which exposed an issue in vbo_exec_bind_arrays() for handling GENERIC0
vs. POS.

Split out a helper which can reset a particular slot, so that
vbo_exec_bind_arrays() can re-use it to reset POS.

This fixes an issue with 0ad (and possibly others).

Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Mathias Fröhlich <Mathias.Froehlich@web.de>

list: fix list_replace() for empty lists

Before, it would happily copy list_head next/prev (ie. pointer to the
*from* list_head), leaving things in a confused state and causing much
mayhem.

Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

gallium: un-inline pipe_surface_desc

Want to re-use this struct, so un-inline it.

Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

gallium/util: make util_copy_framebuffer_state(src=NULL) work

Be more consistent with the other u_inlines util_copy_xyz_state()
helpers and support NULL src.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

winsys/amdgpu: avoid flushed depth when possible

If a depth/stencil texture has no mipmaps, we can always get a layout that is
compatible with DB and TC.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

gallium/radeon: add depth/stencil_adjusted output to surface computation

This fixes a rare bug with stencil texturing -- seen on Polaris and Tonga,
though it's basically a function of the memory configuration so could affect
other parts as well.

Fixes piglit "unaligned-blit * stencil downsample" and various
"fbo-depth-array *stencil*" tests.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

gallium/radeon: allocate only the required plane for flushed depth

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

radeonsi: decompress to flushed depth texture when required

v2: s/dirty_level_mask/stencil_dirty_level_mask/ in stencil case

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

radeonsi: extract DB->CB copy logic into its own function

Also clean up some of the looping.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

radeonsi: sample from flushed depth texture when required

Note that this has no effect yet. A case where can_sample_z/s can be false
in radeonsi will be added in a later patch.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

gallium/radeon: replace is_flushing_texture with db_compatible

This is a left-over of when I considered generalizing the separate stencil
support. I do prefer the new name since it emphasizes what flushing vs.
non-flushing means from a functional point-of-view, namely special handling
of the texture format.

v2: adjust r600_init_color_surface as well

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

gallium/radeon: add can_sample_z/s flags for textures

v2: adjust r600_init_color_surface as well

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

radeonsi: correctly mark levels of 3D textures as fully decompressed

Account for the fact that max_layer is minified for higher levels.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

gallium/radeon/winsyses: remove unused stencil_offset

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

gallium/radeon: remove redundant null-pointer check

v2: keep using r600_texture_reference

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

gallium/radeon: print StencilLayout only once

It is the same for all levels.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

gallium/radeon: flush stdout after printing texture information

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

glsl: don't try to lower non-gl builtins as if they were gl_FragData

If a shader has an output array, it will get treated as though it were
gl_FragData and rewritten into gl_out_FragData instances. We only want
this to happen on the actual gl_FragData and not everything else.

This is a small part of the problem pointed out by the below bug.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96765
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: "11.2 12.0" <mesa-stable@lists.freedesktop.org>

glsl: Document and enforce restriction on type values

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>

glsl: Pack integer and double varyings as flat even if interpolation mode is none

v2: Also update varying_matches::compute_packing_class().  Suggested by
Timothy Arceri.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96358
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Cc: Gregory Hainaut <gregory.hainaut@gmail.com>
Cc: Ilia Mirkin <imirkin@alum.mit.edu>