yosys.git
10 years agoAdded $lut support to blif backend (by user eddiehung from reddit)
Clifford Wolf [Sat, 22 Feb 2014 13:25:32 +0000 (14:25 +0100)]
Added $lut support to blif backend (by user eddiehung from reddit)

10 years agoAdded ezMiniSat EZMINISAT_INCREMENTAL compile-time option
Clifford Wolf [Sat, 22 Feb 2014 10:34:31 +0000 (11:34 +0100)]
Added ezMiniSat EZMINISAT_INCREMENTAL compile-time option

10 years agoMade MiniSat solver backend configurable in ezminisat.h
Clifford Wolf [Sat, 22 Feb 2014 00:29:02 +0000 (01:29 +0100)]
Made MiniSat solver backend configurable in ezminisat.h

10 years agoAdded workaround for vhdl-style edge triggers from vhdl2verilog to proc_arst
Clifford Wolf [Fri, 21 Feb 2014 22:34:45 +0000 (23:34 +0100)]
Added workaround for vhdl-style edge triggers from vhdl2verilog to proc_arst

10 years agoAdded vhdl2verilog
Clifford Wolf [Fri, 21 Feb 2014 17:59:49 +0000 (18:59 +0100)]
Added vhdl2verilog

10 years agoProgress in presentation
Clifford Wolf [Fri, 21 Feb 2014 13:59:59 +0000 (14:59 +0100)]
Progress in presentation

10 years agoBetter handling of nameDef and nameRef in edif backend
Clifford Wolf [Fri, 21 Feb 2014 12:40:43 +0000 (13:40 +0100)]
Better handling of nameDef and nameRef in edif backend

10 years agoFixed instantiating multi-bit ports in edif backend
Clifford Wolf [Fri, 21 Feb 2014 12:10:36 +0000 (13:10 +0100)]
Fixed instantiating multi-bit ports in edif backend

10 years agoUse private namespace in mem_simple_4x1_map
Clifford Wolf [Fri, 21 Feb 2014 11:14:38 +0000 (12:14 +0100)]
Use private namespace in mem_simple_4x1_map

10 years agoAdded tests/techmap/mem_simple_4x1
Clifford Wolf [Fri, 21 Feb 2014 11:06:40 +0000 (12:06 +0100)]
Added tests/techmap/mem_simple_4x1

10 years agoRenamed "write_blif -subckt" to "write_blif -icells" and added -gates and -param
Clifford Wolf [Fri, 21 Feb 2014 09:40:15 +0000 (10:40 +0100)]
Renamed "write_blif -subckt" to "write_blif -icells" and added -gates and -param

10 years agoProgress in presentation
Clifford Wolf [Fri, 21 Feb 2014 01:13:02 +0000 (02:13 +0100)]
Progress in presentation

10 years agoProgress in presentation
Clifford Wolf [Thu, 20 Feb 2014 22:44:28 +0000 (23:44 +0100)]
Progress in presentation

10 years agoAdded _TECHMAP_REPLACE_ feature to techmap
Clifford Wolf [Thu, 20 Feb 2014 22:42:07 +0000 (23:42 +0100)]
Added _TECHMAP_REPLACE_ feature to techmap

10 years agoAdded "extract -ignore_parameters" and "extract -ignore_param ..."
Clifford Wolf [Thu, 20 Feb 2014 22:31:13 +0000 (23:31 +0100)]
Added "extract -ignore_parameters" and "extract -ignore_param ..."

10 years agoAdded "extract -map %<design_name>"
Clifford Wolf [Thu, 20 Feb 2014 22:30:15 +0000 (23:30 +0100)]
Added "extract -map %<design_name>"

10 years agoAdded "design -push" and "design -pop"
Clifford Wolf [Thu, 20 Feb 2014 22:28:59 +0000 (23:28 +0100)]
Added "design -push" and "design -pop"

10 years agoProgress in presentation
Clifford Wolf [Thu, 20 Feb 2014 19:44:41 +0000 (20:44 +0100)]
Progress in presentation

10 years agoAdded connwrappers command
Clifford Wolf [Thu, 20 Feb 2014 19:44:11 +0000 (20:44 +0100)]
Added connwrappers command

10 years agoCleanups in handling of read_verilog -defer and -icells
Clifford Wolf [Thu, 20 Feb 2014 18:12:32 +0000 (19:12 +0100)]
Cleanups in handling of read_verilog -defer and -icells

10 years agoProgress in presentation
Clifford Wolf [Thu, 20 Feb 2014 11:46:29 +0000 (12:46 +0100)]
Progress in presentation

10 years agoAdded vcd2txt.pl and txt2tikztiming.py (tests/tools/...)
Clifford Wolf [Wed, 19 Feb 2014 11:40:49 +0000 (12:40 +0100)]
Added vcd2txt.pl and txt2tikztiming.py (tests/tools/...)

10 years agoMerge branch 'master' of github.com:cliffordwolf/yosys
Clifford Wolf [Tue, 18 Feb 2014 19:05:53 +0000 (20:05 +0100)]
Merge branch 'master' of github.com:cliffordwolf/yosys

10 years agoProgress in presentation
Clifford Wolf [Tue, 18 Feb 2014 18:37:39 +0000 (19:37 +0100)]
Progress in presentation

10 years agoAdded techmap support for _TECHMAP_CONNMAP_*_
Clifford Wolf [Tue, 18 Feb 2014 18:23:32 +0000 (19:23 +0100)]
Added techmap support for _TECHMAP_CONNMAP_*_

10 years agoAdded "sat -dump_cnf"
Clifford Wolf [Tue, 18 Feb 2014 08:29:08 +0000 (09:29 +0100)]
Added "sat -dump_cnf"

10 years agoCoding style corrections in SatHelper::dump_model_to_vcd()
Clifford Wolf [Tue, 18 Feb 2014 08:28:05 +0000 (09:28 +0100)]
Coding style corrections in SatHelper::dump_model_to_vcd()

10 years agoImproved non-verbose ezSAT::printDIMACS() format
Clifford Wolf [Tue, 18 Feb 2014 08:25:41 +0000 (09:25 +0100)]
Improved non-verbose ezSAT::printDIMACS() format

10 years agoAdded "sat -initsteps"
Clifford Wolf [Tue, 18 Feb 2014 08:03:16 +0000 (09:03 +0100)]
Added "sat -initsteps"

10 years agoAdded Verilog support for "`default_nettype none"
Clifford Wolf [Mon, 17 Feb 2014 13:28:52 +0000 (14:28 +0100)]
Added Verilog support for "`default_nettype none"

10 years agoRenamed "sat -dump_fail_to_vcd" to "sat -dump_vcd" and some minor cleanups
Clifford Wolf [Mon, 17 Feb 2014 12:57:14 +0000 (13:57 +0100)]
Renamed "sat -dump_fail_to_vcd" to "sat -dump_vcd" and some minor cleanups

10 years agoAdded "-dump_fail_to_vcd" argument to SAT solver
Andrew Zonenberg [Mon, 17 Feb 2014 11:06:04 +0000 (06:06 -0500)]
Added "-dump_fail_to_vcd" argument to SAT solver

10 years agoProgress in presentation
Clifford Wolf [Mon, 17 Feb 2014 08:45:04 +0000 (09:45 +0100)]
Progress in presentation

10 years agoBetter preserve wires when flattening (in comparison to techmap)
Clifford Wolf [Mon, 17 Feb 2014 08:44:39 +0000 (09:44 +0100)]
Better preserve wires when flattening (in comparison to techmap)

10 years agoProgress in presentation
Clifford Wolf [Sun, 16 Feb 2014 21:31:53 +0000 (22:31 +0100)]
Progress in presentation

10 years agoAdded some additional checks to techmap
Clifford Wolf [Sun, 16 Feb 2014 21:18:06 +0000 (22:18 +0100)]
Added some additional checks to techmap

10 years agoAdded CONSTMSK and CONSTVAL feature to techmap
Clifford Wolf [Sun, 16 Feb 2014 20:58:59 +0000 (21:58 +0100)]
Added CONSTMSK and CONSTVAL feature to techmap

10 years agoFixed handling of "keep" attribute on wires in opt_clean
Clifford Wolf [Sun, 16 Feb 2014 20:58:27 +0000 (21:58 +0100)]
Fixed handling of "keep" attribute on wires in opt_clean

10 years agoAdded a warning note about error reporting to read_verilog help message
Clifford Wolf [Sun, 16 Feb 2014 19:20:25 +0000 (20:20 +0100)]
Added a warning note about error reporting to read_verilog help message

10 years agoProgress in presentation
Clifford Wolf [Sun, 16 Feb 2014 16:56:19 +0000 (17:56 +0100)]
Progress in presentation

10 years agoFixed use of selection in splitnets command
Clifford Wolf [Sun, 16 Feb 2014 16:39:50 +0000 (17:39 +0100)]
Fixed use of selection in splitnets command

10 years agoAdded recursion support to techmap
Clifford Wolf [Sun, 16 Feb 2014 16:16:44 +0000 (17:16 +0100)]
Added recursion support to techmap

10 years agoProgress in presentation
Clifford Wolf [Sun, 16 Feb 2014 13:32:56 +0000 (14:32 +0100)]
Progress in presentation

10 years agoProgress in presentation
Clifford Wolf [Sun, 16 Feb 2014 12:45:47 +0000 (13:45 +0100)]
Progress in presentation

10 years agoImproved support for constant functions
Clifford Wolf [Sun, 16 Feb 2014 12:16:38 +0000 (13:16 +0100)]
Improved support for constant functions

10 years agoNow we are in Yoys 0.2.0+ development
Clifford Wolf [Sat, 15 Feb 2014 23:54:41 +0000 (00:54 +0100)]
Now we are in Yoys 0.2.0+ development

10 years agoTagging Yoys 0.2.0 yosys-0.2.0
Clifford Wolf [Sat, 15 Feb 2014 23:35:53 +0000 (00:35 +0100)]
Tagging Yoys 0.2.0

10 years agoAdded != support for relational select pattern
Clifford Wolf [Sat, 15 Feb 2014 23:16:54 +0000 (00:16 +0100)]
Added != support for relational select pattern

10 years agoAdded iopadmap -bits
Clifford Wolf [Sat, 15 Feb 2014 20:59:26 +0000 (21:59 +0100)]
Added iopadmap -bits

10 years agoAdded ff and latch support to read_liberty
Clifford Wolf [Sat, 15 Feb 2014 18:36:33 +0000 (19:36 +0100)]
Added ff and latch support to read_liberty

10 years agoBugfix in expression parser of read_liberty
Clifford Wolf [Sat, 15 Feb 2014 18:36:09 +0000 (19:36 +0100)]
Bugfix in expression parser of read_liberty

10 years agoFixed dfflibmap for cell libraries with no set-reset-ff
Clifford Wolf [Sat, 15 Feb 2014 15:34:12 +0000 (16:34 +0100)]
Fixed dfflibmap for cell libraries with no set-reset-ff

10 years agoCorrectly convert constants to RTLIL (fixed undef handling)
Clifford Wolf [Sat, 15 Feb 2014 14:42:10 +0000 (15:42 +0100)]
Correctly convert constants to RTLIL (fixed undef handling)

10 years agoAdded frontend (-f) option to autotest.sh
Clifford Wolf [Sat, 15 Feb 2014 14:40:17 +0000 (15:40 +0100)]
Added frontend (-f) option to autotest.sh

10 years agoFixed opt_const handling of double invert with non-1 output width
Clifford Wolf [Sat, 15 Feb 2014 12:16:08 +0000 (13:16 +0100)]
Fixed opt_const handling of double invert with non-1 output width

10 years agoAdded liberty frontend
Clifford Wolf [Sat, 15 Feb 2014 11:57:28 +0000 (12:57 +0100)]
Added liberty frontend

10 years agoBe more conservative with new const-function code
Clifford Wolf [Fri, 14 Feb 2014 19:45:30 +0000 (20:45 +0100)]
Be more conservative with new const-function code

10 years agoAdded support for FOR loops in function calls in parameters
Clifford Wolf [Fri, 14 Feb 2014 19:33:22 +0000 (20:33 +0100)]
Added support for FOR loops in function calls in parameters

10 years agoCreated basic support for function calls in parameter values
Clifford Wolf [Fri, 14 Feb 2014 18:56:44 +0000 (19:56 +0100)]
Created basic support for function calls in parameter values

10 years agoAdded abc -keepff option
Clifford Wolf [Fri, 14 Feb 2014 10:28:42 +0000 (11:28 +0100)]
Added abc -keepff option

10 years agoupdated default ABC command strings
Clifford Wolf [Thu, 13 Feb 2014 18:14:15 +0000 (19:14 +0100)]
updated default ABC command strings

10 years agoUpdated ABC
Clifford Wolf [Thu, 13 Feb 2014 17:56:36 +0000 (18:56 +0100)]
Updated ABC

10 years agoImplemented read_verilog -defer
Clifford Wolf [Thu, 13 Feb 2014 12:59:13 +0000 (13:59 +0100)]
Implemented read_verilog -defer

10 years agoRemoved double blanks in ABC default command sequences
Clifford Wolf [Thu, 13 Feb 2014 07:12:52 +0000 (08:12 +0100)]
Removed double blanks in ABC default command sequences

10 years agoMerge branch 'master' of github.com:cliffordwolf/yosys
Clifford Wolf [Thu, 13 Feb 2014 07:09:17 +0000 (08:09 +0100)]
Merge branch 'master' of github.com:cliffordwolf/yosys

10 years agoUpdated ABC and some related changes
Clifford Wolf [Thu, 13 Feb 2014 07:07:08 +0000 (08:07 +0100)]
Updated ABC and some related changes

10 years agoMerge pull request #26 from ahmedirfan1983/btor
Clifford Wolf [Wed, 12 Feb 2014 22:46:58 +0000 (23:46 +0100)]
Merge pull request #26 from ahmedirfan1983/btor

Btor

10 years agoMerge branch 'master' of github.com:cliffordwolf/yosys
Clifford Wolf [Wed, 12 Feb 2014 22:30:02 +0000 (23:30 +0100)]
Merge branch 'master' of github.com:cliffordwolf/yosys

10 years agoAdded support for functions returning integer
Clifford Wolf [Wed, 12 Feb 2014 22:29:54 +0000 (23:29 +0100)]
Added support for functions returning integer

10 years agomodified btor synthesis script for correct use of splice command.
Ahmed Irfan [Wed, 12 Feb 2014 12:38:28 +0000 (13:38 +0100)]
modified btor synthesis script for correct use of splice command.

10 years agoDisabled "abc -dff" in "make test" for now (waiting for scorr bugfix in ABC)
Clifford Wolf [Wed, 12 Feb 2014 12:11:58 +0000 (13:11 +0100)]
Disabled "abc -dff" in "make test" for now (waiting for scorr bugfix in ABC)

10 years agoUpdated ABC to rev e97a6e1d59b9
Clifford Wolf [Wed, 12 Feb 2014 07:35:42 +0000 (08:35 +0100)]
Updated ABC to rev e97a6e1d59b9

10 years agorenamed ilang "scope error" to "ilang error"
Clifford Wolf [Tue, 11 Feb 2014 18:17:07 +0000 (19:17 +0100)]
renamed ilang "scope error" to "ilang error"

10 years agodisabling splice command in the script
Ahmed Irfan [Tue, 11 Feb 2014 14:43:03 +0000 (15:43 +0100)]
disabling splice command in the script

10 years agoregister output corrected
Ahmed Irfan [Tue, 11 Feb 2014 12:28:05 +0000 (13:28 +0100)]
register output corrected

10 years agoMerge branch 'master' of https://github.com/cliffordwolf/yosys into btor
Ahmed Irfan [Tue, 11 Feb 2014 12:26:43 +0000 (13:26 +0100)]
Merge branch 'master' of https://github.com/cliffordwolf/yosys into btor

10 years agoadded concat and slice cell translation
Ahmed Irfan [Tue, 11 Feb 2014 12:06:01 +0000 (13:06 +0100)]
added concat and slice cell translation

10 years agoMore Makefile cleanups
Clifford Wolf [Tue, 11 Feb 2014 11:58:08 +0000 (12:58 +0100)]
More Makefile cleanups

10 years agoImproved "make manual" and "make clean"
Clifford Wolf [Tue, 11 Feb 2014 11:55:58 +0000 (12:55 +0100)]
Improved "make manual" and "make clean"

10 years agoImproved ilang parser error messages
Clifford Wolf [Sun, 9 Feb 2014 14:35:31 +0000 (15:35 +0100)]
Improved ilang parser error messages

10 years agofixed a bug in subcircuit library with cells that have connections to itself
Clifford Wolf [Sun, 9 Feb 2014 14:27:58 +0000 (15:27 +0100)]
fixed a bug in subcircuit library with cells that have connections to itself

10 years agoVarious improvements in expose command (added -sep and -cut)
Clifford Wolf [Sun, 9 Feb 2014 10:07:46 +0000 (11:07 +0100)]
Various improvements in expose command (added -sep and -cut)

10 years agoAdded delete {-input|-output|-port}
Clifford Wolf [Sun, 9 Feb 2014 09:03:26 +0000 (10:03 +0100)]
Added delete {-input|-output|-port}

10 years agoBugfix in delete command
Clifford Wolf [Sun, 9 Feb 2014 08:34:58 +0000 (09:34 +0100)]
Bugfix in delete command

10 years agoAdded test cases for expose -evert-dff
Clifford Wolf [Sat, 8 Feb 2014 20:27:04 +0000 (21:27 +0100)]
Added test cases for expose -evert-dff

10 years agoFixed handling of async reset in expose -evert-dff
Clifford Wolf [Sat, 8 Feb 2014 20:26:40 +0000 (21:26 +0100)]
Fixed handling of async reset in expose -evert-dff

10 years agoBuild fixes for log cmd
Clifford Wolf [Sat, 8 Feb 2014 20:21:51 +0000 (21:21 +0100)]
Build fixes for log cmd

10 years agoMerge branch 'master' of github.com:cliffordwolf/yosys
Clifford Wolf [Sat, 8 Feb 2014 20:08:46 +0000 (21:08 +0100)]
Merge branch 'master' of github.com:cliffordwolf/yosys

10 years agoImplemented expose -evert-dff
Clifford Wolf [Sat, 8 Feb 2014 20:08:38 +0000 (21:08 +0100)]
Implemented expose -evert-dff

10 years agoMerge pull request #24 from hansiglaser/master
Clifford Wolf [Sat, 8 Feb 2014 19:02:32 +0000 (20:02 +0100)]
Merge pull request #24 from hansiglaser/master

added "log" command

10 years agoadded "log" command
Johann Glaser [Sat, 8 Feb 2014 18:19:32 +0000 (19:19 +0100)]
added "log" command

10 years agoImproved checking of internal cell conventions
Clifford Wolf [Sat, 8 Feb 2014 18:13:49 +0000 (19:13 +0100)]
Improved checking of internal cell conventions

10 years agoFixed bug in collecting of RD_TRANSPARENT parameter in memory_collect
Clifford Wolf [Sat, 8 Feb 2014 18:13:19 +0000 (19:13 +0100)]
Fixed bug in collecting of RD_TRANSPARENT parameter in memory_collect

10 years agoAdded various new options to splice command
Clifford Wolf [Sat, 8 Feb 2014 15:37:18 +0000 (16:37 +0100)]
Added various new options to splice command

10 years agoAdded %a select operator
Clifford Wolf [Sat, 8 Feb 2014 15:31:38 +0000 (16:31 +0100)]
Added %a select operator

10 years agoMoved some passes to other source directories
Clifford Wolf [Sat, 8 Feb 2014 13:39:15 +0000 (14:39 +0100)]
Moved some passes to other source directories

10 years agoAdded support for "keep" attribute to abc pass
Clifford Wolf [Sat, 8 Feb 2014 13:25:29 +0000 (14:25 +0100)]
Added support for "keep" attribute to abc pass

10 years agoAdded opt -purge (frontend to opt_clean -purge)
Clifford Wolf [Sat, 8 Feb 2014 13:21:34 +0000 (14:21 +0100)]
Added opt -purge (frontend to opt_clean -purge)

10 years agoOnly count non-trivial attributes when findinf master signal in opt_clean
Clifford Wolf [Sat, 8 Feb 2014 13:21:04 +0000 (14:21 +0100)]
Only count non-trivial attributes when findinf master signal in opt_clean

10 years agoAdded checking for ABC modifications to Makefile and made sure we do not have the...
Clifford Wolf [Sat, 8 Feb 2014 11:27:38 +0000 (12:27 +0100)]
Added checking for ABC modifications to Makefile and made sure we do not have the word ERROR in regular make output