openpower-isa.git
2 years agocomment 64-bit of predicate (all 1s)
Luke Kenneth Casson Leighton [Thu, 7 Apr 2022 11:04:59 +0000 (12:04 +0100)]
comment 64-bit of predicate (all 1s)

2 years agoclarify comments on EXTRA2 exceptions for encoding regnums
Luke Kenneth Casson Leighton [Wed, 6 Apr 2022 19:17:16 +0000 (20:17 +0100)]
clarify comments on EXTRA2 exceptions for encoding regnums

2 years agotest commit 2
Jacob Lifshay [Wed, 30 Mar 2022 02:14:15 +0000 (19:14 -0700)]
test commit 2

2 years agotest commit for mirroring
Jacob Lifshay [Wed, 30 Mar 2022 02:00:30 +0000 (19:00 -0700)]
test commit for mirroring

2 years agoRevert "add WIP text_tree_graph.py"
Luke Kenneth Casson Leighton [Sat, 26 Mar 2022 11:20:21 +0000 (11:20 +0000)]
Revert "add WIP text_tree_graph.py"

This reverts commit f684acfa32ba1ef8c52abc5876da2b73696862dd.

damage to installations has been enacted by failing to run unit
tests which would easily confirm that adding __init__.py
was inappropriate

2 years agoRevert "add python generator version of tree reduction"
Luke Kenneth Casson Leighton [Sat, 26 Mar 2022 11:19:11 +0000 (11:19 +0000)]
Revert "add python generator version of tree reduction"

This reverts commit 2fe0ce6285864927127d8226171c566886b87e89.

damage has occurred to installations by failing to run unit
tests which easily show that adding __init__.py causes imports to fail

2 years agoadd python generator version of tree reduction
Jacob Lifshay [Fri, 25 Mar 2022 12:59:36 +0000 (05:59 -0700)]
add python generator version of tree reduction

2 years agoadd WIP text_tree_graph.py
Jacob Lifshay [Fri, 25 Mar 2022 12:59:08 +0000 (05:59 -0700)]
add WIP text_tree_graph.py

2 years agosv_binutils: introduce constants class
Dmitry Selyutin [Sun, 27 Feb 2022 21:51:04 +0000 (21:51 +0000)]
sv_binutils: introduce constants class

2 years agoopenpower.consts: replace botchify with metaclass
Dmitry Selyutin [Sun, 27 Feb 2022 17:28:12 +0000 (17:28 +0000)]
openpower.consts: replace botchify with metaclass

2 years agoopenpower.const: switch to enum class
Dmitry Selyutin [Sun, 27 Feb 2022 16:16:23 +0000 (16:16 +0000)]
openpower.const: switch to enum class

2 years agosv_binutils: use metaclass for enumerations
Dmitry Selyutin [Sun, 27 Feb 2022 15:50:37 +0000 (15:50 +0000)]
sv_binutils: use metaclass for enumerations

2 years agoadd default XLEN=64 as temporary hack
Luke Kenneth Casson Leighton [Mon, 28 Feb 2022 17:59:46 +0000 (17:59 +0000)]
add default XLEN=64 as temporary hack

2 years agohmm something wrong with negative branch
Luke Kenneth Casson Leighton [Mon, 31 Jan 2022 12:08:14 +0000 (12:08 +0000)]
hmm something wrong with negative branch

2 years agoadd rldimi test case
Jacob Lifshay [Thu, 24 Feb 2022 02:39:09 +0000 (18:39 -0800)]
add rldimi test case

2 years agosv_binutils: consider RC
Dmitry Selyutin [Mon, 31 Jan 2022 19:05:17 +0000 (19:05 +0000)]
sv_binutils: consider RC

2 years agosv_binutils: refactor parsing
Dmitry Selyutin [Mon, 31 Jan 2022 19:00:11 +0000 (19:00 +0000)]
sv_binutils: refactor parsing

2 years agosv_binutils: drop obsolete code
Dmitry Selyutin [Mon, 31 Jan 2022 17:45:10 +0000 (17:45 +0000)]
sv_binutils: drop obsolete code

2 years agoRevert "sv_binutils: introduce per-record validity flag"
Dmitry Selyutin [Sat, 29 Jan 2022 16:36:02 +0000 (16:36 +0000)]
Revert "sv_binutils: introduce per-record validity flag"

This reverts commit 3b5e6816766ea7f52e99938edb47bf0e7cb8dd77.

Since we decided to use a separate hash, and it can check for duplicate
records, there's no need to keep track of duplicates.

2 years agosv_binutils: introduce per-record validity flag
Dmitry Selyutin [Tue, 25 Jan 2022 19:49:44 +0000 (19:49 +0000)]
sv_binutils: introduce per-record validity flag

2 years agosv_binutils: mark already visited instructions
Dmitry Selyutin [Tue, 25 Jan 2022 19:54:52 +0000 (19:54 +0000)]
sv_binutils: mark already visited instructions

2 years agosv_binutils: drop opcode structure
Dmitry Selyutin [Tue, 25 Jan 2022 18:47:26 +0000 (18:47 +0000)]
sv_binutils: drop opcode structure

2 years agorename wb_get_classic
Luke Kenneth Casson Leighton [Fri, 28 Jan 2022 02:52:32 +0000 (02:52 +0000)]
rename wb_get_classic

2 years agodoh, self.srr1 not srr1 (local variable)
Luke Kenneth Casson Leighton [Mon, 24 Jan 2022 21:42:46 +0000 (21:42 +0000)]
doh, self.srr1 not srr1 (local variable)

2 years agoblech, add horrible hack: a length parameter to LDSTException
Luke Kenneth Casson Leighton [Mon, 24 Jan 2022 21:42:24 +0000 (21:42 +0000)]
blech, add horrible hack: a length parameter to LDSTException

2 years agoremove read of SRR1 for TRAP pipeline, pass via LDSTException
Luke Kenneth Casson Leighton [Mon, 24 Jan 2022 21:33:39 +0000 (21:33 +0000)]
remove read of SRR1 for TRAP pipeline, pass via LDSTException

2 years agoadd SRR1 to LDSTException
Luke Kenneth Casson Leighton [Mon, 24 Jan 2022 21:10:43 +0000 (21:10 +0000)]
add SRR1 to LDSTException

2 years agoadd extra bc regression test
Luke Kenneth Casson Leighton [Mon, 24 Jan 2022 21:10:31 +0000 (21:10 +0000)]
add extra bc regression test

2 years agosv_binutils: split svp64_record structure (bits only)
Dmitry Selyutin [Sun, 23 Jan 2022 19:24:00 +0000 (19:24 +0000)]
sv_binutils: split svp64_record structure (bits only)

2 years agosv_binutils: consider opcode whenever names match
Dmitry Selyutin [Sun, 23 Jan 2022 18:22:42 +0000 (18:22 +0000)]
sv_binutils: consider opcode whenever names match

2 years agosv_binutils: split insns by names
Dmitry Selyutin [Sun, 23 Jan 2022 11:59:24 +0000 (11:59 +0000)]
sv_binutils: split insns by names

2 years agosv_binutils: determine the longest name
Dmitry Selyutin [Sun, 23 Jan 2022 11:45:01 +0000 (11:45 +0000)]
sv_binutils: determine the longest name

2 years agosv_binutils: fix ppc-svp64-opc.c contents
Dmitry Selyutin [Sun, 23 Jan 2022 11:04:54 +0000 (11:04 +0000)]
sv_binutils: fix ppc-svp64-opc.c contents

2 years agosv_binutils: fix _missing_ enum method
Dmitry Selyutin [Sun, 23 Jan 2022 11:02:02 +0000 (11:02 +0000)]
sv_binutils: fix _missing_ enum method

2 years agosv_binutils: follow binutils coding style
Dmitry Selyutin [Sun, 23 Jan 2022 10:33:30 +0000 (10:33 +0000)]
sv_binutils: follow binutils coding style

2 years agosv_binutils: output header guard
Dmitry Selyutin [Sun, 23 Jan 2022 10:33:27 +0000 (10:33 +0000)]
sv_binutils: output header guard

2 years agosv_binutils: follow binutils naming convention for header
Dmitry Selyutin [Sun, 23 Jan 2022 10:33:20 +0000 (10:33 +0000)]
sv_binutils: follow binutils naming convention for header

2 years agoadd test for setting TB SPR, fix decode map for STATE regs
Luke Kenneth Casson Leighton [Fri, 21 Jan 2022 00:10:11 +0000 (00:10 +0000)]
add test for setting TB SPR, fix decode map for STATE regs

2 years agotrap types memory exception (TT.MEMEXC) instead of TT.PRIV
Luke Kenneth Casson Leighton [Wed, 19 Jan 2022 18:38:48 +0000 (18:38 +0000)]
trap types memory exception (TT.MEMEXC) instead of TT.PRIV
which stops SRR1 bit 45 being set by mistake

2 years agosv_binutils: fix link to script in disclaimer
Dmitry Selyutin [Wed, 19 Jan 2022 17:53:21 +0000 (17:53 +0000)]
sv_binutils: fix link to script in disclaimer

2 years agoadd spr-to-state conversion, and support for state1 in PowerDecoder2
Luke Kenneth Casson Leighton [Wed, 19 Jan 2022 15:55:30 +0000 (15:55 +0000)]
add spr-to-state conversion, and support for state1 in PowerDecoder2

2 years agosee soc/fu/trap/main_stage.py trap() function, and:
Luke Kenneth Casson Leighton [Tue, 18 Jan 2022 13:44:45 +0000 (13:44 +0000)]
see soc/fu/trap/main_stage.py trap() function, and:
https://libre-soc.org/irclog/%23libre-soc.2022-01-18.log.html#t2022-01-18T13:21:25
bits of SRR1 need to be preserved on an interrupt, which means that
PowerDecoder2 must schedule a read of SRR1.  the Power ISA spec
is extremely obscure and obtuse on which bits must be preserved,
therefore it is just easier to copy microwatt behaviour

2 years agogrev[w][i][.] pseudo-code works
Jacob Lifshay [Tue, 18 Jan 2022 04:58:03 +0000 (20:58 -0800)]
grev[w][i][.] pseudo-code works

2 years agoadd log2 pseudo-code helper
Jacob Lifshay [Tue, 18 Jan 2022 04:57:03 +0000 (20:57 -0800)]
add log2 pseudo-code helper

2 years agoformat code
Jacob Lifshay [Tue, 18 Jan 2022 04:55:10 +0000 (20:55 -0800)]
format code

2 years agoadd test_caller_logical.py
Jacob Lifshay [Tue, 18 Jan 2022 04:53:07 +0000 (20:53 -0800)]
add test_caller_logical.py

2 years agoMerge branch 'master' of ssh://git.libre-soc.org:922/openpower-isa
Jacob Lifshay [Tue, 18 Jan 2022 00:35:09 +0000 (16:35 -0800)]
Merge branch 'master' of ssh://git.libre-soc.org:922/openpower-isa

2 years agospeed up pywriter
Jacob Lifshay [Tue, 18 Jan 2022 00:32:39 +0000 (16:32 -0800)]
speed up pywriter

2 years agoadd a couple of trap pipeline unit tests
Luke Kenneth Casson Leighton [Mon, 17 Jan 2022 17:49:57 +0000 (17:49 +0000)]
add a couple of trap pipeline unit tests
these are based on linux-5.7 to make microwatt compatibility with
hrfid and mtmsrd work

2 years agoWIP speed up pywriter by caching stuff more and not deepcopying
Jacob Lifshay [Mon, 17 Jan 2022 02:27:45 +0000 (18:27 -0800)]
WIP speed up pywriter by caching stuff more and not deepcopying

currently broken

2 years agosv_binutils: fix typo in disclaimer
Dmitry Selyutin [Sun, 16 Jan 2022 18:41:25 +0000 (18:41 +0000)]
sv_binutils: fix typo in disclaimer

2 years agosv_binutils: add missing include directives
Dmitry Selyutin [Sun, 16 Jan 2022 18:09:35 +0000 (18:09 +0000)]
sv_binutils: add missing include directives

2 years agosv_binutils: introduce SVP64 entries
Dmitry Selyutin [Sun, 16 Jan 2022 18:01:03 +0000 (18:01 +0000)]
sv_binutils: introduce SVP64 entries

2 years agosv_binutils: rename Field into CType
Dmitry Selyutin [Sun, 9 Jan 2022 17:34:36 +0000 (17:34 +0000)]
sv_binutils: rename Field into CType

2 years agosv_binutils: inherit Entry from Field
Dmitry Selyutin [Sun, 9 Jan 2022 17:31:24 +0000 (17:31 +0000)]
sv_binutils: inherit Entry from Field

2 years agosv_binutils: drop semicolons in c_var methods
Dmitry Selyutin [Sun, 9 Jan 2022 17:22:32 +0000 (17:22 +0000)]
sv_binutils: drop semicolons in c_var methods

2 years agocorrectly identify atomic reservation CSV file field and
Luke Kenneth Casson Leighton [Sat, 15 Jan 2022 19:20:10 +0000 (19:20 +0000)]
correctly identify atomic reservation CSV file field and
copy into op in PowerDecoder2

2 years agoadd atomic reservation field to Power Decoder data structures
Luke Kenneth Casson Leighton [Sat, 15 Jan 2022 13:47:36 +0000 (13:47 +0000)]
add atomic reservation field to Power Decoder data structures

2 years agoremove stray newline
Jacob Lifshay [Fri, 14 Jan 2022 23:10:01 +0000 (15:10 -0800)]
remove stray newline

2 years agoadd grev[w][i][.] pseudo-code
Jacob Lifshay [Fri, 14 Jan 2022 23:06:59 +0000 (15:06 -0800)]
add grev[w][i][.] pseudo-code

2 years agoadd second version of wb_get which can cope with pipelines
Luke Kenneth Casson Leighton [Wed, 12 Jan 2022 19:53:16 +0000 (19:53 +0000)]
add second version of wb_get which can cope with pipelines
TODO: make it spot the "stall" signal

2 years agoincrease addr_wid to 64 in TestRunnerBase. hm this should not
Luke Kenneth Casson Leighton [Mon, 10 Jan 2022 16:09:54 +0000 (16:09 +0000)]
increase addr_wid to 64 in TestRunnerBase. hm this should not
be importing from soc, openpower-isa should be entirely independent

2 years agoenable privileged-instruction detection which had previously
Luke Kenneth Casson Leighton [Mon, 10 Jan 2022 16:08:28 +0000 (16:08 +0000)]
enable privileged-instruction detection which had previously
been commented-out

2 years agosv_binutils: drop redundant imports
Dmitry Selyutin [Sun, 9 Jan 2022 16:53:05 +0000 (16:53 +0000)]
sv_binutils: drop redundant imports

2 years agosv_binutils: sort entries by name
Dmitry Selyutin [Sun, 9 Jan 2022 16:52:22 +0000 (16:52 +0000)]
sv_binutils: sort entries by name

2 years agosv_binutils: discard VHDL stuff in comments
Dmitry Selyutin [Sun, 9 Jan 2022 16:36:35 +0000 (16:36 +0000)]
sv_binutils: discard VHDL stuff in comments

2 years agosv_binutils: calculate reserved bits
Dmitry Selyutin [Sun, 9 Jan 2022 16:17:53 +0000 (16:17 +0000)]
sv_binutils: calculate reserved bits

2 years agosv_binutils: reorder declarations
Dmitry Selyutin [Sun, 9 Jan 2022 15:40:52 +0000 (15:40 +0000)]
sv_binutils: reorder declarations

2 years agosv_binutils: print opcode as hexadecimal
Dmitry Selyutin [Sun, 9 Jan 2022 15:24:49 +0000 (15:24 +0000)]
sv_binutils: print opcode as hexadecimal

2 years agoadd grev[w][i] instructions
Jacob Lifshay [Thu, 6 Jan 2022 04:57:46 +0000 (20:57 -0800)]
add grev[w][i] instructions

2 years agoformat code
Jacob Lifshay [Thu, 6 Jan 2022 04:35:46 +0000 (20:35 -0800)]
format code

2 years agoadd stand-alone simulator bitmanip test
Jacob Lifshay [Thu, 6 Jan 2022 02:44:41 +0000 (18:44 -0800)]
add stand-alone simulator bitmanip test

2 years agoadd tlbsync and wait as NOPs
Luke Kenneth Casson Leighton [Thu, 6 Jan 2022 00:04:53 +0000 (00:04 +0000)]
add tlbsync and wait as NOPs

2 years agoadd eieio instruction as a NOP to minor 31 csv
Luke Kenneth Casson Leighton [Wed, 5 Jan 2022 23:53:24 +0000 (23:53 +0000)]
add eieio instruction as a NOP to minor 31 csv

2 years agoadd lbzcix instruction which had been completely forgotten (doh)
Luke Kenneth Casson Leighton [Wed, 5 Jan 2022 19:12:21 +0000 (19:12 +0000)]
add lbzcix instruction which had been completely forgotten (doh)

2 years agosv_binutils: introduce real opcode class
Dmitry Selyutin [Tue, 4 Jan 2022 07:58:58 +0000 (07:58 +0000)]
sv_binutils: introduce real opcode class

2 years agosv_binutils: parse CSVs directly
Dmitry Selyutin [Mon, 3 Jan 2022 13:44:48 +0000 (13:44 +0000)]
sv_binutils: parse CSVs directly

2 years agosv_binutils: support basic header generation
Dmitry Selyutin [Fri, 31 Dec 2021 11:41:38 +0000 (11:41 +0000)]
sv_binutils: support basic header generation

2 years agosv_binutils: introduce code generator class
Dmitry Selyutin [Thu, 30 Dec 2021 17:45:10 +0000 (17:45 +0000)]
sv_binutils: introduce code generator class

2 years agosv_binutils: use stdin as input stream
Dmitry Selyutin [Thu, 30 Dec 2021 17:31:26 +0000 (17:31 +0000)]
sv_binutils: use stdin as input stream

2 years agosv_binutils: introduce helper classes
Dmitry Selyutin [Thu, 30 Dec 2021 16:55:33 +0000 (16:55 +0000)]
sv_binutils: introduce helper classes

2 years agocopy over msr and rename cia to nia in PowerDecoder2
Luke Kenneth Casson Leighton [Mon, 3 Jan 2022 14:04:06 +0000 (14:04 +0000)]
copy over msr and rename cia to nia in PowerDecoder2

2 years agoAdd an inorder flag to pspec
Cesar Strauss [Tue, 28 Dec 2021 21:05:44 +0000 (18:05 -0300)]
Add an inorder flag to pspec

2 years agoadd empty default_mem for running without MMU
Luke Kenneth Casson Leighton [Mon, 27 Dec 2021 12:49:50 +0000 (12:49 +0000)]
add empty default_mem for running without MMU

2 years agowhoops wrong parameter name
Luke Kenneth Casson Leighton [Mon, 27 Dec 2021 04:37:32 +0000 (04:37 +0000)]
whoops wrong parameter name

2 years agoquick attempt to fix test_decoder_gas.py (did not work)
Luke Kenneth Casson Leighton [Mon, 27 Dec 2021 04:35:17 +0000 (04:35 +0000)]
quick attempt to fix test_decoder_gas.py (did not work)

2 years agobool() is !!() for integers
Mikolaj Wielgus [Mon, 27 Dec 2021 01:25:04 +0000 (01:25 +0000)]
bool() is !!() for integers

2 years agoAdd missing parentheses for explicit operator precedence
Mikolaj Wielgus [Mon, 27 Dec 2021 01:17:13 +0000 (01:17 +0000)]
Add missing parentheses for explicit operator precedence

2 years agoadd very basic PowerDecode2 test which at least gets things going
Luke Kenneth Casson Leighton [Sun, 26 Dec 2021 13:36:09 +0000 (13:36 +0000)]
add very basic PowerDecode2 test which at least gets things going

2 years agoa few extra things discovered needing c syntax not python syntax
Luke Kenneth Casson Leighton [Sun, 26 Dec 2021 13:35:30 +0000 (13:35 +0000)]
a few extra things discovered needing c syntax not python syntax
in crtl

2 years agoGive human-readable names to slots, run functions and filenames
Mikolaj Wielgus [Sun, 26 Dec 2021 03:29:58 +0000 (03:29 +0000)]
Give human-readable names to slots, run functions and filenames

2 years agoPut CRTL CFFI modules in crtl dir
Mikolaj Wielgus [Sat, 25 Dec 2021 21:24:54 +0000 (21:24 +0000)]
Put CRTL CFFI modules in crtl dir

2 years agosv_binutils: provide small comment on regex
Dmitry Selyutin [Sat, 25 Dec 2021 13:01:19 +0000 (13:01 +0000)]
sv_binutils: provide small comment on regex

2 years agosv_binutils: introduce entry dataclass
Dmitry Selyutin [Sat, 25 Dec 2021 12:55:22 +0000 (12:55 +0000)]
sv_binutils: introduce entry dataclass

2 years agoclear memory is optional
Luke Kenneth Casson Leighton [Fri, 24 Dec 2021 13:44:51 +0000 (13:44 +0000)]
clear memory is optional

2 years agowhoops forgot to put the copy of the wb_get memory back in
Luke Kenneth Casson Leighton [Fri, 24 Dec 2021 13:40:12 +0000 (13:40 +0000)]
whoops forgot to put the copy of the wb_get memory back in

2 years agocode cleanup / comments
Luke Kenneth Casson Leighton [Thu, 23 Dec 2021 15:00:01 +0000 (15:00 +0000)]
code cleanup / comments

2 years agorepeat power decode test to check performance
Luke Kenneth Casson Leighton [Thu, 23 Dec 2021 14:39:37 +0000 (14:39 +0000)]
repeat power decode test to check performance

2 years agobit of a tidyup of crtl:
Luke Kenneth Casson Leighton [Thu, 23 Dec 2021 14:26:47 +0000 (14:26 +0000)]
bit of a tidyup of crtl:
* code-comments for template-creation
* use "with open(xxx) as file" rather than explicit open-then-close
* use abspath on __file__ to get the relative position of the templates
  (makes it possible to run from locations other than current directory)
* add the module location to sys.path so as to be able to get at it
  (again even when running from locations other than cwd)

2 years agoadd load-store byte-reverse 64-bit unit test
Luke Kenneth Casson Leighton [Thu, 23 Dec 2021 12:40:56 +0000 (12:40 +0000)]
add load-store byte-reverse 64-bit unit test
(ldbrx/stdbrx)