Emil Velikov [Sat, 22 Nov 2014 03:51:18 +0000 (03:51 +0000)]
docs: Add sha256 sums for the 10.3.4 release
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit
72c27d7a3acc40b8a77a277f7cd975fb8e60dca5)
Emil Velikov [Sat, 22 Nov 2014 03:31:01 +0000 (03:31 +0000)]
Add release notes for the 10.3.4 release
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit
26c8ecd85dade7be5759c4de0b3916fbc186dc43)
Kenneth Graunke [Fri, 21 Nov 2014 08:55:11 +0000 (00:55 -0800)]
i965: Make Gen4-5 push constants call _mesa_load_state_parameters too.
In commit
5e37a2a4a8a, I made the pull constant code stop calling
_mesa_load_state_parameters() when there were no pull parameters.
This worked fine on Gen6+ because the push constant code also called
it if there were any push constants. However, the Gen4-5 push constant
code wasn't doing this. This patch makes it do so, like the Gen6+ code.
A better long term solution would be to make core Mesa just handle this
for us when necessary.
Fixes around 8766 Piglit tests on Ironlake, and probably Gen4 as well.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Tested-by: Mark Janes <mark.a.janes@intel.com>
Ben Widawsky [Fri, 21 Nov 2014 18:47:41 +0000 (10:47 -0800)]
i965/vec4/gen8: Handle the MUL dest hazard exception
Fix one of the few cases where we can't reliable touch the destination hazard
bits. I am explicitly doing this patch individually so it is easy to backport. I
was tempted to do this patch before the previous patch which reorganized the
code, but I believe even doing that first, this is still easy to backport.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=84212
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Ben Widawsky [Fri, 21 Nov 2014 18:47:37 +0000 (10:47 -0800)]
i965/vec4: Extract depctrl hazards
Move this to a separate function so that we can begin to add other little
caveats without making too big a mess.
NOTE: There is some desire to improve this function eventually, but we need to
fix a bug first.
v2:
Use const for the inst for the hazard check (Matt)
Invert safe logic to get rid of the double negative (Matt)
Add PRM reference for predicates (Matt)
Add note about empirical evidence for math (Matt)
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Matt Turner [Wed, 12 Nov 2014 19:09:10 +0000 (11:09 -0800)]
i965/fs: Remove is_valid_3src().
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Matt Turner [Wed, 12 Nov 2014 19:07:01 +0000 (11:07 -0800)]
i965/fs: Remove is_valid_3src() checks from emit_lrp.
The visitor emits MOVs to temporary registers for immediates, so these
never trigger. For further proof, check case ir_triop_fma.
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Matt Turner [Wed, 12 Nov 2014 19:03:44 +0000 (11:03 -0800)]
i965/fs: Remove unused apply_stride().
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Matt Turner [Wed, 12 Nov 2014 19:01:16 +0000 (11:01 -0800)]
i965/fs: Move ip_record class to its one use.
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Matt Turner [Wed, 12 Nov 2014 19:28:03 +0000 (11:28 -0800)]
i965: Move common fields into backend_instruction.
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Matt Turner [Wed, 12 Nov 2014 19:28:02 +0000 (11:28 -0800)]
i965: Combine offset/texture_offset fields.
texture_offset was only used by some texturing operations, and offset
was only used by spill/unspill and some URB operations. These fields are
never used at the same time.
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Marek Olšák [Thu, 20 Nov 2014 21:16:09 +0000 (22:16 +0100)]
radeonsi: use minnum and maxnum LLVM intrinsics for MIN and MAX opcodes
So far it has been compiled into pretty ugly code (8 instructions or so
for either opcode).
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Eric Anholt [Thu, 20 Nov 2014 01:39:04 +0000 (17:39 -0800)]
vc4: Update for new kernel ABI with async execution and waits.
Our submits now return immediately and you have to manually wait for
things to complete if you want to (like a normal driver).
Ville Syrjälä [Tue, 1 Jul 2014 23:23:20 +0000 (02:23 +0300)]
i915: Only use TEXCOORDTYPE_VECTOR with cube maps on gen2
Check that the target is GL_TEXTURE_CUBE_MAP before emitting
TEXCOORDTYPE_VECTOR texture coordinates.
I'm not sure if the hardware would like CARTESIAN coordinates
with cube maps, and as I'm too lazy to find out just emit the
VECTOR coordinates for cube maps always. For other targets use
CARTESIAN or HOMOGENOUS depending on the number of texture
coordinates provided.
Fixes rendering of the "electric" background texture in chromium-bsu
main menu. We appear to be provided with three texture coordinates
there (I'm guessing due to the funky texture matrix rotation it does).
So the code would decide to use TEXCOORDTYPE_VECTOR instead of
TEXCOORDTYPE_CARTESIAN even though we're dealing with a 2D texure.
The results weren't what one might expect.
demos/cubemap still works, which hopefully indicates that this doesn't
break things.
Also tested with:
bin/glean -o -v -v -v -t +texCube --quick
bin/cubemap -auto
from piglit.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Ben Widawsky [Tue, 18 Nov 2014 20:20:10 +0000 (12:20 -0800)]
i965/disasm: Properly decode branch_ctrl (gen8+)
Add support for decoding the new branch control bit. I saw two things wrong with
the existing code.
1. It didn't bother trying to decode the bit.
- While we do not *intentionally* emit this bit today, I think it's interesting
to see if we somehow ended up with the bit set. It may also be useful in the
future.
2. It seemed to be the wrong bit.
- The docs are pretty poor wrt which bit this actually occupies. To me, it
/looks/ like it should be bit 28. I am not sure where Ken got 30 from. I
verified it should be 28 by looking at the simulator code.
I also added the most basic support for GOTO simply so we don't need to remember
to change the function in the future.
v2:
Move the branch_ctrl check out of the if gen >= 6 check to make it more
readable. (Matt)
ENDIF doesn't have branch_ctrl (Matt + Ken)
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
José Fonseca [Wed, 19 Nov 2014 12:04:44 +0000 (12:04 +0000)]
rtasm,translate: Re-enable SSE on Mingw64.
This reverts
f4dd0991719ef3e2606920c5100b372181c60899.
The src/gallium/tests/unit/translate_test.c gives the same results on
MinGW 64-bits as on Linux 64-bits. And since MinGW is often used for
development/testing due to its convenience, it's better not to have this
sort of differences relative to MSVC.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Kenneth Graunke [Fri, 14 Nov 2014 06:50:03 +0000 (22:50 -0800)]
i965: Skip _mesa_load_state_parameters when there are zero parameters.
Saves a tiny bit of CPU overhead.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Acked-by: Eric Anholt <eric@anholt.net>
Marek Olšák [Fri, 14 Nov 2014 14:46:54 +0000 (15:46 +0100)]
radeonsi: remove unused variable si_state_dsa::db_render_control
Roland Scheidegger [Tue, 18 Nov 2014 22:04:36 +0000 (23:04 +0100)]
llvmpipe: enable PIPE_CAP_TGSI_VS_LAYER_VIEWPORT
No changes required in the driver itself, all handled by draw.
piglit results in a quick run:
skip->pass 7
skip->fail 2
(The new failures in the ARB_fragment_layer_viewport group are expected,
we fail the same if gs doesn't write these outputs regardless of the vs.)
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Roland Scheidegger [Tue, 18 Nov 2014 21:46:00 +0000 (22:46 +0100)]
draw: fixes for vertex shaders outputting layer or viewport index
Mostly add a couple cases so we don't just check gs for this.
There's only one gotcha, the built-in vp transform in the llvm vs can't
handle it (this would be fixable though non-trivial due to vp index being
non-constant for the SoA outputs, but we don't use it if there's a gs
neither - the whole clip/vp transform integration there is suboptimal).
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Michael Varga [Wed, 12 Nov 2014 19:48:57 +0000 (13:48 -0600)]
st/va: surface: render subpicture
Signed-off-by: Michael Varga <Michael.Varga@amd.com>
Michael Varga [Wed, 12 Nov 2014 18:26:57 +0000 (12:26 -0600)]
st/va: subpicture implementation
added BGRA format
create/destroy
set image
associate/deassociate
Signed-off-by: Michael Varga <Michael.Varga@amd.com>
Michael Varga [Mon, 3 Nov 2014 16:35:28 +0000 (10:35 -0600)]
st/va: added internal storage for VAImage and BGRA format
When calling vaCreateImage() an internal copy of VAImage is maintained
since the allocation of "image" may not be guaranteed to live long enough.
Signed-off-by: Michael Varga <Michael.Varga@amd.com>
Michael Varga [Mon, 27 Oct 2014 15:43:20 +0000 (10:43 -0500)]
st/va: added some calls to handle_table_remove()
In a few locations handles were being added but not removed.
Signed-off-by: Michael Varga <Michael.Varga@amd.com>
Chad Versace [Tue, 18 Nov 2014 23:41:35 +0000 (15:41 -0800)]
i965: Fix segfault in WebGL Conformance on Ivybridge
Fixes regression of WebGL Conformance test texture-size-limit [1] on
Ivybridge Mobile GT2 0x0166 with Google Chrome R38.
Regression introduced by
commit
6c044231535b93c5d16404528946cad618d96bd9
Author: Kenneth Graunke <kenneth@whitecape.org>
Date: Sun Feb 2 02:58:42 2014 -0800
i965: Bump GL_MAX_CUBE_MAP_TEXTURE_SIZE to 8192.
The test regressed because the pointer offset arithmetic in
intel_miptree_map_gtt() overflows for large textures. The pointer
arithmetic is not 64-bit safe.
[1] https://github.com/KhronosGroup/WebGL/blob/
52f0dc240f04dce31b1b8e2b8107fe2b8332dc90/sdk/tests/conformance/textures/texture-size-limit.html
Cc: "10.3 10.4" <mesa-stable@lists.freedesktop.org>
Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=78770
Fixes: Intel CHRMOS-1377
Reported-by: Lu Hua <huax.lu@intel.com>
Reviewed-by: Ian Romanic <ian.d.romanick@intel.com>
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
Siavash Eliasi [Sat, 15 Nov 2014 19:02:13 +0000 (22:32 +0330)]
mesa/main: Fix tmp_row memory leak in texstore_rgba_integer.
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Jason Ekstrand [Tue, 18 Nov 2014 22:54:12 +0000 (14:54 -0800)]
docs/GL3: Mark GL_ARB_direct_state_access as being started by Laura
Dave Airlie [Tue, 18 Nov 2014 06:44:51 +0000 (16:44 +1000)]
r600g: limit texture offset application to specific types (v2)
For 1D and 2D arrays we don't want the other coordinates being
offset and affecting where we sample. I wrote this patch 6 months
ago but lost it.
Fixes:
./bin/tex-miplevel-selection textureLodOffset 1DArray
./bin/tex-miplevel-selection textureLodOffset 2DArray
./bin/tex-miplevel-selection textureOffset 1DArray
./bin/tex-miplevel-selection textureOffset 1DArrayShadow
./bin/tex-miplevel-selection textureOffset 2DArray
./bin/tex-miplevel-selection textureOffset(bias) 1DArray
./bin/tex-miplevel-selection textureOffset(bias) 2DArray
v2: rewrite to handle more cases and be consistent with code
above.
Reviewed-by: Glenn Kennard <glenn.kennard@gmail.com>
Cc: "10.3 10.4" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Tue, 18 Nov 2014 04:06:36 +0000 (14:06 +1000)]
r600g: geom shaders: always load texture src regs from inputs
Otherwise we seem to lose the split_gs_inputs and try and
pull from an uninitialised register.
fixes 9 texelFetch geom shader tests.
Reviewed-by: Glenn Kennard <glenn.kennard@gmail.com>
Cc: "10.3 10.4" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Eric Anholt [Tue, 18 Nov 2014 20:16:55 +0000 (12:16 -0800)]
vc4: Emit semaphore instructions for new kernel ABI.
Previously, the kernel would dispatch thread 0, wait, then dispatch thread
1. By insisting that the thread contents use semaphores in the right
place, the kernel can sleep for longer by dispatching both threads at
once.
Eric Anholt [Wed, 29 Oct 2014 22:15:29 +0000 (15:15 -0700)]
vc4: Mark a big array as const.
Drops 1kb of code from this inner loop, in exchange for 2.5k of data.
Andres Gomez [Tue, 18 Nov 2014 13:49:00 +0000 (06:49 -0700)]
glsl_compiler: Add binding hash tables to avoid SIGSEVs on linking stage
When using the stand alone compiler, if we try to link a shader with vertex
attributes it will segfault on linking as the binding hash tables are not
included in the shader program. Obviously, we cannot make the linking stage
succeed without the bound attributes but we can prevent the crash and just
let the linker spit its own error.
Reviewed-by: Brian Paul <brianp@vmware.com>
Andres Gomez [Tue, 18 Nov 2014 15:43:35 +0000 (08:43 -0700)]
linker: Add carriage returns on several linker errors
Reviewed-by: Brian Paul <brianp@vmware.com>
Andres Gomez [Tue, 18 Nov 2014 13:49:00 +0000 (06:49 -0700)]
draw: Fixed inline comments
Reviewed-by: Brian Paul <brianp@vmware.com>
Roland Scheidegger [Tue, 18 Nov 2014 14:22:29 +0000 (15:22 +0100)]
gallivm: fix alignment issue for vertex data fetch
We cannot guarantee that vertex buffers have the necessary alignment for
fetching all AoS members at once (for instance 4x32bit XYZW data). We can
however guarantee that for textures. This did not cause errors for older
llvm versions but it now matters and will cause segfaults if the data
happens to not be aligned. Thus we need to set alignment manually.
(Note that we can't actually really guarantee data to be even element aligned
due to offsets in vertex buffers being bytes and OpenGL allowing this, but
it does not matter for x86 as alignment is only required for sse vectors -
not sure what happens on other archs, however.)
This fixes https://bugs.freedesktop.org/show_bug.cgi?id=85467.
Marek Olšák [Mon, 17 Nov 2014 19:51:56 +0000 (20:51 +0100)]
radeonsi: support gl_FragCoord at integer pixel center
No known benefit for OpenGL, but it doesn't hurt.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Marek Olšák [Mon, 17 Nov 2014 19:49:11 +0000 (20:49 +0100)]
radeonsi: support per-sample gl_FragCoord
Cc: 10.4 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Ilia Mirkin [Sat, 15 Nov 2014 18:29:25 +0000 (13:29 -0500)]
st/mesa: add a fallback for clear_with_quad when no vs_layer
Not all drivers can set gl_Layer from VS. Add a fallback that passes the
instance id from VS to GS, and then uses the GS to set the layer.
Tested by adding
quad_buffers |= clear_buffers;
clear_buffers = 0;
to the st_Clear logic, and forcing set_vertex_shader_layered in all
cases. No piglit regressions (on piglits with 'clear' in the name).
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Cc: "10.4 10.3" <mesa-stable@lists.freedesktop.org>
Vinson Lee [Sat, 15 Nov 2014 08:50:15 +0000 (00:50 -0800)]
mesa: Bump version to 10.5.0-devel.
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Axel Davy [Mon, 17 Nov 2014 15:58:29 +0000 (16:58 +0100)]
nine: Implement threadpool
DRI_PRIME setups have different issues due the lack of dma-buf fences
support in the drivers. For DRI3 DRI_PRIME, a race can appear, making
tearings visible, or worse showing older content than expected. Until
dma-buf fences are well supported (and by all drivers), an alternative
is to send the buffers to the server only when rendering has finished.
Since waiting the rendering has finished in the main thread has a
performance impact, this patch uses an additional thread to offload the
wait and the sending of the buffers to the server.
Acked-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: David Heidelberg <david@ixit.cz>
Signed-off-by: Axel Davy <axel.davy@ens.fr>
Axel Davy [Mon, 17 Nov 2014 15:58:28 +0000 (16:58 +0100)]
nine: Add drirc options (v2)
Implements vblank_mode and throttling, which allows us change default ratio
between framerate and input lag.
Acked-by: Jose Fonseca <jfonseca@vmware.com>
Signed-off-by: David Heidelberg <david@ixit.cz>
Signed-off-by: Axel Davy <axel.davy@ens.fr>
Joakim Sindholt [Thu, 4 Aug 2011 13:14:06 +0000 (15:14 +0200)]
nine: Add state tracker nine for Direct3D9 (v3)
Work of Joakim Sindholt (zhasha) and Christoph Bumiller (chrisbmr).
DRI3 port done by Axel Davy (mannerov).
v2: - nine_debug.c: klass extended from 32 chars to 96 (for sure) by glennk
- Nine improvements by Axel Davy (which also fixed some wine tests)
- by Emil Velikov:
- convert to static/shared drivers
- Sort and cleanup the includes
- Use AM_CPPFLAGS for the defines
- Add the linker garbage collector
- Restrict the exported symbols (think llvm)
v3: - small nine fixes
- build system improvements by Emil Velikov
v4: [Emil Velikov]
- Do no link against libudev. No longer needed.
Acked-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Axel Davy <axel.davy@ens.fr>
Signed-off-by: David Heidelberg <david@ixit.cz>
Christoph Bumiller [Mon, 17 Nov 2014 15:58:26 +0000 (16:58 +0100)]
gallium/auxiliary: add contained and rect checks (v6)
v3: thanks to Brian, improved coding style, also glennk helped spot few
things (unsigned -> int, two constify)
v4: thanks Ilia improved function, dropped u_box_clip_3d
v5: incorporated rest of Gregor proposed changes,clean ups
v6: u_box_clip_2d simplify proposed by Ilia Mirkin
Acked-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: David Heidelberg <david@ixit.cz>
Christoph Bumiller [Mon, 17 Nov 2014 19:05:53 +0000 (20:05 +0100)]
gallium/auxiliary: add inc and dec alternative with return (v4)
At this moment we use only zero or positive values.
v2: Implement it for also for Solaris, MSVC assembly
and enable for other combinations.
v3: Replace MSVC assembly by assert + warning during compilation
v4: remove inc and dec with return for MSVC assembly
Acked-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: David Heidelberg <david@ixit.cz>
Christoph Bumiller [Mon, 17 Nov 2014 15:58:24 +0000 (16:58 +0100)]
gallium/auxiliary: implement sw_probe_wrapped (v2)
Implement pipe_loader_sw_probe_wrapped which allows to use the wrapped
software renderer backend when using the pipe loader.
v2: - remove unneeded ifdef
- use GALLIUM_PIPE_LOADER_WINSYS_LIBS
- check for CALLOC_STRUCT
thanks to Emil Velikov
Acked-by: Jose Fonseca <jfonseca@vmware.com>
Signed-off-by: David Heidelberg <david@ixit.cz>
Christoph Bumiller [Mon, 17 Nov 2014 15:58:23 +0000 (16:58 +0100)]
winsys/sw/wrapper: implement is_displaytarget_format_supported for swrast
Acked-by: Jose Fonseca <jfonseca@vmware.com>
Signed-off-by: David Heidelberg <david@ixit.cz>
Christoph Bumiller [Mon, 17 Nov 2014 15:58:22 +0000 (16:58 +0100)]
tgsi/ureg: add ureg_UARL shortcut (v2)
v2: moved in in same order as in p_shader_tokens (thanks Brian)
Acked-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: David Heidelberg <david@ixit.cz>
Dave Airlie [Tue, 18 Nov 2014 01:22:01 +0000 (11:22 +1000)]
r600g/cayman: handle empty vertex shaders
Some of the geom shader tests produce an empty vertex shader,
on cayman we'd crash in the finaliser because last_cf was NULL.
cayman doesn't need the NOP workaround, so if the code arrives
here with no last_cf, just emit an END.
fixes crashes in a bunch of piglit geom shader tests.
Cc: "10.3 10.4" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Glenn Kennard <glenn.kennard@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Tue, 18 Nov 2014 00:55:44 +0000 (10:55 +1000)]
r600g/cayman: fix texture gather tests
It appears on cayman the TG4 outputs were reordered.
This fixes a lot of piglit tests.
Cc: "10.3 10.4" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Glenn Kennard <glenn.kennard@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Tue, 18 Nov 2014 00:22:24 +0000 (10:22 +1000)]
r600g: cayman umad assigns dst pointlessly
There is no need to assign dst here, just use the chan from j
Pointed out by glennk.
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Mon, 17 Nov 2014 23:54:39 +0000 (09:54 +1000)]
r600g/cayman: fix integer multiplication output overwrite (v2)
This fixes tests/spec/glsl-1.10/execution/fs-op-assign-mult-ivec2-ivec2-overwrite.shader_test.
hopeful fix for fd.o bug 85376
Reported-by: ghallberg
Cc: "10.3 10.4" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Glenn Kennard <glenn.kennard@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Brian Paul [Mon, 17 Nov 2014 21:29:45 +0000 (14:29 -0700)]
st/mesa: copy sampler_array_size field when copying instructions
The sampler_array_size field was added by "mesa/st: add support for
dynamic sampler offsets". But the field wasn't getting copied in
the get_pixel_transfer_visitor() or get_bitmap_visitor() functions.
The count_resources() function then didn't properly compute the
glsl_to_tgsi_visitor::samplers_used bitmask. Then, we didn't declare
all the sampler registers in st_translate_program(). Finally, we
asserted when we tried to emit a tgsi ureg src register with File =
TGSI_FILE_UNDEFINED.
Add the missing assignments and some new assertions to catch the
invalid register sooner.
Cc: "10.3, 10.4" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Brian Paul [Mon, 17 Nov 2014 17:10:15 +0000 (10:10 -0700)]
gallium/tests: add missing arg to util_make_vertex_passthrough_shader()
Fix oversights from the "add a window_space option to the passthrough
vertex shader" patch.
Reviewed-by: Jakob Bornecrantz <jakob@vmware.com>
Michel Dänzer [Tue, 11 Nov 2014 07:10:20 +0000 (16:10 +0900)]
radeonsi: Disable asynchronous DMA except for PIPE_BUFFER
Using the asynchronous DMA engine for multi-dimensional operations seems
to cause random GPU lockups for various people. While the root cause for
this might need to be fixed in the kernel, let's disable it for now.
Before re-enabling this, please make sure you can hit all newly enabled
paths in your testing, preferably with both piglit and real world apps,
and get in touch with people on the bug reports below for stability
testing.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=85647
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=83500
Cc: "10.3 10.4" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Grigori Goronzy <greg@chown.ath.cx>
Vinson Lee [Sat, 15 Nov 2014 22:07:42 +0000 (14:07 -0800)]
scons: Require glproto >= 1.4.13 for X11.
GLXBadProfileARB and X_GLXCreateContextAtrribsARB require glproto >=
1.4.13. These symbols were added in commit
d5d41112cbccd9301500e8e023be77eb9cb622cd "st/xlib: Generate errors as
specified."
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Cc: "10.4" <mesa-stable@lists.freedesktop.org>
Reviewed-by: José Fonseca <jfonseca@vmware.com>
José Fonseca [Sun, 16 Nov 2014 11:33:21 +0000 (11:33 +0000)]
draw: Make it more clear that *_jit_context points to pipe_viewport_state structures.
No change in behavior.
José Fonseca [Sun, 16 Nov 2014 11:30:19 +0000 (11:30 +0000)]
draw: Fix breakage due to removal pipe_viewport_state::translate[3] and scale[3].
Unfortunately no LLVM type was generated for pipe_viewport_state -- it
was being treated as a single floating point array --, so llvmpipe (and
any driver that relies on draw/llvm) got totally busted.
José Fonseca [Sun, 16 Nov 2014 10:22:46 +0000 (10:22 +0000)]
gallium/auxiliary: Fix build without LLVM.
Trivial.
José Fonseca [Sun, 16 Nov 2014 10:16:47 +0000 (10:16 +0000)]
gallium/auxiliary: Remove GALLIVM_CPP_SOURCES
Redundant.
Should fix ttps://bugs.freedesktop.org/show_bug.cgi?id=86330
Emil Velikov [Sun, 16 Nov 2014 00:48:18 +0000 (00:48 +0000)]
freedreno: add missing headers in Makefile.sources
... or autotools will fail to pick them up for the distribution tarball.
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Emil Velikov [Tue, 14 Oct 2014 16:44:15 +0000 (17:44 +0100)]
targets: bundle all files in the tarball
We were missing a few files
- The version scripts
- Android & scons build scripts
- A few headers.
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Emil Velikov [Sun, 16 Nov 2014 01:07:32 +0000 (01:07 +0000)]
auxiliary: ship all files in the distribution tarball
- Add all headers into Makefile.sources
- Don't forget the target-helpers
- Add the python scripts & the formats table/list (csv)
- Temporary add vl/vl_winsys_dri.c to EXTRA_DIST until we rework the
way VL is build.
- Add the following to EXTRA_DIST - they are included via the
generated u_indices_gen.c thus we should not add them to *SOURCES.
indices/u_indices.c
indices/u_unfilled_indices.c
XXX: Should we nuke gallivm/f.cpp ? It seems that no-one is using it.
v2: Rebase
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Emil Velikov [Tue, 14 Oct 2014 16:44:13 +0000 (17:44 +0100)]
gallium: ship the gallium API headers
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Emil Velikov [Tue, 14 Oct 2014 16:44:12 +0000 (17:44 +0100)]
pipe-loader: consolidate sources into Makefile.sources
Drop the unneeded subdir-objects.
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Thierry Reding [Thu, 13 Nov 2014 18:05:51 +0000 (19:05 +0100)]
dri/kms: Always zero out struct drm_mode_create_dumb
The DRM_IOCTL_MODE_CREATE_DUMB (and others) IOCTL isn't very rigorously
specified, which has the effect that some kernel drivers do not consider
the .pitch and .size fields of struct drm_mode_create_dumb outputs only.
Instead they will use these as lower bounds and overwrite them only if
the values that they compute are larger than what userspace provided.
This works if and only if userspace initializes the fields explicitly to
either 0 or some meaningful value. However, if userspace just leaves the
values uninitialized and the struct drm_mode_create_dumb is allocated on
the stack for example, the driver may try to overallocate buffers.
Fortunately most userspace does zero out the structure before passing it
to the IOCTL, but there are rare exceptions. Mesa is one of them. In an
attempt to rectify this situation, kernel drivers are being updated to
not use the .pitch and .size fields as inputs. However in order to fix
the issue with older kernels, make sure that Mesa always zeros out the
structure as well.
Future IOCTLs should be more rigorously defined so that structures can
be validated and IOCTLs rejected if output fields aren't set to zero.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Marek Olšák [Sun, 9 Nov 2014 23:37:03 +0000 (00:37 +0100)]
gallium: remove unused pipe_viewport_state::translate[3] and scale[3]
Almost all drivers ignore them.
Marek Olšák [Sat, 8 Nov 2014 15:03:13 +0000 (16:03 +0100)]
radeonsi: implement TGSI_PROPERTY_VS_WINDOW_SPACE_POSITION
Required by Nine.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Tested-by: Nick Sarnie <commendsarnex@gmail.com>
Marek Olšák [Sun, 9 Nov 2014 22:35:08 +0000 (23:35 +0100)]
tgsi/ureg: simplify code for declaring properties
Tested-by: Nick Sarnie <commendsarnex@gmail.com>
Marek Olšák [Sat, 8 Nov 2014 15:48:33 +0000 (16:48 +0100)]
gallium/util: add a test for TGSI_PROPERTY_VS_WINDOW_SPACE_POSITION
Not testable by OpenGL. Required by Nine.
This is an example of how to implement a piglit-like test using gallium only.
Marek Olšák [Sat, 8 Nov 2014 14:30:54 +0000 (15:30 +0100)]
gallium/util: add a window_space option to the passthrough vertex shader
Tested-by: Nick Sarnie <commendsarnex@gmail.com>
Marek Olšák [Sat, 8 Nov 2014 12:35:03 +0000 (13:35 +0100)]
tgsi: fixup the string of VS_WINDOW_SPACE_POSITION
Tested-by: Nick Sarnie <commendsarnex@gmail.com>
Rob Clark [Sat, 15 Nov 2014 18:18:06 +0000 (13:18 -0500)]
freedreno/a4xx: implement mem->gmem (restore)
Support to restore gmem (tile buffer) (in case it wasn't glClear'd).
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Sat, 15 Nov 2014 17:49:22 +0000 (12:49 -0500)]
freedreno/a4xx: move where SP_FS_MRT_REGn is emitted
Addition of color fmt bitfield to this register (compared to a3xx) means
we need to re-emit if either prog or framebuffer state is dirty.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Emil Velikov [Sat, 15 Nov 2014 17:04:10 +0000 (17:04 +0000)]
Revert "mesa: Wrap SSE4.1 code in #ifdef __SSE4_1__."
This reverts commit
8d3f739383fbdf671752fdec707f1c2b9b2aa6a3.
In the last commit we've updated our check to determine if the actual
code is buildable, rather than if the compiler acknowledges the option.
I.e. did anyone provide -mno-sse4.1 vs is my compiler too old.
Now this code will never be attemped to be build, in both cases.
Confirmed by building mesa with
export CFLAGS='-march=native -mno-sse4.1'
./configure && make
Tested-by: David Heidelberg <david@ixit.cz>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Emil Velikov [Sat, 15 Nov 2014 18:37:22 +0000 (18:37 +0000)]
configure.ac: roll up a program for the sse4.1 check
So when checking/building sse code we have three possibilities:
1 Old compiler, throws an error when using -msse*
2 New compiler, user disables sse* (-mno-sse*)
3 New compiler, user doesn't disable sse
The original code, added code for #1 but not #2. Later on we patched
around the lack of handling #2 by wrapping the code in __SSE4_1__.
Yet it lead to a missing/undefined symbol in case of #1 or #2, which
might cause an issue for #2 when using the i965 driver.
A bit later we "fixed" the undefined symbol by using #1, rather than
updating it to handle #2. With this commit we set things straight :)
To top it all up, conventions state that in case of conflicting
(-enable-foo -disable-foo) options, the latter one takes precedence.
Thus we need to make sure to prepend -msse4.1 to CFLAGS in our test.
v2: Clean the #includes. Suggested by Ilia, Matt & Siavash.
Cc: "10.3 10.4" <mesa-stable@lists.freedesktop.org>
Tested-by: David Heidelberg <david@ixit.cz>
Tested-by: Siavash Eliasi <siavashserver@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Ilia Mirkin [Thu, 23 Oct 2014 04:43:45 +0000 (00:43 -0400)]
nv50,nvc0: use clip_halfz setting when creating rasterizer state
This enables the ARB_clip_control extension.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.4" <mesa-stable@lists.freedesktop.org>
Rob Clark [Thu, 31 Jul 2014 19:42:55 +0000 (15:42 -0400)]
freedreno: add adreno 420 support
Very initial support. Basic stuff working (es2gears, es2tri, and maybe
about half of glmark2). Expect broken stuff. Still missing: mem->gmem
(restore), queries, mipmaps (blob segfaults!), hw binning, etc.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Thu, 31 Jul 2014 19:09:52 +0000 (15:09 -0400)]
freedreno: update generated headers
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Kristian Høgsberg [Fri, 14 Nov 2014 00:28:19 +0000 (16:28 -0800)]
i965: Move fs_visitor ra pass to new fs_visitor::allocate_registers()
This will be reused for the scalar VS pass.
v2 (Ken): Rebase on master.
Signed-off-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Kristian Høgsberg [Fri, 14 Nov 2014 00:28:18 +0000 (16:28 -0800)]
i965: Move fs_visitor optimization pass into new method fs_visitor::optimize()
We'll reuse this toplevel optimization driver for the scalar VS.
Signed-off-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Kristian Høgsberg [Fri, 14 Nov 2014 00:28:17 +0000 (16:28 -0800)]
i965: Move more code into codegen-branch of the fs_visitor::run() if statement
These last few operations all only apply when we've actually generated
code, optimized and allocated registers. The dummy and the repclear
shaders don't need the gen4 send workaround, and don't spill. This
means we can move these lines into the else-branch, which will make
the following refactoring easier.
v2 (Ken): Rebase on master, which removed the uncompressed stack.
Signed-off-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Kristian Høgsberg [Fri, 14 Nov 2014 00:28:08 +0000 (16:28 -0800)]
i965: Refactor fs_generator API
We split out SIMD8 and SIMD16 generation into seperate calls to
new method generate_code(), which returns the start offset for the
generated code. A new get_assembly() method returns the generated code.
This avoids asserting MESA_SHADER_FRAGMENT and accessing wm_prog_data
in the generator.
Signed-off-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
José Fonseca [Fri, 14 Nov 2014 17:20:21 +0000 (17:20 +0000)]
st/wgl: Implement WGL_EXT_create_context_es/es2_profile.
Derived from st/glx's GLX_EXT_create_context_es/es2_profile implementation.
Tested with an OpenGL ES 2.0 ApiTrace.
Reviewed-by: Brian Paul <brianp@vmware.com>
José Fonseca [Fri, 14 Nov 2014 17:04:26 +0000 (17:04 +0000)]
st/xlib: Generate errors as specified.
Tested with piglit glx tests.
Reviewed-by: Brian Paul <brianp@vmware.com>
Rob Clark [Wed, 5 Nov 2014 17:08:04 +0000 (12:08 -0500)]
freedreno/ir3: move some helpers
Split out a few helpers from fd3_program so we don't have to duplicate
for fd4_program.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Wed, 5 Nov 2014 15:42:13 +0000 (10:42 -0500)]
freedreno: rename draw->draw_vbo
Gets rid of a namespace conflict w/ a4xx which wants an fd4_draw()
version of fd_draw()..
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Wed, 5 Nov 2014 15:43:18 +0000 (10:43 -0500)]
freedreno/a3xx: missing u_upload_destroy
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Thu, 6 Nov 2014 20:56:43 +0000 (15:56 -0500)]
freedreno: fix borked check for a320.0
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Sat, 1 Nov 2014 13:50:18 +0000 (09:50 -0400)]
freedreno/ir3: half vs full reg in standalone compiler output
Handle hrN.c in printing outputs/inputs.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
José Fonseca [Wed, 12 Nov 2014 12:13:42 +0000 (12:13 +0000)]
st/dri: Support EGL_CONTEXT_OPENGL_DEBUG_BIT_KHR/GLX_CONTEXT_DEBUG_BIT_ARB on ES contexts.
The latest version of the specs explicitly allow it, and given that Mesa
universally supports KHR_debug we should definitely support it.
Totally untested. (Just happened to noticed this while implementing
GLX_EXT_create_context_es2_profile for st/xlib.)
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Marek Olšák [Sat, 1 Nov 2014 13:31:09 +0000 (14:31 +0100)]
egl: remove egl_gallium from the loader
Acked-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Eric Anholt <eric@anholt.net>
Informally acked-by: Jose Fonseca
Marek Olšák [Sat, 1 Nov 2014 13:05:16 +0000 (14:05 +0100)]
configure.ac: remove enable flags for EGL and GBM Gallium state trackers
Acked-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Eric Anholt <eric@anholt.net>
Informally acked-by: Jose Fonseca
Kenneth Graunke [Tue, 11 Nov 2014 22:40:08 +0000 (14:40 -0800)]
i965/vec4: Combine all the math emitters.
17 insertions(+), 102 deletions(-). Works just as well.
v2: Make emit_math take const references (suggested by Matt),
drop redundant WRITEMASK_XYZW setting (Matt and Curro).
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Kenneth Graunke [Tue, 11 Nov 2014 01:20:37 +0000 (17:20 -0800)]
i965/vec4: Use const references in emit() functions.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Kenneth Graunke [Tue, 11 Nov 2014 01:14:48 +0000 (17:14 -0800)]
i965: Use macros to create prototypes for emitter helpers.
We do this almost everywhere else; this should make it easier to modify.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Ben Widawsky [Thu, 13 Nov 2014 02:49:16 +0000 (18:49 -0800)]
i965: Always enable VF statistics
Every other unit in the geometry pipeline automatically enables
statistics gathering. This part of the pipe has been controlled by the
DEBUG_STATS variable, but this is asymmetric. This dates back to the
original implementation, and I am not sure if there is a reason for it.
I need access to these stats to implement ARB_pipeline_statistics_query.
Eric wrote it, and Ken touched it last. Do you have any opposition?
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=86145
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Ville Syrjälä [Sun, 6 Jul 2014 12:02:15 +0000 (15:02 +0300)]
i915: Emit 3DSTATE_SCISSOR_RECTANGLE_0 before 3DSTATE_SCISSOR_ENABLE
According to gen2 BSpec the pipeline must be flushed at least up to the
windower before changing the scissor rect enable field. Emitting the
3DSTATE_SCISSOR_RECTANGLE_0 before 3DSTATE_SCISSOR_ENABLE is sufficient
to do that.
gen3 BSpec no longer has that piece of text, but let's make the same
change there too for symmetry. The spec does still say that the scissor
rectangle must be defined before enabling it, so the new order does seem
more in line with the spec.
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Ville Syrjälä [Tue, 8 Jul 2014 13:13:58 +0000 (16:13 +0300)]
i915: Don't call _mesa_meta_glsl_Clear() on gen2
Gen2 doesn't have fragment shaders so we shouldn't be calling
_mesa_meta_glsl_Clear() on gen2. Restore the appropriate
ARB_fragment_shader check to the clear path which was lost in:
commit
94f22fbe787214580a1a13a774114d2650c166cb
Author: Tapani Pälli <tapani.palli@intel.com>
Date: Wed Aug 8 20:46:45 2012 +0300
intel: use _mesa_meta_Clear with OpenGL ES 1.1 v2
v2: Fix spelling in commit message
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Ville Syrjälä [Mon, 30 Jun 2014 15:42:31 +0000 (18:42 +0300)]
i915: Protect macro argument for TEXTURE_SET()
TEXTURE_SET() is the only register macro that forgets to wrap the
argument evaluation in parens. Only simple integers are passed to this
macro so there's no bug but sitll it seems prudent to add the
parens.
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Ville Syrjälä [Sun, 6 Jul 2014 12:10:44 +0000 (15:10 +0300)]
i915: Kill intel_context::hw_stencil
ctx.hw_stencil is not used anywhere so kill it.
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>