mesa.git
4 years agoaco: improve get_wait_states()
Rhys Perry [Fri, 28 Feb 2020 15:56:43 +0000 (15:56 +0000)]
aco: improve get_wait_states()

pipeline-db (Tahiti):
Totals from affected shaders:
SGPRS: 21208 -> 21208 (0.00 %)
VGPRS: 22388 -> 22388 (0.00 %)
Spilled SGPRs: 0 -> 0 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 3278596 -> 3277004 (-0.05 %) bytes
LDS: 19 -> 19 (0.00 %) blocks
Max Waves: 238 -> 238 (0.00 %)

pipeline-db (Polaris):
Totals from affected shaders:
SGPRS: 64 -> 64 (0.00 %)
VGPRS: 96 -> 96 (0.00 %)
Spilled SGPRs: 0 -> 0 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 5200 -> 5192 (-0.15 %) bytes
LDS: 0 -> 0 (0.00 %) blocks
Max Waves: 10 -> 10 (0.00 %)

pipeline-db (Vega):
Totals from affected shaders:
SGPRS: 0 -> 0 (0.00 %)
VGPRS: 0 -> 0 (0.00 %)
Spilled SGPRs: 0 -> 0 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 0 -> 0 (0.00 %) bytes
LDS: 0 -> 0 (0.00 %) blocks
Max Waves: 0 -> 0 (0.00 %)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4004>

4 years agoaco: add new NOP insertion pass for GFX6-9
Rhys Perry [Tue, 25 Feb 2020 11:27:33 +0000 (11:27 +0000)]
aco: add new NOP insertion pass for GFX6-9

This new pass is more similar to the GFX10 pass and should be able to
handle control flow better.

No pipeline-db changes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4004>

4 years agoiris: Enable HiZ and stencil CCS for blorp blit destinations
Jason Ekstrand [Tue, 11 Feb 2020 00:18:02 +0000 (18:18 -0600)]
iris: Enable HiZ and stencil CCS for blorp blit destinations

Now that blorp blits write to depth and stencil as depth and stencil, we
can leave HiZ and stencil CCS enabled for blorp blit destinations.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3717>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3717>

4 years agoiris: Enable CCS for copies from HiZ+CCS depth buffers
Jason Ekstrand [Fri, 7 Feb 2020 22:20:32 +0000 (16:20 -0600)]
iris: Enable CCS for copies from HiZ+CCS depth buffers

Ever since b274469daae, BLORP is able to sample from whatever the
sampler supports.  In c0c899cf7892, we added HiZ support for copies from
HiZ compressed depth buffers but forgot HiZ+CCS.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3717>

4 years agoanv: Enable HiZ for VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL
Jason Ekstrand [Wed, 5 Feb 2020 16:12:26 +0000 (10:12 -0600)]
anv: Enable HiZ for VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3717>

4 years agoblorp: Write to depth/stencil images as depth/stencil when possible
Jason Ekstrand [Wed, 5 Feb 2020 09:59:01 +0000 (03:59 -0600)]
blorp: Write to depth/stencil images as depth/stencil when possible

On Gen4 and G45 and earlier, we have to handle weird offsetting to write
to depth and stencil due to a lack of proper depth mipmapping support in
hardware.  On Gen6, we have to deal with strange HiZ and stencil
layouts.  Prior to Gen9, we also had to do crazy things for stencil
writes because we didn't support GL_ARB_shader_stencil_export and
friends in hardware.  However, starting with Gen7 for depth and Gen9 for
stencil, we can easily write out with the "right" hardware.  This allows
us to leave HiZ and other compression enabled for blorp_blit() and
blorp_copy() operations.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3717>

4 years agoiris: Allow HiZ on blit sources
Jason Ekstrand [Mon, 2 Mar 2020 19:54:22 +0000 (13:54 -0600)]
iris: Allow HiZ on blit sources

Ever since 95cc5438ebf, BLORP has been able to read from HiZ-compressed
depth buffers as long as the sampler supports HiZ.  This just makes iris
stop doing the unneeded resolve.

Closes: #2583
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3717>

4 years agoisl: Set 3DSTATE_DEPTH_BUFFER::Depth correctly for 3D surfaces
Jason Ekstrand [Wed, 5 Feb 2020 15:03:30 +0000 (09:03 -0600)]
isl: Set 3DSTATE_DEPTH_BUFFER::Depth correctly for 3D surfaces

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3717>

4 years agodocs: Update stable process around using fixes: and gitlab
Dylan Baker [Wed, 11 Dec 2019 19:01:57 +0000 (11:01 -0800)]
docs: Update stable process around using fixes: and gitlab

Currently the docs still recommend using
mesa-stable@lists.freedesktop.org, which is pretty awful. We really
don't want a second mailing list and it's mostly full of junk because of
CC: tags anyway.
This changes the preferred actions to be:
1) use a fixes: tag ahead of time
2) use a Cc tag ahead of time if fixes isn't appropriate
3) Use a gitlab MR against the staging/ branch for post-merge/backport
   nominations

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3056>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3056>

4 years agoturnip: fix tile->slot calculation
Jonathan Marek [Tue, 17 Dec 2019 22:29:02 +0000 (17:29 -0500)]
turnip: fix tile->slot calculation

Fixes HW binning cases when the horizontal number of tiles isn't divisible
by the horizontal number of pipes (only happens with more than 32 tiles).

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3142>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3142>

4 years agoturnip: improve binning pipe layout config
Jonathan Marek [Tue, 17 Dec 2019 22:22:46 +0000 (17:22 -0500)]
turnip: improve binning pipe layout config

The old code looks the same as GL driver, but we get things like
pipe_count = {32, 1}, which seems bad.

This uses similar logic as for tiles which produces a balanced pipe_count
width/height.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3142>

4 years agoRevert "spirv: Use a simpler and more correct implementaiton of tanh()"
Kristian H. Kristensen [Thu, 27 Feb 2020 19:38:53 +0000 (11:38 -0800)]
Revert "spirv: Use a simpler and more correct implementaiton of tanh()"

This reverts commit da1c49171d0df185545cfbbd600e287f7c6160fa.

The reduced formula has precision problems on fp16 around 0.  Bring
back the old formula, but make sure to keep the clamping.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4054>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4054>

4 years agoRevert "glsl: Use a simpler formula for tanh"
Kristian H. Kristensen [Thu, 27 Feb 2020 00:52:45 +0000 (16:52 -0800)]
Revert "glsl: Use a simpler formula for tanh"

This reverts commit 9807f502eb7a023be619a14119388b2a43271b0e.

The simplified formula doesn't pass the tanh dEQP tests when we lower
to fp16 math.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4054>

4 years agopan/bi: Add bi_print_shader
Alyssa Rosenzweig [Thu, 5 Mar 2020 13:23:43 +0000 (08:23 -0500)]
pan/bi: Add bi_print_shader

Woot! That's the last of it! IR printing is now complete*

*until the IR gets updated when new shiny things are added.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>

4 years agopan/bi: Add bi_print_block
Alyssa Rosenzweig [Thu, 5 Mar 2020 13:22:07 +0000 (08:22 -0500)]
pan/bi: Add bi_print_block

Almost there...

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>

4 years agopan/bi: Add bi_print_clause
Alyssa Rosenzweig [Thu, 5 Mar 2020 13:10:02 +0000 (08:10 -0500)]
pan/bi: Add bi_print_clause

Again for post-sched purposes.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>

4 years agopan/bi: Add bi_print_bundle for printing bi_bundle
Alyssa Rosenzweig [Thu, 5 Mar 2020 12:57:49 +0000 (07:57 -0500)]
pan/bi: Add bi_print_bundle for printing bi_bundle

Post-schedule, nops are significnat here.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>

4 years agopan/bi: Add bi_instruction printing
Alyssa Rosenzweig [Wed, 4 Mar 2020 14:21:50 +0000 (09:21 -0500)]
pan/bi: Add bi_instruction printing

So we can debug the IR in memory before code emit has happened. We'd
like to have a complete dump of the IR -- neglecting this with Midgard
was one of those mistakes I've regretted so let's get this right for the
first time around.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>

4 years agopan/bi: Move bi_interp_mode_name to bi_print
Alyssa Rosenzweig [Wed, 4 Mar 2020 14:21:25 +0000 (09:21 -0500)]
pan/bi: Move bi_interp_mode_name to bi_print

Instead of open-coding it in the middle of the disassembler.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>

4 years agopan/bi: Add BIR manipulation routines to bir.c
Alyssa Rosenzweig [Wed, 4 Mar 2020 14:19:06 +0000 (09:19 -0500)]
pan/bi: Add BIR manipulation routines to bir.c

New file.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>

4 years agopan/bi: Move some print routines out of the disasm
Alyssa Rosenzweig [Tue, 3 Mar 2020 20:39:04 +0000 (15:39 -0500)]
pan/bi: Move some print routines out of the disasm

These are generally useful for debug of the compiler IR even prior to
code emit; let's share these.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>

4 years agopan/bi: Add IR iteration macros
Alyssa Rosenzweig [Tue, 3 Mar 2020 19:32:28 +0000 (14:32 -0500)]
pan/bi: Add IR iteration macros

Copypaste from Midgard, for the most part.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>

4 years agopan/bi: Add quirks system
Alyssa Rosenzweig [Tue, 3 Mar 2020 19:27:05 +0000 (14:27 -0500)]
pan/bi: Add quirks system

Modeled after the Midgard system. Already we know of two
compiler-visible differences between G52 and G71, so let's keep track so
we can eventually port the compiler to other Bifrost systems.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>

4 years agopan/bi: Add high-latency property for classes
Alyssa Rosenzweig [Tue, 3 Mar 2020 18:55:33 +0000 (13:55 -0500)]
pan/bi: Add high-latency property for classes

This is required to know how to schedule legally, and also influences
some issues relating to RA.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>

4 years agopan/bi: Add CSEL condition
Alyssa Rosenzweig [Thu, 5 Mar 2020 12:46:00 +0000 (07:46 -0500)]
pan/bi: Add CSEL condition

Along with src_types, this is enough to represent CSEL.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>

4 years agopan/bi: Add bi_branch data
Alyssa Rosenzweig [Tue, 3 Mar 2020 18:48:13 +0000 (13:48 -0500)]
pan/bi: Add bi_branch data

For BI_BRANCH, of course. Meshes well with the cfg.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>

4 years agopan/bi: Extract bifrost_branch structure
Alyssa Rosenzweig [Tue, 3 Mar 2020 18:47:49 +0000 (13:47 -0500)]
pan/bi: Extract bifrost_branch structure

It's in the disassembler as bitfields, let's extract to a proper
structure so we can see what's there.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>

4 years agopan/bi: Add pred/successors to build CFG
Alyssa Rosenzweig [Tue, 3 Mar 2020 18:47:13 +0000 (13:47 -0500)]
pan/bi: Add pred/successors to build CFG

We'll want this for analysis passes or something, probably.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>

4 years agopan/bi: Add constants to bi_clause
Alyssa Rosenzweig [Tue, 3 Mar 2020 18:01:41 +0000 (13:01 -0500)]
pan/bi: Add constants to bi_clause

Scheduling will have to pay attention to this.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>

4 years agopan/bi: Add EXTRACT, MAKE_VEC synthetic ops
Alyssa Rosenzweig [Tue, 3 Mar 2020 13:57:03 +0000 (08:57 -0500)]
pan/bi: Add EXTRACT, MAKE_VEC synthetic ops

These allow translating between the vector I/O and scalar ALUs,
facilitated by an RA dance to ensured contiguous registers are used.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>

4 years agopan/bi: Add source type for conversions
Alyssa Rosenzweig [Tue, 3 Mar 2020 13:37:15 +0000 (08:37 -0500)]
pan/bi: Add source type for conversions

We should now be able to unambiguously represent conversions.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>

4 years agopan/bi: Add swizzles
Alyssa Rosenzweig [Tue, 3 Mar 2020 13:35:51 +0000 (08:35 -0500)]
pan/bi: Add swizzles

Requires a new field on bifrost_instruction, as well as a new class
property and a new class for the dedicated swizzle ops.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>

4 years agopan/bi: Clarify special op scheduling
Alyssa Rosenzweig [Tue, 3 Mar 2020 13:16:50 +0000 (08:16 -0500)]
pan/bi: Clarify special op scheduling

They're encoded on ADD but eat the full cycle.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>

4 years agopan/bi: Add clause header fields to bi_clause
Alyssa Rosenzweig [Tue, 3 Mar 2020 13:09:18 +0000 (08:09 -0500)]
pan/bi: Add clause header fields to bi_clause

These will be filled out during scheduling (and possibly RA), to be used
when emitting code.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>

4 years agopan/bi: Add class-specific ops
Alyssa Rosenzweig [Tue, 3 Mar 2020 12:58:05 +0000 (07:58 -0500)]
pan/bi: Add class-specific ops

For disambiguating things like min and max within the MINMAX class.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>

4 years agopan/bi: Add constant field to bi_instruction
Alyssa Rosenzweig [Tue, 3 Mar 2020 12:47:29 +0000 (07:47 -0500)]
pan/bi: Add constant field to bi_instruction

Now that we can index it.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>

4 years agopan/bi: Add special indices
Alyssa Rosenzweig [Tue, 3 Mar 2020 12:45:33 +0000 (07:45 -0500)]
pan/bi: Add special indices

For fixed registers, uniforms, and constants, which bypass the usual SSA
mechanism to map well to the ISA.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>

4 years agopan/bi: Add dest_type field to bifrost_instruction
Alyssa Rosenzweig [Tue, 3 Mar 2020 03:03:05 +0000 (22:03 -0500)]
pan/bi: Add dest_type field to bifrost_instruction

A number of opcodes within a class are disambiguated by type/size, and
whether modifiers make sense or not depends on whether the instruction
acts like a float.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>

4 years agopan/bi: Add bi_clause, bi_bundle abstractions
Alyssa Rosenzweig [Tue, 3 Mar 2020 03:00:07 +0000 (22:00 -0500)]
pan/bi: Add bi_clause, bi_bundle abstractions

These will be used during and after scheduling.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>

4 years agopan/bi: Add PAN_SCHED_* flags
Alyssa Rosenzweig [Tue, 3 Mar 2020 02:53:13 +0000 (21:53 -0500)]
pan/bi: Add PAN_SCHED_* flags

Class (mostly) determines scheduling options.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>

4 years agopan/bi: Add bi_load_vary structure
Alyssa Rosenzweig [Tue, 3 Mar 2020 02:48:51 +0000 (21:48 -0500)]
pan/bi: Add bi_load_vary structure

For ld_vary in the IR.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>

4 years agopan/bi: Pull out bifrost_load_var
Alyssa Rosenzweig [Tue, 3 Mar 2020 02:45:47 +0000 (21:45 -0500)]
pan/bi: Pull out bifrost_load_var

We're not using this structure yet but we want everything in the ISA
ready for us.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>

4 years agopan/bi: Add bi_load structure
Alyssa Rosenzweig [Tue, 3 Mar 2020 02:19:16 +0000 (21:19 -0500)]
pan/bi: Add bi_load structure

Fills out the class for LD_ATTR, LD_VAR_ADDR

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>

4 years agopan/bi: Add bifrost_minmax_mode field
Alyssa Rosenzweig [Tue, 3 Mar 2020 01:53:47 +0000 (20:53 -0500)]
pan/bi: Add bifrost_minmax_mode field

We'll open up a union for class specific data, since this is interesting
only to BI_MINMAX. (And even then...)

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>

4 years agopan/bi: Add a bifrost_roundmode field
Alyssa Rosenzweig [Tue, 3 Mar 2020 01:52:36 +0000 (20:52 -0500)]
pan/bi: Add a bifrost_roundmode field

And a class property signaling it's okay to use.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>

4 years agopan/bi: Factor out enum bifrost_minmax_mode
Alyssa Rosenzweig [Tue, 3 Mar 2020 01:51:03 +0000 (20:51 -0500)]
pan/bi: Factor out enum bifrost_minmax_mode

We'll want it from the compiler-side.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>

4 years agopan/bi: Add BI_GENERIC property
Alyssa Rosenzweig [Tue, 3 Mar 2020 01:46:37 +0000 (20:46 -0500)]
pan/bi: Add BI_GENERIC property

I don't want to have 20 class-specific structures floating around. So
let's derive them all from a common generic ALU type.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>

4 years agopan/bi: Add modifiers to bi_instruction
Alyssa Rosenzweig [Tue, 3 Mar 2020 01:40:52 +0000 (20:40 -0500)]
pan/bi: Add modifiers to bi_instruction

Now that we can check if we support them via the class.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>

4 years agopan/bi: Add class properties
Alyssa Rosenzweig [Tue, 3 Mar 2020 01:38:26 +0000 (20:38 -0500)]
pan/bi: Add class properties

We need to keep track of what specific classes support. For now just
track floating point modifiers.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>

4 years agopan/bi: Add src/dest fields to bifrost_instruction
Alyssa Rosenzweig [Tue, 3 Mar 2020 01:24:03 +0000 (20:24 -0500)]
pan/bi: Add src/dest fields to bifrost_instruction

...along with some helpers to generate indices. The indexing scheme is
mostly a copypaste from Midgard, except we specifically reserve 0 as the
sentinel (midgard uses ~0 for this which has always been a pain point).

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>

4 years agopan/bi: Add the control flow graph
Alyssa Rosenzweig [Tue, 3 Mar 2020 01:06:34 +0000 (20:06 -0500)]
pan/bi: Add the control flow graph

We're starting to build up the IR data structures in preparation to get
everything piped through.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>

4 years agopan/bi: Stub out new compiler
Alyssa Rosenzweig [Tue, 3 Mar 2020 00:47:11 +0000 (19:47 -0500)]
pan/bi: Stub out new compiler

Just enough to pipe in the NIR shader.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>

4 years agopan/bi: Gut old compiler
Alyssa Rosenzweig [Tue, 3 Mar 2020 00:30:11 +0000 (19:30 -0500)]
pan/bi: Gut old compiler

We're making some pretty dramatic design pivots so this early on it'll
be easier to start from scratch, I think.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>

4 years agopanfrost: Add note about preloaded varyings
Alyssa Rosenzweig [Tue, 3 Mar 2020 02:32:31 +0000 (21:32 -0500)]
panfrost: Add note about preloaded varyings

There's a magic bit in preload_regs which controls this. It doesn't
appear to be supported on G71 but it is on G52. I'd guess G72 supports
it too but I don't have a way to check this.

Needless to say, we'll need a quirks database for this.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4061>

4 years agoaco: fix image load/store with lod and 1D images
Samuel Pitoiset [Thu, 5 Mar 2020 10:32:06 +0000 (11:32 +0100)]
aco: fix image load/store with lod and 1D images

Make sure to add the lod value if non-null as the 2nd operand.

Fixes dEQP-VK.image.load_store_lod.with_format.1d.* on all gens
except GFX9.

Fixes: 4d49a7ac737 ("aco: handle nir_intrinsic_image_deref_{load,store} with lod")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4060>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4060>

4 years agogitlab-ci: Distribute jobs across more stages
Michel Dänzer [Thu, 27 Feb 2020 17:27:56 +0000 (18:27 +0100)]
gitlab-ci: Distribute jobs across more stages

The stages and mapping of jobs to them are somewhat arbitrary; the goal
is to avoid having to scroll through large numbers of jobs.

v2: (Pierre-Eric Pelloux-Prayer)
* Use even more stages for test jobs
* Give somewhat meaningful names to stages

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3995>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3995>

4 years agogitlab-ci: Drop "test-" prefix from llvmpipe/softpipe job names
Michel Dänzer [Tue, 3 Mar 2020 17:17:12 +0000 (18:17 +0100)]
gitlab-ci: Drop "test-" prefix from llvmpipe/softpipe job names

Redundant.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3995>

4 years agovbo: merge draws even when begin==0 or end==0
Marek Olšák [Fri, 14 Feb 2020 19:18:45 +0000 (14:18 -0500)]
vbo: merge draws even when begin==0 or end==0

Reviewed-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4052>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4052>

4 years agovbo: merge more primitive types for glBegin/End (v2)
Marek Olšák [Fri, 14 Feb 2020 04:22:44 +0000 (23:22 -0500)]
vbo: merge more primitive types for glBegin/End (v2)

v2: clean it up more

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4052>

4 years agomesa: deduplicate draw indirect functions
Marek Olšák [Fri, 14 Feb 2020 19:29:32 +0000 (14:29 -0500)]
mesa: deduplicate draw indirect functions

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4052>

4 years agomesa: optimize get_index_size
Marek Olšák [Tue, 3 Mar 2020 20:08:09 +0000 (15:08 -0500)]
mesa: optimize get_index_size

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4052>

4 years agomesa: remove _mesa_index_buffer::index_size in favor of index_size_shift
Marek Olšák [Tue, 3 Mar 2020 20:03:28 +0000 (15:03 -0500)]
mesa: remove _mesa_index_buffer::index_size in favor of index_size_shift

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Suggested-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4052>

4 years agoRevert "mesa: check for z=0 in _mesa_Vertex3dv()"
Marek Olšák [Thu, 27 Feb 2020 21:06:47 +0000 (16:06 -0500)]
Revert "mesa: check for z=0 in _mesa_Vertex3dv()"

This reverts commit f04d7439a0ad6e13ff2912ff824553b6bcf511a4.

It no longer helps performance and the current vbo implementation is
faster anyway.

The app that hit this was a CAD program called Spazio3D. It made pretty
terrible use of the OpenGL API and we sent them some tips for improvements.
I'm assuming they've fixed this by now.

Reviewed-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4052>

4 years agovbo: fold code from vbo_exec_fixup_vertex to vbo_exec_wrap_upgrade_vertex
Marek Olšák [Thu, 27 Feb 2020 20:43:55 +0000 (15:43 -0500)]
vbo: fold code from vbo_exec_fixup_vertex to vbo_exec_wrap_upgrade_vertex

Reviewed-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4052>

4 years agovbo: clean up conditional blocks in ATTR_UNION
Marek Olšák [Thu, 27 Feb 2020 20:30:08 +0000 (15:30 -0500)]
vbo: clean up conditional blocks in ATTR_UNION

Move the A != 0 code to the first block.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4052>

4 years agovbo: handle GS and tess primitive types when splitting Begin/End
Marek Olšák [Wed, 19 Feb 2020 00:38:33 +0000 (19:38 -0500)]
vbo: handle GS and tess primitive types when splitting Begin/End

Reviewed-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4052>

4 years agovbo: clean up vbo_copy_vertices
Marek Olšák [Wed, 19 Feb 2020 00:05:17 +0000 (19:05 -0500)]
vbo: clean up vbo_copy_vertices

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4052>

4 years agovbo: deduplicate copy_vertices functions
Marek Olšák [Tue, 18 Feb 2020 23:37:36 +0000 (18:37 -0500)]
vbo: deduplicate copy_vertices functions

There are some differences in exec, but those look like bug fixes not ported
to vbo_save.

Reviewed-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4052>

4 years agovbo: don't look at the second draw's count when merging 2 glBegin/End draws
Marek Olšák [Fri, 14 Feb 2020 04:15:47 +0000 (23:15 -0500)]
vbo: don't look at the second draw's count when merging 2 glBegin/End draws

Only the first count needs to be aligned.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4052>

4 years agomesa: replace some index_size multiplications and divisions with shifts
Marek Olšák [Thu, 13 Feb 2020 20:29:22 +0000 (15:29 -0500)]
mesa: replace some index_size multiplications and divisions with shifts

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4052>

4 years agomesa: add index_size_shift = log2(index_size) into _mesa_index_buffer
Marek Olšák [Wed, 12 Feb 2020 23:02:24 +0000 (18:02 -0500)]
mesa: add index_size_shift = log2(index_size) into _mesa_index_buffer

for faster division

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Ian Romanick <ian.d.romanic@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4052>

4 years agoandroid: r600/sfn: Add GDS instructions
Mauro Rossi [Sat, 22 Feb 2020 15:20:10 +0000 (16:20 +0100)]
android: r600/sfn: Add GDS instructions

Fixes the following building errors:

external/mesa/src/gallium/drivers/r600/sfn/sfn_emitssboinstruction.cpp:59: error: undefined reference to 'r600::GDSInstr::GDSInstr(r600::ESDOp, r600::GPRVector const&, std::__1::shared_ptr<r600::Value> const&, std::__1::shared_ptr<r600::Value> const&, std::__1::shared_ptr<r600::Value> const&, int)'
...
external/mesa/src/gallium/drivers/r600/sfn/sfn_emitssboinstruction.cpp:256: error: undefined reference to 'r600::RatInstruction::RatInstruction(r600::ECFOpCode, r600::RatInstruction::ERatOp, r600::GPRVector const&, r600::GPRVector const&, int, std::__1::shared_ptr<r600::Value> const&, int, int, int, bool)'

Fixes: 32d3435a ("r600/sfn: Add GDS instructions")
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
4 years agoandroid: r600/sfn: fix includes and libmesa_nir dependency
Mauro Rossi [Sat, 22 Feb 2020 15:20:10 +0000 (16:20 +0100)]
android: r600/sfn: fix includes and libmesa_nir dependency

Fixes the following building errors:

In file included from external/mesa/src/gallium/drivers/r600/sfn/sfn_debug.cpp:28:
In file included from external/mesa/src/gallium/drivers/r600/sfn/sfn_debug.h:34:
In file included from external/mesa/src/compiler/nir/nir.h:41:
In file included from external/mesa/src/compiler/nir_types.h:36:
external/mesa/src/compiler/glsl_types.h:38:10: fatal error: 'main/config.h' file not found
#include "main/config.h"
         ^~~~~~~~~~~~~~~
1 error generated.

In file included from external/mesa/src/gallium/drivers/r600/sfn/sfn_debug.cpp:28:
In file included from external/mesa/src/gallium/drivers/r600/sfn/sfn_debug.h:34:
external/mesa/src/compiler/nir/nir.h:50:10: fatal error: 'nir_opcodes.h' file not found
#include "nir_opcodes.h"
         ^~~~~~~~~~~~~~~
1 error generated.

Fixes: f718ac62 ("r600/sfn: Add a basic nir shader backend")
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
4 years agoandroid: aco: fix PIPE_FORMAT related building errors
Mauro Rossi [Sat, 22 Feb 2020 15:20:10 +0000 (16:20 +0100)]
android: aco: fix PIPE_FORMAT related building errors

Fixes the following building errors:

In file included from external/mesa/src/amd/compiler/aco_dead_code_analysis.cpp:25:
In file included from external/mesa/src/amd/compiler/aco_ir.h:33:
In file included from external/mesa/src/compiler/nir/nir.h:40:
external/mesa/src/util/format/u_format.h:33:10: fatal error: 'pipe/p_format.h' file not found
#include "pipe/p_format.h"
         ^~~~~~~~~~~~~~~~~
...
In file included from external/mesa/src/amd/compiler/aco_dominance.cpp:31:
In file included from external/mesa/src/amd/compiler/aco_ir.h:33:
In file included from external/mesa/src/compiler/nir/nir.h:40:
external/mesa/src/util/format/u_format.h:33:10: fatal error: 'pipe/p_format.h' file not found
#include "pipe/p_format.h"
         ^~~~~~~~~~~~~~~~~
...
In file included from external/mesa/src/amd/compiler/aco_instruction_selection.cpp:31:
In file included from external/mesa/src/amd/common/ac_shader_util.h:32:
In file included from external/mesa/src/compiler/nir/nir.h:40:
external/mesa/src/util/format/u_format.h:33:10: fatal error: 'pipe/p_format.h' file not found
#include "pipe/p_format.h"
         ^~~~~~~~~~~~~~~~~
3 errors generated.

Fixes: 8d07d661 ("glsl,nir: Switch the enum representing shader image formats to PIPE_FORMAT.")
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
4 years agonir: Flush to zero with OOB low exponents in ldexp
Jason Ekstrand [Thu, 27 Feb 2020 19:58:34 +0000 (13:58 -0600)]
nir: Flush to zero with OOB low exponents in ldexp

Reviewed-by: Arcady Goldmints-Orlov <agoldmints@igalia.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
4 years agozink. Added storage CISto descriptor pool.
Duncan Hopkins [Wed, 4 Mar 2020 11:24:24 +0000 (11:24 +0000)]
zink. Added storage CISto descriptor pool.
Added storage in descriptor pool for combined image samplers as well as uniform buffers.
Stops some shaders from running through a pools storage faster than zinks internal tracking.

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4045>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4045>

4 years agogitlab-ci: Add jobs to be able to test Vulkan
Andres Gomez [Thu, 20 Feb 2020 16:26:30 +0000 (18:26 +0200)]
gitlab-ci: Add jobs to be able to test Vulkan

Also, adds an example job for radv.

Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
4 years agogitlab-ci: Add gfxreconstruct traces support
Andres Gomez [Wed, 12 Feb 2020 21:21:07 +0000 (23:21 +0200)]
gitlab-ci: Add gfxreconstruct traces support

Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
4 years agogitlab-ci: Change devices format to <api-vendor-deviceId>
Andres Gomez [Thu, 20 Feb 2020 15:32:08 +0000 (17:32 +0200)]
gitlab-ci: Change devices format to <api-vendor-deviceId>

In preparation to having "vk" (Vulkan) along "gl" (OpenGL/ES).

This is so it is clearer which traces belong to which API and also for
the build jobs.

Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
4 years agogitlab-ci: build VulkanTools into the Vulkan testing container
Andres Gomez [Thu, 20 Feb 2020 15:09:03 +0000 (17:09 +0200)]
gitlab-ci: build VulkanTools into the Vulkan testing container

In preparation for having automated testing with Vulkan traces.

Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
4 years agogitlab-ci: build gfxreconstruct into the Vulkan testing container
Andres Gomez [Thu, 20 Feb 2020 12:18:54 +0000 (14:18 +0200)]
gitlab-ci: build gfxreconstruct into the Vulkan testing container

In preparation for having automated testing with Vulkan traces.

Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
4 years agogitlab-ci: add missing popd to the build-deqp-vk.sh script
Andres Gomez [Thu, 20 Feb 2020 13:30:36 +0000 (15:30 +0200)]
gitlab-ci: add missing popd to the build-deqp-vk.sh script

Since we are at it, replace "cd" with pushd / popd and homogenize how
VK-GL-CTS is built in comparison with other build scripts.

Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
4 years agotracie: correct typo
Andres Gomez [Thu, 20 Feb 2020 11:45:21 +0000 (13:45 +0200)]
tracie: correct typo

Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
4 years agoetnaviv: fix alpha test on GC3000
Christian Gmeiner [Fri, 17 Jan 2020 09:32:33 +0000 (10:32 +0100)]
etnaviv: fix alpha test on GC3000

Store ref_value in PE_STENCIL_CONFIG_EXT as done by blob.

Fixes following piglits:
 spec@ext_framebuffer_object@fbo-alphatest-formats
 spec@ext_packed_float@fbo-alphatest-formats
 spec@ext_texture_srgb@fbo-alphatest-formats

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4028>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4028>

4 years agoetnaviv: update headers from rnndb
Christian Gmeiner [Tue, 28 Jan 2020 04:43:06 +0000 (05:43 +0100)]
etnaviv: update headers from rnndb

Update to etna_viv commit 3bc187a.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4028>

4 years agoegl/wayland: Don't invalidate buffers on no-op resize
Daniel Stone [Tue, 3 Mar 2020 10:52:32 +0000 (10:52 +0000)]
egl/wayland: Don't invalidate buffers on no-op resize

The Wayland platform's resize_callback is invoked from libwayland-egl
when wl_egl_window_resize() is called. The resize call is the only place
for the application to insert dx/dy arguments to wl_surface_attach().

When modifying the cursor hotspot (as in wayland/wayland#148), we want
to set dx/dy, but leave the surface size the same. If we get
wl_egl_window_resize() with the same width and height argument as we
already have, we do not need to invalidate our existing drawable.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4030>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4030>

4 years agoRevert "glx: convert glx_config_create_list to one big calloc"
Andrii Simiklit [Wed, 15 Jan 2020 10:34:38 +0000 (12:34 +0200)]
Revert "glx: convert glx_config_create_list to one big calloc"

This reverts commit 35fc7bdf0e6ad6547e39099e7060a3d89539b56d.

Unfortunately mentioned commit introduced a memory leak because
`driwindowsMapConfigs` and `createDriMode` functions allocate
small memory portions for each element:
 21,576 (232 direct, 21,344 indirect) bytes in 1 blocks are definitely lost in loss record 1,411 of 1,414
    at 0x483A7F3: malloc (in /usr/lib/x86_64-linux-gnu/valgrind/vgpreload_memcheck-amd64-linux.so)
    by 0x5D4AA09: createDriMode (dri_common.c:291)
    by 0x5D4ABF5: driConvertConfigs (dri_common.c:310)
    by 0x5D58414: dri3_create_screen (dri3_glx.c:945)
    by 0x5D39829: AllocAndFetchScreenConfigs (glxext.c:815)
    by 0x5D39C57: __glXInitialize (glxext.c:941)
    by 0x5D3290A: GetGLXPrivScreenConfig (glxcmds.c:174)
    by 0x5D34F38: glXQueryExtensionsString (glxcmds.c:1307)
    by 0x4F83038: glXQueryExtensionsString (in /usr/local/lib/libGL.so.1.7.0)
    by 0x4F2EA6B: ??? (in /usr/lib/x86_64-linux-gnu/libwaffle-1.so.0.6.0)
    by 0x4F2A0D7: waffle_display_connect (in /usr/lib/x86_64-linux-gnu/libwaffle-1.so.0.6.0)
    by 0x498F42A: wfl_checked_display_connect (piglit-util-waffle.h:74)

There is one more thing which disallow us to easily fix it are different element sizes
for instance: `glx_config_create_list` allocates memory just for `glx_config`,
`driwindowsMapConfigs` for `driwindows_config` and
`createDriMode` for `__GLXDRIconfigPrivate`.
Yes it is possible but size of such fix
will be more big and complex than original one.
So it make sense only if the malloc overhead
really is a big problem there.

Acked-by: Eric Engestrom <eric@engestrom.ch>
Signed-off-by: Andrii Simiklit <andrii.simiklit@globallogic.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3406>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3406>

4 years agozink. Don't set incorrect sType in VkImportMemoryFdInfoKHR struct
Vilya Harvey [Tue, 3 Mar 2020 16:19:29 +0000 (16:19 +0000)]
zink. Don't set incorrect sType in VkImportMemoryFdInfoKHR struct

imfi.sType was being set to an invalid value, triggering a warning in Clang. The only valid value for imfi.sType is VK_STRUCTURE_TYPE_IMPORT_MEMORY_FD_INFO_KHR which is the value it is being given at initialisation time, a few lines earlier. The incorrect value, VK_EXTERNAL_MEMORY_HANDLE_TYPE_OPAQUE_FD_BIT, is supposed to be used in imfi.handleType instead - and indeed, handleType *is* being set to this value a few lines later.

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4034>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4034>

4 years agoturnip: support indirect draw
Hyunjun Ko [Tue, 25 Feb 2020 06:35:01 +0000 (06:35 +0000)]
turnip: support indirect draw

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3976>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3976>

4 years agoandroid: gallium/auxiliary: fix "Unused source files" in tesselator
Mauro Rossi [Sat, 29 Feb 2020 10:33:49 +0000 (11:33 +0100)]
android: gallium/auxiliary: fix "Unused source files" in tesselator

Avoids the following Android Build System error:

FAILED:
build/make/core/binary.mk:1245: error: external/mesa/src/gallium/auxiliary/Android.mk: libmesa_gallium: Unused source files: tessellator/tessellator.hpp
10:24:30 ckati failed with: exit status 1

Fixes: bd0188f ("gallium/auxiliary: add the microsoft tessellator and a pipe wrapper.")
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Acked-by: Dave Airlie <airlied@redhat.com>
4 years agoci: Flip db410c back to docker mode.
Eric Anholt [Tue, 3 Mar 2020 19:44:45 +0000 (11:44 -0800)]
ci: Flip db410c back to docker mode.

Turns out there's corporate policy to not deploy AGPL software, so I
have to take down the LAVA lab until we sort out how to do it without
a local server.

Reviewed-by: Daniel Stone <daniels@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4038>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4038>

4 years agointel/gen12+: Disable mid thread preemption.
Rafael Antognolli [Tue, 3 Mar 2020 16:07:32 +0000 (08:07 -0800)]
intel/gen12+: Disable mid thread preemption.

Fixes a GPU hang in Car Chase.

Cc: mesa-stable@lists.freedesktop.org
v2: Add comment explaining why (Jason).

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4035>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4035>

4 years agoRevert "gallium/swr: Fix min/max range index draw"
Krzysztof Raszkowski [Tue, 3 Mar 2020 15:02:20 +0000 (15:02 +0000)]
Revert "gallium/swr: Fix min/max range index draw"

This reverts commit 5e9a2c603f38308f7027d6a5e4575e5fc24c1bd5

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4032>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4032>

4 years agovc4: fix vc4_yuv_blit overwriting fragment constant buffer slot 0
Chris Lord [Fri, 28 Feb 2020 15:18:14 +0000 (15:18 +0000)]
vc4: fix vc4_yuv_blit overwriting fragment constant buffer slot 0

vc4_yuv_blit calls util_blitter_restore_constant_buffer_state without
first calling util_blitter_save_fragment_constant_buffer_slot. This causes
subsequent crashes in vc4_write_uniforms when using fragment shaders that
reference YUV textures.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2581
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3997>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3997>

4 years agoaco: handle v_add_co_u32_e64 in parse_base_offset()
Rhys Perry [Fri, 21 Feb 2020 12:02:06 +0000 (12:02 +0000)]
aco: handle v_add_co_u32_e64 in parse_base_offset()

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3902>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3902>

4 years agoaco: fix carry-out size for wave32 v_add_co_u32_e64
Rhys Perry [Fri, 21 Feb 2020 12:00:38 +0000 (12:00 +0000)]
aco: fix carry-out size for wave32 v_add_co_u32_e64

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Fixes: e0bcefc3a0a ('aco/wave32: Use lane mask regclass for exec/vcc.')
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3902>

4 years agogallium/swr: fix corruptions in Unigine Heaven
Jan Zielinski [Thu, 27 Feb 2020 16:22:05 +0000 (17:22 +0100)]
gallium/swr: fix corruptions in Unigine Heaven

Few changes to fix the last corruptions in Heaven:
- fix indirect TCS input when vertex/attribute
  index is not the same for each patch
- use the correct functions to build loops in shader
- fix using vmask for writting TCS output

Reviewed-by: Krzysztof Raszkowski <krzysztof.raszkowski@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3980>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3980>

4 years agost/va: GetConfigAttributes: check profile and entrypoint combination
Satyajit Sahu [Thu, 20 Feb 2020 08:35:32 +0000 (14:05 +0530)]
st/va: GetConfigAttributes: check profile and entrypoint combination

Added check if profile is supported or not for the entrypoint in
GetConfigAttributes.

Signed-off-by: Satyajit Sahu <satyajit.sahu@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3889>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3889>

4 years agointel/isl: Implement D16_UNORM workarounds.
Rafael Antognolli [Fri, 21 Feb 2020 20:03:05 +0000 (12:03 -0800)]
intel/isl: Implement D16_UNORM workarounds.

GEN:BUG:14010455700 (lineage 1808121037):

   "To avoid sporadic corruptions “Set 0x7010[9] when Depth Buffer
   Surface Format is D16_UNORM , surface type is not NULL & 1X_MSAA"

Required for fixing ttps://gitlab.freedesktop.org/mesa/mesa/issues/2501.

GEN:BUG:1806527549:

   "Set HIZ_CHICKEN (7018h) bit 13 = 1 when depth buffer is D16_UNORM."

This one could fix a GPU hang in some workloads.

v2: Implement WA in isl and add another similar WA (Jason).
v3: Add flushes before changing chicken registers (Jason)
v4: Depth flush and stall + end of pipe sync when changing registers
(Jason).

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3801>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3801>

4 years agoaco: keep track of which events are used in a barrier
Rhys Perry [Tue, 11 Feb 2020 16:52:20 +0000 (16:52 +0000)]
aco: keep track of which events are used in a barrier

And properly handle unordered events so that they always wait for 0.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Fixes: 93c8ebfa780 ('aco: Initial commit of independent AMD compiler')
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3774>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3774>