Steve Reinhardt [Thu, 2 Mar 2006 16:30:25 +0000 (11:30 -0500)]
Fix memory allocation error in Port::memsetBlobFunctional.
mem/port.cc:
Delete temp buffer for memset.
--HG--
extra : convert_revision :
d7e2868c173442ca904898633f7ea9fc5e612dd3
Steve Reinhardt [Thu, 2 Mar 2006 15:31:48 +0000 (10:31 -0500)]
Simple program runs with sendAtomic!
Ignoring returned latency for now.
Refactored loadSections in ObjectFile hierarchy.
base/loader/aout_object.cc:
base/loader/aout_object.hh:
base/loader/ecoff_object.cc:
base/loader/ecoff_object.hh:
base/loader/elf_object.cc:
base/loader/elf_object.hh:
base/loader/object_file.hh:
Have each section record a pointer to image data.
This allows us to move common loadSections code into ObjectFile.
base/loader/object_file.cc:
Have each section record a pointer to image data.
This allows us to move common loadSections code into ObjectFile.
Also explicitly load BSS now since we need to allocate the
translations for it in syscall emulation.
cpu/base.hh:
Don't need memPort (just pass port in to ExecContext constructor).
cpu/exec_context.cc:
cpu/exec_context.hh:
mem/port.cc:
mem/translating_port.cc:
mem/translating_port.hh:
Pass syscall emulation Port into constructor instead of
getting it from BaseCPU.
cpu/simple/cpu.cc:
Explicitly choose one of three timing models.
Statically allocate request and packet objects when possible.
Several more minor bug fixes.
Works for simple program with SIMPLE_CPU_MEM_IMMEDIATE model now.
Probably have memory leaks with SIMPLE_CPU_MEM_TIMING (if it works at all).
Pass syscall emulation Port into constructor instead of
getting it from BaseCPU.
cpu/simple/cpu.hh:
Explicitly choose one of three timing models.
Statically allocate request and packet objects when possible.
Pass syscall emulation Port into constructor instead of
getting it from BaseCPU.
mem/physical.cc:
Set packet result field.
--HG--
extra : convert_revision :
359d0ebe4b4665867f4e26e7394ec0f1d17cfc26
Steve Reinhardt [Thu, 2 Mar 2006 06:01:03 +0000 (01:01 -0500)]
More progress... run a few instructions now, but die on the second
memory access (I think because we're deallocating our one and only
CpuRequest object).
base/loader/aout_object.cc:
base/loader/ecoff_object.cc:
base/loader/elf_object.cc:
Add flag to force allocation of new pages on data writes.
cpu/simple/cpu.cc:
Several minor fixes.
Switch to atomic mode for now.
mem/physical.hh:
Don't copy the packet to the response event, just keep a reference
to the original.
mem/translating_port.cc:
mem/translating_port.hh:
Add parameter to writeBlobFunctional() to force allocation of
unallocated pages on writes.
--HG--
extra : convert_revision :
05cb31c7b0047b492dcfa0d12ddee690ef762b44
Steve Reinhardt [Wed, 1 Mar 2006 23:45:50 +0000 (18:45 -0500)]
More progress toward actually running a program.
See configs/test.py for test config (using simple
binary in my home directory on zizzer).
base/chunk_generator.hh:
Fix assertion for chunkSize == 0 (not a power of 2)
base/intmath.hh:
Fix roundDown to take integer alignments.
cpu/base.cc:
Register exec contexts regardless of state (not sure why
this check was in here in the first place).
mem/physical.cc:
Add breaks to switch.
python/m5/objects/BaseCPU.py:
Default mem to Parent.any (e.g. get from System).
python/m5/objects/Ethernet.py:
python/m5/objects/Root.py:
HierParams is gone.
python/m5/objects/PhysicalMemory.py:
mmu param is full-system only.
sim/process.cc:
Stack mapping request must be page-aligned and page-sized.
Don't delete objFile object in create since we are counting
on it being around for startup().
--HG--
extra : convert_revision :
90c43ee927e7d82a045d6e10302d965797d006f7
Ron Dreslinski [Mon, 27 Feb 2006 21:33:11 +0000 (16:33 -0500)]
Fixes so that it compiles properly. Still working on .py file issues.
SConscript:
Add Back memory to be built
mem/physical.hh:
Fix function declerations
python/m5/objects/BaseCPU.py:
Remove IL1 and DL1 params from the cpu object
--HG--
extra : convert_revision :
2f285dc626bc8d84d095def68e986fe7e6f3d8e9
Ron Dreslinski [Thu, 23 Feb 2006 22:02:34 +0000 (17:02 -0500)]
Add support for multiple ports on the memory. Hook up simple cpu to memory.
Ready to start testing if I could fix the linking errors I can't ever seem to fix.
cpu/simple/cpu.cc:
cpu/simple/cpu.hh:
Add connecting of ports until builder can handle it.
mem/physical.cc:
Add function to allocate a port in the object
Remove some full_sys stuff untill needed
mem/physical.hh:
Add function to allocate a port in the object
python/m5/objects/BaseCPU.py:
Update the params
sim/process.cc:
Make sure to use the right name (hopefully CPU constructor already called)
--HG--
extra : convert_revision :
4089caf20d7eb53e5463c8ac93ddce5e43ea5d85
Ron Dreslinski [Thu, 23 Feb 2006 18:51:54 +0000 (13:51 -0500)]
Update functional memory to have a response event
Clean out old memory python files, move them into old_mem directory. Maybe we should just delete them, they are under revision control.
Add new py files for new objects.
SConscript:
Update because memory is just a header file now
base/chunk_generator.hh:
Make Chunk Generator return the entire size if the chunk_size is set to zero. Useful when trying to chunck on blocksize of memory, which can write large pieces of data.
cpu/simple/cpu.cc:
Make sure to delete the pkt.
mem/physical.cc:
mem/physical.hh:
Set up response event.
mem/port.cc:
Rename rqst to req to conform to same standard naming convention.
python/m5/objects/PhysicalMemory.py:
Update the params, inheritence
--HG--
extra : convert_revision :
857154ec256522baf423b715833930497999549b
Ron Dreslinski [Wed, 22 Feb 2006 22:43:08 +0000 (17:43 -0500)]
Remove unneeded functions, moving code around abit.
mem/physical.cc:
Remove unneeded functions. Need to add a .toString option for commands to making printing prettier.
mem/physical.hh:
Remove unneeded functions.
--HG--
extra : convert_revision :
3707d317f542d56c0a0758a2c5ba493b92fb0c87
Ron Dreslinski [Wed, 22 Feb 2006 22:29:04 +0000 (17:29 -0500)]
Move the port from base memory object into the physical memory object.
The Memory is now a pure virtual base class for all memory type objects (DRAM, physical).
We should consider renaming MemObject to something more meaningful to represent it is for all memory heirarchy objects, perhaps MemHeirObject?
mem/physical.cc:
mem/physical.hh:
Move the port from the base class into the actual object.
--HG--
extra : convert_revision :
b7754ee7b90fd8f816f9876dce374c1d43c7e34b
Steve Reinhardt [Wed, 22 Feb 2006 03:17:00 +0000 (22:17 -0500)]
Minor cleanup/fleshing out of Memory object.
--HG--
extra : convert_revision :
35ad82e6a1e38c4d14c0ad306c33718a9b9d19fe
Steve Reinhardt [Wed, 22 Feb 2006 03:13:48 +0000 (22:13 -0500)]
Temp fix for StaticInst::execute() methods while we're
only trying to build SimpleCPU.
--HG--
extra : convert_revision :
703dfa068c75dd3238b400744a8aa72b35633f63
Steve Reinhardt [Wed, 22 Feb 2006 03:12:27 +0000 (22:12 -0500)]
Move op_class.hh out of encumbered/cpu/full and into cpu.
Pull opClassStrings array out of encumbered/cpu/full/fu_pool.cc and move to
new cpu/op_class.cc file.
SConscript:
Add new cpu-model-independent file to define OpClass enum strings.
cpu/op_class.hh:
Fix comments etc.
cpu/static_inst.hh:
op_class.hh moved to cpu directory
--HG--
rename : encumbered/cpu/full/op_class.hh => cpu/op_class.hh
extra : convert_revision :
314ac5ab7cc5c6a34b43dc1c2f2adc3e02f6d07f
Ron Dreslinski [Wed, 22 Feb 2006 01:04:23 +0000 (20:04 -0500)]
Some more changes for compilation. Since memset is now part of port and not virtual, no need for memory to define them.
mem/physical.cc:
Return 0 for block size. The chunk generator should treat this as a infinite size.
mem/physical.hh:
Add function prototype
mem/port.hh:
Fix function to take no arguments
mem/translating_port.cc:
mem/translating_port.hh:
Remove the memsetBlob because it doesn't exist yet.
--HG--
extra : convert_revision :
dfe352acfc2912ecc9a1ba1863e5666f46b991cc
Ron Dreslinski [Tue, 21 Feb 2006 18:39:01 +0000 (13:39 -0500)]
Add blocksize functions to physical memory. Fix the port we were using in the process loader.
mem/physical.cc:
Implement the blockSize function, return VMPageSize for the physical memory
mem/port.hh:
Add a function to get a pointer to a peer, needed for initVirtMem to work in the loader.
sim/process.cc:
The way the translating port is setup we don't want the memory port, we want the peer port associated with that memory. We may need to revisit this.
--HG--
extra : convert_revision :
46a51d448d1683db7bd5afe64adbe167a5743060
Steve Reinhardt [Tue, 21 Feb 2006 17:32:45 +0000 (12:32 -0500)]
Rename Port address range functions... like the block size
functions, the send/recv*Query naming seems awkward.
Also create a typedef for AddrRangeList.
--HG--
extra : convert_revision :
dd0ff3fad06ec329c82c199700d0a6264f1271d3
Steve Reinhardt [Tue, 21 Feb 2006 17:20:02 +0000 (12:20 -0500)]
Rename port methods:
sendBlockSizeQuery() -> peerBlockSize()
recvBlockSizeQuery() -> deviceBlockSize()
After seeing how this gets used in practice, the
send/recv*Query names just don't make a lot of sense.
dev/io_device.cc:
mem/port.cc:
sendBlockSizeQuery() -> peerBlockSize()
mem/port.hh:
sendBlockSizeQuery() -> peerBlockSize()
recvBlockSizeQuery() -> deviceBlockSize()
--HG--
extra : convert_revision :
e96349fb443979b85899a5248bd7cd8665e23ef0
Steve Reinhardt [Tue, 21 Feb 2006 16:27:53 +0000 (11:27 -0500)]
Move read/writeBlob functions to Port class;
clean up implementation a little.
SConscript:
Add mem/port.cc
cpu/simple/cpu.cc:
cpu/simple/cpu.hh:
Move read/writeBlob functions to base Port class.
mem/port.hh:
Implement read/writeBlob functions.
No need for them to be virtual since the proxy
object (now called TranslatingPort) is not a
subclass of Port.
mem/port.cc:
Implement read/writeBlob functions.
--HG--
extra : convert_revision :
a3660eaa43a7c286aca962f17fa32fbd42bf1fa6
Ron Dreslinski [Tue, 21 Feb 2006 08:32:42 +0000 (03:32 -0500)]
Thanks to Ali, I was able to add chunk generation code in to handle a few cases. Still have some duplicated code we may want to revisit.
cpu/simple/cpu.cc:
Thanks to Ali I found the chunk generator, although I still seem to be duplicating some code becuase the only difference between readBlob and writeBlob is the command in the packet. Perhaps an access function with the command as a param would help with the duplication (sendBlob that takes a cmd (maybe).
mem/translating_port.cc:
Using the chunck generator to break it up to be in page size chunks
--HG--
extra : convert_revision :
cc2e4e60c76098655e469f81c89d2c7438350fdb
Ron Dreslinski [Tue, 21 Feb 2006 07:15:02 +0000 (02:15 -0500)]
Adding some definitons for read/write blob/string. I need to locate te code stever wrote to break up address ranges into blk/page size chunks.
cpu/simple/cpu.cc:
cpu/simple/cpu.hh:
Add read/write blob definitions, still need to break it up into blk size chunks (where was the code stever wrote for that?)
mem/physical.hh:
Remove un-needed function (I think)
mem/port.hh:
Default these virtual functions to panic unimplented
mem/translating_port.cc:
Again handling read/write string properly.
Need the stever code to break things into page size chunks yet
mem/translating_port.hh:
Having trouble with the const declerator. I will need to read how it works, for now it compiles if I remove it.
--HG--
extra : convert_revision :
f174e06700daa9967958d18e01798270c90d6dac
Ron Dreslinski [Tue, 21 Feb 2006 06:01:16 +0000 (01:01 -0500)]
Get simple cpu to compile.
Now I need to fix linking errors, probably due to missing function details in new memory objects.
cpu/exec_context.cc:
cpu/exec_context.hh:
Fix constructor for SE mode
cpu/simple/cpu.cc:
cpu/simple/cpu.hh:
Fix compilation errors
--HG--
extra : convert_revision :
6a58c0906340e10b654369c36f528fc17e3f19be
Ron Dreslinski [Tue, 21 Feb 2006 04:56:10 +0000 (23:56 -0500)]
Make loaders use translation port instead of proxy memory.
Also start compiling Simple CPU again.
SConscript:
Start Compiling Simple CPU as well
base/loader/aout_object.cc:
base/loader/aout_object.hh:
base/loader/ecoff_object.cc:
base/loader/ecoff_object.hh:
base/loader/elf_object.cc:
base/loader/elf_object.hh:
base/loader/object_file.hh:
sim/process.cc:
sim/process.hh:
Convert loaders to used translation port instead of proxy memory
--HG--
extra : convert_revision :
63275071f6a0e0d71935641205b203d94381ee44
Ron Dreslinski [Tue, 21 Feb 2006 04:26:39 +0000 (23:26 -0500)]
Add in a new translating port that allows syscalls to translate addresses via the page table before accessing the memory port.
Other compile issues cleaned up.
SConscript:
Changes to compile the new Translating Port.
Split out memtester and eio support, will rework them back in after first getting a simpleCPU to work
arch/alpha/alpha_linux_process.cc:
arch/alpha/alpha_tru64_process.cc:
sim/syscall_emul.cc:
sim/syscall_emul.hh:
Changes to use the new translating Port.
cpu/exec_context.cc:
cpu/exec_context.hh:
Create a translating port in each execution context.
sim/process.cc:
Fix the way we do proxy memory
--HG--
extra : convert_revision :
3d33218fe8b425a5d9ce24757f1112b4aa6001fd
Steve Reinhardt [Tue, 21 Feb 2006 01:53:38 +0000 (20:53 -0500)]
Revert PageTable code back to non-asid version.
mem/page_table.cc:
mem/page_table.hh:
Revert back to non-asid version.
--HG--
extra : convert_revision :
c8e8810584d4cf12eb86da43ab77ddf8551a9e6b
Ron Dreslinski [Thu, 16 Feb 2006 03:05:23 +0000 (22:05 -0500)]
More compilation fixes.
Should we add a proxy_port that does the v->p address translation?
Should the proxy port return a fault on translation errors, if we add one?
arch/alpha/alpha_linux_process.cc:
Syscalls use a memPort through the CPU now instead of a xc functional memory.
cpu/base.hh:
Add a pointer to the memPort syscalls will use. Should this be a proxy_port that does address translation?
cpu/exec_context.cc:
cpu/exec_context.hh:
Remove functional memory from the exec context
cpu/simple/cpu.cc:
Set the memPort to be used as the syscall port as the dcache port
sim/syscall_emul.cc:
sim/syscall_emul.hh:
Syscalls use a memPort through the CPU now instead of a xc functional memory.
Also, fix the fact that readStringFunctional doesn't return a fault... should proxy_port handle this because it is doing the translation?
--HG--
extra : convert_revision :
1f65318c6594301a75dc4dc0c99fdd436b094a7f
Steve Reinhardt [Wed, 15 Feb 2006 22:52:49 +0000 (17:52 -0500)]
More progress toward compiling... partly by
fixing things, partly by ignoring CPU models
that don't currently compile.
SConscript:
Split sources for fast, simple, and o3 CPU models into
separate source lists. For now none of these are included
in the base source list, so you won't get any CPU models
at all... but we still can't compile the other stuff so
it's not an issue.
Also get rid of obsolete encumbered/mem file.
base/loader/aout_object.cc:
base/loader/aout_object.hh:
base/loader/ecoff_object.cc:
base/loader/ecoff_object.hh:
base/loader/elf_object.cc:
base/loader/elf_object.hh:
base/loader/object_file.hh:
cpu/exec_context.cc:
sim/process.cc:
sim/system.cc:
sim/system.hh:
FunctionalMemory -> Memory
cpu/pc_event.hh:
Get rid of unused badpc.
cpu/simple/cpu.cc:
cpu/simple/cpu.hh:
Move Port functions into .cc file.
mem/port.hh:
Make recvAddressRangesQuery panic by default instead
of being abstract... do CPUs need to implement this?
mem/request.hh:
Add prefetch flags.
sim/syscall_emul.hh:
Start to fix...
--HG--
extra : convert_revision :
ece53b3855f20916caaa381598ac37e8c7adfba7
Kevin Lim [Wed, 15 Feb 2006 21:40:02 +0000 (16:40 -0500)]
Slightly fix compiling. Now decoder.cc fails on trying to set some flags that no longer exist (PF_EXCLUSIVE, EVICT_NEXT).
--HG--
extra : convert_revision :
f7fb9c73034e3ce647681c1097ae0f627f96c0dc
Ron Dreslinski [Wed, 15 Feb 2006 19:53:02 +0000 (14:53 -0500)]
Changes to start making the tree use the new memory system. Trying to compile decoder.cc but fails still.
SConscript:
Place the memory objects back in the right place
arch/alpha/isa_desc:
Fix includes to point to the new memory requests
cpu/exec_context.hh:
Exec context now points to memory object, fix the include paths.
Convert to prot_read/prot_write functions instead of read and write.
Convert to new CpuRequestPtr instead of MemReqPtr.
mem/request.hh:
Add back in support for Request Flags (needed by decoder to tag request) Removed the flags that were associated with packets/coherence.
sim/process.hh:
Converted to point to new memory objects
--HG--
extra : convert_revision :
a0b95380915d63b53194e2a26336d6adb1a0086b
Ron Dreslinski [Wed, 15 Feb 2006 19:21:09 +0000 (14:21 -0500)]
Many changes that make the new mem system compile. Now to convert the rest of the tree to use the new mem system.
mem/mem_object.hh:
Create constrtor so it compiles
mem/packet.hh:
Fix typedefs so they compile, add in a few more headers for compilation
mem/page_table.cc:
convert to new mem system so it compiles
mem/page_table.hh:
fix it to the version that had asid support. Make it compile in the new system
mem/physical.cc:
Fix some compilation bugs
mem/physical.hh:
Add a type that made compile fail
mem/port.hh:
Fix a spelling error that messed up compilation
mem/request.hh:
fix typedefs and forward declerations so it compiles
--HG--
extra : convert_revision :
580fb1ba31ada799ff0122601b8b5a8d994bb8af
Ron Dreslinski [Tue, 7 Feb 2006 22:33:14 +0000 (17:33 -0500)]
Merge zizzer:/z/m5/Bitkeeper/newmem
into zazzer.eecs.umich.edu:/z/rdreslin/m5bk/newmem2
--HG--
extra : convert_revision :
fd6e39398ac2461caadee6f68d168006ce3ab16f
Ron Dreslinski [Tue, 7 Feb 2006 22:33:03 +0000 (17:33 -0500)]
Pushing current state. Need to fix compilation problems, have moved the SCONS script to build memory objects first.
Some places I could have been using a forward decleration and that should be cleaned up as well.
SConscript:
Changed to move new memory object compilation to the top. See the errors right away.
Will also need to update all other objects that included the old memory system to use the new one. But not until we at least get the mem system compiling first.
mem/packet.hh:
Adding includes and typedefs to fix compilation errors
mem/request.hh:
Add definition for compilation issues
--HG--
extra : convert_revision :
34d9ae534a7a625445b981e81c7a1f856517cb04
Kevin Lim [Fri, 3 Feb 2006 20:21:06 +0000 (15:21 -0500)]
Update for new memory system. Uses the ports to access memory now. Also supports the response path of the new memory system, as well as retrying accesses.
cpu/simple/cpu.cc:
Update for new memory system. Supports using ports to access the memory system. The IcacheMissStall/DcacheMissStall statuses have been changed to reflect the cache returning a response after a variable latency (due to hit/miss). They are now DcacheWaitResponse/IcacheWaitResponse. Also supports retrying accesses.
For now the body of the copy functions are commented out.
cpu/simple/cpu.hh:
Update for new memory system.
--HG--
extra : convert_revision :
5a80247537d98ed690f7b6119094d9f59b4c7d73
Ron Dreslinski [Fri, 3 Feb 2006 19:54:37 +0000 (14:54 -0500)]
Adding some more things toward having cpu->mem test in place. Still need to work on compilation issues.
mem/physical.cc:
mem/physical.hh:
Added a stripped down version of the physical memory object
--HG--
extra : convert_revision :
26826fb316f4cac900ec648fa268f1d95bc960f1
Ron Dreslinski [Tue, 31 Jan 2006 20:03:04 +0000 (15:03 -0500)]
Remove non-needed functions, fix return values of completion handler.
--HG--
extra : convert_revision :
7c0cb6b13ba68650d54cdc35779517e8c4b5e3ff
Ron Dreslinski [Tue, 31 Jan 2006 20:00:09 +0000 (15:00 -0500)]
More changes toward making simpleCpu use new port interface.
cpu/simple/cpu.cc:
Initialize the ports, also add Request and Packet instead of MemReq. Initial work at ICache read in place.
cpu/simple/cpu.hh:
Need to call the completion handler when we see a recieve.
--HG--
extra : convert_revision :
a52caee6f0ceb5d9ee1e5acca63a202f5ea71359
Ron Dreslinski [Tue, 31 Jan 2006 19:42:42 +0000 (14:42 -0500)]
More include files, removing definition of SendResult whioch isn't needed anymore
cpu/simple/cpu.hh:
Some needed includes
mem/port.hh:
Now we removed the sendResult and replaced with void,tick,bool don't need it defined anymore
--HG--
extra : convert_revision :
aea08ec299c41b9f9a5b0da7649cef0459315139
Ron Dreslinski [Tue, 31 Jan 2006 19:39:41 +0000 (14:39 -0500)]
Fixed some void functions with returns, first stab at cpu ports.
cpu/simple/cpu.hh:
Adding port definitions to simple cpu, still needs work.
mem/bus.hh:
no return for void functions
--HG--
extra : convert_revision :
42e5bc16af187d3a46eb25a15b600a8a11b88cc5
Ali Saidi [Tue, 31 Jan 2006 19:20:48 +0000 (14:20 -0500)]
Merge zizzer:/bk/newmem
into zeep.eecs.umich.edu:/z/saidi/work/m5.newmem
--HG--
extra : convert_revision :
3eb1a665cb813df974aa2815a794b459473c0a77
Ali Saidi [Tue, 31 Jan 2006 19:20:39 +0000 (14:20 -0500)]
changed sendresult -> bool,tick,void as appropriate
first crack at io devices code
made CpuRequest that derives from Request
dev/io_device.cc:
dev/io_device.hh:
first crack at the classes for Pio and Dma devices
dev/platform.hh:
We are going to a system pointer to get info about the memory system
mem/bus.hh:
changed sendresult -> bool,tick,void as appropriate
mem/port.hh:
changed sendresult -> bool,tick,void as appropriate;
removed the sendTiming(pkt,t) call since it is not really
implementable in a generic fashion
mem/request.hh:
pulled items from Request into CpuRequest
--HG--
extra : convert_revision :
6213cf2b66417fa023b80884d9e623e78f5aa891
Ron Dreslinski [Tue, 31 Jan 2006 19:15:33 +0000 (14:15 -0500)]
Add proper includes
--HG--
extra : convert_revision :
c5f909d00b6025cd8f14544f7e2c9c50610c0cd3
Ron Dreslinski [Tue, 31 Jan 2006 19:09:43 +0000 (14:09 -0500)]
Listing some of the enum structures
--HG--
extra : convert_revision :
d6ba1873826ee017bf2e4975a44eb2494a323132
Ron Dreslinski [Tue, 31 Jan 2006 17:12:49 +0000 (12:12 -0500)]
Inital split up of the header files for the new memory system. Still need to fill in some of the include files, and other data types. But this will be the starting point.
mem/bus.hh:
Inital crack at a bus object that has ports. Still need to clean up the include file issues.
mem/mem_object.hh:
Decleration of a base memory object. Derives from simobject and adds a function to get the port associated with the object.
mem/packet.hh:
Inital crack at the packet decleration. Still need to clean up the include file issues.
mem/port.hh:
Inital crack at the port decleration. Still need to clean up the include file issues.
mem/request.hh:
Inital crack at the request decleration. Still need to clean up the include file issues.
--HG--
extra : convert_revision :
f17967d430458f91866a4639ab0cab45d835bb55
Steve Reinhardt [Sun, 29 Jan 2006 22:35:53 +0000 (17:35 -0500)]
Hacks to avoid compiling in old FullCPU model.
Needed in the interim until we port the old model over
to the new interface. Long term we should have a cleaner
solution for controlling which models get compiled in.
SConscript:
Move old FullCPU source file list to separate full_cpu_sources
list so we can choose to not include it in compile.
arch/isa_parser.py:
Hack to avoid generating FullCPU execute files.
Need a better way to control this.
cpu/exetrace.cc:
Don't include old FullCPU-specific headers (apparently
unnecessary anyway--or if not they should be).
--HG--
extra : convert_revision :
00d5a91a9e4d71507404b8c7f4c6e7c7b7ba3853
Steve Reinhardt [Sun, 29 Jan 2006 22:28:04 +0000 (17:28 -0500)]
Add PageTable code and SConscript fixes for new syscall emulation
memory model. These changes really should have been part of the
previous changeset.
SConscript:
Move System and PhysicalMemory sources from being full_system_sources
to base_sources, since they are now used in syscall emulation also.
Also add source files for PageTable and ProxyMemory objects.
Actual source files for PhysicalMemory and ProxyMemory are not committed
yet since they still need to be ported from old interface.
--HG--
extra : convert_revision :
cb39e3b13d71429b7ee6082794dc09428cde989f
Steve Reinhardt [Sat, 28 Jan 2006 05:08:22 +0000 (00:08 -0500)]
Changes for Process object initialization in merged-memory environment.
System object now exists for both fullsys and syscall emulation, as the
latter needs it so that Process objects can find the shared PhysicalMemory
for initialization.
Changes are incomplete: still need to fix up Process (& EioProcess) memory
initialization and syscall emulation code for new mem interface.
arch/alpha/alpha_linux_process.cc:
arch/alpha/alpha_linux_process.hh:
arch/alpha/alpha_tru64_process.cc:
arch/alpha/alpha_tru64_process.hh:
cpu/base.cc:
cpu/base.hh:
Take System argument in constructor.
cpu/exec_context.cc:
Take System argument in constructor.
Merge two constructors into a single one.
cpu/exec_context.hh:
Take System argument in constructor.
Merge two constructors into a single one.
Replace dummy translation with lookup in Process object's page table.
python/m5/objects/Process.py:
Add System parameter to Process object (& subobjects).
python/m5/objects/System.py:
Segregate full-system only Process parameters (most of them!).
sim/process.cc:
Take System argument in constructor.
Move initialization to startup() callback to occur after system & cpus
are initialized.
Generate ProxyMemory object to pass to loader for transparent
virtual page allocation.
sim/process.hh:
Take System argument in constructor.
Move initialization to startup() callback to occur after system & cpus
are initialized.
sim/system.cc:
sim/system.hh:
Enable System object for non-full-system too.
Basically involved putting most of the existing code
inside '#ifdef FULL_SYSTEM'.
Key thing needed for syscall emulation at this point is
the PhysicalMemory object (for Process initialization).
--HG--
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f0f34b47bd4f77b502191affd3d03b4d6d9bcdd8
Ali Saidi [Wed, 25 Jan 2006 01:09:51 +0000 (20:09 -0500)]
added Request struct and updated Packet as per meeting 24/01/2006
--HG--
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61cc36306412be178cc63d78b5274e6779af0f78
Steve Reinhardt [Tue, 17 Jan 2006 22:47:53 +0000 (17:47 -0500)]
Update interface from 1/17 meeting.
--HG--
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6d3e52e609fde1acd08f7a79c6015fc177068dec
Steve Reinhardt [Mon, 16 Jan 2006 18:19:10 +0000 (13:19 -0500)]
Couple more interface additions.
--HG--
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d51a67282e28e8a4e205e237b31efbfa5ab40ef3
Steve Reinhardt [Fri, 23 Dec 2005 21:31:01 +0000 (16:31 -0500)]
More evolution of the new interface.
--HG--
extra : convert_revision :
22212ba23f6684f38aa810b53d48bbe0bf07a0f1
Steve Reinhardt [Fri, 23 Dec 2005 19:06:27 +0000 (14:06 -0500)]
Add ChunkGenerator object for breaking arbitrary regions
into block- or page-sized chunks.
--HG--
extra : convert_revision :
3ebdd496f9ffc6d1fcd1847c33e98ac23f1bfe66
Steve Reinhardt [Fri, 23 Dec 2005 18:51:12 +0000 (13:51 -0500)]
Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/m5
into zizzer.eecs.umich.edu:/z/stever/bk/newmem
--HG--
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60b1d26505a7b17321840e2db4173c3e867a6a75
Steve Reinhardt [Fri, 23 Dec 2005 18:50:35 +0000 (13:50 -0500)]
Fix roundUp function template so explicit arg is not
needed in a few more cases.
base/intmath.hh:
align arg to roundUp should be int, not template class
sim/process.cc:
sim/syscall_emul.hh:
No need for explicit template arg now that roundUp is fixed.
--HG--
extra : convert_revision :
f9f4639e022acb9f427e8d30d81c782504437c53
Steve Reinhardt [Fri, 23 Dec 2005 18:32:31 +0000 (13:32 -0500)]
Change base/intmath.{cc,hh} to follow m5 style.
arch/alpha/alpha_tru64_process.cc:
base/intmath.hh:
base/statistics.cc:
base/str.cc:
cpu/o3/btb.cc:
sim/process.cc:
sim/syscall_emul.hh:
Rename intmath.hh functions to follow m5 style
(RoundUp -> roundUp, etc.).
base/intmath.cc:
Rename intmath.hh functions to follow m5 style
(RoundUp -> roundUp, etc.).
Also reindent code in m5 style.
--HG--
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57b853002bc3c9911e122599d9062b41a06d8e6a
Nathan Binkert [Fri, 23 Dec 2005 06:48:58 +0000 (01:48 -0500)]
tweak try1.cc
--HG--
extra : convert_revision :
7679e736db499ed7f174a97ea12851c83bc27d13
Nathan Binkert [Fri, 23 Dec 2005 06:48:15 +0000 (01:48 -0500)]
Merge zizzer.eecs.umich.edu:/bk/m5
into ziff.eecs.umich.edu:/z/binkertn/research/m5/newmem
--HG--
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87481b470fca0197474c0c08443997d7c992d836
Nathan Binkert [Fri, 23 Dec 2005 06:44:06 +0000 (01:44 -0500)]
Move the memory hierarchy to oldmem and leave an empty
mem directory
--HG--
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658a8f5e915407a45d639edf4806dce159591a10
Nathan Binkert [Fri, 23 Dec 2005 06:39:53 +0000 (01:39 -0500)]
Updates to Memory system changes document.
--HG--
extra : convert_revision :
a35a76d18a6183a0aaa5dd40c330f1ec0ef2244a
Steve Reinhardt [Fri, 23 Dec 2005 03:00:24 +0000 (22:00 -0500)]
Add a more refined stab at some of the new interface.
--HG--
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9c3de70d83e6a1515566a9b7226e798ee077466f
Steve Reinhardt [Thu, 22 Dec 2005 19:41:49 +0000 (14:41 -0500)]
Add notes from latest memory system redesign meetings.
--HG--
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53389e8e784e471b0fc6053ec970cd967bfe1598
Nathan Binkert [Thu, 22 Dec 2005 03:19:33 +0000 (22:19 -0500)]
Make ScsiController a PioDevice so it works again.
--HG--
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cd610221edc6926d120d9f3978dd9ee89f501824
Nathan Binkert [Mon, 19 Dec 2005 07:07:06 +0000 (02:07 -0500)]
Create the ProxyError Exception. Raise it when an unproxy
operation fails because information is wrong or not available.
--HG--
extra : convert_revision :
1fd90c1291618b09752179cfa6894f1df495fffd
Nathan Binkert [Mon, 19 Dec 2005 07:02:58 +0000 (02:02 -0500)]
Add a little bit of support to grab info for making graphs
without using the jobfile.
util/stats/db.py:
util/stats/profile.py:
Make it possible to send job as a string and to set the system
separately from the job.
--HG--
extra : convert_revision :
08aaebd3f9a1643bd41953b43f3b80dc97e6592f
Steve Reinhardt [Wed, 7 Dec 2005 01:00:50 +0000 (20:00 -0500)]
Make simulation termination message less threatening... maybe
people won't think they're getting an error when they're not.
--HG--
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7622360f4f88eed9edf44480dac551d153582d8b
Ron Dreslinski [Thu, 1 Dec 2005 23:47:36 +0000 (18:47 -0500)]
Two small fixes for mem_req's and Probe path with MOSI/MOESI
cpu/simple/cpu.cc:
Properly set the Instruction Read bit in the Memory Request
--HG--
extra : convert_revision :
e1a4756f32718fd8ef3ac3db16625bd6d8f07cc5
Ali Saidi [Tue, 29 Nov 2005 23:06:15 +0000 (18:06 -0500)]
Add support for multiple streams being configured with the INITPARAM
variable
--HG--
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2cb20845cb7f32589882850156bdd42d9024db7a
Nathan Binkert [Mon, 28 Nov 2005 23:40:58 +0000 (18:40 -0500)]
Virtualized SINIC fixes
dev/pktfifo.hh:
we can't modify i because it's used further down to remove
the packet from the fifo. Instead, copy the iterator and
modify that to get the previous packet.
dev/sinic.cc:
- don't change the transmit state and kick the machine unless
we're at the head of the txList.
- add a couple of debugging statements to figure out how far
along we've gotten in processing a packet.
- assert that the current tx vnic has something to do when
we start processing the state machine.
--HG--
extra : convert_revision :
588fe2c7d810be0e3d8d39c5cc0ec8a72119517e
Nathan Binkert [Mon, 28 Nov 2005 23:33:48 +0000 (18:33 -0500)]
Make the debugger a bit more useful with m5.opt by moving stuff
from #ifdef DEBUG to #ifndef NDEBUG
base/remote_gdb.cc:
make the remote debugger gdb stuff work in m5.opt
sim/system.cc:
sim/system.hh:
make the console panic break event happen in m5.opt
--HG--
extra : convert_revision :
044a9b7cdacb058112388a31315e45c5d8cf70fd
Nathan Binkert [Fri, 25 Nov 2005 18:33:36 +0000 (13:33 -0500)]
Virtualize sinic
separate the rx thread and tx thread and get rid of the dedicated flag.
dev/ns_gige.cc:
dev/ns_gige.hh:
dev/ns_gige_reg.h:
python/m5/objects/Ethernet.py:
dedicated flag goes away, we have new individual flags for
rx thread and tx thread
dev/sinic.cc:
Virtualize sinic
- The io registers are replicated many times in memory, allowing the NIC to
differentiate among several virtual interfaces.
- On the TX side, this allows multiple CPUs to initiate transmits at the same
time without locking in the software. If a partial packet is transmitted,
then the state machine blocks waiting for that virtual interface to complete
its packet. Then the state machine will move on to the next virtual
interface. The commands are kept in fifo order.
- On the RX side, multiple partial transmits can be simultaneously done.
Though a packet does not deallocate its fifo space until all preceeding
packets in the fifo are deallocated. To enable multiple receives, it
is necessary for each virtual nic to keep its own information about its
progress through the state machine.
dev/sinic.hh:
Virtualize sinic
Receive state must be virtualized since we allow the receipt of packets in
parallel.
dev/sinicreg.hh:
Virtualize sinic
separate rx thread and tx thread
create a soft interrupt and add a command to trigger it.
pad out the reserved bits in the RxDone and TxDone regs
--HG--
extra : convert_revision :
c10bb23a46a89ffd1e08866c1f1621cb98069205
Nathan Binkert [Fri, 25 Nov 2005 16:22:41 +0000 (11:22 -0500)]
Add the capability to iterate through the packets in a pktfifo,
and to remove elements in the middle of the fifo. These elements
do not free space, they are just marked removed. Space is only
freed from the front of the fifo.
dev/etherpkt.cc:
serialize the current slack
dev/etherpkt.hh:
add "slack" to the ethernet packet. It is to be used by any fifo that
the packet is currently in to account for extra space that the packet
may be occupying due to the fifo organization.
--HG--
extra : convert_revision :
8e7c541ba316a9a76495c54cc5f707f8fc65b6d5
Nathan Binkert [Wed, 23 Nov 2005 02:50:34 +0000 (21:50 -0500)]
Major improvements in the graph output code. Mostly adding more
options, making existing options more visible and dealing with
holes in data better.
util/stats/barchart.py:
- move the options for BarChart to a base class ChartOptions so
they can be more easily set and copied.
- add an option to set the chart size (so you can adjust the aspect ratio)
- don't do the add_subplot thing, use add_axes directly so we can
affect the size of the figure itself to make room for the legend
- make the initial array bottom floating point so we don't lose precision
- add an option to set the limits on the y axis
- use a figure legend instead of an axes legend so we can put the legend
outside of the actual chart. Also add an option to set the fontsize of
the legend.
- initial hack at outputting csv files
util/stats/db.py:
don't print out an error when the run is missing from the database
just return None, the error will be print elsewhere.
util/stats/output.py:
- make StatOutput derive from ChartOptions so that it's easier to
set default chart options.
- make the various output functions (graph, display, etc.) take the
name of the data as a parameter instead of making it a parameter to
__init__. This allows me to create the StatOutput object with
generic parameters while still being able to specialize the name
after the fact
- add support for graph_group and graph_bars to be applied to multiple
configuration groups. This results in a cross product of the groups
to be generated and used.
- flush the html file output as we go so that we can load the file
while graphs are still being generated.
- make the proxy a parameter to the graph function so the proper system's
data can be graphed
- for any groups or bars that are completely missing, remove them from
the graph. This way, if we decide not to do a set of runs, there won't
be holes in the data.
- output eps and ps by default in addition to the png.
util/stats/profile.py:
- clean up the data structures that are used to store the function
profile information and try our best to avoid keeping extra data
around that isn't used.
- make get() return None if a job is missing so we know it was
missing rather than the all zeroes thing.
- make the function profile categorization stuff total up to 100%
- Fixup the x-axis and y-axis labels.
- fix the dot file output stuff.
util/stats/stats.py:
support the new options stuff for StatOutput
--HG--
extra : convert_revision :
fae35df8c57a36257ea93bc3e0a0e617edc46bb7
Nathan Binkert [Wed, 23 Nov 2005 02:20:36 +0000 (21:20 -0500)]
Change the set of statistics that are generated when specifying "all"
--HG--
extra : convert_revision :
8b803b1b3bbec0b35b6805593b0dd598e5b519cf
Nathan Binkert [Wed, 23 Nov 2005 02:18:11 +0000 (21:18 -0500)]
More changes from cpus named fullX to runX
--HG--
extra : convert_revision :
e3c117dc5751be13bd4b014a7fa6df0debfb48f0
Nathan Binkert [Wed, 23 Nov 2005 02:08:47 +0000 (21:08 -0500)]
Fix the system clock at 1THz making 1 simulation tick = 1 ps
--HG--
extra : convert_revision :
a4707af5f8dc193fbecfb602701b1170c32ae3e3
Nathan Binkert [Wed, 23 Nov 2005 02:05:02 +0000 (21:05 -0500)]
make the NUMCPUS parameter always refer to the total number of cpus
on the test system.
add an option for pio_delay_write to run.py
util/stats/stats.py:
full0 -> run0 due to run.py change
sim_ticks doesn't make sense with tick = ps, so use
one of the cpu's numCycles paramter
--HG--
extra : convert_revision :
db9dbe014549d823edc10395f5241db5e907df01
Nathan Binkert [Tue, 22 Nov 2005 18:36:30 +0000 (13:36 -0500)]
Make sure that the aiobench client has enough memory.
increase from 128MB to 512MB
--HG--
extra : convert_revision :
7b12febff200083aa0adbcaba612bc9e677ebe07
Nathan Binkert [Tue, 22 Nov 2005 18:33:28 +0000 (13:33 -0500)]
Clean up the newly updated iscsi-client script
configs/boot/iscsi-client.rcS:
Clean up the newly updated iscsi-client script.
Reduce the writeback period so writes occur more frequently.
--HG--
extra : convert_revision :
21c84f781c6537b28c753291561d23c2d0144627
Kevin Lim [Tue, 22 Nov 2005 17:08:08 +0000 (12:08 -0500)]
Apply patch for syscall emulation provided by Antti Miettinen (apm@brigitte.dna.fi). It provides support for more syscalls in syscall emulation mode.
arch/alpha/alpha_linux_process.cc:
sim/syscall_emul.cc:
sim/syscall_emul.hh:
Apply patch for syscall emulation provided by Antti Miettinen (apm@brigitte.dna.fi).
--HG--
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37fbc78a927110b7798343afd2c5f37a269e42b4
Nathan Binkert [Tue, 22 Nov 2005 05:17:05 +0000 (00:17 -0500)]
add the cpu number of the request to various panic and trace
output for sinic
dev/sinic.cc:
add the cpu number of the request to various panic and trace
output
--HG--
extra : convert_revision :
e778a5c925e194652bec47af678488acf48c1ae0
Nathan Binkert [Tue, 22 Nov 2005 04:43:15 +0000 (23:43 -0500)]
add support for delaying pio writes until the cache access occurs
dev/ns_gige.cc:
add support for delaying pio writes until the cache access occurs
the only write we delay are for CR_TXE and CR_RXE
dev/sinic.cc:
dev/sinic.hh:
the txPioRequest and rxPioRequest things were more or less bogus
add support for delaying pio writes until the cache access occurs
dev/sinicreg.hh:
Add delay_read and delay_write to the register information struct
for now, we won't delay any reads, and we'll delay the writes that
initiate DMAs
python/m5/objects/Ethernet.py:
add a parameter to delay pio writes until the timing access
actually occurs.
--HG--
extra : convert_revision :
79b18ea2812c2935d7d5ea6eff1f55265114d05d
Nathan Binkert [Tue, 22 Nov 2005 03:25:30 +0000 (22:25 -0500)]
expose an environment variable for setting the linux image.
--HG--
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32be8bef3b594d29dae717857a96ff5bdd6e9ffa
Nathan Binkert [Tue, 22 Nov 2005 03:24:32 +0000 (22:24 -0500)]
change profile environment configurations.
--HG--
extra : convert_revision :
f05fb5e50a439da9db96b04547f58ed8cd9f1aa6
Nathan Binkert [Tue, 22 Nov 2005 03:22:40 +0000 (22:22 -0500)]
Rearrange the memory configurations.
--HG--
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bab5b13e335f11ecb2dafd3371faf2351fbe9f10
Nathan Binkert [Tue, 22 Nov 2005 02:52:04 +0000 (21:52 -0500)]
have sinic use the new readBar/writeBar stuff that's in the
pci device base class
dev/sinic.cc:
dev/sinic.hh:
use the new readBar/writeBar stuff that's in the pci device
base class
--HG--
extra : convert_revision :
8a0b2bde3cc13597785d6ea75d6e6811680bb01b
Nathan Binkert [Mon, 21 Nov 2005 05:38:53 +0000 (00:38 -0500)]
Add a bunch of functions to manage the BAR addresses. This
makes it easier to implement PCI device models.
dev/pcidev.cc:
default implementations for read/write and readBarX/writeBarX functions
--HG--
extra : convert_revision :
bbe2e2a2a506e2dd94d98f8e0feaefef96380be9
Nathan Binkert [Mon, 21 Nov 2005 05:22:29 +0000 (00:22 -0500)]
Actually, you should'nt do math on Clock in the config files.
python/m5/config.py:
Clock should not be a NumericParamValue since math on it can be
ambiguous. (As the comment clearly says.)
--HG--
extra : convert_revision :
74f8ec846c6a980d92e0bf4bf1c7fac73a75b923
Nathan Binkert [Mon, 21 Nov 2005 05:02:39 +0000 (00:02 -0500)]
BARs now of type MemorySize32
python/m5/config.py:
Add MemorySize32 (a 32-bit value specified in bytes)
--HG--
extra : convert_revision :
bfeee501f7ff1aa2567a3682da129a5770cb7bd2
Nathan Binkert [Mon, 21 Nov 2005 04:57:26 +0000 (23:57 -0500)]
Make it so one can do math with a Clock type in the config files
python/m5/config.py:
Make Clock a NumericParamValue so you can do math with it
--HG--
extra : convert_revision :
7fa548d1a23c604a31d3ecae3853949b064a1830
Nathan Binkert [Mon, 21 Nov 2005 04:45:45 +0000 (23:45 -0500)]
Allow long as a multiplier in the python config
python/m5/config.py:
Allow long as a multiplier
--HG--
extra : convert_revision :
bdc45e9afc27bb7b0f2cd6aacf92758601b95ff8
Nathan Binkert [Mon, 21 Nov 2005 04:42:53 +0000 (23:42 -0500)]
Deal with divide by zero in the python stats stuff.
util/stats/info.py:
If an operation results in a divide by zero, just return None
--HG--
extra : convert_revision :
19cb4319734a3a9cf02bb1966fed42eb0c8a8ade
Nathan Binkert [Mon, 21 Nov 2005 04:30:13 +0000 (23:30 -0500)]
implement __str__ for all of the proxy stuff so we can
actually print out a statistic.
--HG--
extra : convert_revision :
043be6bd729e74d2220c5ae8aa1fc739aa247715
Nathan Binkert [Sun, 20 Nov 2005 23:49:54 +0000 (18:49 -0500)]
fixup benchmark names a bit
--HG--
extra : convert_revision :
5978318331eb4e1b7fae037a32086a2e0a554f2e
Nathan Binkert [Sun, 20 Nov 2005 23:42:12 +0000 (18:42 -0500)]
Serialize the symbol tables
base/loader/symtab.cc:
Add support for clearing out the symbol table
Add support for serializing the symbol table (clear on unserialize)
Don't allow empty symbols to be entered into the table
base/loader/symtab.hh:
Add support for clearing out the symbol table
Add support for serializing the symbol table
sim/system.cc:
Serialize the kernel, console, and palcode symbol tables so that
we can capture any dynamic symbols that are added and so that we
don't have to have the same kernel binary around to get the
symbols right
--HG--
extra : convert_revision :
779888c88aa530f3adcd37dc7600a335951d05f7
Nathan Binkert [Sun, 20 Nov 2005 23:39:31 +0000 (18:39 -0500)]
get rid of allSymtab
if we want something like allSymtab, we should create a symbol
table proxy class
--HG--
extra : convert_revision :
20ca551a693b0d6495c018cac8afd63af33f16da
Nathan Binkert [Sun, 20 Nov 2005 23:33:59 +0000 (18:33 -0500)]
switch all profiling stuff to the kernelSymtab since allSymtab
is going away
--HG--
extra : convert_revision :
405ec55615474d0812ed780f26fd4df98e5ec6f5
Nathan Binkert [Sun, 20 Nov 2005 23:33:17 +0000 (18:33 -0500)]
clear the function profile on a stats reset
cpu/profile.hh:
Add a placeholder for a reset callback
--HG--
extra : convert_revision :
7fa13e5d04daf1cf93eb35c8fdaf67a40ce3ef73
Nathan Binkert [Sun, 20 Nov 2005 23:32:22 +0000 (18:32 -0500)]
use Counter to avoid overflowing an int
cpu/profile.hh:
use Counter for the profile count to avoid overflow
--HG--
extra : convert_revision :
bb603b7d139d1736dced26ef0ce1f93ddea30de7
Nathan Binkert [Sun, 20 Nov 2005 23:25:43 +0000 (18:25 -0500)]
Merge zizzer.eecs.umich.edu:/bk/m5
into ziff.eecs.umich.edu:/z/binkertn/research/m5/head
--HG--
extra : convert_revision :
941e76e4645a4a18c04409250f3257e590184871
Nathan Binkert [Sun, 20 Nov 2005 23:25:31 +0000 (18:25 -0500)]
better placement of database commits
better mysql error messages
base/stats/mysql.cc:
better placement of commit() calls to avoid failing transactions
due to what I think are timeouts.
print out the mysql error with every panic
--HG--
extra : convert_revision :
bfc5ae172bcff733461adceffe2b381601839e82
Nathan Binkert [Sun, 20 Nov 2005 22:55:11 +0000 (17:55 -0500)]
For SimpleCPU profiling code, only update the exec context's
profileNode if we got a new one
cpu/simple/cpu.cc:
Only update the exec context's profileNode if we got a new one
--HG--
extra : convert_revision :
a16a7410070b0d811032dc4b86b1368df913b2be
Nathan Binkert [Sun, 20 Nov 2005 22:44:58 +0000 (17:44 -0500)]
Cleanup the StackTrace interfaces and profile interfaces so they
are more efficient and reduce the number of new/delete calls
arch/alpha/stacktrace.cc:
- Change the StackTrace code so that the class can more easily be
cleaned out and reused to avoid extra allocations.
- Allow trace() to accept a static instruction pointer so it can
determine if the instruction is worth tracing. This is moved from
the CPU.
- provide constants for special meaning PCs (user, console, unknown),
instead of magic numbers
- switch to using kernelSymtab instead of allSymtab which will be
going away
- if the stack adjustment doesn't make any sense, exit and push
unknown so we don't get into an infinite loop or record garbage.
- check to see if we've made too many iterations through the stack
and panic to avoid an infinite loop
arch/alpha/stacktrace.hh:
- Change the StackTrace code so that the class can more easily be
cleaned out and reused to avoid extra allocations.
- Allow trace() to accept a static instruction pointer so it can
determine if the instruction is worth tracing. This is moved from
the CPU.
- provide constants for special meaning PCs (user, console, unknown),
instead of magic numbers
cpu/base.cc:
only clear the profile if we have one
include profile.hh here since base.hh doesn't do it anymore
cpu/base.hh:
no need to include cpu/profile.hh here
cpu/profile.cc:
use ProfileNode pointers instead of objects in the ChildList
Consume a vector of addresses since that's really all we
care about.
cpu/profile.hh:
Keep pointers to ProfileNodes to reduce the size of these structures
keep a StackTrace around so that we may reuse it.
provide consume functions that use the new StackTrace trace interface
one consume function is inline and tries to fastpath the no trace
condition, it calls the outlined consume function if a trace is generated.
cpu/simple/cpu.cc:
include cpu/profile.hh here since base.hh no longer does
use the new FunctionProfile::consume interface
(which contains the tracing functions)
--HG--
extra : convert_revision :
5a1d9265289a75f67a497b322926be1f8c2d8eb3
Nathan Binkert [Sun, 20 Nov 2005 22:28:57 +0000 (17:28 -0500)]
remove duplicate profile event code that is already in
the BaseCPU class
--HG--
extra : convert_revision :
fb400e243377840006a36c3274115006f8cd2e3d