cand@51b69dee28eeccfe0f04790433b843689895c6e3 [Thu, 10 Dec 2020 18:21:11 +0000 (18:21 +0000)]
cand@51b69dee28eeccfe0f04790433b843689895c6e3 [Thu, 10 Dec 2020 18:21:01 +0000 (18:21 +0000)]
cand@51b69dee28eeccfe0f04790433b843689895c6e3 [Thu, 10 Dec 2020 18:14:43 +0000 (18:14 +0000)]
cand@51b69dee28eeccfe0f04790433b843689895c6e3 [Thu, 10 Dec 2020 18:11:47 +0000 (18:11 +0000)]
cand@51b69dee28eeccfe0f04790433b843689895c6e3 [Thu, 10 Dec 2020 18:08:03 +0000 (18:08 +0000)]
VSX overview
cand@51b69dee28eeccfe0f04790433b843689895c6e3 [Thu, 10 Dec 2020 17:59:18 +0000 (17:59 +0000)]
VSX overview, part 1
lkcl [Thu, 10 Dec 2020 17:54:41 +0000 (17:54 +0000)]
lkcl [Thu, 10 Dec 2020 17:52:54 +0000 (17:52 +0000)]
lkcl [Thu, 10 Dec 2020 16:45:59 +0000 (16:45 +0000)]
lkcl [Thu, 10 Dec 2020 16:33:58 +0000 (16:33 +0000)]
lkcl [Thu, 10 Dec 2020 16:16:28 +0000 (16:16 +0000)]
lkcl [Thu, 10 Dec 2020 15:02:27 +0000 (15:02 +0000)]
lkcl [Thu, 10 Dec 2020 14:55:39 +0000 (14:55 +0000)]
lkcl [Thu, 10 Dec 2020 14:55:19 +0000 (14:55 +0000)]
Jacob Lifshay [Thu, 10 Dec 2020 03:22:57 +0000 (19:22 -0800)]
add Remapped Encoding and Mask
lkcl [Thu, 10 Dec 2020 03:13:38 +0000 (03:13 +0000)]
lkcl [Thu, 10 Dec 2020 03:12:50 +0000 (03:12 +0000)]
lkcl [Thu, 10 Dec 2020 02:37:53 +0000 (02:37 +0000)]
Jacob Lifshay [Thu, 10 Dec 2020 02:13:42 +0000 (18:13 -0800)]
add generated output
Jacob Lifshay [Thu, 10 Dec 2020 02:12:56 +0000 (18:12 -0800)]
convert sv_analysis.py to use more standard Markdown tables
lkcl [Thu, 10 Dec 2020 02:12:28 +0000 (02:12 +0000)]
lkcl [Thu, 10 Dec 2020 02:07:59 +0000 (02:07 +0000)]
lkcl [Thu, 10 Dec 2020 02:01:16 +0000 (02:01 +0000)]
Jacob Lifshay [Thu, 10 Dec 2020 01:53:31 +0000 (17:53 -0800)]
format sv_analysis.py
lkcl [Thu, 10 Dec 2020 01:52:08 +0000 (01:52 +0000)]
lkcl [Thu, 10 Dec 2020 01:47:54 +0000 (01:47 +0000)]
lkcl [Thu, 10 Dec 2020 01:46:48 +0000 (01:46 +0000)]
Jacob Lifshay [Thu, 10 Dec 2020 01:46:03 +0000 (17:46 -0800)]
reformat markdown
Luke Kenneth Casson Leighton [Wed, 9 Dec 2020 21:16:47 +0000 (21:16 +0000)]
correct name for CR=2R1W
Luke Kenneth Casson Leighton [Wed, 9 Dec 2020 21:15:52 +0000 (21:15 +0000)]
split out CR ops, sort immediates
Luke Kenneth Casson Leighton [Wed, 9 Dec 2020 18:06:30 +0000 (18:06 +0000)]
st*cx and other st instructions in wrong category
lkcl [Wed, 9 Dec 2020 02:20:28 +0000 (02:20 +0000)]
lkcl [Wed, 9 Dec 2020 01:22:15 +0000 (01:22 +0000)]
lkcl [Wed, 9 Dec 2020 00:58:46 +0000 (00:58 +0000)]
lkcl [Wed, 9 Dec 2020 00:49:02 +0000 (00:49 +0000)]
lkcl [Wed, 9 Dec 2020 00:41:21 +0000 (00:41 +0000)]
lkcl [Wed, 9 Dec 2020 00:32:05 +0000 (00:32 +0000)]
lkcl [Wed, 9 Dec 2020 00:02:59 +0000 (00:02 +0000)]
lkcl [Tue, 8 Dec 2020 23:42:01 +0000 (23:42 +0000)]
lkcl [Tue, 8 Dec 2020 19:06:00 +0000 (19:06 +0000)]
lkcl [Tue, 8 Dec 2020 17:48:40 +0000 (17:48 +0000)]
lkcl [Tue, 8 Dec 2020 17:39:02 +0000 (17:39 +0000)]
lkcl [Tue, 8 Dec 2020 17:38:27 +0000 (17:38 +0000)]
lkcl [Tue, 8 Dec 2020 17:26:34 +0000 (17:26 +0000)]
lkcl [Tue, 8 Dec 2020 15:24:01 +0000 (15:24 +0000)]
lkcl [Tue, 8 Dec 2020 15:10:49 +0000 (15:10 +0000)]
lkcl [Tue, 8 Dec 2020 15:07:57 +0000 (15:07 +0000)]
lkcl [Tue, 8 Dec 2020 14:18:46 +0000 (14:18 +0000)]
lkcl [Tue, 8 Dec 2020 14:14:41 +0000 (14:14 +0000)]
lkcl [Tue, 8 Dec 2020 13:27:56 +0000 (13:27 +0000)]
Luke Kenneth Casson Leighton [Tue, 8 Dec 2020 13:08:09 +0000 (13:08 +0000)]
reformat openpower SIMD ops
lkcl [Tue, 8 Dec 2020 12:58:22 +0000 (12:58 +0000)]
lkcl [Tue, 8 Dec 2020 12:56:29 +0000 (12:56 +0000)]
lkcl [Mon, 7 Dec 2020 23:57:35 +0000 (23:57 +0000)]
lkcl [Mon, 7 Dec 2020 15:51:00 +0000 (15:51 +0000)]
Alexandre Oliva [Mon, 7 Dec 2020 07:43:12 +0000 (04:43 -0300)]
comp16-v1-skel.py: fixed 16-imm logic, implemented rules for most opcodes
Alexandre Oliva [Mon, 7 Dec 2020 07:41:59 +0000 (04:41 -0300)]
Add copyright notices to most scripts I wrote
lkcl [Mon, 7 Dec 2020 01:19:44 +0000 (01:19 +0000)]
lkcl [Mon, 7 Dec 2020 00:38:53 +0000 (00:38 +0000)]
lkcl [Mon, 7 Dec 2020 00:33:57 +0000 (00:33 +0000)]
lkcl [Sun, 6 Dec 2020 23:56:46 +0000 (23:56 +0000)]
lkcl [Sun, 6 Dec 2020 23:49:46 +0000 (23:49 +0000)]
lkcl [Sun, 6 Dec 2020 23:47:24 +0000 (23:47 +0000)]
lkcl [Sun, 6 Dec 2020 16:50:20 +0000 (16:50 +0000)]
lkcl [Sun, 6 Dec 2020 16:42:48 +0000 (16:42 +0000)]
lkcl [Sun, 6 Dec 2020 14:45:01 +0000 (14:45 +0000)]
Luke Kenneth Casson Leighton [Sun, 6 Dec 2020 14:10:37 +0000 (14:10 +0000)]
correct URLs
Luke Kenneth Casson Leighton [Sun, 6 Dec 2020 14:07:31 +0000 (14:07 +0000)]
add NLnet rfp tasks pending submission
lkcl [Sun, 6 Dec 2020 11:46:28 +0000 (11:46 +0000)]
lkcl [Sun, 6 Dec 2020 11:29:06 +0000 (11:29 +0000)]
lkcl [Sun, 6 Dec 2020 01:06:51 +0000 (01:06 +0000)]
lkcl [Sat, 5 Dec 2020 23:43:13 +0000 (23:43 +0000)]
lkcl [Sat, 5 Dec 2020 23:23:28 +0000 (23:23 +0000)]
lkcl [Sat, 5 Dec 2020 22:35:18 +0000 (22:35 +0000)]
lkcl [Sat, 5 Dec 2020 21:43:47 +0000 (21:43 +0000)]
lkcl [Sat, 5 Dec 2020 20:15:56 +0000 (20:15 +0000)]
lkcl [Sat, 5 Dec 2020 20:15:45 +0000 (20:15 +0000)]
lkcl [Sat, 5 Dec 2020 20:15:25 +0000 (20:15 +0000)]
lkcl [Sat, 5 Dec 2020 20:13:54 +0000 (20:13 +0000)]
lkcl [Sat, 5 Dec 2020 19:56:52 +0000 (19:56 +0000)]
lkcl [Fri, 4 Dec 2020 12:44:40 +0000 (12:44 +0000)]
lkcl [Fri, 4 Dec 2020 12:44:05 +0000 (12:44 +0000)]
Jacob Lifshay [Fri, 4 Dec 2020 05:00:58 +0000 (21:00 -0800)]
convert FP registers table to be taller instead of wider
Jacob Lifshay [Fri, 4 Dec 2020 04:58:05 +0000 (20:58 -0800)]
attempt to fix tables
Jacob Lifshay [Fri, 4 Dec 2020 04:57:19 +0000 (20:57 -0800)]
attempt to fix tables
Jacob Lifshay [Fri, 4 Dec 2020 04:54:24 +0000 (20:54 -0800)]
attempt to fix table
Jacob Lifshay [Fri, 4 Dec 2020 04:51:59 +0000 (20:51 -0800)]
attempt to fix tables
Jacob Lifshay [Fri, 4 Dec 2020 04:46:43 +0000 (20:46 -0800)]
add register naming
lkcl [Thu, 3 Dec 2020 14:59:50 +0000 (14:59 +0000)]
lkcl [Thu, 3 Dec 2020 11:31:35 +0000 (11:31 +0000)]
lkcl [Thu, 3 Dec 2020 11:31:00 +0000 (11:31 +0000)]
lkcl [Thu, 3 Dec 2020 11:26:33 +0000 (11:26 +0000)]
Jacob Lifshay [Thu, 3 Dec 2020 03:10:02 +0000 (19:10 -0800)]
add CR field vector operation semantics
Jacob Lifshay [Thu, 3 Dec 2020 02:19:15 +0000 (18:19 -0800)]
allocate SVP64
projects / libreriscv.git / log