rs6000, Add vector replace builtin support GCC maintainers:

The following patch adds support for builtins vec_replace_elt and
vec_replace_unaligned.

The patch has been compiled and tested on

  powerpc64le-unknown-linux-gnu (Power 8 LE)
  powerpc64le-unknown-linux-gnu (Power 9 LE)

and mambo with no regression errors.

Please let me know if this patch is acceptable for the mainline
branch.  Thanks.

                         Carl Love

-------------------------------------------------------

gcc/ChangeLog

    2020-08-04 Carl Love  <cel@us.ibm.com>

* config/rs6000/altivec.h: Add define for vec_replace_elt and
vec_replace_unaligned.
* config/rs6000/vsx.md (UNSPEC_REPLACE_ELT, UNSPEC_REPLACE_UN): New
unspecs.
(REPLACE_ELT): New mode iterator.
(REPLACE_ELT_char, REPLACE_ELT_sh, REPLACE_ELT_max): New mode attributes.
(vreplace_un_<mode>, vreplace_elt_<mode>_inst): New.
* config/rs6000/rs6000-builtin.def (VREPLACE_ELT_V4SI,
VREPLACE_ELT_UV4SI, VREPLACE_ELT_V4SF, VREPLACE_ELT_UV2DI,
VREPLACE_ELT_V2DF, VREPLACE_UN_V4SI, VREPLACE_UN_UV4SI,
VREPLACE_UN_V4SF, VREPLACE_UN_V2DI, VREPLACE_UN_UV2DI,
VREPLACE_UN_V2DF, (REPLACE_ELT, REPLACE_UN, VREPLACE_ELT_V2DI): New builtin
entries.
* config/rs6000/rs6000-call.c (P10_BUILTIN_VEC_REPLACE_ELT,
P10_BUILTIN_VEC_REPLACE_UN): New builtin argument definitions.
(rs6000_expand_quaternop_builtin): Add 3rd argument checks for
CODE_FOR_vreplace_elt_v4si, CODE_FOR_vreplace_elt_v4sf,
CODE_FOR_vreplace_un_v4si, CODE_FOR_vreplace_un_v4sf.
(builtin_function_type) [P10_BUILTIN_VREPLACE_ELT_UV4SI,
P10_BUILTIN_VREPLACE_ELT_UV2DI, P10_BUILTIN_VREPLACE_UN_UV4SI,
P10_BUILTIN_VREPLACE_UN_UV2DI]: New cases.
* doc/extend.texi: Add description for vec_replace_elt and
vec_replace_unaligned builtins.

gcc/testsuite/ChangeLog

    2020-08-04 Carl Love  <cel@us.ibm.com>

* gcc.target/powerpc/vec-replace-word-runnable.c: New test.

rs6000 Add vector insert builtin support

GCC maintainers:

This patch adds support for vec_insertl and vec_inserth builtins.

The patch has been compiled and tested on

  powerpc64le-unknown-linux-gnu (Power 8 LE)
  powerpc64le-unknown-linux-gnu (Power 9 LE)

and mambo with no regression errors.

Please let me know if this patch is acceptable for the mainline branch.

Thanks.

                         Carl Love

--------------------------------------------------------------
gcc/ChangeLog

    2020-08-04  Carl Love  <cel@us.ibm.com>

* config/rs6000/altivec.h (vec_insertl, vec_inserth): New defines.
* config/rs6000/rs6000-builtin.def (VINSERTGPRBL, VINSERTGPRHL,
VINSERTGPRWL, VINSERTGPRDL, VINSERTVPRBL, VINSERTVPRHL, VINSERTVPRWL,
VINSERTGPRBR, VINSERTGPRHR, VINSERTGPRWR, VINSERTGPRDR, VINSERTVPRBR,
VINSERTVPRHR, VINSERTVPRWR): New builtins.
(INSERTL, INSERTH): New builtins.
* config/rs6000/rs6000-call.c (P10_BUILTIN_VEC_INSERTL,
P10_BUILTIN_VEC_INSERTH): New overloaded definitions.
(P10_BUILTIN_VINSERTGPRBL, P10_BUILTIN_VINSERTGPRHL,
P10_BUILTIN_VINSERTGPRWL, P10_BUILTIN_VINSERTGPRDL,
P10_BUILTIN_VINSERTVPRBL, P10_BUILTIN_VINSERTVPRHL,
P10_BUILTIN_VINSERTVPRWL): Add case entries.
* config/rs6000/vsx.md (define_c_enum): Add UNSPEC_INSERTL,
UNSPEC_INSERTR.
(define_expand): Add vinsertvl_<mode>, vinsertvr_<mode>,
vinsertgl_<mode>, vinsertgr_<mode>, mode is VI2.
(define_ins): vinsertvl_internal_<mode>, vinsertvr_internal_<mode>,
vinsertgl_internal_<mode>, vinsertgr_internal_<mode>, mode VEC_I.
* doc/extend.texi: Add documentation for vec_insertl, vec_inserth.

gcc/testsuite/ChangeLog

    2020-08-04  Carl Love  <cel@us.ibm.com>

* gcc.target/powerpc/vec-insert-word-runnable.c: New test case.

rs6000, Update support for vec_extract

GCC maintainers:

Move the existing vector extract support in altivec.md to vsx.md
so all of the vector insert and extract support is in the same file.

The patch also updates the name of the builtins and descriptions for the
builtins in the documentation file so they match the approved builtin
names and descriptions.

The patch does not make any functional changes.

Please let me know if the changes are acceptable for mainline.  Thanks.

                  Carl Love

------------------------------------------------------

gcc/ChangeLog

    2020-08-04  Carl Love  <cel@us.ibm.com>

* config/rs6000/altivec.md: (UNSPEC_EXTRACTL, UNSPEC_EXTRACTR)
(vextractl<mode>, vextractr<mode>)
(vextractl<mode>_internal, vextractr<mode>_internal for mode VI2)
(VI2): Move to ...
* config/rs6000/vsx.md: (UNSPEC_EXTRACTL, UNSPEC_EXTRACTR)
(vextractl<mode>, vextractr<mode>)
(vextractl<mode>_internal, vextractr<mode>_internal for mode VI2)
(VI2):  ..here.
* doc/extend.texi: Update documentation for vec_extractl.
Replace builtin name vec_extractr with vec_extracth.  Update
description of vec_extracth.

Daily bump.

aarch64: Delete duplicated option docs.

Noticed while reviewing the RISC-V -mstack-protector-guard docs.  The
AArch64 section has two identical copies of the docs for this option.

gcc/
* doc/invoke.texi (AArch64 Options): Delete duplicate
-mstack-protector-guard docs.

[PATCH] nvptx: Add support for PTX highpart multiplications (HI/SI)

This patch adds support for signed and unsigned, HImode and SImode highpart
multiplications to the nvptx backend.

This patch has been tested on nvptx-none hosted on x86_64-pc-linux-gnu
with a "make" and "make -k check" with no new failures with the
above patch.

2020-08-04  Roger Sayle  <roger@nextmovesoftware.com>

gcc/ChangeLog:

* config/nvptx/nvptx.md (smulhi3_highpart, smulsi3_highpart)
(umulhi3_highpart, umulsi3_highpart): New instructions.

gcc/testsuite/ChangeLog:

* gcc.target/nvptx/mul-hi.c: New test.
* gcc.target/nvptx/umul-hi.c: New test.

c++: Template keyword following :: [PR96082]

In r9-4235 I tried to make sure that the template keyword follows
a nested-name-specifier.  :: is a valid nested-name-specifier, so
I also have to check 'globalscope' before giving the error.

gcc/cp/ChangeLog:

PR c++/96082
* parser.c (cp_parser_elaborated_type_specifier): Allow
'template' following ::.

gcc/testsuite/ChangeLog:

PR c++/96082
* g++.dg/template/template-keyword3.C: New test.

compiler: delete lowered constant strings

If we lower a constant string operation in a Binary_expression,
delete the strings.  This is safe because constant strings are always
newly allocated.

This is a hack to use much less memory when compiling the new
time/tzdata package, which has a file that contains the sum of over
13,000 constant strings.  We don't do this for numeric expressions
because that could cause us to delete an Iota_expression.

We should have a cleaner approach to memory usage some day.

Fixes PR go/96450

amdgcn: Remove dead defines from gcn-run

Nothing uses these since the switch to HSACOv3.

gcc/ChangeLog:

* config/gcn/gcn-run.c (R_AMDGPU_NONE): Delete.
(R_AMDGPU_ABS32_LO): Delete.
(R_AMDGPU_ABS32_HI): Delete.
(R_AMDGPU_ABS64): Delete.
(R_AMDGPU_REL32): Delete.
(R_AMDGPU_REL64): Delete.
(R_AMDGPU_ABS32): Delete.
(R_AMDGPU_GOTPCREL): Delete.
(R_AMDGPU_GOTPCREL32_LO): Delete.
(R_AMDGPU_GOTPCREL32_HI): Delete.
(R_AMDGPU_REL32_LO): Delete.
(R_AMDGPU_REL32_HI): Delete.
(reserved): Delete.
(R_AMDGPU_RELATIVE64): Delete.

[Arm] Modify default tuning of armv8.1-m.main to use Cortex-M55

Previously, compiling with -march=armv8.1-m.main would tune for
Cortex-M7.
However, the Cortex-M7 only supports up to Armv7e-M. The Cortex-M55 is
the earliest CPU that supports Armv8.1-M Mainline so is more appropriate.
This also has the effect of changing the branch cost function used, which
will be necessary to correctly prioritise conditional instructions over branches
in the rest of this patch series.

Regression tested on arm-none-eabi.

gcc/ChangeLog

2020-08-04  Omar Tahir  <omar.tahir@arm.com>

* config/arm/arm-cpus.in (armv8.1-m.main): Tune for Cortex-M55.

aarch64: Delete unnecessary code

gcc/
* config/aarch64/aarch64.c (aarch64_if_then_else_costs): Delete
redundant extra_cost variable.

c++: fix template parm count leak

I noticed that we could leak parser->num_template_parameter_lists with
erroneous specializations.  We'd increment, notice a problem and then
bail out.  This refactors cp_parser_explicit_specialization to avoid
that code path.  A couple of tests get different diagnostics because
of the fix.  pr39425 then goes to unbounded template instantiation
and exceeds the implementation limit.

gcc/cp/
* parser.c (cp_parser_explicit_specialization): Refactor
to avoid leak of num_template_parameter_lists value.
gcc/testsuite/
* g++.dg/template/pr39425.C: Adjust errors, (unbounded
template recursion).
* g++.old-deja/g++.pt/spec20.C: Remove fallout diagnostics.

AArch64: Use FLOAT_MODE_P macro and add FLAG_AUTO_FP [PR94442]

Since all FP intrinsics are set by FLAG_FP by default, but not all FP intrinsics
raise FP exceptions or read FPCR register.  So we add a global flag FLAG_AUTO_FP
to suppress the flag FLAG_FP.

2020-08-04  Zhiheng Xie  <xiezhiheng@huawei.com>

gcc/ChangeLog:

* config/aarch64/aarch64-builtins.c (aarch64_call_properties):
Use FLOAT_MODE_P macro instead of enumerating all floating-point
modes and add global flag FLAG_AUTO_FP.

Fortran/OpenMP: Fix detecting not perfectly nested loops

gcc/fortran/ChangeLog:

* openmp.c (resolve_omp_do): Detect not perfectly
nested loop with innermost collapse.

gcc/testsuite/ChangeLog:

* gfortran.dg/gomp/collapse1.f90: Add dg-error.
* gfortran.dg/gomp/collapse2.f90: New test.

doc: Add @cindex to symver attribute

When looking at the symver attr documentation in html, I found there is no
name to refer to for it.

2020-08-04  Jakub Jelinek  <jakub@redhat.com>

* doc/extend.texi (symver): Add @cindex for symver function attribute.

Test case for PR rtl-optimization/60473

PR rtl-optimization/60473 is code quality regression that has
been cured by improvements to register allocation.  For the function
in the test case, GCC 4.4, 4.5 and 4.6 generated very poor code
requiring two mov instructions, and GCC 4.7 and 4.8 (when the PR was
filed) produced better but still poor code with one mov instruction.
Since GCC 4.9 (including current mainline), it generates optimal
code with no mov instructions, matching what used to be generated
in GCC 4.1.

2020-08-04  Roger Sayle  <roger@nextmovesoftware.com>

gcc/testsuite/ChangeLog
PR rtl-optimization/60473
* gcc.target/i386/pr60473.c: New test.

Simplify X * C1 == C2 with undefined overflow

this transformation is quite straightforward, without overflow, 3*X==15 is
the same as X==5 and 3*X==5 cannot happen. Adding a single_use restriction
for the first case didn't seem necessary, although of course it can
slightly increase register pressure in some cases.

2020-08-04  Marc Glisse  <marc.glisse@inria.fr>

PR tree-optimization/95433
* match.pd (X * C1 == C2): New transformation.

* gcc.c-torture/execute/pr23135.c: Add -fwrapv to avoid
undefined behavior.
* gcc.dg/tree-ssa/pr95433.c: New file.

Adjust gimple-ssa-sprintf.c for irange API.

gcc/ChangeLog:

* gimple-ssa-sprintf.c (get_int_range): Adjust for irange API.
(format_integer): Same.
(handle_printf_call): Same.

d: Fix struct literals that have non-deterministic hash values (PR96153)

Adds code generation for generating a temporary for, and pre-filling
struct and array literals with zeroes before assigning, so that
alignment holes don't cause objects to produce a non-deterministic hash
value.  A new field has been added to the expression visitor to track
whether the result is being generated for another literal, so that
memset() is only called once on the top-level literal expression, and
not for nesting struct or arrays.

gcc/d/ChangeLog:

PR d/96153
* d-tree.h (build_expr): Add literalp argument.
* expr.cc (ExprVisitor): Add literalp_ field.
(ExprVisitor::ExprVisitor): Initialize literalp_.
(ExprVisitor::visit (AssignExp *)): Call memset() on blits where RHS
is a struct literal.  Elide assignment if initializer is all zeroes.
(ExprVisitor::visit (CastExp *)): Forward literalp_ to generation of
subexpression.
(ExprVisitor::visit (AddrExp *)): Likewise.
(ExprVisitor::visit (ArrayLiteralExp *)): Use memset() to pre-fill
object with zeroes.  Set literalp in subexpressions.
(ExprVisitor::visit (StructLiteralExp *)): Likewise.
(ExprVisitor::visit (TupleExp *)): Set literalp in subexpressions.
(ExprVisitor::visit (VectorExp *)): Likewise.
(ExprVisitor::visit (VectorArrayExp *)): Likewise.
(build_expr): Forward literal_p to ExprVisitor.

gcc/testsuite/ChangeLog:

PR d/96153
* gdc.dg/pr96153.d: New test.

amdgcn: TImode shifts

Implement TImode shifts in the backend.

The middle-end support that does it for other architectures doesn't work for
GCN because BITS_PER_WORD==32, meaning that TImode is quad-word, not
double-word.

gcc/ChangeLog:

* config/gcn/gcn.md ("<expander>ti3"): New.

c++: Member initializer list diagnostic locations [PR94024]

This patch preserves the source locations of each node in a member
initializer list so that during processing of the list we can set
input_location appropriately for generally more accurate diagnostic
locations.  Since TREE_LIST nodes are tcc_exceptional, they can't have
source locations, so we instead store the location in a dummy
tcc_expression node within the TREE_TYPE of the list node.

gcc/cp/ChangeLog:

PR c++/94024
* init.c (sort_mem_initializers): Preserve TREE_TYPE of the
member initializer list node.
(emit_mem_initializers): Set input_location when performing each
member initialization.
* parser.c (cp_parser_mem_initializer): Attach the source
location of this initializer to a dummy EMPTY_CLASS_EXPR
within the TREE_TYPE of the list node.
* pt.c (tsubst_initializer_list): Preserve TREE_TYPE of the
member initializer list node.

gcc/testsuite/ChangeLog:

PR c++/94024
* g++.dg/diagnostic/mem-init1.C: New test.

tree-optimization/88240 - stopgap for floating point code-hoisting issues

This adds a stopgap measure to avoid performing code-hoisting
on mixed type loads when the load we'd insert in the hoisting
position would be a floating point one.  This is because certain
targets (hello x87) cannot perform floating point loads without
possibly altering the bit representation and thus cannot be used
in place of integral loads.

2020-08-04  Richard Biener  <rguenther@suse.de>

PR tree-optimization/88240
* tree-ssa-sccvn.h (vn_reference_s::punned): New flag.
* tree-ssa-sccvn.c (vn_reference_insert): Initialize punned.
(vn_reference_insert_pieces): Likewise.
(visit_reference_op_call): Likewise.
(visit_reference_op_load): Track whether a ref was punned.
* tree-ssa-pre.c (do_hoist_insertion): Refuse to perform hoist
insertion on punned floating point loads.

* gcc.target/i386/pr88240.c: New testcase.

Fortran: Fix for OpenMP's 'lastprivate(conditional:'

gcc/fortran/ChangeLog:

* trans-openmp.c (gfc_trans_omp_do): Fix 'lastprivate(conditional:'.

gcc/testsuite/ChangeLog:

* gfortran.dg/gomp/lastprivate-conditional-3.f90: Enable some
previously disabled 'lastprivate(conditional:' dg-warnings.

aarch64: Use Q-reg loads/stores in movmem expansion

This is my attempt at reviving the old patch
https://gcc.gnu.org/pipermail/gcc-patches/2019-January/514632.html

I have followed on Kyrill's comment upstream on the link above and I
am using the recommended option iii that he mentioned.
"1) Adjust the copy_limit to 256 bits after checking
    AARCH64_EXTRA_TUNE_NO_LDP_STP_QREGS in the tuning.
 2) Adjust aarch64_copy_one_block_and_progress_pointers to handle
    256-bit moves. by iii:
   iii) Emit explicit V4SI (or any other 128-bit vector mode) pairs
ldp/stps. This wouldn't need any adjustments to MD patterns,
but would make aarch64_copy_one_block_and_progress_pointers
more complex as it would now have two paths, where one
handles two adjacent memory addresses in one calls."

gcc/ChangeLog:

* config/aarch64/aarch64.c (aarch64_gen_store_pair): Add case
for E_V4SImode.
(aarch64_gen_load_pair): Likewise.
(aarch64_copy_one_block_and_progress_pointers): Handle 256 bit copy.
(aarch64_expand_cpymem): Expand copy_limit to 256bits where
appropriate.

gcc/testsuite/ChangeLog:

* gcc.target/aarch64/cpymem-q-reg_1.c: New test.
* gcc.target/aarch64/large_struct_copy_2.c: Update for ldp q regs.

aarch64: Add missing clobber for fjcvtzs

gcc/ChangeLog

2020-07-30  Andrea Corallo  <andrea.corallo@arm.com>

* config/aarch64/aarch64.md (aarch64_fjcvtzs): Add missing
clobber.
* doc/sourcebuild.texi (aarch64_fjcvtzs_hw) Document new
target supports option.

gcc/testsuite/ChangeLog

2020-07-30  Andrea Corallo  <andrea.corallo@arm.com>

* gcc.target/aarch64/acle/jcvt_2.c: New testcase.
* lib/target-supports.exp
(check_effective_target_aarch64_fjcvtzs_hw): Add new check for
FJCVTZS hw.

[nvptx] Handle V2DI/V2SI mode in nvptx_gen_shuffle

With the pr96628-part1.f90 source and -ftree-slp-vectorize, we run into an
ICE due to the fact that V2DI mode is not handled in nvptx_gen_shuffle.

Fix this by adding handling of V2DI as well as V2SI mode in
nvptx_gen_shuffle.

Build and reg-tested on x86_64 with nvptx accelerator.

gcc/ChangeLog:

PR target/96428
* config/nvptx/nvptx.c (nvptx_gen_shuffle): Handle V2SI/V2DI.

libgomp/ChangeLog:

PR target/96428
* testsuite/libgomp.oacc-fortran/pr96628-part1.f90: New test.
* testsuite/libgomp.oacc-fortran/pr96628-part2.f90: New test.

veclower: Don't ICE on .VEC_CONVERT calls with no lhs [PR96426]

.VEC_CONVERT is a const internal call, so normally if the lhs is not used,
we'd DCE it far before getting to veclower, but with -O0 (or perhaps
-fno-tree-dce and some other -fno-* options) it can happen.
But as the internal fn needs the lhs to know the type to which the
conversion is done (and I think that is a reasonable representation, having
some magic another argument and having to create constants with that type
looks overkill to me), we just should DCE those calls ourselves.
During veclower, we can't really remove insns, as the callers would be
upset, so this just replaces it with a GIMPLE_NOP.

2020-08-04  Jakub Jelinek  <jakub@redhat.com>

PR middle-end/96426
* tree-vect-generic.c (expand_vector_conversion): Replace .VEC_CONVERT
call with GIMPLE_NOP if there is no lhs.

* gcc.c-torture/compile/pr96426.c: New test.

gimple-fold: Fix ICE in maybe_canonicalize_mem_ref_addr on debug stmt [PR96354]

In debug stmts, we are less strict about what is and what is not accepted
there, so this patch just punts on optimization of a debug stmt rather than
ICEing.

2020-08-04  Jakub Jelinek  <jakub@redhat.com>

PR debug/96354
* gimple-fold.c (maybe_canonicalize_mem_ref_addr): Add IS_DEBUG
argument.  Return false instead of gcc_unreachable if it is true and
get_addr_base_and_unit_offset returns NULL.
(fold_stmt_1) <case GIMPLE_DEBUG>: Adjust caller.

* g++.dg/opt/pr96354.C: New test.

Add is_gimple_min_invariant dropped from previous patch.

gcc/ChangeLog:

* vr-values.c (simplify_using_ranges::vrp_evaluate_conditional):
Call is_gimple_min_invariant dropped from previous patch.

openmp: Compute number of collapsed loop iterations more efficiently for some non-rectangular loops

2020-08-04  Jakub Jelinek  <jakub@redhat.com>

* omp-expand.c (expand_omp_for_init_counts): For triangular loops
compute number of iterations at runtime more efficiently.
(expand_omp_for_init_vars): Adjust immediate dominators.
(extract_omp_for_update_vars): Likewise.

d: Fix PR96429: Pointer subtraction uses TRUNC_DIV_EXPR

gcc/d/ChangeLog:

PR d/96429
* expr.cc (ExprVisitor::visit (BinExp*)): Use EXACT_DIV_EXPR for
pointer diff expressions.

gcc/testsuite/ChangeLog:

PR d/96429
* gdc.dg/pr96429.d: New test.

Change testcase for pr96325 from run to compile.

2020-08-04  Paul Thomas  <pault@gcc.gnu.org>

gcc/testsuite/
PR fortran/96325
* gfortran.dg/pr96325.f90: Change from run to compile.

Adjust two_valued_val_range_p for irange API.

gcc/ChangeLog:

* vr-values.c (simplify_using_ranges::two_valued_val_range_p):
Use irange API.

Adjust simplify_conversion_using_ranges for irange API.

gcc/ChangeLog:

* vr-values.c (simplify_conversion_using_ranges): Convert to irange API.

Use irange API in test_for_singularity.

gcc/ChangeLog:

* vr-values.c (test_for_singularity): Use irange API.
(simplify_using_ranges::simplify_cond_using_ranges_1): Do not
special case VR_RANGE.

Adjust vrp_evaluate_conditional for irange API.

gcc/ChangeLog:

* vr-values.c (simplify_using_ranges::vrp_evaluate_conditional): Adjust
for irange API.

Adjust op_with_boolean_value_range_p for irange API.

gcc/ChangeLog:

* vr-values.c (simplify_using_ranges::op_with_boolean_value_range_p): Adjust
for irange API.

Adjust get_range_info to use the base irange class.

gcc/ChangeLog:

* tree-ssanames.c (get_range_info): Use irange instead of value_range.
* tree-ssanames.h (get_range_info): Same.

Adjust expr_not_equal_to to use irange API.

gcc/ChangeLog:

* fold-const.c (expr_not_equal_to): Adjust for irange API.

Remove ad-hoc range canonicalization from determine_block_size.

Anti ranges of ~[MIN,X] are automatically canonicalized to [X+1,MAX],
at creation time.  There is no need to handle them specially.

Tested by adding a gcc_unreachable and bootstrapping/testing.

gcc/ChangeLog:

* builtins.c (determine_block_size): Remove ad-hoc range canonicalization.

dse: Remove partial load after full store for high part access[PR71309]

v5 update as comments:
1. Move const_rhs out of loop;
2. Iterate from int size for read_mode.

This patch could optimize(works for char/short/int/void*):

6: r119:TI=[r118:DI+0x10]
7: [r118:DI]=r119:TI
8: r121:DI=[r118:DI+0x8]

=>

6: r119:TI=[r118:DI+0x10]
16: r122:DI=r119:TI#8

Final ASM will be as below without partial load after full store(stxv+ld):
  ld 10,16(3)
  mr 9,3
  ld 3,24(3)
  std 10,0(9)
  std 3,8(9)
  blr

It could achieve ~25% performance improvement for typical cases on
Power9.  Bootstrap and regression tested on Power9-LE.

For AArch64, one ldr is replaced by mov with this patch:

ldp     x2, x3, [x0, 16]
stp     x2, x3, [x0]
ldr     x0, [x0, 8]

=>

mov     x1, x0
ldp     x2, x0, [x0, 16]
stp     x2, x0, [x1]

gcc/ChangeLog:

2020-08-04  Xionghu Luo  <luoxhu@linux.ibm.com>

PR rtl-optimization/71309
* dse.c (find_shift_sequence): Use subreg of shifted from high part
register to avoid loading from address.

gcc/testsuite/ChangeLog:

2020-08-04  Xionghu Luo  <luoxhu@linux.ibm.com>

PR rtl-optimization/71309
* gcc.target/powerpc/pr71309.c: New test.

Daily bump.

c++: Remove unused declaration.

gcc/cp/ChangeLog:

* cp-tree.h (after_nsdmi_defaulted_late_checks): Remove.

libgcc: increase required stack space for x86_64 -fsplit-stack

This accomodates increased space required by use of the xsavec
instruction in the dynamic linker trampoline.

libgcc/ChangeLog:

* config/i386/morestack.S (BACKOFF) [x86_64]: Add 2048 bytes.

rs6000: Fix vector_float.c testcase for -m32

It should be skipped then.

2020-08-03  Segher Boessenkool  <segher@kernel.crashing.org>

gcc/testsuite/
* gcc.target/powerpc/vector_float.c: Skip if not lp64.

c++: Variable template and template parameter pack [PR96218]

This is DR 2032 which says that the restrictions regarding template
parameter packs and default arguments apply to variable templates as
well, but we weren't detecting that.

gcc/cp/ChangeLog:

DR 2032
PR c++/96218
* pt.c (check_default_tmpl_args): Also consider variable
templates.

gcc/testsuite/ChangeLog:

DR 2032
PR c++/96218
* g++.dg/cpp1y/var-templ67.C: New test.

aarch64: Fix up __aarch64_cas16_acq_rel fallback

As mentioned in the PR, the fallback path when LSE is unavailable writes
incorrect registers to the memory if the previous content compares equal
to x0, x1 - it writes copy of x0, x1 from the start of function, but it
should write x2, x3.

2020-08-03  Jakub Jelinek  <jakub@redhat.com>

PR target/96402
* config/aarch64/lse.S (__aarch64_cas16_acq_rel): Use x2, x3 instead
of x(tmp0), x(tmp1) in STXP arguments.

* gcc.target/aarch64/pr96402.c: New test.

cpp: Do not use @dots for ... tokens in code examples

This prevents a ... token in code examples from being turned into a
single HORIZONTAL ELLIPSIS glyph (e.g. via the HTML &hellip; entity).

gcc/ChangeLog:

* doc/cpp.texi (Variadic Macros): Use the exact ... token in
code examples.

Refer to C++20

I noticed a bunch of references to c++2a.

gcc/
* doc/invoke.texi: Refer to c++20

openacc: No attach/detach present/release mappings for array descriptors

Standalone attach and detach clauses should not create present/release
mappings for Fortran array descriptors (e.g. used when we have a pointer
to an array), both because it is unnecessary and because those mappings
will be incorrectly subject to reference counting. Simply omitting the
mappings means we just use GOMP_MAP_TO_PSET and GOMP_MAP_{ATTACH,DETACH}
mappings for array descriptors.

That requires a tweak in gimplify.c, since we may now see GOMP_MAP_TO_PSET
without a preceding data-movement mapping.

2020-08-03  Julian Brown  <julian@codesourcery.com>
    Thomas Schwinge  <thomas@codesourcery.com>

gcc/fortran/
* trans-openmp.c (gfc_trans_omp_clauses): Don't create present/release
mappings for array descriptors.

gcc/
* gimplify.c (gimplify_omp_target_update): Allow GOMP_MAP_TO_PSET
without a preceding data-movement mapping.

gcc/testsuite/
* gfortran.dg/goacc/attach-descriptor.f90: Update pattern output. Add
scanning of gimplify dump.

libgomp/
* testsuite/libgomp.oacc-fortran/attach-descriptor-1.f90: Don't run for
shared-memory devices.  Extend with further checking.

Co-Authored-By: Thomas Schwinge <thomas@codesourcery.com>

Darwin: Guard two macros in darwin.h.

Work on the Arm64 port shows that these two macros can be declared
ahead of the version in darwin.h which needs to override (for X86
and PPC this wasn't needed).

gcc/ChangeLog:

* config/darwin.h (ASM_DECLARE_FUNCTION_NAME): UNDEF before
use.
(DEF_MIN_OSX_VERSION): Only define if there's no existing
def.

Darwin: Handle poly_int machine_modes.

The common code that selects suitable sections for literals needs
to inspect the machine_mode.  For some sub-targets that might be
represented as a poly-int.

There was a workaround in place that allowed for cases where the poly
int had only one component.  This removes the workaround and handles
the cases where we care about the machine_mode size.

gcc/ChangeLog:

* config/darwin.c (IN_TARGET_CODE): Remove.
(darwin_mergeable_constant_section): Handle poly-int machine modes.
(machopic_select_rtx_section): Likewise.

internal/syscall/unix: correct ia64 syscall numbers

Per Andreas Schwab.

Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/246264

internal/syscall/unix: define copyFileRangeTrap for all architectures

Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/246363

Avoid shifting by amounts larger than target int in irange self-tests.

gcc/ChangeLog:

PR tree-optimization/96430
* range-op.cc (operator_tests): Do not shift by 31 on targets with
integer's smaller than 32 bits.

Removal of HSA offloading from gcc and libgomp

This patch removes the generation of HSAIL from the compiler, the HSA
offloading plugin from libgomp and the associated testsuite tests and
infrastructure bits from the respective testsuites.

Apart from removal of the obvious files, I removed bits that I found
by searching for HSA related terms and by re-tracing my steps and
looking at the patches that introduced HSA in the first place.  I did
not remove everything these patches brought in, for example:

  - the mechanism to pass offload-target specific info from the application to
    the offloading plugin - but the same mechanism is also used to
    communicate number of teams and the thread limit to all offload targets.

  - run_func hook in gomp_device_descr stays too, although now it is
    not used.  If some future offload target would like the ability to
    refuse to offload some functions, it can use it.  It is easy to
    remove as a follow-up if it is considered clutter, though.

  - configure options --with-hsa-runtime=PATH, -with-hsa-runtime-include=PATH
    and --with-hsa-runtime-lib=PATH rmeain because GCN uses them too.

  - Surprisingly, GOMP_TARGET_ARG_HSA_KERNEL_ATTRIBUTES (a constant
    from gomp-constants.h) appears in the source of the amdgcn libgomp
    plugin, although I tend to think that code path is not ever used
    and this patch certainly removes it from the compiler.
    Nevertheless, it seems it has potential value beyond HSAIL and so
    I've kept it, it can of course always be easily removed in the
    future of GCN folk abandon it too.

  - I assume constants OFFLOAD_TARGET_TYPE_HSA and GOMP_DEVICE_HSA
    need to stay indefinitely too just so that no future offload
    target picks that number.

  - I have kept dg-require-effective-target
    offload_device_nonshared_as requirement of thests which have it.

It is quite probable I missed some small HSA artifacts but those
should be easy to remove later as we find them.

include/ChangeLog:

2020-07-24  Martin Jambor  <mjambor@suse.cz>

* gomp-constants.h (GOMP_VERSION_HSA): Remove.

gcc/ChangeLog:

2020-07-24  Martin Jambor  <mjambor@suse.cz>

* hsa-brig-format.h: Moved to brig/brigfrontend.
* hsa-brig.c: Removed.
* hsa-builtins.def: Likewise.
* hsa-common.c: Likewise.
* hsa-common.h: Likewise.
* hsa-dump.c: Likewise.
* hsa-gen.c: Likewise.
* hsa-regalloc.c: Likewise.
* ipa-hsa.c: Likewise.
* omp-grid.c: Likewise.
* omp-grid.h: Likewise.
* Makefile.in (BUILTINS_DEF): Remove hsa-builtins.def.
(OBJS): Remove hsa-common.o, hsa-gen.o, hsa-regalloc.o, hsa-brig.o,
hsa-dump.o, ipa-hsa.c and omp-grid.o.
(GTFILES): Removed hsa-common.c and omp-expand.c.
* builtins.def: Remove processing of hsa-builtins.def.
(DEF_HSA_BUILTIN): Remove.
* common.opt (flag_disable_hsa): Remove.
(-Whsa): Ignore.
* config.in (ENABLE_HSA): Removed.
* configure.ac: Removed handling configuration for hsa offloading.
(ENABLE_HSA): Removed.
* configure: Regenerated.
* doc/install.texi (--enable-offload-targets): Remove hsa from the
example.
(--with-hsa-runtime): Reword to reference any HSA run-time, not
specifically HSA offloading.
* doc/invoke.texi (Option Summary): Remove -Whsa.
(Warning Options): Likewise.
(Optimize Options): Remove hsa-gen-debug-stores.
* doc/passes.texi (Regular IPA passes): Remove section on IPA HSA
pass.
* gimple-low.c (lower_stmt): Remove GIMPLE_OMP_GRID_BODY case.
* gimple-pretty-print.c (dump_gimple_omp_for): Likewise.
(dump_gimple_omp_block): Likewise.
(pp_gimple_stmt_1): Likewise.
* gimple-walk.c (walk_gimple_stmt): Likewise.
* gimple.c (gimple_build_omp_grid_body): Removed function.
(gimple_copy): Remove GIMPLE_OMP_GRID_BODY case.
* gimple.def (GIMPLE_OMP_GRID_BODY): Removed.
* gimple.h (gf_mask): Removed GF_OMP_PARALLEL_GRID_PHONY,
OMP_FOR_KIND_GRID_LOOP, GF_OMP_FOR_GRID_PHONY,
GF_OMP_FOR_GRID_INTRA_GROUP, GF_OMP_FOR_GRID_GROUP_ITER and
GF_OMP_TEAMS_GRID_PHONY.  Renumbered GF_OMP_FOR_KIND_SIMD and
GF_OMP_TEAMS_HOST.
(gimple_build_omp_grid_body): Removed declaration.
(gimple_has_substatements): Remove GIMPLE_OMP_GRID_BODY case.
(gimple_omp_for_grid_phony): Removed.
(gimple_omp_for_set_grid_phony): Likewise.
(gimple_omp_for_grid_intra_group): Likewise.
(gimple_omp_for_grid_intra_group): Likewise.
(gimple_omp_for_grid_group_iter): Likewise.
(gimple_omp_for_set_grid_group_iter): Likewise.
(gimple_omp_parallel_grid_phony): Likewise.
(gimple_omp_parallel_set_grid_phony): Likewise.
(gimple_omp_teams_grid_phony): Likewise.
(gimple_omp_teams_set_grid_phony): Likewise.
(CASE_GIMPLE_OMP): Remove GIMPLE_OMP_GRID_BODY case.
* lto-section-in.c (lto_section_name): Removed hsa.
* lto-streamer.h (lto_section_type): Removed LTO_section_ipa_hsa.
* lto-wrapper.c (compile_images_for_offload_targets): Remove special
handling of hsa.
* omp-expand.c: Do not include hsa-common.h and gt-omp-expand.h.
(parallel_needs_hsa_kernel_p): Removed.
(grid_launch_attributes_trees): Likewise.
(grid_launch_attributes_trees): Likewise.
(grid_create_kernel_launch_attr_types): Likewise.
(grid_insert_store_range_dim): Likewise.
(grid_get_kernel_launch_attributes): Likewise.
(get_target_arguments): Remove code passing HSA grid sizes.
(grid_expand_omp_for_loop): Remove.
(grid_arg_decl_map): Likewise.
(grid_remap_kernel_arg_accesses): Likewise.
(grid_expand_target_grid_body): Likewise.
(expand_omp): Remove call to grid_expand_target_grid_body.
(omp_make_gimple_edges): Remove GIMPLE_OMP_GRID_BODY case.
* omp-general.c: Do not include hsa-common.h.
(omp_maybe_offloaded): Do not check for HSA offloading.
(omp_context_selector_matches): Likewise.
* omp-low.c: Do not include hsa-common.h and omp-grid.h.
(build_outer_var_ref): Remove handling of GIMPLE_OMP_GRID_BODY.
(scan_sharing_clauses): Remove handling of OMP_CLAUSE__GRIDDIM_.
(scan_omp_parallel): Remove handling of the phoney variant.
(check_omp_nesting_restrictions): Remove handling of
GIMPLE_OMP_GRID_BODY and GF_OMP_FOR_KIND_GRID_LOOP.
(scan_omp_1_stmt): Remove handling of GIMPLE_OMP_GRID_BODY.
(lower_omp_for_lastprivate): Remove handling of gridified loops.
(lower_omp_for): Remove phony loop handling.
(lower_omp_taskreg): Remove phony construct handling.
(lower_omp_teams): Likewise.
(lower_omp_grid_body): Removed.
(lower_omp_1): Remove GIMPLE_OMP_GRID_BODY case.
(execute_lower_omp): Do not call omp_grid_gridify_all_targets.
* opts.c (common_handle_option): Do not handle hsa when processing
OPT_foffload_.
* params.opt (hsa-gen-debug-stores): Remove.
* passes.def: Remove pass_ipa_hsa and pass_gen_hsail.
* timevar.def: Remove TV_IPA_HSA.
* toplev.c: Do not include hsa-common.h.
(compile_file): Do not call hsa_output_brig.
* tree-core.h (enum omp_clause_code): Remove OMP_CLAUSE__GRIDDIM_.
(tree_omp_clause): Remove union field dimension.
* tree-nested.c (convert_nonlocal_omp_clauses): Remove the
OMP_CLAUSE__GRIDDIM_ case.
(convert_local_omp_clauses): Likewise.
* tree-pass.h (make_pass_gen_hsail): Remove declaration.
(make_pass_ipa_hsa): Likewise.
* tree-pretty-print.c (dump_omp_clause): Remove GIMPLE_OMP_GRID_BODY
case.
* tree.c (omp_clause_num_ops): Remove the element corresponding to
OMP_CLAUSE__GRIDDIM_.
(omp_clause_code_name): Likewise.
(walk_tree_1): Remove GIMPLE_OMP_GRID_BODY case.
* tree.h (OMP_CLAUSE__GRIDDIM__DIMENSION): Remove.
(OMP_CLAUSE__GRIDDIM__SIZE): Likewise.
(OMP_CLAUSE__GRIDDIM__GROUP): Likewise.

gcc/fortran/ChangeLog:

2020-07-24  Martin Jambor  <mjambor@suse.cz>

* f95-lang.c (gfc_init_builtin_functions): Remove processing of
hsa-builtins.def.

gcc/brig/ChangeLog:

2020-07-24  Martin Jambor  <mjambor@suse.cz>

* brigfrontend/brig-util.h (hsa_type_packed_p): Declared.
* brigfrontend/brig-util.cc (hsa_type_packed_p): Moved here from
removed gcc/hsa-common.c.

libgomp/ChangeLog:

2020-07-24  Martin Jambor  <mjambor@suse.cz>

* plugin/Makefrag.am: Remove configuration of HSA plugin.
* aclocal.m4: Regenerated.
* Makefile.in: Regenerated.
* config.h.in: Regenerated.
* configure: Regenerated.
* plugin/configfrag.ac: Likewise.
* plugin/hsa_ext_finalize.h: Removed.
* plugin/plugin-hsa.c: Likewise.
* testsuite/Makefile.in: Regenerated.
* testsuite/lib/libgomp.exp
(offload_target_to_openacc_device_type): Remove hsa case.
(check_effective_target_hsa_offloading_selected_nocache): Removed
(check_effective_target_hsa_offloading_selected): Likewise.
(libgomp_init): Do not add -Wno-hsa to additional_flags.
* testsuite/libgomp.hsa.c/alloca-1.c: Removed test.
* testsuite/libgomp.hsa.c/bitfield-1.c: Likewise.
* testsuite/libgomp.hsa.c/bits-insns.c: Likewise.
* testsuite/libgomp.hsa.c/builtins-1.c: Likewise.
* testsuite/libgomp.hsa.c/c.exp: Likewise.
* testsuite/libgomp.hsa.c/complex-1.c: Likewise.
* testsuite/libgomp.hsa.c/complex-align-2.c: Likewise.
* testsuite/libgomp.hsa.c/formal-actual-args-1.c: Likewise.
* testsuite/libgomp.hsa.c/function-call-1.c: Likewise.
* testsuite/libgomp.hsa.c/get-level-1.c: Likewise.
* testsuite/libgomp.hsa.c/gridify-1.c: Likewise.
* testsuite/libgomp.hsa.c/gridify-2.c: Likewise.
* testsuite/libgomp.hsa.c/gridify-3.c: Likewise.
* testsuite/libgomp.hsa.c/gridify-4.c: Likewise.
* testsuite/libgomp.hsa.c/memory-operations-1.c: Likewise.
* testsuite/libgomp.hsa.c/pr69568.c: Likewise.
* testsuite/libgomp.hsa.c/pr82416.c: Likewise.
* testsuite/libgomp.hsa.c/rotate-1.c: Likewise.
* testsuite/libgomp.hsa.c/staticvar.c: Likewise.
* testsuite/libgomp.hsa.c/switch-1.c: Likewise.
* testsuite/libgomp.hsa.c/switch-branch-1.c: Likewise.
* testsuite/libgomp.hsa.c/switch-sbr-2.c: Likewise.
* testsuite/libgomp.hsa.c/tiling-1.c: Likewise.
* testsuite/libgomp.hsa.c/tiling-2.c: Likewise.

gcc/testsuite/ChangeLog:

2020-07-24  Martin Jambor  <mjambor@suse.cz>

* lib/target-supports.exp (check_effective_target_offload_hsa):
Removed.
* c-c++-common/gomp/gridify-1.c: Removed test.
* c-c++-common/gomp/gridify-2.c: Likewise.
* c-c++-common/gomp/gridify-3.c: Likewise.
* c-c++-common/gomp/hsa-indirect-call-1.c: Likewise.
* gfortran.dg/gomp/gridify-1.f90: Likewise.
* gcc.dg/gomp/gomp.exp: Do not pass -Wno-hsa to tests.
* g++.dg/gomp/gomp.exp: Likewise.
* gfortran.dg/gomp/gomp.exp: Likewise.

aarch64: Add support for unpacked sub [PR96366]

The test case bb-slp-20.c in the gcc testsuit will cause an
ICE in the expand pass due to the lack of a pattern for
subtraction of the VNx2SI mode. This patch solve this problem
by adding support for unpacked sub.

gcc/ChangeLog:

* config/aarch64/aarch64-sve.md (sub<mode>3): Add support for
unpacked vectors.

testsuite: Add -Wno-psabi to gcc.dg/pr96377-[12].c

2020-08-03  Richard Sandiford  <richard.sandiford@arm.com>

gcc/testsuite/
* gcc.dg/pr96377-1.c: Add -Wno-psabi.
* gcc.dg/pr96377-2.c: Likewise.

MSP430: Don't pass redundant -md option to the assembler

The MSP430 GAS option "-md" is supposed to indicate that the CRT startup
code should copy data from ROM to RAM at startup. However, this option
has no effect; GAS handles the related behaviour automatically.

gcc/ChangeLog:

* config/msp430/msp430.h (ASM_SPEC): Don't pass on "-md" option.

regrename: Avoid disrupting SMS schedule [PR95696]

SMS is performed before reload, and each insn in SMS schedule uses
pseudo-register.  After reload, regrename pass try to adjust the hard
registers with def/use chain created by build_def_use.  For now, regrename
pass isn't aware of VLIW bundles created by SMS, it may updated a register
which may not be really unused, which will causes invalid VLIW bundles.
Before the final schedule, we recheck the validation of VLIW bundles and
reschedule the conflicted insns to avoid the above issue.  Rescheduling
the conflicted insns will destroy SMS schedule of the kernel loop, which
would be harmful to performance.

2020-08-03  Yunde Zhong  <zhongyunde@huawei.com>

gcc/
PR rtl-optimization/95696
* regrename.c (regrename_analyze): New param include_all_block_p
with default value TRUE.  If set to false, avoid disrupting SMS
schedule.
* regrename.h (regrename_analyze): Adjust prototype.

lto/96385 - avoid unused global UNDEFs in debug objects

Unused global UNDEFs can have side-effects in some circumstances so
the following patch avoids them by treating them the same as other
to be discarded DEFs - make them local.

2020-08-03  Richard Biener  <rguenther@suse.de>

PR lto/96385
libiberty/
* simple-object-elf.c
(simple_object_elf_copy_lto_debug_sections): Localize global
UNDEFs and reuse the prevailing name.

doc: fix a typo in tm.texi

gcc/
* doc/tm.texi.in (VECTOR_STORE_FLAG_VALUE): Fix a typo.
* doc/tm.texi: Regenerate.

doc: Add missing comma after octeontx2f95mm

gcc/
* doc/invoke.texi: Add missing comma after octeontx2f95mm entry.

aarch64: Add A64FX machine model

This patch add support for Fujitsu A64FX, as the first step of adding
A64FX machine model.

A64FX is used in FUJITSU Supercomputer PRIMEHPC FX1000,
PRIMEHPC FX700, and supercomputer Fugaku.
The official microarchitecture information of A64FX can be read at
https://github.com/fujitsu/A64FX.

2020-08-03  Qian jianhua  <qianjh@cn.fujitsu.com>

gcc/
* config/aarch64/aarch64-cores.def (a64fx): New core.
* config/aarch64/aarch64-tune.md: Regenerated.
* config/aarch64/aarch64.c (a64fx_prefetch_tune, a64fx_tunings): New.
* doc/invoke.texi: Add a64fx to the list.

PR rtl-optimization 61494: Preserve x-0.0 with HONOR_SNANS.

The following patch avoids simplifying x-0.0 to x when -fsignaling-nans
is specified, which resolves PR rtl-optimization 61494.  Indeed, running
the test program attached to that PR now reports no failures.

2020-08-02  Roger Sayle  <roger@nextmovesoftware.com>

gcc/ChangeLog
PR rtl-optimization/61494
* simplify-rtx.c (simplify_binary_operation_1) [MINUS]: Don't
simplify x - 0.0 with -fsignaling-nans.

genmatch: Avoid unused parameter warnings in generated code.

This patch silences a number of unused parameter warnings whilst
compiling both generic-match.c and gimple-match.c.  The problem is
that multiple (polymorphic) functions are generated for generic_simplify
and gimple_simplify, each handling tree codes with a specific number
of children.  Currently, there are no simplifications for tree codes
with four or five children, leading to functions with "empty" bodies
and unused function arguments.  This patch detects those cases, and
generates stub functions (with anonymous arguments) to silence these
warnings.

2020-08-03  Roger Sayle  <roger@nextmovesoftware.com>

gcc/ChangeLog
* genmatch.c (decision_tree::gen): Emit stub functions for
tree code operand counts that have no simplifications.
(main): Correct comment typo.

tree-optimization: Fix typos in comments

The only two changes which aren't obvious are s/dirified/specified/ and
s/edirially/especially/ which appear to be caused by a s/spec/dir/ edit
that went too far.

gcc/ChangeLog:

* gimple-ssa-sprintf.c: Fix typos in comments.

AArch64: Fix hwasan failure in readline.

My previous fix added an unchecked call to fgets in the new function readline.
fgets can fail when there's an error reading the file in which case it returns
NULL.  It also returns NULL when the next character is EOF.

The EOF case is already covered by the existing code but the error case isn't.
This fixes it by returning the empty string on error.

Also I now use strnlen instead of strlen to make sure we never read outside the
buffer.

This was flagged by Matthew Malcomson during his hwasan work.

gcc/ChangeLog:

* config/aarch64/driver-aarch64.c (readline): Check return value fgets.

mark match.pd ! not implemented on GENERIC

This makes us error when the ! operator modifier is encountered
when not targeting GIMPLE.

2020-08-03  Richard Biener  <rguenther@suse.de>

* genmatch.c (parser::gimple): New.
(parser::parser): Initialize gimple flag member.
(parser::parse_expr): Error on ! operator modifier when
not targeting GIMPLE.
(main): Pass down gimple flag to parser ctor.

* doc/match-and-simplify.texi: Amend accordingly.

d: Fix ICE using non-local variable: internal compiler error: Segmentation fault

Moves no frame access error to own function, adding use of it for both
when get_framedecl() cannot find a path to the outer function frame, and
guarding get_decl_tree() from recursively calling itself.

gcc/d/ChangeLog:

PR d/96254
* d-codegen.cc (error_no_frame_access): New.
(get_frame_for_symbol): Use fdparent name in error message.
(get_framedecl): Replace call to assert with error.
* d-tree.h (error_no_frame_access): Declare.
* decl.cc (get_decl_tree): Detect recursion and error.

gcc/testsuite/ChangeLog:

PR d/96254
* gdc.dg/pr96254a.d: New test.
* gdc.dg/pr96254b.d: New test.

libgfortran/caf/single.c: Fix typo.

libgfortran/ChangeLog

* caf/single.c (_gfortran_caf_lock): Fix typo.

Fortran texi: Fix typos

gcc/fortran/ChangeLog

* gfc-internals.texi: Fix typos.
* gfortran.texi: Likewise.
* intrinsic.texi: Likewise.
* invoke.texi: Likewise.

Multi-range implementation for value_range (irange).

Implement class irange, a generic multi-range implementation for
value ranges.  This class is API compatible with value_range, and is meant
to seamlessly coexist with it.

gcc/ChangeLog:

* Makefile.in (GTFILES): Move value-range.h up.
* gengtype-lex.l: Set yylval to handle GTY markers on templates.
* ipa-cp.c (initialize_node_lattices): Call value_range
constructor.
(ipcp_propagate_stage): Use in-place new so value_range construct
is called.
* ipa-fnsummary.c (evaluate_conditions_for_known_args): Use std
vec instead of GCC's vec<>.
(evaluate_properties_for_edge): Adjust for std vec.
(ipa_fn_summary_t::duplicate): Same.
(estimate_ipcp_clone_size_and_time): Same.
* ipa-prop.c (ipa_get_value_range): Use in-place new for
value_range.
* ipa-prop.h (struct GTY): Remove class keyword for m_vr.
* range-op.cc (empty_range_check): Rename to...
(empty_range_varying): ...this and adjust for varying.
(undefined_shift_range_check): Adjust for irange.
(range_operator::wi_fold): Same.
(range_operator::fold_range): Adjust for irange.  Special case
single pairs for performance.
(range_operator::op1_range): Adjust for irange.
(range_operator::op2_range): Same.
(value_range_from_overflowed_bounds): Same.
(value_range_with_overflow): Same.
(create_possibly_reversed_range): Same.
(range_true): Same.
(range_false): Same.
(range_true_and_false): Same.
(get_bool_state):  Adjust for irange and tweak for performance.
(operator_equal::fold_range): Adjust for irange.
(operator_equal::op1_range): Same.
(operator_equal::op2_range): Same.
(operator_not_equal::fold_range): Same.
(operator_not_equal::op1_range): Same.
(operator_not_equal::op2_range): Same.
(build_lt): Same.
(build_le): Same.
(build_gt): Same.
(build_ge): Same.
(operator_lt::fold_range): Same.
(operator_lt::op1_range): Same.
(operator_lt::op2_range): Same.
(operator_le::fold_range): Same.
(operator_le::op1_range): Same.
(operator_le::op2_range): Same.
(operator_gt::fold_range): Same.
(operator_gt::op1_range): Same.
(operator_gt::op2_range): Same.
(operator_ge::fold_range): Same.
(operator_ge::op1_range): Same.
(operator_ge::op2_range): Same.
(operator_plus::wi_fold): Same.
(operator_plus::op1_range): Same.
(operator_plus::op2_range): Same.
(operator_minus::wi_fold): Same.
(operator_minus::op1_range): Same.
(operator_minus::op2_range): Same.
(operator_min::wi_fold): Same.
(operator_max::wi_fold): Same.
(cross_product_operator::wi_cross_product): Same.
(operator_mult::op1_range): New.
(operator_mult::op2_range): New.
(operator_mult::wi_fold): Adjust for irange.
(operator_div::wi_fold): Same.
(operator_exact_divide::op1_range): Same.
(operator_lshift::fold_range): Same.
(operator_lshift::wi_fold): Same.
(operator_lshift::op1_range): New.
(operator_rshift::op1_range): New.
(operator_rshift::fold_range): Adjust for irange.
(operator_rshift::wi_fold): Same.
(operator_cast::truncating_cast_p): Abstract out from
operator_cast::fold_range.
(operator_cast::fold_range): Adjust for irange and tweak for
performance.
(operator_cast::inside_domain_p): Abstract out from fold_range.
(operator_cast::fold_pair): Same.
(operator_cast::op1_range): Use abstracted methods above.  Adjust
for irange and tweak for performance.
(operator_logical_and::fold_range): Adjust for irange.
(operator_logical_and::op1_range): Same.
(operator_logical_and::op2_range): Same.
(unsigned_singleton_p): New.
(operator_bitwise_and::remove_impossible_ranges): New.
(operator_bitwise_and::fold_range): New.
(wi_optimize_and_or):  Adjust for irange.
(operator_bitwise_and::wi_fold): Same.
(set_nonzero_range_from_mask): New.
(operator_bitwise_and::simple_op1_range_solver): New.
(operator_bitwise_and::op1_range): Adjust for irange.
(operator_bitwise_and::op2_range): Same.
(operator_logical_or::fold_range): Same.
(operator_logical_or::op1_range): Same.
(operator_logical_or::op2_range): Same.
(operator_bitwise_or::wi_fold): Same.
(operator_bitwise_or::op1_range): Same.
(operator_bitwise_or::op2_range): Same.
(operator_bitwise_xor::wi_fold): Same.
(operator_bitwise_xor::op1_range): New.
(operator_bitwise_xor::op2_range): New.
(operator_trunc_mod::wi_fold):  Adjust for irange.
(operator_logical_not::fold_range): Same.
(operator_logical_not::op1_range): Same.
(operator_bitwise_not::fold_range): Same.
(operator_bitwise_not::op1_range): Same.
(operator_cst::fold_range): Same.
(operator_identity::fold_range): Same.
(operator_identity::op1_range): Same.
(class operator_unknown): New.
(operator_unknown::fold_range): New.
(class operator_abs): Adjust for irange.
(operator_abs::wi_fold): Same.
(operator_abs::op1_range): Same.
(operator_absu::wi_fold): Same.
(class operator_negate): Same.
(operator_negate::fold_range): Same.
(operator_negate::op1_range): Same.
(operator_addr_expr::fold_range): Same.
(operator_addr_expr::op1_range): Same.
(pointer_plus_operator::wi_fold): Same.
(pointer_min_max_operator::wi_fold): Same.
(pointer_and_operator::wi_fold): Same.
(pointer_or_operator::op1_range): New.
(pointer_or_operator::op2_range): New.
(pointer_or_operator::wi_fold):  Adjust for irange.
(integral_table::integral_table): Add entries for IMAGPART_EXPR
and POINTER_DIFF_EXPR.
(range_cast):  Adjust for irange.
(build_range3): New.
(range3_tests): New.
(widest_irange_tests): New.
(multi_precision_range_tests): New.
(operator_tests): New.
(range_tests): New.
* range-op.h (class range_operator): Adjust for irange.
(range_cast): Same.
* tree-vrp.c (range_fold_binary_symbolics_p): Adjust for irange and
tweak for performance.
(range_fold_binary_expr): Same.
(masked_increment): Change to extern.
* tree-vrp.h (masked_increment): New.
* tree.c (cache_wide_int_in_type_cache): New function abstracted
out from wide_int_to_tree_1.
(wide_int_to_tree_1): Cache 0, 1, and MAX for pointers.
* value-range-equiv.cc (value_range_equiv::deep_copy): Use kind
method.
(value_range_equiv::move): Same.
(value_range_equiv::check): Adjust for irange.
(value_range_equiv::intersect): Same.
(value_range_equiv::union_): Same.
(value_range_equiv::dump): Same.
* value-range.cc (irange::operator=): Same.
(irange::maybe_anti_range): New.
(irange::copy_legacy_range): New.
(irange::set_undefined): Adjust for irange.
(irange::swap_out_of_order_endpoints): Abstract out from set().
(irange::set_varying): Adjust for irange.
(irange::irange_set): New.
(irange::irange_set_anti_range): New.
(irange::set): Adjust for irange.
(value_range::set_nonzero): Move to header file.
(value_range::set_zero): Move to header file.
(value_range::check): Rename to...
(irange::verify_range): ...this.
(value_range::num_pairs): Rename to...
(irange::legacy_num_pairs): ...this, and adjust for irange.
(value_range::lower_bound): Rename to...
(irange::legacy_lower_bound): ...this, and adjust for irange.
(value_range::upper_bound): Rename to...
(irange::legacy_upper_bound): ...this, and adjust for irange.
(value_range::equal_p): Rename to...
(irange::legacy_equal_p): ...this.
(value_range::operator==): Move to header file.
(irange::equal_p): New.
(irange::symbolic_p): Adjust for irange.
(irange::constant_p): Same.
(irange::singleton_p): Same.
(irange::value_inside_range): Same.
(irange::may_contain_p): Same.
(irange::contains_p): Same.
(irange::normalize_addresses): Same.
(irange::normalize_symbolics): Same.
(irange::legacy_intersect): Same.
(irange::legacy_union): Same.
(irange::union_): Same.
(irange::intersect): Same.
(irange::irange_union): New.
(irange::irange_intersect): New.
(subtract_one): New.
(irange::invert): Adjust for irange.
(dump_bound_with_infinite_markers): New.
(irange::dump): Adjust for irange.
(debug): Add irange versions.
(range_has_numeric_bounds_p): Adjust for irange.
(vrp_val_max): Move to header file.
(vrp_val_min): Move to header file.
(DEFINE_INT_RANGE_GC_STUBS): New.
(DEFINE_INT_RANGE_INSTANCE): New.
* value-range.h (class irange): New.
(class int_range): New.
(class value_range): Rename to a instantiation of int_range.
(irange::legacy_mode_p): New.
(value_range::value_range): Remove.
(irange::kind): New.
(irange::num_pairs): Adjust for irange.
(irange::type): Adjust for irange.
(irange::tree_lower_bound): New.
(irange::tree_upper_bound): New.
(irange::type): Adjust for irange.
(irange::min): Same.
(irange::max): Same.
(irange::varying_p): Same.
(irange::undefined_p): Same.
(irange::zero_p): Same.
(irange::nonzero_p): Same.
(irange::supports_type_p): Same.
(range_includes_zero_p): Same.
(gt_ggc_mx): New.
(gt_pch_nx): New.
(irange::irange): New.
(int_range::int_range): New.
(int_range::operator=): New.
(irange::set): Moved from value-range.cc and adjusted for irange.
(irange::set_undefined): Same.
(irange::set_varying): Same.
(irange::operator==): Same.
(irange::lower_bound): Same.
(irange::upper_bound): Same.
(irange::union_): Same.
(irange::intersect): Same.
(irange::set_nonzero): Same.
(irange::set_zero): Same.
(irange::normalize_min_max): New.
(vrp_val_max): Move from value-range.cc.
(vrp_val_min): Same.
* vr-values.c (vr_values::get_lattice_entry): Call value_range
constructor.

d: Merge upstream dmd c2274e56a (PR96250).

1. Fixes an ICE in the front-end if a struct symbol were to appear twice
in the compilation unit.

2. Fixes a rejects-valid bug in the front-end where `(symbol)' was being
resolved as a `var' expression, instead of `this.var'.

Reviewed-on: https://github.com/dlang/dmd/pull/11436
     https://github.com/dlang/dmd/pull/11439

gcc/d/ChangeLog:

PR d/96250
* dmd/MERGE: Merge upstream dmd c2274e56a.

Daily bump.

var-tracking: fix uninitialised use of 'in_pending' [PR96404]

r11-2447-g:1212cfad093 ("Improve var-tracking dataflow
iteration order") changed 'in_pending' initialization
from:

    in_pending = sbitmap_alloc (last_basic_block_for_fn (cfun));
    bitmap_ones (in_pending);

to more complex partial bit population algorithm. Due to presence
of uninitialized bits gcc started injecting extra debug entries
in seemigly arbitrary locations and started failing stage2/stage3
bootstrap comparison.

valgrind detected unilitialized bits as:

  Conditional jump or move depends on uninitialised value(s)
     at 0xDBED3B: vt_find_locations() (var-tracking.c:7230)
     by 0xDBF2FB: variable_tracking_main_1() (var-tracking.c:10519)
     ...
   Uninitialised value was created by a heap allocation
     at 0x483779F: malloc (vg_replace_malloc.c:307)
     by 0x14EE80B: xmalloc (xmalloc.c:147)
     by 0x14911F9: sbitmap_alloc(unsigned int) (sbitmap.c:51)
     ...

The fix explicitly initializes 'in_pending' bitmap with zeros.

2020-08-02  Sergei Trofimovich  <siarheit@google.com>

gcc/

PR bootstrap/96404
* var-tracking.c (vt_find_locations): Fully initialize
all 'in_pending' bits.

Update ChangeLogs for PR96320

This patch fixes PR96320. See the explanatory comment in the testcase.

2020-08-01  Paul Thomas  <pault@gcc.gnu.org>

gcc/fortran
PR target/96320
* interface.c (gfc_check_dummy_characteristics): If a module
procedure arrives with assumed shape in the interface and
deferred shape in the procedure itself, update the latter and
copy the lower bounds.

gcc/testsuite/
PR target/96320
* gfortran.dg/module_procedure_4.f90 : New test.

Update ChangeLogs for PR96325

This patch fixes PR96325. See the explanatory comment in the testcase.

2020-08-02  Paul Thomas  <pault@gcc.gnu.org>

gcc/fortran
PR fortran/96325
* primary.c (gfc_match_varspec): In the case that a component
reference is added to an intrinsic type component, emit the
error message in this function.

gcc/testsuite/
PR fortran/96325
* gfortran.dg/pr96325.f90: New test.
* gfortran.dg/pr91589.f90: Update error message.

Daily bump.

Move www.stroustrup.com to https

libstdc++-v3/ChangeLog:

2020-08-02  Gerald Pfeifer  <gerald@pfeifer.com>

* doc/xml/manual/using_exceptions.xml: Move www.stroustrup.com to
https.
* doc/html/manual/using_exceptions.html: Regenerate.

libgo: update to go1.15rc1

Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/245157

Verify symtab order

* symtab.c (symtab_node::verify_base): Verify order.
(symtab_node::verify_symtab_nodes): Verify order.

Cap frequency of recursive calls by 90%

* predict.c (estimate_bb_frequencies): Cap recursive calls by 90%.

c: Fix bogus vector initialisation error [PR96377]

One of the problems in this PR was that if we had:

  vector_type1 array[] = { vector_value1 };

process_init_element would only treat vector_value1 as initialising
a vector_type1 if they had the same TYPE_MAIN_VARIANT.  This has
several problems:

(1) It gives confusing error messages if the vector types are
    incompatible.  (Tested by gcc.dg/pr96377-1.c.)

(2) It means that we reject code that should be valid with
    -flax-vector-conversions.  (Tested by gcc.dg/pr96377-2.c.)

(3) On arm and aarch64 targets, it means that we reject some
    initializers that mix Advanced SIMD and standard GNU vectors.
    These vectors have traditionally had different TYPE_MAIN_VARIANTs
    because they have different mangling schemes.  (Tested by
    gcc.dg/pr96377-[3-6].c.)

(4) It means that we reject SVE initializers that should be valid.
    (Tested by gcc.target/aarch64/sve/gnu_vectors_[34].c.)

(5) After r11-1741-g:31427b974ed7b7dd54e2 we reject:

      arm_neon_type1 array[] = { k ^ arm_neon_value1 };

    because applying the binary operator to arm_neon_value1 strips
    the "Advanced SIMD type" attributes that were added in that patch.
    Stripping the attributes is problematic for other reasons though,
    so that still needs to be fixed separately.

g++.target/aarch64/sve/gnu_vectors_[34].C already pass.

gcc/c/
PR c/96377
* c-typeck.c (process_init_element): Split test for whether to
recurse into a record, union or array into...
(initialize_elementwise_p): ...this new function.  Don't recurse
into a vector type if the initialization value is also a vector.

gcc/testsuite/
PR c/96377
* gcc.dg/pr96377-1.c: New test.
* gcc.dg/pr96377-2.c: Likewise.
* gcc.dg/pr96377-3.c: Likewise.
* gcc.dg/pr96377-4.c: Likewise.
* gcc.dg/pr96377-5.c: Likewise.
* gcc.dg/pr96377-6.c: Likewise.
* gcc.target/aarch64/pr96377-1.c: Likewise.
* gcc.target/aarch64/sve/acle/general-c/gnu_vectors_3.c: Likewise.
* gcc.target/aarch64/sve/acle/general-c/gnu_vectors_4.c: Likewise.
* g++.target/aarch64/sve/acle/general-c++/gnu_vectors_3.C: Likewise.
* g++.target/aarch64/sve/acle/general-c++/gnu_vectors_4.C: Likewise.

C-SKY: Add -mfloat-abi= option.

gcc/ChangeLog:

* config/csky/csky_opts.h (float_abi_type): New.
* config/csky/csky.h (TARGET_SOFT_FLOAT): New.
(TARGET_HARD_FLOAT): New.
(TARGET_HARD_FLOAT_ABI): New.
(OPTION_DEFAULT_SPECS): Use mfloat-abi.
* config/csky/csky.opt (mfloat-abi): New.
* doc/invoke.texi (C-SKY Options): Document -mfloat-abi=.

C-SKY: Delete big endian CPUs' mutilib for linux gcc.

gcc/

* config/csky/t-csky-linux: Delete big endian CPUs' multilib.

gcc.dg/loop-8.c: Skip for mmix.

This test fails for mmix for (almost) the same reason it would fail
for e.g. mipsel-elf: the end-condition of the loop tests against a
register set to a constant, and that register is (one of) the
"unexpected IV" moved out of the loop "without introducing a new
temporary register" and making the dump contain more than one
"Decided", causing a non-matching loop2 dump.  The test should
probably have been restricted to just the original target for which a
problem was observed to be fixed.

gcc/testsuite:
* gcc.dg/loop-8.c: Skip for mmix.

Daily bump.

RISC-V/libgcc: Reduce the size of RV64 millicode by 6 bytes

Rewrite code sequences throughout the 64-bit RISC-V `__riscv_save_*'
routines replacing `li t1, -48', `li t1, -64', and `li t1, -80',
instructions, which do not have a compressed encoding, respectively with
`li t1, 3', `li t1, 4', and `li t1, 4', which do, and then adjusting the
remaining code accordingly observing that `sub sp, sp, t1' takes the
same amount of space as an `slli t1, t1, 4'/`add sp, sp, t1' instruction
pair does, again due to the use of compressed encodings, saving 6 bytes
total.

This change does increase code size by 4 bytes for RISC-V processors
lacking the compressed instruction set, however their users couldn't
care about the code size or they would have chosen an implementation
that does have the compressed instructions, wouldn't they?

libgcc/
* config/riscv/save-restore.S [__riscv_xlen == 64]
(__riscv_save_10, __riscv_save_8, __riscv_save_6, __riscv_save_4)
(__riscv_save_2): Replace negative immediates used for the final
stack pointer adjustment with positive ones, right-shifted by 4.

libstdc++: ParallelSTL is now part of oneAPI DPC++ Library

libstdc++-v3:
2020-07-31  Gerald Pfeifer  <gerald@pfeifer.com>

* doc/xml/manual/status_cxx2017.xml: ParallelSTL is now part
of oneAPI DPC++ Library on Github.
* doc/html/manual/status.html: Regenerate.

libstdc++: Fix and improve std::vector<bool> implementation.

Do not consider allocator noexcept qualification for vector<bool> move
constructor.
Improve swap performance using TBAA like in main vector implementation. Bypass
_M_initialize_dispatch/_M_assign_dispatch in post-c++11 modes.

libstdc++-v3/ChangeLog:

* include/bits/stl_bvector.h
[_GLIBCXX_INLINE_VERSION](_Bvector_impl_data::_M_start): Define as
_Bit_type*.
(_Bvector_impl_data(const _Bvector_impl_data&)): Default.
(_Bvector_impl_data(_Bvector_impl_data&&)): Delegate to latter.
(_Bvector_impl_data::operator=(const _Bvector_impl_data&)): Default.
(_Bvector_impl_data::_M_move_data(_Bvector_impl_data&&)): Use latter.
(_Bvector_impl_data::_M_reset()): Likewise.
(_Bvector_impl_data::_M_swap_data): New.
(_Bvector_impl::_Bvector_impl(_Bvector_impl&&)): Implement explicitely.
(_Bvector_impl::_Bvector_impl(_Bit_alloc_type&&, _Bvector_impl&&)): New.
(_Bvector_base::_Bvector_base(_Bvector_base&&, const allocator_type&)):
New, use latter.
(vector::vector(vector&&, const allocator_type&, true_type)): New, use
latter.
(vector::vector(vector&&, const allocator_type&, false_type)): New.
(vector::vector(vector&&, const allocator_type&)): Use latters.
(vector::vector(const vector&, const allocator_type&)): Adapt.
[__cplusplus >= 201103](vector::vector(_InputIt, _InputIt,
const allocator_type&)): Use _M_initialize_range.
(vector::operator[](size_type)): Use iterator operator[].
(vector::operator[](size_type) const): Use const_iterator operator[].
(vector::swap(vector&)): Add assertions on allocators. Use _M_swap_data.
[__cplusplus >= 201103](vector::insert(const_iterator, _InputIt,
_InputIt)): Use _M_insert_range.
(vector::_M_initialize(size_type)): Adapt.
[__cplusplus >= 201103](vector::_M_initialize_dispatch): Remove.
[__cplusplus >= 201103](vector::_M_insert_dispatch): Remove.
* python/libstdcxx/v6/printers.py (StdVectorPrinter._iterator): Stop
using start _M_offset.
(StdVectorPrinter.to_string): Likewise.
* testsuite/23_containers/vector/bool/allocator/swap.cc: Adapt.
* testsuite/23_containers/vector/bool/cons/noexcept_move_construct.cc:
Add check.

c++: Use error_at rather than warning_at for missing return in constexpr functions [PR96182]

For C++11 we already emit an error if a constexpr function doesn't contain
a return statement, because in C++11 that is the only thing it needs to
contain, but for C++14 we would normally issue a -Wreturn-type warning.

As mentioned by Jonathan, such constexpr functions are invalid, no
diagnostics required, because there doesn't exist any arguments for
which it would result in valid constant expression.

This raises it to an error in such cases.  The !LAMBDA_TYPE_P case
is to avoid error on g++.dg/pr81194.C where the user didn't write
constexpr anywhere and the operator() is compiler generated.

2020-07-31  Jakub Jelinek  <jakub@redhat.com>

PR c++/96182
* decl.c (finish_function): In constexpr functions use for C++14 and
later error instead of warning if no return statement is present and
diagnose it regardless of warn_return_type.  Move the warn_return_type
diagnostics earlier in the function.

* g++.dg/cpp1y/constexpr-96182.C: New test.
* g++.dg/other/error35.C (S<T>::g()): Add return statement.
* g++.dg/cpp1y/pr63996.C (foo): Likewise.
* g++.dg/cpp1y/constexpr-return2.C (f): Likewise.
* g++.dg/cpp1y/var-templ44.C (make_array): Add throw 1.

libstdc++: Fix tests that fail for C++98

libstdc++-v3/ChangeLog:

* testsuite/27_io/basic_istream/ignore/char/94749.cc: Use 0
instead of nullptr.
* testsuite/27_io/basic_istream/ignore/wchar_t/94749.cc:
Likewise.

libstdc++: Fix test that fails for C++98

Local classes have no linkage so cannot be used as template arguments in
C++98.

libstdc++-v3/ChangeLog:

* testsuite/20_util/specialized_algorithms/uninitialized_fill_n/sizes.cc:
Move struct to namespace scope.

libstdc++: Avoid using __float128 in strict modes

libstdc++-v3/ChangeLog:

* testsuite/26_numerics/numbers/float128.cc: Check
__STRICT_ANSI__ before using __float128.
* testsuite/std/concepts/concepts.lang/concept.arithmetic/floating_point.cc:
Likewise.

libstdc++: Ensure c++NN effective-target present in more tests

Add effective-target keywords to tests that would fail for certain
standard modes without the -std=gnu++NN option.

libstdc++-v3/ChangeLog:

* testsuite/18_support/set_terminate.cc: Require C++11 or
higher.
* testsuite/28_regex/simple_c++11.cc: Likewise.
* testsuite/tr1/headers/c++200x/complex.cc: Likewise.
* testsuite/24_iterators/headers/iterator/synopsis.cc:
Require C++14 or lower.

libstdc++: Add dg-require-effective-target to std::span assert tests

The current dg directives say that the tests can run for any standard
mode, but should fail for C++20. What we want is that they only run for
C++20, and are always expected to fail.

libstdc++-v3/ChangeLog:

* testsuite/23_containers/span/back_assert_neg.cc: Split c++2a
effective-target from xfail selector.
* testsuite/23_containers/span/first_2_assert_neg.cc: Likewise.
* testsuite/23_containers/span/first_assert_neg.cc: Likewise.
* testsuite/23_containers/span/front_assert_neg.cc: Likewise.
* testsuite/23_containers/span/index_op_assert_neg.cc: Likewise.
* testsuite/23_containers/span/last_2_assert_neg.cc: Likewise.
* testsuite/23_containers/span/last_assert_neg.cc: Likewise.
* testsuite/23_containers/span/subspan_2_assert_neg.cc:
Likewise.
* testsuite/23_containers/span/subspan_3_assert_neg.cc:
Likewise.
* testsuite/23_containers/span/subspan_4_assert_neg.cc:
Likewise.
* testsuite/23_containers/span/subspan_5_assert_neg.cc:
Likewise.
* testsuite/23_containers/span/subspan_6_assert_neg.cc:
Likewise.
* testsuite/23_containers/span/subspan_assert_neg.cc: Likewise.

libstdc++: Use c++NN_only effective target to tests

Some tests really are only intended for a specific -std mode, so add a
target selector to make that explicit.

Also reorder the dg-do directives to come after the dg-options ones, so
that the target selector in the dg-do directive is applied after the
dg-options that sets the -std option.

libstdc++-v3/ChangeLog:

* testsuite/20_util/reference_wrapper/83427.cc: Adjust
effective-target to specific language mode only.
* testsuite/24_iterators/headers/iterator/range_access_c++11.cc:
Likewise.
* testsuite/24_iterators/headers/iterator/range_access_c++14.cc:
Likewise.
* testsuite/24_iterators/headers/iterator/synopsis_c++11.cc:
Likewise.
* testsuite/24_iterators/headers/iterator/synopsis_c++14.cc:
Likewise.
* testsuite/26_numerics/valarray/69116.cc:
Likewise.
* testsuite/30_threads/headers/condition_variable/std_c++0x_neg.cc:
Remove whitespace at end of file.
* testsuite/30_threads/headers/future/std_c++0x_neg.cc:
Likewise.