tree-ssa-sccvn.c (vn_reference_lookup_3): Improve memset handling.

2018-05-17  Richard Biener  <rguenther@suse.de>

* tree-ssa-sccvn.c (vn_reference_lookup_3): Improve memset handling.

* gcc.dg/tree-ssa/ssa-fre-63.c: New testcase.

From-SVN: r260318

re PR tree-optimization/85793 ([AARCH64] ICE in verify_gimple during GIMPLE pass vect.)

PR tree-optimization/85793
* tree-vect-stmts.c (vectorizable_load): Handle 1 element-wise load
for VMAT_ELEMENTWISE.

gcc/testsuite
* gcc.dg/vect/pr85793.c: New test.

Co-Authored-By: Richard Biener <rguenther@suse.de>
From-SVN: r260317

Gimple FE support for internal functions

This patch gets the gimple FE to parse calls to internal functions.
The only non-obvious thing was how the functions should be written
to avoid clashes with real function names.  One option would be to
go the magic number of underscores route, but we already do that for
built-in functions, and it would be good to keep them visually
distinct.  In the end I borrowed the local/internal label convention
from asm and used:

  x = .SQRT (y);

2018-05-17  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
* internal-fn.h (lookup_internal_fn): Declare
* internal-fn.c (lookup_internal_fn): New function.
* gimple.c (gimple_build_call_from_tree): Handle calls to
internal functions.
* gimple-pretty-print.c (dump_gimple_call): Print "." before
internal function names.
* tree-pretty-print.c (dump_generic_node): Likewise.
* tree-ssa-scopedtables.c (expr_hash_elt::print): Likewise.

gcc/c/
* gimple-parser.c: Include internal-fn.h.
(c_parser_gimple_statement): Treat a leading CPP_DOT as a call.
(c_parser_gimple_call_internal): New function.
(c_parser_gimple_postfix_expression): Use it to handle CPP_DOT.
Fix typos in comment.

gcc/testsuite/
* gcc.dg/gimplefe-28.c: New test.
* gcc.dg/asan/use-after-scope-9.c: Adjust expected output for
internal function calls.
* gcc.dg/goacc/loop-processing-1.c: Likewise.

From-SVN: r260316

Allow gimple_build with internal functions

This patch makes the function versions of gimple_build and
gimple_simplify take combined_fns rather than built_in_codes,
so that they work with internal functions too.  The old
gimple_builds were unused, so no existing callers need
to be updated.

2018-05-17  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
* gimple-fold.h (gimple_build): Make the function forms take
combined_fn rather than built_in_function.
(gimple_simplify): Likewise.
* gimple-match-head.c (gimple_simplify): Likewise.
* gimple-fold.c (gimple_build): Likewise.
* tree-vect-loop.c (get_initial_def_for_reduction): Use gimple_build
rather than gimple_build_call_internal.
(get_initial_defs_for_reduction): Likewise.
(vect_create_epilog_for_reduction): Likewise.
(vectorizable_live_operation): Likewise.

From-SVN: r260315

Fix GNU coding style for G_.

2018-05-17  Martin Liska  <mliska@suse.cz>

* gimple-ssa-sprintf.c (format_directive): Do not use
space in between 'G_' and '('.
2018-05-17  Martin Liska  <mliska@suse.cz>

* c-warn.c (overflow_warning): Do not use
space in between 'G_' and '('.
2018-05-17  Martin Liska  <mliska@suse.cz>

* gcc.dg/plugin/ggcplug.c (plugin_init): Do not use
space in between 'G_' and '('.

From-SVN: r260314

re PR target/85323 (SSE/AVX/AVX512 shift by 0 not optimized away)

PR target/85323
* config/i386/i386.c (ix86_fold_builtin): Handle masked shifts
even if the mask is not all ones.

* gcc.target/i386/pr85323-7.c: New test.
* gcc.target/i386/pr85323-8.c: New test.
* gcc.target/i386/pr85323-9.c: New test.

From-SVN: r260313

re PR target/85323 (SSE/AVX/AVX512 shift by 0 not optimized away)

PR target/85323
* config/i386/i386.c (ix86_fold_builtin): Fold shift builtins by
vector.
(ix86_gimple_fold_builtin): Likewise.

* gcc.target/i386/pr85323-4.c: New test.
* gcc.target/i386/pr85323-5.c: New test.
* gcc.target/i386/pr85323-6.c: New test.

From-SVN: r260312

re PR target/85323 (SSE/AVX/AVX512 shift by 0 not optimized away)

PR target/85323
* config/i386/i386.c: Include tree-vector-builder.h.
(ix86_vector_shift_count): New function.
(ix86_fold_builtin): Fold shift builtins by scalar count.
(ix86_gimple_fold_builtin): Likewise.

* gcc.target/i386/pr85323-1.c: New test.
* gcc.target/i386/pr85323-2.c: New test.
* gcc.target/i386/pr85323-3.c: New test.

From-SVN: r260311

avx512fintrin.h (_mm512_set_epi16, [...]): New intrinsics.

* config/i386/avx512fintrin.h (_mm512_set_epi16, _mm512_set_epi8,
_mm512_setzero): New intrinsics.

* gcc.target/i386/avx512f-set-v32hi-1.c: New test.
* gcc.target/i386/avx512f-set-v32hi-2.c: New test.
* gcc.target/i386/avx512f-set-v32hi-3.c: New test.
* gcc.target/i386/avx512f-set-v32hi-4.c: New test.
* gcc.target/i386/avx512f-set-v32hi-5.c: New test.
* gcc.target/i386/avx512f-set-v64qi-1.c: New test.
* gcc.target/i386/avx512f-set-v64qi-2.c: New test.
* gcc.target/i386/avx512f-set-v64qi-3.c: New test.
* gcc.target/i386/avx512f-set-v64qi-4.c: New test.
* gcc.target/i386/avx512f-set-v64qi-5.c: New test.
* gcc.target/i386/avx512f-setzero-1.c: New test.

From-SVN: r260310

[patch AArch64] Do not perform a vector splat for vector initialisation if it is not useful

In the testcase in this patch we create an SLP vector with only two
elements. Our current vector initialisation code will first duplicate
the first element to both lanes, then overwrite the top lane with a new
value.

This duplication can be clunky and wasteful.

Better would be to simply use the fact that we will always be
overwriting the remaining bits, and simply move the first element to the corrcet
place (implicitly zeroing all other bits).

This reduces the code generation for this case, and can allow more
efficient addressing modes, and other second order benefits for AArch64
code which has been vectorized to V2DI mode.

Note that the change is generic enough to catch the case for any vector
mode, but is expected to be most useful for 2x64-bit vectorization.

Unfortunately, on its own, this would cause failures in
gcc.target/aarch64/load_v2vec_lanes_1.c and
gcc.target/aarch64/store_v2vec_lanes.c , which expect to see many more
vec_merge and vec_duplicate for their simplifications to apply. To fix
this,
add a special case to the AArch64 code if we are loading from two memory
addresses, and use the load_pair_lanes patterns directly.

We also need a new pattern in simplify-rtx.c:simplify_ternary_operation
to catch:

  (vec_merge:OUTER
     (vec_duplicate:OUTER x:INNER)
     (subreg:OUTER y:INNER 0)
     (const_int N))

And simplify it to:

  (vec_concat:OUTER x:INNER y:INNER) or (vec_concat y x)

This is similar to the existing patterns which are tested in this
function, without requiring the second operand to also be a vec_duplicate.

* config/aarch64/aarch64.c (aarch64_expand_vector_init): Modify
code generation for cases where splatting a value is not useful.
* simplify-rtx.c (simplify_ternary_operation): Simplify
vec_merge across a vec_duplicate and a paradoxical subreg forming a vector
mode to a vec_concat.

* gcc.target/aarch64/vect-slp-dup.c: New.

Co-Authored-By: Kyrylo Tkachov <kyrylo.tkachov@arm.com>
From-SVN: r260309

re PR c++/85713 (ICE in dependent_type_p, at cp/pt.c:24582 on valid code)

2018-05-17  Paolo Carlini  <paolo.carlini@oracle.com>

PR c++/85713
* g++.dg/cpp1y/lambda-generic-85713-2.C: New.

From-SVN: r260308

config.gcc: Support "goldmont-plus".

2018-05-17  Olga Makhotina  <olga.makhotina@intel.com>

gcc/

* config.gcc: Support "goldmont-plus".
* config/i386/driver-i386.c (host_detect_local_cpu): Detect
"goldmont-plus".
* config/i386/i386-c.c (ix86_target_macros_internal): Handle
PROCESSOR_GOLDMONT_PLUS.
* config/i386/i386.c (m_GOLDMONT_PLUS): Define.
(processor_target_table): Add "goldmont-plus".
(PTA_GOLDMONT_PLUS): Define.
(ix86_lea_outperforms): Add TARGET_GOLDMONT_PLUS.
(get_builtin_code_for_version): Handle PROCESSOR_GOLDMONT_PLUS.
(fold_builtin_cpu): Add M_INTEL_GOLDMONT_PLUS.
(fold_builtin_cpu): Add "goldmont-plus".
(ix86_add_stmt_cost): Add TARGET_GOLDMONT_PLUS.
(ix86_option_override_internal): Add "goldmont-plus".
* config/i386/i386.h (processor_costs): Define TARGET_GOLDMONT_PLUS.
(processor_type): Add PROCESSOR_GOLDMONT_PLUS.
* config/i386/x86-tune.def: Add m_GOLDMONT_PLUS.
* doc/invoke.texi: Add goldmont-plus as x86 -march=/-mtune= CPU type.

libgcc/

* config/i386/cpuinfo.h (processor_types): Add INTEL_GOLDMONT_PLUS.
* config/i386/cpuinfo.c (get_intel_cpu): Detect Goldmont Plus.

gcc/testsuite/

* gcc.target/i386/builtin_target.c: Test goldmont-plus.
* gcc.target/i386/funcspec-56.inc: Test arch=goldmont-plus.

From-SVN: r260307

re PR tree-optimization/85757 (tree optimizers fail to fully clean up fixed-size memcpy)

2018-05-17  Richard Biener  <rguenther@suse.de>

PR tree-optimization/85757
* tree-ssa-dse.c (dse_classify_store): Record a PHI def and
remove defs that only feed that PHI from further processing.

* gcc.dg/tree-ssa/ssa-dse-34.c: New testcase.

From-SVN: r260306

Daily bump.

From-SVN: r260304

re PR c++/85363 (Throwing exception from member constructor (brace initializer vs initializer list))

PR c++/85363
* call.c (set_flags_from_callee): Handle AGGR_INIT_EXPRs too.
* tree.c (bot_manip): Call set_flags_from_callee for
AGGR_INIT_EXPRs too.

* g++.dg/cpp0x/initlist-throw1.C: New test.
* g++.dg/cpp0x/initlist-throw2.C: New test.

From-SVN: r260300

RISC-V: Minor pattern name cleanup.

gcc/
* config/riscv/riscv.md (<optab>si3_mask, <optab>si3_mask_1): Prepend
asterisk to name.
(<optab>di3_mask, <optab>di3_mask_1): Likewise.

From-SVN: r260299

DWARF: Add header for .debug_str_offsets table for dwarf_version 5.

DWARF5 defines a small header for .debug_str_offsets.  Since we only use
it for split dwarf .dwo files we don't need to keep track of the actual
index offset in an attribute.

gcc/ChangeLog

* dwarf2out.c (count_index_strings): New function.
(output_indirect_strings): Call count_index_strings and generate
header for dwarf_version >= 5.

From-SVN: r260298

DWARF: Emit DWARF5 forms for indirect addresses and string offsets.

We already emit DWARF5 attributes and tables for indirect addresses
and string offsets, but still use GNU forms. Add a new helper function
dwarf_FORM () for emitting the right form.

Currently we only use the uleb128 forms. But DWARF5 also allows
1, 2, 3 and 4 byte forms (DW_FORM_strx[1234] and DW_FORM_addrx[1234])
which might be more space efficient.

gcc/ChangeLog

* dwarf2out.c (dwarf_FORM): New function.
(set_indirect_string): Use dwarf_FORM.
(reset_indirect_string): Likewise.
(size_of_die): Likewise.
(value_format): Likewise.
(output_die): Likewise.
(add_skeleton_AT_string): Likewise.
(output_macinfo_op): Likewise.
(index_string): Likewise.
(output_index_string_offset): Likewise.
(output_index_string): Likewise.

From-SVN: r260297

rs6000.md (prefetch): Generate ISA 2.06 instructions dcbt and dcbtstt with TH=16 if...

gcc/ChangeLog:

2018-05-16  Carl Love  <cel@us.ibm.com>

* config/rs6000/rs6000.md (prefetch): Generate ISA 2.06 instructions
dcbt and dcbtstt with TH=16 if operands[2] is 0 and Power 8 or newer.

From-SVN: r260296

Remove unused function ipa_free_edge_args_substructures

2018-05-16  Martin Jambor  <mjambor@suse.cz>

* ipa-prop.c (ipa_free_all_edge_args): Remove.
* ipa-prop.h (ipa_free_all_edge_args): Likewise.

From-SVN: r260295

vsx-vector-6-be.c: Remove file.

gcc/testsuite/ChangeLog:

2018-05-16 Carl Love  <cel@us.ibm.com>
* gcc.target/powerpc/vsx-vector-6-be.c: Remove file.
* gcc.target/powerpc/vsx-vector-6-be.p7.c: New test file.
* gcc.target/powerpc/vsx-vector-6-be.p8.c: New test file.
* gcc.target/powerpc/vsx-vector-6-le.c (dg-final): Update counts for
xvcmpeqdp., xvcmpgtdp., xvcmpgedp., xxlxor, xvrdpi.

From-SVN: r260294

[AArch64] Improve register allocation of fma

This patch improves register allocation of fma by preferring to update the
accumulator register.  This is done by adding fma insns with operand 1 as the
accumulator.  The register allocator considers copy preferences only in operand
order, so if the first operand is dead, it has the highest chance of being
reused as the destination.  As a result code using fma often has a better
register allocation.  Performance of SPECFP2017 improves by over 0.5% on some
implementations, while it had no effect on other implementations.  Fma is more
readable too, in a simple example we now generate:

fmadd s16, s2, s1, s16
fmadd s7, s17, s16, s7
fmadd s6, s16, s7, s6
fmadd s5, s7, s6, s5

instead of:

fmadd s16, s16, s2, s1
fmadd s7, s7, s16, s6
fmadd s6, s6, s7, s5
fmadd s5, s5, s6, s4

    gcc/
* config/aarch64/aarch64.md (fma<mode>4): Change into expand pattern.
(fnma<mode>4): Likewise.
(fms<mode>4): Likewise.
(fnms<mode>4): Likewise.
(aarch64_fma<mode>4): Rename insn, reorder accumulator operand.
(aarch64_fnma<mode>4): Likewise.
(aarch64_fms<mode>4): Likewise.
(aarch64_fnms<mode>4): Likewise.
(aarch64_fnmadd<mode>4): Likewise.

From-SVN: r260292

* tree.c (warn_deprecated_use): Return bool.  Simplify logic.

From-SVN: r260290

tree-vectorizer.h (struct stmt_info_for_cost): Add where member.

2018-05-16  Richard Biener  <rguenther@suse.de>

* tree-vectorizer.h (struct stmt_info_for_cost): Add where member.
(dump_stmt_cost): Declare.
(add_stmt_cost): Dump cost we add.
(add_stmt_costs): New function.
(vect_model_simple_cost, vect_model_store_cost, vect_model_load_cost):
No longer exported.
(vect_analyze_stmt): Adjust prototype.
(vectorizable_condition): Likewise.
(vectorizable_live_operation): Likewise.
(vectorizable_reduction): Likewise.
(vectorizable_induction): Likewise.
* tree-vect-loop.c (vect_analyze_loop_operations): Create local
cost vector to pass to vectorizable_ and record afterwards.
(vect_model_reduction_cost): Take cost vector argument and adjust.
(vect_model_induction_cost): Likewise.
(vectorizable_reduction): Likewise.
(vectorizable_induction): Likewise.
(vectorizable_live_operation): Likewise.
* tree-vect-slp.c (vect_create_new_slp_node): Initialize
SLP_TREE_NUMBER_OF_VEC_STMTS.
(vect_analyze_slp_cost_1): Remove.
(vect_analyze_slp_cost): Likewise.
(vect_slp_analyze_node_operations): Take visited args and
a target cost vector.  Avoid processing already visited stmt sets.
(vect_slp_analyze_operations): Use a local cost vector to gather
costs and register those of non-discarded instances.
(vect_bb_vectorization_profitable_p): Use add_stmt_costs.
(vect_schedule_slp_instance): Remove copying of
SLP_TREE_NUMBER_OF_VEC_STMTS.  Instead assert that it is not
zero.
* tree-vect-stmts.c (record_stmt_cost): Remove path directly
adding cost.  Record cost entry location.
(vect_prologue_cost_for_slp_op): Function to compute cost of
a constant or invariant generated for SLP vect in the prologue,
split out from vect_analyze_slp_cost_1.
(vect_model_simple_cost): Make static.  Adjust for SLP costing.
(vect_model_promotion_demotion_cost): Likewise.
(vect_model_store_cost): Likewise, make static.
(vect_model_load_cost): Likewise.
(vectorizable_bswap): Add cost vector arg and adjust.
(vectorizable_call): Likewise.
(vectorizable_simd_clone_call): Likewise.
(vectorizable_conversion): Likewise.
(vectorizable_assignment): Likewise.
(vectorizable_shift): Likewise.
(vectorizable_operation): Likewise.
(vectorizable_store): Likewise.
(vectorizable_load): Likewise.
(vectorizable_condition): Likewise.
(vectorizable_comparison): Likewise.
(can_vectorize_live_stmts): Likewise.
(vect_analyze_stmt): Likewise.
(vect_transform_stmt): Adjust calls to vectorizable_*.
* tree-vectorizer.c: Include gimple-pretty-print.h.
(dump_stmt_cost): New function.

From-SVN: r260289

params.def (PARAM_DSE_MAX_ALIAS_QUERIES_PER_STORE): New param.

2018-05-16  Richard Biener  <rguenther@suse.de>

* params.def (PARAM_DSE_MAX_ALIAS_QUERIES_PER_STORE): New param.
* doc/invoke.texi (dse-max-alias-queries-per-store): Document.
* tree-ssa-dse.c: Include tree-ssa-loop.h.
(check_name): New callback.
(dse_classify_store): Track cycles via a visited bitmap of PHI
defs and simplify handling of in-loop and across loop dead stores
and properly fail for loop-variant refs.  Handle byte-tracking with
multiple defs.  Use PARAM_DSE_MAX_ALIAS_QUERIES_PER_STORE for
limiting the walk.

* gcc.dg/tree-ssa/ssa-dse-32.c: New testcase.
* gcc.dg/tree-ssa/ssa-dse-33.c: Likewise.
* gcc.dg/uninit-pr81897-2.c: Use -fno-tree-dse.

From-SVN: r260288

Handle vector boolean types when calculating the SLP unroll factor

The SLP unrolling factor is calculated by finding the smallest
scalar type for each SLP statement and taking the number of required
lanes from the vector versions of those scalar types.  E.g. for an
int32->int64 conversion, it's the vector of int32s rather than the
vector of int64s that determines the unroll factor.

We rely on tree-vect-patterns.c to replace boolean operations like:

   bool a, b, c;
   a = b & c;

with integer operations of whatever the best size is in context.
E.g. if b and c are fed by comparisons of ints, a, b and c will become
the appropriate size for an int comparison.  For most targets this means
that a, b and c will end up as int-sized themselves, but on targets like
SVE and AVX512 with packed vector booleans, they'll instead become a
small bitfield like :1, padded to a byte for memory purposes.
The SLP code would then take these scalar types and try to calculate
the vector type for them, causing the unroll factor to be much higher
than necessary.

This patch tries to make the SLP code use the same approach as the
loop vectorizer, by splitting out the code that calculates the
statement vector type and the vector type that should be used for
the number of units.

2018-05-16  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
* tree-vectorizer.h (vect_get_vector_types_for_stmt): Declare.
(vect_get_mask_type_for_stmt): Likewise.
* tree-vect-slp.c (vect_two_operations_perm_ok_p): New function,
split out from...
(vect_build_slp_tree_1): ...here.  Use vect_get_vector_types_for_stmt
to determine the statement's vector type and the vector type that
should be used for calculating nunits.  Deal with cases in which
the type has to be deferred.
(vect_slp_analyze_node_operations): Use vect_get_vector_types_for_stmt
and vect_get_mask_type_for_stmt to calculate STMT_VINFO_VECTYPE.
* tree-vect-loop.c (vect_determine_vf_for_stmt_1)
(vect_determine_vf_for_stmt): New functions, split out from...
(vect_determine_vectorization_factor): ...here.
* tree-vect-stmts.c (vect_get_vector_types_for_stmt)
(vect_get_mask_type_for_stmt): New functions, split out from
vect_determine_vectorization_factor.

gcc/testsuite/
* gcc.target/aarch64/sve/vcond_10.c: New test.
* gcc.target/aarch64/sve/vcond_10_run.c: Likewise.
* gcc.target/aarch64/sve/vcond_11.c: Likewise.
* gcc.target/aarch64/sve/vcond_11_run.c: Likewise.

From-SVN: r260287

tree-cfg.c (verify_gimple_assign_ternary): Properly verify the [VEC_]COND_EXPR embedded comparison.

2018-05-16  Richard Biener  <rguenther@suse.de>

* tree-cfg.c (verify_gimple_assign_ternary): Properly
verify the [VEC_]COND_EXPR embedded comparison.

From-SVN: r260283

PR tree-optimization/85753 - missing -Wrestrict on memcpy into a member array

gcc/ChangeLog:

PR tree-optimization/85753
* gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref): Handle
RECORD_TYPE in addition to ARRAY_TYPE.

gcc/testsuite/ChangeLog:

PR tree-optimization/85753
* gcc.dg/Wrestrict-10.c: Adjust.
* gcc.dg/Wrestrict-16.c: New test.

From-SVN: r260280

cp-tree.h (cp_expr): Remove copy constructor.

* cp-tree.h (cp_expr): Remove copy constructor.

* mangle.c (struct releasing_vec): Declare copy constructor.

From-SVN: r260279

Daily bump.

From-SVN: r260277

* constexpr.c (cxx_eval_vec_init_1): Pass tf_none if ctx->quiet.

From-SVN: r260273

PR c++/64372 - CWG 1560, gratuitous lvalue-rvalue conversion in ?:

* call.c (build_conditional_expr_1): Don't force_rvalue when one arm
is a throw-expression.

From-SVN: r260272

PR middle-end/85643 - attribute nonstring fails to squash -Wstringop-truncation warning

gcc/ChangeLog:

PR middle-end/85643
* calls.c (get_attr_nonstring_decl): Handle MEM_REF.

gcc/testsuite/ChangeLog:

PR middle-end/85643
* c-c++-common/attr-nonstring-7.c: New test.

From-SVN: r260271

re PR lto/85583 (lto1: internal compiler error: in lto_balanced_map, at lto/lto-partition.c:833)

PR lto/85583
* lto-partition.c (account_reference_p): Do not account
references from aliases; do not account refernces from
external initializers.

From-SVN: r260266

cp-tree.h (DECL_MAYBE_IN_CHARGE_CDTOR_P): New.

2018-05-15  Paolo Carlini  <paolo.carlini@oracle.com>

* cp-tree.h (DECL_MAYBE_IN_CHARGE_CDTOR_P): New.
(FOR_EACH_CLONE): Update.
* decl.c (grokdeclarator): Use it.
* decl2.c (vague_linkage_p): Likewise.
* mangle.c (mangle_decl): Likewise.
* method.c (lazily_declare_fn): Likewise.
* optimize.c (can_alias_cdtor, maybe_clone_body): Likewise.
* repo.c (repo_emit_p): Likewise.
* tree.c (decl_linkage): Likewise.

From-SVN: r260264

PR libstdc++/85749 constrain seed sequences for random number engines

Constrain constructors and member functions of random number engines so
that functions taking seed sequences can only be called with types that
meet the seed sequence requirements.

PR libstdc++/85749
* include/bits/random.h (__detail::__is_seed_seq): New SFINAE helper.
(linear_congruential_engine, mersenne_twister_engine)
(subtract_with_carry_engine, discard_block_engine)
(independent_bits_engine, shuffle_order_engine): Use __is_seed_seq to
constrain function templates taking seed sequences.
* include/bits/random.tcc (linear_congruential_engine::seed(_Sseq&))
(mersenne_twister_engine::seed(_Sseq&))
(subtract_with_carry_engine::seed(_Sseq&)): Change return types to
match declarations.
* include/ext/random (simd_fast_mersenne_twister_engine): Use
__is_seed_seq to constrain function templates taking seed sequences.
* include/ext/random.tcc (simd_fast_mersenne_twister_engine::seed):
Change return type to match declaration.
* testsuite/26_numerics/random/discard_block_engine/cons/seed_seq2.cc:
New.
* testsuite/26_numerics/random/independent_bits_engine/cons/
seed_seq2.cc: New.
* testsuite/26_numerics/random/linear_congruential_engine/cons/
seed_seq2.cc: New.
* testsuite/26_numerics/random/mersenne_twister_engine/cons/
seed_seq2.cc: New.
* testsuite/26_numerics/random/pr60037-neg.cc: Adjust dg-error lineno.
* testsuite/26_numerics/random/shuffle_order_engine/cons/seed_seq2.cc:
New.
* testsuite/26_numerics/random/subtract_with_carry_engine/cons/
seed_seq2.cc: New.
* testsuite/ext/random/simd_fast_mersenne_twister_engine/cons/
seed_seq2.cc: New.

From-SVN: r260263

PR libstdc++/83891 fix path::is_absolute() for non-POSIX targets

The correct definition seems to be has_root_directory() for all systems
we care about.

PR libstdc++/83891
* include/bits/fs_path.h (path::is_absolute()): Use same definition
for all operating systems.
* include/experimental/bits/fs_path.h (path::is_absolute()): Likewise.
* testsuite/27_io/filesystem/path/query/is_absolute.cc: New.
* testsuite/27_io/filesystem/path/query/is_relative.cc: Fix comment.
* testsuite/experimental/filesystem/path/query/is_absolute.cc: New.

From-SVN: r260259

Remove unused headers from tests

* testsuite/27_io/filesystem/path/decompose/extension.cc: Remove
unused <vector> header.
* testsuite/27_io/filesystem/path/query/empty.cc: Likewise.
* testsuite/27_io/filesystem/path/query/has_extension.cc: Likewise.
* testsuite/27_io/filesystem/path/query/has_filename.cc: Likewise.
* testsuite/27_io/filesystem/path/query/has_parent_path.cc: Likewise.
* testsuite/27_io/filesystem/path/query/has_relative_path.cc:
Likewise.
* testsuite/27_io/filesystem/path/query/has_root_directory.cc:
Likewise.
* testsuite/27_io/filesystem/path/query/has_root_name.cc: Likewise.
* testsuite/27_io/filesystem/path/query/has_root_path.cc: Likewise.
* testsuite/27_io/filesystem/path/query/has_stem.cc: Likewise.
* testsuite/27_io/filesystem/path/query/is_relative.cc: Likewise.
* testsuite/experimental/filesystem/path/decompose/extension.cc:
Likewise.
* testsuite/experimental/filesystem/path/query/empty.cc: Likewise.
* testsuite/experimental/filesystem/path/query/has_extension.cc:
Likewise.
* testsuite/experimental/filesystem/path/query/has_filename.cc:
Likewise.
* testsuite/experimental/filesystem/path/query/has_parent_path.cc:
Likewise.
* testsuite/experimental/filesystem/path/query/has_relative_path.cc:
Likewise.
* testsuite/experimental/filesystem/path/query/has_root_directory.cc:
Likewise.
* testsuite/experimental/filesystem/path/query/has_root_name.cc:
Likewise.
* testsuite/experimental/filesystem/path/query/has_root_path.cc:
Likewise.
* testsuite/experimental/filesystem/path/query/has_stem.cc: Likewise.
* testsuite/experimental/filesystem/path/query/is_relative.cc:
Likewise.

From-SVN: r260256

PR libstdc++/84159 fix appending strings to paths

The path::operator/=(const Source&) and path::append overloads were
still following the semantics of the Filesystem TS not C++17. Only
the path::operator/=(const path&) overload was correct.

This change adds more tests for path::operator/=(const path&) and adds
new tests to verify that the other append operations have equivalent
behaviour.

PR libstdc++/84159
* include/bits/fs_path.h (path::operator/=, path::append): Construct
temporary path before calling _M_append.
(path::_M_append): Change parameter to path and implement C++17
semantics.
* testsuite/27_io/filesystem/path/append/path.cc: Add helper function
and more examples from the standard.
* testsuite/27_io/filesystem/path/append/source.cc: New.
* testsuite/27_io/filesystem/path/decompose/filename.cc: Add comment.
* testsuite/27_io/filesystem/path/nonmember/append.cc: New.

From-SVN: r260255

Qualify std::__invoke in <variant> to prevent ADL

* include/std/variant (__gen_vtable_impl::__visit_invoke): Qualify
__invoke to prevent ADL.

From-SVN: r260254

tree-ssa-dse.c (dse_classify_store): Remove use_stmt parameter, add by_clobber_p one.

2018-05-15  Richard Biener  <rguenther@suse.de>

* tree-ssa-dse.c (dse_classify_store): Remove use_stmt parameter,
add by_clobber_p one.  Change algorithm to collect all defs
representing uses we need to walk and try reducing them to
a single one before failing.
(dse_dom_walker::dse_optimize_stmt): Adjust.

* gcc.dg/tree-ssa/ssa-dse-31.c: New testcase.

From-SVN: r260253

DWARF: Use DW_OP_addrx and DW_OP_constx for DWARF5.

For older DWARF and -gsplit-dwarf we want to emit DW_OP_GNU_addr_index
and DW_OP_GNU_const_index, but for DWARF5 we should use DW_OP_addrx
and DW_OP_constx.

gcc/ChangeLog:

* dwarf2out.c (dwarf_OP): Handle DW_OP_addrx and DW_OP_constx.
(size_of_loc_descr): Likewise.
(output_loc_operands): Likewise.
(output_loc_operands_raw): Likewise.
(dw_addr_op): Use dwarf_OP () for DW_OP_constx and DW_OP_addrx.
(resolve_addr_in_expr): Handle DW_OP_addrx and DW_OP_constx.
(hash_loc_operands): Likewise.
(compare_loc_operands): Likewise.

From-SVN: r260252

DWARF calculate the number of indexed addresses.

The length in the .debug_addr unit header was calculated using the number
of elements in the addr_index_table. This is wrong because the entries in
the table are refcounted and only those with a refcount > 0 are actually
put in the index. Add a helper function count_index_addrs to get the
correct number of addresses in the index.

gcc/ChangeLog:

* dwarf2out.c (count_index_addrs): New function.
(dwarf2out_finish): Use count_index_addrs to calculate addrs_length.

From-SVN: r260251

re PR tree-optimization/83648 (missing -Wsuggest-attribute=malloc on a trivial malloc-like function)

2018-05-15  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>

PR tree-optimization/83648
* ipa-pure-const.c (malloc_candidate_p): Allow function with NULL
return value as malloc candidate.

testsuite/
* gcc.dg/tree-ssa/pr83648.c: New test.
* gcc.dg/tree-ssa/pr83648-2.c: Likewise.

From-SVN: r260250

re PR ipa/85734 (--suggest-attribute=malloc misdiagnoses static functions)

2018-05-15  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>

PR ipa/85734
* ipa-pure-const.c (warn_function_malloc): Pass value of known_finite param
as true in call to suggest_attribute.

testsuite/
* gcc.dg/ipa/pr85734.c: New test.

From-SVN: r260249

Daily bump.

From-SVN: r260248

re PR target/85756 (wrong code at -Os on x86-64-linux-gnu in 32-bit mode)

PR target/85756
* gnat.dg/opt70.adb: New test.
* gnat.dg/opt70_pkg.ad[sb]: New helper.

From-SVN: r260239

Handle TYPE_HAS_LATE_RETURN_TYPE like ref-qualifier and eh spec.

* tree.c (build_cp_fntype_variant): New.
(build_ref_qualified_type, build_exception_variant)
(strip_typedefs, cxx_copy_lang_qualifiers): Use it.
(cxx_type_hash_eq, cp_check_qualified_type): Check
TYPE_HAS_LATE_RETURN_TYPE.
(cp_build_type_attribute_variant): Check cxx_type_hash_eq.
(cp_build_qualified_type_real): No need to preserve C++ qualifiers.
* class.c (build_clone): Use cxx_copy_lang_qualifiers.
(adjust_clone_args): Likewise.
* decl.c (grokfndecl): Add late_return_type_p parameter.  Use
build_cp_fntype_variant.
(grokdeclarator): Pass late_return_type_p to grokfndecl.
(check_function_type): Use cxx_copy_lang_qualifiers.
(static_fn_type): Use cxx_copy_lang_qualifiers.
* decl2.c (build_memfn_type, maybe_retrofit_in_chrg)
(cp_reconstruct_complex_type, coerce_new_type, coerce_delete_type)
(change_return_type): Use cxx_copy_lang_qualifiers.
* mangle.c (write_type): Use cxx_copy_lang_qualifiers.
* parser.c (cp_parser_lambda_declarator_opt): Represent an explicit
return type on the declarator like a normal trailing return type.
* pt.c (tsubst_function_type): Use build_cp_fntype_variant.
(copy_default_args_to_explicit_spec): Use cxx_copy_lang_qualifiers.
* typeck.c (merge_types): Use build_cp_fntype_variant.

From-SVN: r260238

rs6000: Fix -mreadonly-in-sdata documentation

For some reason I made both an @item and an @itemx for
-mreadonly-in-sdata.  This fixes it.

* doc/invoke.texi (RS/6000 and PowerPC Options): Delete @itemx for
-mreadonly-in-sdata.

From-SVN: r260237

PR libstdc++/81256 fix exception handling in basic_filebuf::close

PR libstdc++/81256
* include/bits/fstream.tcc (basic_filebuf::close): Do not swallow
exceptions from _M_terminate_output().
* include/std/fstream (basic_filebuf::~basic_filebuf): Swallow any
exceptions from close().
* testsuite/27_io/basic_filebuf/close/81256.cc: New.

From-SVN: r260236

[AArch64] Add combine pattern to fuse AESE/AESMC instructions

When the AESE,AESD and AESMC, AESMC instructions are generated through the appropriate arm_neon.h intrinsics
we really want to keep them together when the AESE feeds into an AESMC and fusion is supported by the target CPU.
We have macro-fusion hooks and scheduling model forwarding paths defined to facilitate that.
It is, however, not always enough.

This patch adds another mechanism for doing that.
When we can detect during combine that the required dependency is exists (AESE -> AESMC, AESD -> AESIMC)
just keep them together with a combine pattern throughout the rest of compilation.
We won't ever want to split them.

The testcases generate 4 AESE(D) instructions in a block followed by 4 AES(I)MC instructions that
consume the corresponding results and it also adds a bunch of computations in-between so that the
AESE and AESMC instructions are not trivially back-to-back, thus exercising the compiler's ability
to bring them together.

With this patch all 4 pairs are fused whereas before a couple of fusions would be missed due to intervening
arithmetic and memory instructions.

* config/aarch64/aarch64-simd.md (*aarch64_crypto_aese_fused):
New pattern.
(aarch64_crypto_aesd_fused): Likewise.

* gcc.target/aarch64/crypto-fuse-1.c: New test.
* gcc.target/aarch64/crypto-fuse-2.c: Likewise.

From-SVN: r260234

Remove remaining uses of * in patterns

Remove the remaining uses of '*' from aarch64.md.
Using '*' in alternatives is typically incorrect as it tells the register
allocator to ignore those alternatives.  Also add a missing '?' so we
prefer a floating point register for same-size int<->fp conversions.

    gcc/
* config/aarch64/aarch64.md (mov<mode>): Remove '*' in alternatives.
(movsi_aarch64): Likewise.
(load_pairsi): Likewise.
(load_pairdi): Likewise.
(store_pairsi): Likewise.
(store_pairdi): Likewise.
(load_pairsf): Likewise.
(load_pairdf): Likewise.
(store_pairsf): Likewise.
(store_pairdf): Likewise.
(zero_extend): Likewise.
(trunc): Swap alternatives.
(fcvt_target): Add '?' to prefer w over r.

    testsuite/
* gcc.target/aarch64/vmov_n_1.c: Update test.
* gcc.target/aarch64/vfp-1.c: Update test.

From-SVN: r260233

* testsuite/ChangeLog: Add missing PR number.

From-SVN: r260232

re PR target/85756 (wrong code at -Os on x86-64-linux-gnu in 32-bit mode)

PR target/85756
* config/i386/i386.md: Disallow non-commutative arithmetics in
last twpeephole for mem {+,-,&,|,^}= x; mem != 0 after cmpelim
optimization.  Use COMMUTATIVE_ARITH_P test rather than != MINUS
in the peephole2 before it.

testsuite/ChangeLog:

* gcc.c-torture/execute/pr85756.c: New test.

From-SVN: r260231

Add __attribute__((malloc) to allocator and remove unused code

* include/bits/valarray_array.h (__valarray_get_memory): Remove.
(__valarray_get_storage): Call operator new directly. Remove ignored
top-level restrict qualifier and add malloc attribute instead.
(_Array<_Tp>::_Array(size_t)): Remove unused constructor.

From-SVN: r260230

PR libstdc++/67554 Do not pass null pointers to memcpy

PR libstdc++/67554
* include/bits/valarray_array.h (_Array_copy_ctor<_Tp, true>)
(_Array_copier<_Tp, true>): Do not pass null pointers to memcpy.

From-SVN: r260229

cp-tree.h (TYPE_REF_P): New.

2018-05-14  Paolo Carlini  <paolo.carlini@oracle.com>

* cp-tree.h (TYPE_REF_P): New.
(TYPE_OBJ_P, TYPE_REF_OBJ_P, TYPE_REFFN_P): Update.
* call.c (build_list_conv, build_aggr_conv, standard_conversion,
direct_reference_binding, reference_binding, implicit_conversion,
add_builtin_candidate, build_user_type_conversion_1, build_op_call_1,
build_new_op_1, build_x_va_arg, conv_binds_ref_to_prvalue,
build_over_call, perform_implicit_conversion_flags,
extend_ref_init_temps, type_has_extended_temps): Use it.
* class.c (one_inheriting_sig, check_field_decls,
check_bases_and_members, find_flexarrays, finish_struct,
fixed_type_or_null): Likewise.
* constexpr.c (literal_type_p, cxx_bind_parameters_in_call,
non_const_var_error, cxx_eval_constant_expression,
potential_constant_expression_1): Likewise.
* cp-gimplify.c (omp_var_to_track, omp_cxx_notice_variable,
cp_genericize_r, cxx_omp_privatize_by_reference,
cxx_omp_const_qual_no_mutable, cxx_omp_finish_clause,
cp_fold_maybe_rvalue): Likewise.
* cp-ubsan.c (cp_ubsan_maybe_instrument_downcast): Likewise.
* cvt.c (build_up_reference, convert_to_reference,
convert_from_reference, convert_to_void, noexcept_conv_p,
fnptr_conv_p): Likewise.
* decl.c (poplevel, check_for_uninitialized_const_var,
check_initializer, initialize_local_var, cp_finish_decl,
get_tuple_decomp_init, cp_finish_decomp, grokdeclarator, copy_fn_p,
move_signature_fn_p, grok_op_properties, finish_function): Likewise.
* decl2.c (grok_array_decl, cp_reconstruct_complex_type,
decl_maybe_constant_var_p): Likewise.
* error.c (dump_type_prefix, dump_expr): Likewise.
* except.c (initialize_handler_parm, complete_ptr_ref_or_void_ptr_p,
is_admissible_throw_operand_or_catch_parameter): Likewise.
* expr.c (mark_use): Likewise.
* init.c (build_zero_init_1, build_value_init_noctor,
perform_member_init, diagnose_uninitialized_cst_or_ref_member_1,
build_new, build_delete): Likewise.
* lambda.c (build_lambda_object): Likewise.
* mangle.c (write_expression, write_template_arg): Likewise.
* method.c (forward_parm, do_build_copy_constructor,
do_build_copy_assign, build_stub_object, constructible_expr,
walk_field_subobs): Likewise.
* parser.c (cp_parser_omp_for_loop_init,
cp_parser_omp_declare_reduction_exprs,
cp_parser_omp_declare_reduction): Likewise.
* pt.c (convert_nontype_argument_function, convert_nontype_argument,
convert_template_argument, tsubst_pack_expansion,
tsubst_function_decl, tsubst_decl, tsubst, tsubst_copy_and_build,
maybe_adjust_types_for_deduction, check_cv_quals_for_unify, unify,
more_specialized_fn, invalid_nontype_parm_type_p, dependent_type_p_r,
value_dependent_expression_p, build_deduction_guide): Likewise.
* semantics.c (finish_handler_parms, finish_non_static_data_member,
finish_compound_literal, omp_privatize_field,
handle_omp_array_sections_1, handle_omp_array_sections,
cp_check_omp_declare_reduction, finish_omp_reduction_clause,
finish_omp_declare_simd_methods, cp_finish_omp_clause_depend_sink,
finish_omp_clauses, finish_decltype_type, capture_decltype,
finish_builtin_launder): Likewise.
* tree.c (lvalue_kind, cp_build_reference_type, move,
cp_build_qualified_type_real, stabilize_expr, stabilize_init): Likewise.
* typeck.c (cxx_safe_arg_type_equiv_p, build_class_member_access_expr,
cp_build_indirect_ref_1, convert_arguments, warn_for_null_address,
cp_build_addr_expr_1, maybe_warn_about_useless_cast,
build_static_cast_1, build_static_cast, build_reinterpret_cast_1,
build_const_cast_1, cp_build_c_cast, cp_build_modify_expr,
convert_for_initialization,
maybe_warn_about_returning_address_of_local, check_return_expr,
cp_type_quals, casts_away_constness, non_reference): Likewise.
* typeck2.c (cxx_readonly_error, store_init_value,
process_init_constructor_record, build_x_arrow, build_functional_cast,
add_exception_specifier): Likewise.

From-SVN: r260228

pt.c (tsubst): Check valid_array_size_p.

* pt.c (tsubst) [ARRAY_TYPE]: Check valid_array_size_p.

(tsubst_copy_and_build) [NEW_EXPR]: Clear in_decl.

gcc/c-family/
* c-common.c (valid_array_size_p): Add complain parameter.
* c-common.h: ...which defaults to true.

From-SVN: r260227

PR libstdc++/82966 fix swapping of node handles

PR libstdc++/82966
* include/bits/node_handle.h (_Node_handle_common::_M_swap): Use value
instead of type.
* testsuite/23_containers/set/modifiers/node_swap.cc: New.

From-SVN: r260226

i386-common.c (OPTION_MASK_ISA_CLDEMOTE_SET, [...]): New defines.

2018-05-14  Sebastian Peryt  <sebastian.peryt@intel.com>

gcc/

        * common/config/i386/i386-common.c (OPTION_MASK_ISA_CLDEMOTE_SET,
        OPTION_MASK_ISA_CLDEMOTE_UNSET): New defines.
        (ix86_handle_option): Handle -mcldemote.
        * config.gcc: New header.
        * config/i386/cldemoteintrin.h: New file.
        * config/i386/cpuid.h (bit_CLDEMOTE): New bit.
        * config/i386/driver-i386.c (host_detect_local_cpu): Detect
        -mcldemote.
        * config/i386/i386-c.c (ix86_target_macros_internal): Handle
        OPTION_MASK_ISA_CLDEMOTE.
        * config/i386/i386.c (ix86_target_string): Add -mcldemote.
        (ix86_valid_target_attribute_inner_p): Ditto.
        (enum ix86_builtins): Add IX86_BUILTIN_CLDEMOTE.
        (ix86_init_mmx_sse_builtins): Define __builtin_ia32_cldemote.
        (ix86_expand_builtin): Expand IX86_BUILTIN_CLDEMOTE.
        * config/i386/i386.h (TARGET_CLDEMOTE, TARGET_CLDEMOTE_P): New.
        * config/i386/i386.md (UNSPECV_CLDEMOTE): New.
        (cldemote): New.
        * config/i386/i386.opt: Add -mcldemote.
        * config/i386/x86intrin.h: New header.
        * doc/invoke.texi: Add -mcldemote.

gcc/testsuite/

        * gcc.target/i386/cldemote-1.c: New test.

From-SVN: r260224

match-and-simplify.texi: Adjust :s documentation.

2018-05-14  Richard Biener  <rguenther@suse.de>

* doc/match-and-simplify.texi: Adjust :s documentation.

From-SVN: r260223

gcc_qsort: avoid oversized memcpy temporaries

* sort.cc (REORDER_23): Pass the type for the temporaries instead of
intended memcpy size.
(REORDER_45): Likewise.

From-SVN: r260222

Daily bump.

From-SVN: r260221

Introduce gcc_qsort

* sort.cc: New file.
* system.h [!CHECKING_P] (qsort): Redirect to gcc_qsort.
* vec.c (qsort_chk): Use gcc_qsort.
* Makefile.in (OBJS-libcommon): Add sort.o.
(build/sort.o): New target.  Use it...
(BUILD_RTL): ... here, and...
(build/gencfn-macros): ... here, and...
(build/genmatch): ... here.

From-SVN: r260216

[NDS32] Implment n15 pipeline.

gcc/
* config.gcc (nds32*-*-*): Check that n15 is valid to --with-cpu.
* config/nds32/nds32-graywolf.md: New file.
* config/nds32/nds32-opts.h (nds32_cpu_type): Add CPU_GRAYWOLF.
* config/nds32/nds32-pipelines-auxiliary.c: Implementation for n15
pipeline.
* config/nds32/nds32-protos.h: More declarations for n15 pipeline.
* config/nds32/nds32-utils.c: More implementations for n15 pipeline.
* config/nds32/nds32.md (pipeline_model): Add graywolf.
* config/nds32/nds32.opt (mcpu): Support n15 pipeline cpus.
* config/nds32/pipelines.md: Include n15 settings.

Co-Authored-By: Chung-Ju Wu <jasonwucj@gmail.com>
From-SVN: r260214

re PR fortran/63529 (Bad error and ICE with Cray Pointers in Modules)

2018-05-13  Steven G. Kargl  <kargl@gcc.gnu.org>

PR fortran/63529
* gfortran.texi: Clarify documentation for Cray pointer and
assumed-sized array.

From-SVN: r260213

[NDS32] Implment n12/n13 pipeline.

gcc/
* config.gcc (nds32*-*-*): Check that n12/n13 are valid to --with-cpu.
* config/nds32/nds32-n13.md: New file.
* config/nds32/nds32-opts.h (nds32_cpu_type): Add CPU_N12 and CPU_N13.
* config/nds32/nds32-pipelines-auxiliary.c: Implementation for n12/n13
pipeline.
* config/nds32/nds32-protos.h: More declarations for n12/n13 pipeline.
* config/nds32/nds32.md (pipeline_model): Add n13.
* config/nds32/nds32.opt (mcpu): Support n12/n13 pipeline cpus.
* config/nds32/pipelines.md: Include n13 settings.

Co-Authored-By: Chung-Ju Wu <jasonwucj@gmail.com>
From-SVN: r260212

re PR fortran/85742 (sizeof allocatable arrays returning wrong value)

2018-05-13  Paul Thomas  <pault@gcc.gnu.org>

PR fortran/85742
* trans-types.c (gfc_get_dtype_rank_type): Reorder evaluation
of 'size'. If the element type is a pointer use the size of the
TREE_TYPE of the type, unless it is VOID_TYPE. In this latter
case, set the size to zero.

2018-05-13  Paul Thomas  <pault@gcc.gnu.org>

PR fortran/85742
* gfortran.dg/assumed_type_9.f90 : New test.

From-SVN: r260211

gfortran.h: Remove prototype.

2018-05-13  Steven G. Kargl  <kargl@gcc.gnu.org>

* gfortran.h: Remove prototype.
* symbol.c (gfc_new_undo_checkpoint): Remove unused function.

From-SVN: r260210

re PR libstdc++/80165 (Constexpr tuple of variant doesn't work)

PR libstdc++/80165
* testsuite/20_util/variant/80165.cc: New.

From-SVN: r260209

[NDS32] Implment n10 pipeline.

gcc/
* config.gcc (nds32*-*-*): Check that n10/d10 are valid to --with-cpu.
* config/nds32/nds32-n10.md: New file.
* config/nds32/nds32-opts.h (nds32_cpu_type): Add CPU_N10.
* config/nds32/nds32-pipelines-auxiliary.c: Implementation for n10
pipeline.
* config/nds32/nds32-protos.h: More declarations for n10 pipeline.
* config/nds32/nds32-utils.c: More implementations for n10 pipeline.
* config/nds32/nds32.md (pipeline_model): Add n10.
* config/nds32/nds32.opt (mcpu): Support n10 pipeline cpus.
* config/nds32/pipelines.md: Include n10 settings.

Co-Authored-By: Chung-Ju Wu <jasonwucj@gmail.com>
From-SVN: r260207

[NDS32] Add DSP extension instructions.

gcc/
* config.gcc (nds32be-*-*): Handle --with-ext-dsp.
* config/nds32/constants.md (unspec_element, unspec_volatile_element):
Add enum values for DSP extension instructions.
* config/nds32/constraints.md (Iu06, IU06, CVp5, CVs5, CVs2, CVhi):
New constraints.
* config/nds32/iterators.md (shifts, shiftrt, sat_plus, all_plus,
sat_minus, all_minus, plus_minus, extend, sumax, sumin, sumin_max):
New code iterators.
(su, zs, uk, opcode, add_rsub, add_sub): New code attributes.
* config/nds32/nds32-dspext.md: New file for DSP implementation.
* config/nds32/nds32-intrinsic.c: Implementation of DSP extension.
* config/nds32/nds32-intrinsic.md: Likewise.
* config/nds32/nds32_intrinsic.h: Likewise.
* config/nds32/nds32-md-auxiliary.c: Likewise.
* config/nds32/nds32-memory-manipulation.c: Consider DSP extension.
* config/nds32/nds32-predicates.c (const_vector_to_hwint): New.
(nds32_valid_CVp5_p, nds32_valid_CVs5_p): New.
(nds32_valid_CVs2_p, nds32_valid_CVhi_p): New.
* config/nds32/nds32-protos.h: New declarations for DSP extension.
* config/nds32/nds32-utils.c (extract_mac_non_acc_rtx): New case
TYPE_DMAC in switch statement.
* config/nds32/nds32.c: New checking and implementation for DSP
extension instructions.
* config/nds32/nds32.h: Likewise.
* config/nds32/nds32.md: Likewise.
* config/nds32/nds32.opt (mhw-abs, mext-dsp): New options.
* config/nds32/predicates.md: Implement new predicates for DSP
extension.

Co-Authored-By: Chung-Ju Wu <jasonwucj@gmail.com>
Co-Authored-By: Kito Cheng <kito.cheng@gmail.com>
From-SVN: r260206

Daily bump.

From-SVN: r260205

Daily bump.

From-SVN: r260194

rs6000.md (mov<mode>_softfloat, FMOVE32): Reformat alternatives and attributes so it is easier to identify which...

2018-05-11  Michael Meissner  <meissner@linux.vnet.ibm.com>

* config/rs6000/rs6000.md (mov<mode>_softfloat, FMOVE32):
Reformat alternatives and attributes so it is easier to identify
which constraints/attributes go with which instruction.
(mov<mode>_hardfloat32, FMOVE64): Likewise.
(mov<mode>_softfloat32, FMOVE64): Likewise.
(mov<mode>_hardfloat64, FMOVE64): Likewise.
(mov<mode>_softfloat64, FMOVE64): Likewise.

From-SVN: r260190

re PR fortran/85542 (ICE in check_inquiry, at fortran/expr.c:2426)

2018-05-11  Steven G. Kargl  <kargl@gcc.gnu.org>

PR fortran/85542
* expr.c (check_inquiry): Avoid NULL pointer dereference.

2018-05-11  Steven G. Kargl  <kargl@gcc.gnu.org>

PR fortran/85542
* gfortran.dg/pr85542.f90: New test.

From-SVN: r260182

...and actually resture the *new* testcase.

From-SVN: r260172

Restore the testcase that was clobbered by the recent PR83140 patches.

* libstdc++-v3/testsuite/tr1/5_numerical_facilities/special_functions
/02_assoc_legendre/check_value.cc

From-SVN: r260168

extend.texi (PowerPC Built-in Functions): Rename this subsection.

gcc/ChangeLog:

2018-05-11  Kelvin Nilsen  <kelvin@gcc.gnu.org>

* doc/extend.texi (PowerPC Built-in Functions): Rename this
subsection.
(Basic PowerPC Built-in Functions): The new name of the
subsection previously known as "PowerPC Built-in Functions".
(Basic PowerPC Built-in Functions Available on all Configurations):
New subsubsection.
(Basic PowerPC Built-in Functions Available on ISA 2.05): Likewise.
(Basic PowerPC Built-in Functions Available on ISA 2.06): Likewise.
(Basic PowerPC Built-in Functions Available on ISA 2.07): Likewise.
(Basic PowerPC Built-in Functions Available on ISA 3.0): Likewise.

From-SVN: r260167

Check is_single_const in intersect_with_plats

2018-05-11  Martin Jambor  <mjambor@suse.cz>

PR ipa/85655
* ipa-cp.c (intersect_with_plats): Check that the lattice contains
single const.

testsuite/
* g++.dg/lto/pr85655_0.C: New test.

From-SVN: r260165

[arm] PR target/85733 Restore be8 linking behaviour for ARMv6-M and products deriving from its capabilities

My patch last year to automate passing the be8 flag to the linker had
a nasty flaw in that I forgot entirely that the ARMv6-M architecture
did not derive its capabilities directly from the ARMv6 capability
list, but was a new group of capabilities (since it needs to leave out
the ARM -- notm -- feature bit).  The feature list defined was thus
missing the be8 bit.  Furthermore, any product derived from that
feature group consequently lacked the be8 feature as well and this
included all ARMv7 and ARMv8 parts.

The fix is embarrassingly simple...

PR target/85733
* config/arm/arm-cpus.in (fgroup ARMv6m): Add be8 feature.

From-SVN: r260162

i386-common.c (OPTION_MASK_ISA_WAITPKG_SET, [...]): New defines.

2018-05-11  Sebastian Peryt  <sebastian.peryt@intel.com>

gcc/

        * common/config/i386/i386-common.c (OPTION_MASK_ISA_WAITPKG_SET,
        OPTION_MASK_ISA_WAITPKG_UNSET): New defines.
        (ix86_handle_option): Handle -mwaitpkg.
        * config.gcc: New header.
        * config/i386/cpuid.h (bit_WAITPKG): New bit.
        * config/i386/driver-i386.c (host_detect_local_cpu): Detect -mwaitpkg.
        * config/i386/i386-builtin-types.def ((UINT8, UNSIGNED, UINT64)): New
        function type.
        * config/i386/i386-c.c (ix86_target_macros_internal): Handle
        OPTION_MASK_ISA_WAITPKG.
        * config/i386/i386.c (ix86_target_string): Add -mwaitpkg.
        (ix86_option_override_internal): Add PTA_WAITPKG.
        (ix86_valid_target_attribute_inner_p): Add -mwaitpkg.
        (enum ix86_builtins): Add IX86_BUILTIN_UMONITOR, IX86_BUILTIN_UMWAIT,
        IX86_BUILTIN_TPAUSE.
        (ix86_init_mmx_sse_builtins): Define __builtin_ia32_umonitor,
        __builtin_ia32_umwait and __builtin_ia32_tpause.
        (ix86_expand_builtin): Expand IX86_BUILTIN_UMONITOR,
        IX86_BUILTIN_UMWAIT, IX86_BUILTIN_TPAUSE.
        * config/i386/i386.h (TARGET_WAITPKG, TARGET_WAITPKG_P): New.
        * config/i386/i386.md (UNSPECV_UMWAIT, UNSPECV_UMONITOR,
        UNSPECV_TPAUSE): New.
        (umwait, umwait_rex64, umonitor_<mode>, tpause, tpause_rex64): New.
        * config/i386/i386.opt: Add -mwaitpkg.
        * config/i386/waitpkgintrin.h: New file.
        * config/i386/x86intrin.h: New header.
        * doc/invoke.texi: Add -mwaitpkg.

gcc/testsuite/

        * gcc.target/i386/tpause-1.c: New test.
        * gcc.target/i386/umonitor-1.c: New test.

From-SVN: r260161

[arm] PR target/85606 prefer armv6s-m for armv6-m parts

When Arm introduced ARMv6-M there were two variants, ARMv6-M and
ARMv6S-M.  The two differed only in support for the SVC instruction.
Later on SVC was then made a mandatory part of ARMv6-M and the
ARMv6S-M name was dropped.  GCC and GAS, however still recognize both
names and at least some versions of GAS still distinguish between the
two.

To address this, this patch changes the architecture for the ARMv6-m
cortex parts (m0, m0plus, m1 and the variants will small multiply
units) to use the ARMv6S-M name in conjunction with the assembler.
This avoids problems with them rejecting code that was previously
accepted with older versions of GCC where we did not pass an explicit
architecture string through to the compiler when using -mcpu on the
command line.

PR target/85606
* config/arm/arm-cpus.in: Add comment that ARMv6-m and ARMv6S-m are now
equivalent.
(cortex-m0): Use armv6s-m isa.
(cortex-m0plus): Likewise.
(cortex-m1): Likewise.
(cortex-m0.small-multiply): Likewise.
(cortex-m0plus.small-multiply): Likewise.
(cortex-m1.small-multiply): Likewise.

From-SVN: r260157

re PR c/85696 (OpenMP with variably modified and default(none) won't compile)

PR c/85696
* c-omp.c (c_omp_predetermined_sharing): Return
OMP_CLAUSE_DEFAULT_SHARED for artificial vars with integral type.

* cp-tree.h (cxx_omp_predetermined_sharing_1): New prototype.
* cp-gimplify.c (cxx_omp_predetermined_sharing): New wrapper around
cxx_omp_predetermined_sharing_1.  Rename old function to ...
(cxx_omp_predetermined_sharing_1): ... this.
* semantics.c (finish_omp_clauses): Use cxx_omp_predetermined_sharing_1
instead of cxx_omp_predetermined_sharing.

* c-c++-common/gomp/pr85696.c: New test.

From-SVN: r260156

re PR tree-optimization/85692 (Two source permute not used for vector initialization)

PR tree-optimization/85692
* tree-ssa-forwprop.c (simplify_vector_constructor): Try two
source permute as well.

* gcc.target/i386/pr85692.c: New test.

Co-Authored-By: Jakub Jelinek <jakub@redhat.com>
From-SVN: r260155

Support LLVM style of no_sanitize attribute (PR sanitizer/85556).

2018-05-11  Martin Liska  <mliska@suse.cz>

        PR sanitizer/85556
* doc/extend.texi: Document LLVM style format for no_sanitize
attribute.
2018-05-11  Martin Liska  <mliska@suse.cz>

        PR sanitizer/85556
* c-attribs.c (handle_no_sanitize_attribute): Iterate all
TREE_LIST values.
2018-05-11  Martin Liska  <mliska@suse.cz>

        PR sanitizer/85556
* c-c++-common/ubsan/attrib-6.c: New test.

From-SVN: r260154

decl.c (cp_finish_decl): Don't instantiate auto variable.

* decl.c (cp_finish_decl): Don't instantiate auto variable.

(check_static_variable_definition): Allow auto.
* constexpr.c (ensure_literal_type_for_constexpr_object): Likewise.

From-SVN: r260150

correct changelog!

2018-05-10  Edward Smith-Rowland  <3dw4rd@verizon.net>

PR libstdc++/83140 - assoc_legendre returns negated value when m is odd
* include/tr1/legendre_function.tcc (__assoc_legendre_p): Add __phase
argument defaulted to +1.  Doxy comments on same.
* testsuite/special_functions/02_assoc_legendre/
check_value.cc: Regen.
* testsuite/tr1/5_numerical_facilities/special_functions/
02_assoc_legendre/check_value.cc: Regen.

From-SVN: r260149

Daily bump.

From-SVN: r260147

re PR fortran/85687 (ICE in gfc_sym_identifier, at fortran/trans-decl.c:351)

2018-05-10  Steven G. Kargl  <kargl@gcc.gnu.org>

PR fortran/85687
* check.c (gfc_check_rank): Check that the argument is a data object.

2018-05-10  Steven G. Kargl  <kargl@gcc.gnu.org>

PR fortran/85687
* gfortran.dg/pr85687.f90: new test.

From-SVN: r260141

rs6000.c (mode_supports_dq_form): Rename mode_supports_vsx_dform_quad to mode_supports_dq_form.

2018-05-10  Michael Meissner  <meissner@linux.vnet.ibm.com>

* config/rs6000/rs6000.c (mode_supports_dq_form): Rename
mode_supports_vsx_dform_quad to mode_supports_dq_form.
(mode_supports_vsx_dform_quad): Likewise.
(mode_supports_vmx_dform): Move these functions to be next to the
other mode_supports functions.
(mode_supports_dq_form): Likewise.
(quad_address_p): Change calls of mode_supports_vsx_dform_quad to
mode_supports_dq_form.
(reg_offset_addressing_ok_p): Likewise.
(offsettable_ok_by_alignment): Likewise.
(rs6000_legitimate_offset_address_p): Likewise.
(legitimate_lo_sum_address_p): Likewise.
(rs6000_legitimize_address): Likewise.
(rs6000_legitimize_reload_address): Likewise.
(rs6000_secondary_reload_inner): Likewise.
(rs6000_preferred_reload_class): Likewise.
(rs6000_output_move_128bit): Likewise.

From-SVN: r260140

re PR fortran/85521 (ICE in gfc_resolve_character_array_constructor, at fortran/array.c:2049)

2018-05-10  Steven G. Kargl  <kargl@gcc.gnu.org>

PR fortran/85521
* array.c (gfc_resolve_character_array_constructor): Substrings
with upper bound smaller than lower bound are zero length strings.

2018-05-10  Steven G. Kargl  <kargl@gcc.gnu.org>

PR fortran/85521
* gfortran.dg/pr85521_1.f90: New test.
* gfortran.dg/pr85521_2.f90: New test.

From-SVN: r260139

re PR fortran/70870 (Segmentation violation in gfc_assign_data_value)

2018-05-10  Steven G. Kargl  <kargl@gcc.gnu.org>

PR fortran/70870
* data.c (gfc_assign_data_value): Check that a data object does
not also have default initialization.

2018-05-10  Steven G. Kargl  <kargl@gcc.gnu.org>

PR fortran/70870
* gfortran.dg/pr70870_1.f90: New test.

From-SVN: r260138

* gcc.target/i386/xgetsetbv.c: Fix whitespace.

From-SVN: r260137

i386.c (ix86_expand_builtin): Generate SImode target register for null target.

* config/i386/i386.c (ix86_expand_builtin) <case IX86_BUILTIN_RDPID>:
Generate SImode target register for null target.
<case IX86_BUILTIN_XGETBV>: Ditto.
<case IX86_BUILTIN_XSETBV>: Optimize LSHIFTRT generation.
* config/i386/xsaveintrin.h (_xgetbv): Add missing return.

testsuite/ChangeLog:

* gcc.target/i386/xgetsetbv.c: Check also variable arguments.

From-SVN: r260135

rs6000.md (prefetch): Generate ISA 2.06 instructions dcbtt and dcbtstt if operands[2] is 0.

gcc/ChangeLog:

2018-05-10  Carl Love  <cel@us.ibm.com>

* config/rs6000/rs6000.md (prefetch): Generate ISA 2.06 instructions
dcbtt and dcbtstt if operands[2] is 0.

From-SVN: r260134

cp-tree.h (DECL_CONSTRUCTOR_P): Use DECL_CXX_CONSTRUCTOR_P.

* cp-tree.h (DECL_CONSTRUCTOR_P): Use DECL_CXX_CONSTRUCTOR_P.

(DECL_DESTRUCTOR_P): Use DECL_CXX_DESTRUCTOR_P.

From-SVN: r260133

Document Dual ABI for std::ios_base::failure

* doc/xml/faq.xml: Link to C++17 status. Add note to outdated answer.
* doc/xml/manual/debug_mode.xml: Add array and forward_list to list
of C++11 containers with Debug Mode support.
* doc/xml/manual/using.xml: Document Dual ABI for ios_base::failure.
* doc/html/*: Regenerate.

From-SVN: r260129

regex_compiler.h (_S_cache_size): Change from function to variable.

* include/bits/regex_compiler.h (_S_cache_size): Change from
function to variable.

From-SVN: r260128

Core issue 2310 - conversion to base of incomplete type.

* class.c (build_base_path): Check COMPLETE_TYPE_P for source type.

From-SVN: r260127