Richard Biener [Thu, 5 Nov 2020 09:16:53 +0000 (10:16 +0100)]
Fix SLP vectorization of stores from boolean vectors
The following fixes SLP vectorization of stores that were
pattern recognized. Since in SLP vectorization pattern analysis
happens after dataref group analysis we have to adjust the groups
with the pattern stmts. This has some effects down the pipeline
and exposes cases where we looked at the wrong pattern/non-pattern
stmts.
2020-11-05 Richard Biener <rguenther@suse.de>
* tree-vect-data-refs.c (vect_slp_analyze_node_dependences):
Use the original stmts.
(vect_slp_analyze_node_alignment): Use the pattern stmt.
* tree-vect-slp.c (vect_fixup_store_groups_with_patterns):
New function.
(vect_slp_analyze_bb_1): Call it.
* gcc.dg/vect/bb-slp-69.c: New testcase.
Tamar Christina [Thu, 5 Nov 2020 11:46:35 +0000 (11:46 +0000)]
middle-end: optimize slp simplify back to back permutes.
This optimizes sequential permutes. i.e. if there are two permutes back to back
this function applies the permute of the parent to the child and removed the
parent.
This relies on the materialization point calculation in optimize SLP.
This allows us to remove useless permutes such as
ldr q0, [x0, x3]
ldr q2, [x1, x3]
trn1 v1.4s, v0.4s, v0.4s
trn2 v0.4s, v0.4s, v0.4s
trn1 v0.4s, v1.4s, v0.4s
mov v1.16b, v3.16b
fcmla v1.4s, v0.4s, v2.4s, #0
fcmla v1.4s, v0.4s, v2.4s, #90
str q1, [x2, x3]
from the sequence the vectorizer puts out and give
ldr q0, [x0, x3]
ldr q2, [x1, x3]
mov v1.16b, v3.16b
fcmla v1.4s, v0.4s, v2.4s, #0
fcmla v1.4s, v0.4s, v2.4s, #90
str q1, [x2, x3]
instead.
gcc/ChangeLog:
* tree-vect-slp.c (vect_slp_tree_permute_noop_p): New.
(vect_optimize_slp): Optimize permutes.
(vectorizable_slp_permutation): Fix typo.
Tamar Christina [Thu, 5 Nov 2020 10:14:17 +0000 (10:14 +0000)]
testsuite: disable vect tests that was accidentally enabled on x86
My previous patch accidentally enabled some tests on x86 because my target
selector foo was weak.. This now properly only runs them on AArch64.
gcc/testsuite/ChangeLog:
* gcc.dg/vect/slp-11b.c: Update testcase.
* gcc.dg/vect/slp-perm-6.c: Update target selector.
Richard Biener [Thu, 5 Nov 2020 08:27:28 +0000 (09:27 +0100)]
debug/97718 - fix abstract origin references after last change
The change to clear the external_die_map slot after creating
the concrete instance DIE broke abstract origin processing which
tried to make sure to have those point to the early abstract instance
and not the concrete instance. The following restores this by
eventually following the abstract origin link in the concrete instance.
2020-11-05 Richard Biener <rguenther@suse.de>
PR debug/97718
* dwarf2out.c (add_abstract_origin_attribute): Make sure to
point to the abstract instance.
Tamar Christina [Thu, 5 Nov 2020 09:02:29 +0000 (09:02 +0000)]
middle-end: Store and use the SLP instance kind when aborting load/store lanes
This patch stores the SLP instance kind in the SLP instance so that we can use
it later when detecting load/store lanes support.
This also changes the load/store lane support check to only check if the SLP
kind is a store. This means that in order for the load/lanes to work all
instances must be of kind store.
gcc/ChangeLog:
* tree-vect-loop.c (vect_analyze_loop_2): Check kind.
* tree-vect-slp.c (vect_build_slp_instance): New.
(enum slp_instance_kind): Move to...
* tree-vectorizer.h (enum slp_instance_kind): .. Here
(SLP_INSTANCE_KIND): New.
Kewen Lin [Thu, 5 Nov 2020 06:04:10 +0000 (00:04 -0600)]
rs6000: Use direct move for char/short vector CTOR [PR96933]
This patch is to make vector CTOR with char/short leverage direct
move instructions when they are available. With one constructed
test case, it can speed up 145% for char and 190% for short on P9.
Tested SPEC2017 x264_r at -Ofast on P9, it gets 1.61% speedup
(but based on unexpected SLP see PR96789).
Bootstrapped/regtested on powerpc64{,le}-linux-gnu P8 and
powerpc64le-linux-gnu P9.
gcc/ChangeLog:
PR target/96933
* config/rs6000/rs6000.c (rs6000_expand_vector_init): Use direct move
instructions for vector construction with char/short types.
* config/rs6000/rs6000.md (p8_mtvsrwz_v16qisi2): New define_insn.
(p8_mtvsrd_v16qidi2): Likewise.
gcc/testsuite/ChangeLog:
PR target/96933
* gcc.target/powerpc/pr96933-1.c: New test.
* gcc.target/powerpc/pr96933-2.c: New test.
* gcc.target/powerpc/pr96933-3.c: New test.
* gcc.target/powerpc/pr96933-4.c: New test.
* gcc.target/powerpc/pr96933.h: New test.
* gcc.target/powerpc/pr96933-run.h: New test.
GCC Administrator [Thu, 5 Nov 2020 00:16:36 +0000 (00:16 +0000)]
Daily bump.
Jonathan Wakely [Wed, 4 Nov 2020 21:44:05 +0000 (21:44 +0000)]
libstdc++: Fix default mode of new basic_stringstream constructor [PR 97719]
libstdc++-v3/ChangeLog:
PR libstdc++/97719
* include/std/sstream (basic_stringstream(string_type&&, openmode)):
Fix default argument.
* testsuite/27_io/basic_stringstream/cons/char/97719.cc: New test.
Tamar Christina [Wed, 4 Nov 2020 22:33:11 +0000 (22:33 +0000)]
middle-end: Move load/store-lanes check till late.
This moves the code that checks for load/store lanes further in the pipeline and
places it after slp_optimize. This would allow us to perform optimizations on
the SLP tree and only bail out if we really have a permute.
With this change it allows us to handle permutes such as {1,1,1,1} which should
be handled by a load and replicate.
This change however makes it all or nothing. Either all instances can be handled
or none at all. This is why some of the test cases have been adjusted.
gcc/ChangeLog:
* tree-vect-slp.c (vect_analyze_slp_instance): Moved load/store lanes
check to ...
* tree-vect-loop.c (vect_analyze_loop_2): ..Here
gcc/testsuite/ChangeLog:
* gcc.dg/vect/slp-11b.c: Update output scan.
* gcc.dg/vect/slp-perm-6.c: Likewise.
Ilya Leoshkevich [Wed, 21 Oct 2020 11:48:07 +0000 (13:48 +0200)]
IBM Z: Unhardcode NR_C_MODES
gcc/ChangeLog:
2020-11-03 Ilya Leoshkevich <iii@linux.ibm.com>
* config/s390/s390.c (NR_C_MODES): Unhardcode.
(s390_alloc_pool): Use size_t for iterating from 0 to
NR_C_MODES.
(s390_add_constant): Likewise.
(s390_find_constant): Likewise.
(s390_dump_pool): Likewise.
(s390_free_pool): Likewise.
Ilya Leoshkevich [Wed, 21 Oct 2020 11:46:04 +0000 (13:46 +0200)]
IBM Z: Remove unused RRe and RXe mode_attrs
gcc/ChangeLog:
2020-11-03 Ilya Leoshkevich <iii@linux.ibm.com>
* config/s390/s390.md (RRe): Remove.
(RXe): Remove.
Ian Lance Taylor [Wed, 4 Nov 2020 20:02:31 +0000 (12:02 -0800)]
go: disable -fipa-icf-functions by default in Go frontend
Go programs expect to be able to get reliable backtrace information
with correct file/line information, but -fipa-icf-functions breaks
that because it merges together distinct functions which should have
distinct file/line info.
* go-lang.c (go_langhook_post_options): Disable
-fipa-icf-functions if it was not explicitly enabled.
Andrew MacLeod [Wed, 4 Nov 2020 17:59:15 +0000 (12:59 -0500)]
Add Ranger temporal cache
Add a timestamp to supplement the global range cache to detect when a value
may become stale.
gcc/
PR tree-optimization/97515
* gimple-range-cache.h (class ranger_cache): New prototypes plus
temporal cache pointer.
* gimple-range-cache.cc (struct range_timestamp): New.
(class temporal_cache): New.
(temporal_cache::temporal_cache): New.
(temporal_cache::~temporal_cache): New.
(temporal_cache::get_timestamp): New.
(temporal_cache::set_dependency): New.
(temporal_cache::temporal_value): New.
(temporal_cache::current_p): New.
(temporal_cache::set_timestamp): New.
(temporal_cache::set_always_current): New.
(ranger_cache::ranger_cache): Allocate the temporal cache.
(ranger_cache::~ranger_cache): Free temporal cache.
(ranger_cache::get_non_stale_global_range): New.
(ranger_cache::set_global_range): Add a timestamp.
(ranger_cache::register_dependency): New. Add timestamp dependency.
* gimple-range.cc (gimple_ranger::range_of_range_op): Add operand
dependencies.
(gimple_ranger::range_of_phi): Ditto.
(gimple_ranger::range_of_stmt): Check if global range is stale, and
recalculate if so.
gcc/testsuite/
* gcc.dg/pr97515.c: Check listing for folding of entire function.
Jonathan Wakely [Wed, 4 Nov 2020 15:24:47 +0000 (15:24 +0000)]
libstdc++: Fix test failure with --disable-linux-futex
As noted in PR 96817 this new test fails if the library is built without
futexes. That's expected of course, but we might as well fail more
obviously than a deadlock that eventually times out.
libstdc++-v3/ChangeLog:
* testsuite/18_support/96817.cc: Fail fail if the library is
configured to not use futexes.
Jonathan Wakely [Wed, 4 Nov 2020 13:36:32 +0000 (13:36 +0000)]
libstdc++: Define new C++17 std::search overload for Parallel Mode [PR 94971]
libstdc++-v3/ChangeLog:
PR libstdc++/94971
* include/bits/stl_algo.h (search(FIter, FIter, const Searcher):
Adjust #if condition.
* include/parallel/algo.h (search(FIter, FIter, const Searcher&):
Define new overload for C++17.
Tobias Burnus [Wed, 4 Nov 2020 13:31:34 +0000 (14:31 +0100)]
targhooks.c: Fix -fzero-call-used-regs 'sorry' typo
gcc/ChangeLog:
* targhooks.c (default_zero_call_used_regs): Fix flag-name typo
in sorry.
Jonathan Wakely [Wed, 4 Nov 2020 12:45:32 +0000 (12:45 +0000)]
libstdc++: Document istreambuf_iterator base class change [PR 92285]
libstdc++-v3/ChangeLog:
PR libstdc++/92285
* doc/xml/manual/evolution.xml: Document change to base class.
* doc/html/manual/api.html: Regenerate.
Richard Biener [Wed, 4 Nov 2020 10:37:52 +0000 (11:37 +0100)]
add costing to SLP vectorized PHIs
I forgot to cost vectorized PHIs. Scalar PHIs are just costed
as scalar_stmt so the following costs vector PHIs as vector_stmt.
2020-11-04 Richard Biener <rguenther@suse.de>
* tree-vectorizer.h (vectorizable_phi): Adjust prototype.
* tree-vect-stmts.c (vect_transform_stmt): Adjust.
(vect_analyze_stmt): Pass cost_vec to vectorizable_phi.
* tree-vect-loop.c (vectorizable_phi): Do costing.
Richard Biener [Wed, 4 Nov 2020 10:20:17 +0000 (11:20 +0100)]
tree-optimization/97709 - set abnormal flag when vectorizing live lanes
This properly sets the abnormal flag when vectorizing live lanes
when the original scalar was live across an abnormal edge.
2020-11-04 Richard Biener <rguenther@suse.de>
PR tree-optimization/97709
* tree-vect-loop.c (vectorizable_live_operation): Set
SSA_NAME_OCCURS_IN_ABNORMAL_PHI when necessary.
* gcc.dg/vect/bb-slp-pr97709.c: New testcase.
Jakub Jelinek [Wed, 4 Nov 2020 10:55:29 +0000 (11:55 +0100)]
phiopt: Optimize x ? 1024 : 0 to (int) x << 10 [PR97690]
The following patch generalizes the x ? 1 : 0 -> (int) x optimization
to handle also left shifts by constant.
During x86_64-linux and i686-linux bootstraps + regtests it triggered
in 1514 unique non-LTO -m64 cases (sort -u on log mentioning
filename, function name and shift count) and 1866 -m32 cases.
Unfortunately, the patch regresses (before the tests have been adjusted):
+FAIL: gcc.dg/tree-ssa/ssa-ccp-11.c scan-tree-dump-times optimized "if " 0
+FAIL: gcc.dg/vect/bb-slp-pattern-2.c -flto -ffat-lto-objects scan-tree-dump-times slp1 "optimized: basic block" 1
+FAIL: gcc.dg/vect/bb-slp-pattern-2.c scan-tree-dump-times slp1 "optimized: basic block" 1
and in both cases it actually results in worse code.
> > We'd need some optimization that would go through all PHI edges and
> > compute if some use of the phi results don't actually compute a constant
> > across all the PHI edges - 1 & 0 and 0 & 1 is always 0.
> PRE should do this, IMHO only optimizing it at -O2 is fine.
> > Similarly, in the slp vectorization test there is:
> > a[0] = b[0] ? 1 : 7;
> note this, carefully avoiding the already "optimized" b[0] ? 1 : 0 ...
> So the option is to put : 7 in the 2, 4 an 8 case as well. The testcase
> wasn't added for any real-world case but is artificial I guess for
> COND_EXPR handling of invariants.
> But yeah, for things like SLP it means we eventually have to
> implement reverse transforms for all of this to make the lanes
> matching. But that's true anyway for things like x + 1 vs. x + 0
> or x / 3 vs. x / 2 or other simplifications we do.
2020-11-04 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/97690
* tree-ssa-phiopt.c (conditional_replacement): Also optimize
cond ? pow2p_cst : 0 as ((type) cond) << cst.
* gcc.dg/tree-ssa/phi-opt-22.c: New test.
* gcc.dg/tree-ssa/ssa-ccp-11.c: Use -O2 instead of -O1.
* gcc.dg/vect/bb-slp-pattern-2.c (foo): Use ? 2 : 7, ? 4 : 7 and
? 8 : 7 instead of ? 2 : 0, ? 4 : 0, ? 8 : 0.
Jonathan Wakely [Wed, 4 Nov 2020 10:36:45 +0000 (10:36 +0000)]
libstdc++: Fix constant expressions in std::uniform_int_distribution
Clang and EDG say the class member access expressions __urng.min() and
__urng.max() are not constant expressions, because the object expression
__urng is not usable in a constant expresion. Use a qualified-id to call
those static member functions instead.
Co-authored-by: Stephan Bergmann <sbergman@redhat.com>
libstdc++-v3/ChangeLog:
* include/bits/uniform_int_dist.h (uniform_int_distribution::_S_nd):
Use qualified-id to refer to static member functions.
Martin Liska [Wed, 4 Nov 2020 09:57:28 +0000 (10:57 +0100)]
gcc-changelog: Change parse_git_revisions strict argument to True.
Change the default that is used by GIT server hook and also
by git_update_version.py. Both should use True now.
contrib/ChangeLog:
* gcc-changelog/git_repository.py: Set strict=True
for parse_git_revisions as a default.
Richard Biener [Wed, 4 Nov 2020 08:41:48 +0000 (09:41 +0100)]
Re-instantiate SLP induction IV CSE
This re-instantiates the previously removed CSE, fixing the
FAIL of gcc.dg/vect/costmodel/x86_64/costmodel-pr30843.c
It turns out the previous approach still works.
2020-11-04 Richard Biener <rguenther@suse.de>
* tree-vect-loop.c (vectorizable_induction): Re-instantiate
previously removed CSE of SLP IVs.
Christophe Lyon [Wed, 4 Nov 2020 09:33:42 +0000 (09:33 +0000)]
testsuite: fix arm/pure-code/no-literal-pool-* tests
Add -mfloat-abi=soft and skip the tests if -mfloat-abi=hard is
supplied.
This avoids failures when testing with overridden flags such as
mthumb/-mcpu=cortex-m4/-mfloat-abi=hard
2020-11-04 Christophe Lyon <christophe.lyon@linaro.org>
gcc/testsuite/
* gcc.target/arm/pure-code/no-literal-pool-m0.c: Add dg-skip-if
and -mfloat-abi=soft option.
* gcc.target/arm/pure-code/no-literal-pool-m23.c: Likewise.
Tobias Burnus [Wed, 4 Nov 2020 09:35:54 +0000 (10:35 +0100)]
gcc-changelog/git_commit.py: Check for missing description
Especially when using mklog.py, it is simply to forget to fill in
the entries after the '\t* file.c (section):' or '\t(section):'.
contrib/ChangeLog:
* gcc-changelog/git_commit.py (item_parenthesis_empty_regex,
item_parenthesis_regex): Add.
(check_for_empty_description): Use them.
* gcc-changelog/test_email.py (test_emptry_entry_desc,
test_emptry_entry_desc_2): Add.
* gcc-changelog/test_patches.txt: Add two testcases for it.
Uros Bizjak [Wed, 4 Nov 2020 08:59:39 +0000 (09:59 +0100)]
i386: Fix Intel MCU psABI comment w.r.t DEFAULT_PCC_STRUCT_RETURN
2020-11-04 Uroš Bizjak <ubizjak@gmail.com>
gcc/
* config/i386/i386-options.c (ix86_recompute_optlev_based_flags):
Fix Intel MCU psABI comment w.r.t DEFAULT_PCC_STRUCT_RETURN.
Jakub Jelinek [Wed, 4 Nov 2020 08:37:22 +0000 (09:37 +0100)]
openmp: allocate clause vs. *reduction array sections [PR97670]
This patch finds the base expression of reduction array sections and uses it
in checks whether allocate clause lists only variables that have been privatized.
Also fixes a pasto that caused an ICE.
2020-11-04 Jakub Jelinek <jakub@redhat.com>
PR c++/97670
gcc/c-family/
* c-omp.c (c_omp_split_clauses): Look through array reductions to find
underlying decl to clear in the allocate_head bitmap.
gcc/c/
* c-typeck.c (c_finish_omp_clauses): Look through array reductions to
find underlying decl to clear in the aligned_head bitmap.
gcc/cp/
* semantics.c (finish_omp_clauses): Look through array reductions to
find underlying decl to clear in the aligned_head bitmap. Use
DECL_UID (t) instead of DECL_UID (OMP_CLAUSE_DECL (c)) when clearing
in the bitmap. Only diagnose errors about allocate vars not being
privatized on the same construct on allocate clause if it has
a DECL_P OMP_CLAUSE_DECL.
gcc/testsuite/
* c-c++-common/gomp/allocate-4.c: New test.
* g++.dg/gomp/allocate-2.C: New test.
* g++.dg/gomp/allocate-3.C: New test.
Martin Liska [Wed, 4 Nov 2020 08:42:27 +0000 (09:42 +0100)]
Fix duplicate ChangeLog entries.
Richard Biener [Wed, 4 Nov 2020 08:36:05 +0000 (09:36 +0100)]
bootstrap/97666 - really fix sizeof (bool) issue
Pastoed the previous fix too quickly, the following fixes the
correct spot - the memset, not the allocation.
2020-11-04 Richard Biener <rguenther@suse.de>
PR bootstrap/97666
* tree-vect-slp.c (vect_build_slp_tree_2): Revert previous
fix and instead adjust the memset.
Pat Bernardi [Wed, 4 Nov 2020 08:12:13 +0000 (09:12 +0100)]
i386: Cleanup i386/i386elf.h and align it's return convention with the SVR4 ABI
While i386elf.h was originally derived from sysv4.h it has not been kept
up to date with the development of the compiler. Two changes are made:
* The return convention now follows the i386 and x86_64 SVR4 ABIs again.
* The more efficient default version of ASM_OUTPUT_ASCII in elfos.h is used.
2020-11-04 Pat Bernardi <bernardi@adacore.com>
gcc/ChangeLog
* config/i386/i386elf.h (SUBTARGET_RETURN_IN_MEMORY): Remove.
(ASM_OUTPUT_ASCII): Likewise.
(DEFAULT_PCC_STRUCT_RETURN): Define.
* config/i386/i386.c (ix86_return_in_memory): Remove
SUBTARGET_RETURN_IN_MEMORY.
Iain Sandoe [Sat, 31 Oct 2020 09:25:47 +0000 (09:25 +0000)]
Objective-C++ : Fix ICE in potential_constant_expression_1.
We cannot, as things stand, handle Objective-C tree codes in
the switch and deal with this by calling out to a function that
has a dummy version when Objective-C is not enabled.
Because of the way the logic works (with a fall through to a
'sorry' in case of unhandled expressions), the function reports
cases that are known to be unsuitable for constant exprs. The
dummy function always reports 'false' and thus will fall through
to the 'sorry'.
gcc/c-family/ChangeLog:
* c-objc.h (objc_non_constant_expr_p): New.
* stub-objc.c (objc_non_constant_expr_p): New.
gcc/cp/ChangeLog:
* constexpr.c (potential_constant_expression_1): Handle
expressions known to be non-constant for Objective-C.
gcc/objc/ChangeLog:
* objc-act.c (objc_non_constant_expr_p): New.
Joseph Myers [Wed, 4 Nov 2020 06:48:46 +0000 (06:48 +0000)]
c: Implement C2x nodiscard attribute
C2x adds the nodiscard standard attribute, with an optional string
argument, as in C++; implement it for C.
Bootstrapped with no regressions for x86_64-pc-linux-gnu.
gcc/c/
2020-11-04 Joseph Myers <joseph@codesourcery.com>
* c-decl.c (handle_nodiscard_attribute): New.
(std_attribute_table): Add nodiscard.
* c-parser.c (c_parser_std_attribute): Expect argument to
nodiscard attribute to be a string. Do not special-case ignoring
nodiscard.
* c-typeck.c (maybe_warn_nodiscard): New.
(build_compound_expr, emit_side_effect_warnings): Call
maybe_warn_nodiscard.
(c_process_expr_stmt, c_finish_stmt_expr): Also call
emit_side_effect_warnings if warn_unused_result.
gcc/testsuite/
2020-11-04 Joseph Myers <joseph@codesourcery.com>
* gcc.dg/c2x-attr-nodiscard-1.c, gcc.dg/c2x-attr-nodiscard-2.c,
gcc.dg/c2x-attr-nodiscard-3.c, gcc.dg/c2x-attr-nodiscard-4.c: New
tests.
* gcc.dg/c2x-attr-syntax-5.c: Remove nodiscard test.
liuhongt [Mon, 26 Oct 2020 12:46:42 +0000 (20:46 +0800)]
Don't extract memory from operand for normal memory constraint.
gcc/ChangeLog
PR target/97540
* ira.c: (ira_setup_alts): Extract memory from operand only
for special memory constraint.
* recog.c (asm_operand_ok): Ditto.
* lra-constraints.c (process_alt_operands): MEM_P is
required for normal memory constraint.
gcc/testsuite/ChangeLog
* gcc.target/i386/pr97540.c: New test.
liuhongt [Mon, 26 Oct 2020 12:45:23 +0000 (20:45 +0800)]
Fix invalid address for special_memory_constraint.
gcc/ChangeLog
PR target/97532
* lra-constraints.c (valid_address_p): Handle operand of
special memory constraint.
(process_address_1): Ditto.
GCC Administrator [Wed, 4 Nov 2020 00:16:41 +0000 (00:16 +0000)]
Daily bump.
Jan Hubicka [Tue, 3 Nov 2020 23:21:40 +0000 (00:21 +0100)]
Add testcase for pr97695
* gcc.c-torture/execute/pr97695.c: New test.
Jan Hubicka [Tue, 3 Nov 2020 23:19:59 +0000 (00:19 +0100)]
Fix copying of clone_info while reshaping clone tree.
2020-11-04 Jan Hubicka <hubicka@ucw.cz>
PR ipa/97695
* cgraph.c (cgraph_edge::redirect_call_stmt_to_callee): Fix ICE with
in dumping code.
(cgraph_node::remove): Save clone info before releasing it and pass it
to unregister.
* cgraph.h (symtab_node::unregister): Add clone_info parameter.
(cgraph_clone::unregister): Likewise.
* cgraphclones.c (cgraph_node::find_replacement): Copy clone info
* symtab-clones.cc (clone_infos_t::duplicate): Remove.
(clone_info::get_create): Simplify.
* symtab.c (symtab_node::unregister): Pass around clone info.
* varpool.c (varpool_node::remove): Update.
Jason Merrill [Thu, 29 Oct 2020 20:50:57 +0000 (16:50 -0400)]
c++: Not all character types are byte-access types.
The patch for 94923 that introduced is_byte_access_type wrongly changed
build_cplus_array_type to treat even arrays of char16_t as typeless storage,
which is wrong; only arrays of char and unsigned char have the special alias
semantics in C++.
G++ used to treat signed char the same way, as C does, but C++ has always
omitted it.
gcc/cp/ChangeLog:
* tree.c (is_byte_access_type): Don't use char_type_p.
gcc/testsuite/ChangeLog:
* g++.dg/Wclass-memaccess.C: Check that signed char and
char16_t aren't treated as byte-access types.
Jonathan Wakely [Tue, 3 Nov 2020 21:56:44 +0000 (21:56 +0000)]
libstdc++: Ensure std::lock_guard is declared
libstdc++-v3/ChangeLog:
* include/std/syncstream: Include <bits/std_mutex.h>
unconditionally.
Thomas Schwinge [Tue, 3 Nov 2020 21:06:29 +0000 (22:06 +0100)]
[OpenACC] Use proper location to 'inform' of enclosing parent compute construct
Bug fix for recent commit
beddd1762ad2bbe84dd776c54489153f83f21e56 "[OpenACC]
More precise diagnostics for 'gang', 'worker', 'vector' clauses with arguments
on 'loop' only allowed in 'kernels' regions":
> [...], and 'inform' at the location of the enclosing parent
> compute construct/[...].
Now really.
gcc/
* omp-low.c (scan_omp_for) <OpenACC>: Use proper location to
'inform' of enclosing parent compute construct.
gcc/testsuite/
* c-c++-common/goacc/pr92793-1.c: Extend.
* gfortran.dg/goacc/pr92793-1.f90: Likewise.
François Dumont [Sat, 31 Oct 2020 16:46:56 +0000 (17:46 +0100)]
libstdc++: Add mising gnu-versioned-namespace symbols
libstdc++-v3/ChangeLog:
* config/abi/pre/gnu-versioned-namespace.ver:
Add __istream_extract and _Safe_local_iterator_base::_M_attach_single
symbols.
Jakub Jelinek [Tue, 3 Nov 2020 20:42:51 +0000 (21:42 +0100)]
c++: Don't try to parse a function declaration as deduction guide [PR97663]
While these function declarations have NULL decl_specifiers->type,
they have still type specifiers specified from which the default int
in the return type is added, so we shouldn't try to parse those as
deduction guides.
2020-11-03 Jakub Jelinek <jakub@redhat.com>
PR c++/97663
* parser.c (cp_parser_init_declarator): Don't try to parse
C++17 deduction guides if there are any type specifiers even when
type is NULL.
* g++.dg/cpp1z/class-deduction75.C: New test.
Jonathan Wakely [Tue, 3 Nov 2020 19:42:07 +0000 (19:42 +0000)]
libstdc++: Refactor std::call_once internals
This separates the definition of std::__call_proxy into two funcions,
one for TLS and one for non-TLS, to make them easier to read. It also
replaces the __get_once_functor_lock_ptr() internal helper with a new
set_lock_ptr(unique_lock<mutex>*) function so that __once_proxy doesn't
need to call it twice.
libstdc++-v3/ChangeLog:
* src/c++11/mutex.cc [_GLIBCXX_HAVE_TLS] (__once_proxy): Define
separately for TLS targets.
[!_GLIBCXX_HAVE_TLS] (__get_once_functor_lock_ptr): Replace with ...
(set_lock_ptr): ... this. Set new value and return previous
value.
[!_GLIBCXX_HAVE_TLS] (__set_once_functor_lock_ptr): Adjust to
use set_lock_ptr.
[!_GLIBCXX_HAVE_TLS] (__once_proxy): Likewise.
kamlesh kumar [Mon, 2 Nov 2020 15:10:21 +0000 (20:40 +0530)]
c++: DR2303, ambiguous base deduction [PR97453]
When there are two possible matches and one is a base of the other, choose
the derived class rather than fail.
gcc/cp/ChangeLog
2020-10-21 Kamlesh Kumar <kamleshbhalui@gmail.com>
Jason Merrill <jason@redhat.com>
PR c++/97453
DR2303
* pt.c (get_template_base): Consider closest base in template
deduction when base of base also matches.
gcc/testsuite/ChangeLog
2020-10-21 Kamlesh Kumar <kamleshbhalui@gmail.com>
* g++.dg/DRs/dr2303.C: New test.
Jan Hubicka [Tue, 3 Nov 2020 19:31:23 +0000 (20:31 +0100)]
Add missing non-NULL check in cgraphclones
2020-11-03 Jan Hubicka <hubicka@ucw.cz>
PR ipa/97698
* cgraphclones.c (duplicate_thunk_for_node): Check that info is
non-NULL.
Jonathan Wakely [Tue, 3 Nov 2020 18:44:32 +0000 (18:44 +0000)]
libstdc++: Rewrite std::call_once to use futexes [PR 66146]
The current implementation of std::call_once uses pthread_once, which
only meets the C++ requirements when compiled with support for
exceptions. For most glibc targets and all non-glibc targets,
pthread_once does not work correctly if the init_routine exits via an
exception. The pthread_once_t object is left in the "active" state, and
any later attempts to run another init_routine will block forever.
This change makes std::call_once work correctly for Linux targets, by
replacing the use of pthread_once with a futex, based on the code from
__cxa_guard_acquire. For both glibc and musl, the Linux implementation
of pthread_once is already based on futexes, and pthread_once_t is just
a typedef for int, so this change does not alter the layout of
std::once_flag. By choosing the values for the int appropriately, the
new code is even ABI compatible. Code that calls the old implementation
of std::call_once will use pthread_once to manipulate the int, while new
code will use the new std::once_flag members to manipulate it, but they
should interoperate correctly. In both cases, the int is initially zero,
has the lowest bit set when there is an active execution, and equals 2
after a successful returning execution. The difference with the new code
is that exceptional exceptions are correctly detected and the int is
reset to zero.
The __cxa_guard_acquire code (and musl's pthread_once) use an additional
state to say there are other threads waiting. This allows the futex wake
syscall to be skipped if there is no contention. Glibc doesn't use a
waiter bit, so we have to unconditionally issue the wake in order to be
compatible with code calling the old std::call_once that uses Glibc's
pthread_once. If we know that we're using musl (and musl's pthread_once
doesn't change) it would be possible to set a waiting state and check
for it in std::once_flag::_M_finish(bool), but this patch doesn't do
that.
This doesn't fix the bug for non-linux targets. A similar approach could
be used for targets where we know the definition of pthread_once_t is a
mutex and an integer. We could make once_flag._M_activate() use
pthread_mutex_lock on the mutex member within the pthread_once_t, and
then only set the integer if the execution finishes, and then unlock the
mutex. That would require careful study of each target's pthread_once
implementation and that work is left for a later date.
This also fixes PR 55394 because pthread_once is no longer needed, and
PR 84323 because the fast path is now just an atomic load.
As a consequence of the new implementation that doesn't use
pthread_once, we can also make std::call_once work for targets with no
gthreads support. The code for the single-threaded implementation
follows the same methods as on Linux, but with no need for atomics or
futexes.
libstdc++-v3/ChangeLog:
PR libstdc++/55394
PR libstdc++/66146
PR libstdc++/84323
* config/abi/pre/gnu.ver (GLIBCXX_3.4.29): Add new symbols.
* include/std/mutex [!_GLIBCXX_HAS_GTHREADS] (once_flag): Define
even when gthreads is not supported.
(once_flag::_M_once) [_GLIBCXX_HAVE_LINUX_FUTEX]: Change type
from __gthread_once_t to int.
(once_flag::_M_passive(), once_flag::_M_activate())
(once_flag::_M_finish(bool), once_flag::_Active_execution):
Define new members for futex and non-threaded implementation.
[_GLIBCXX_HAS_GTHREADS] (once_flag::_Prepare_execution): New
RAII helper type.
(call_once): Use new members of once_flag.
* src/c++11/mutex.cc (std::once_flag::_M_activate): Define.
(std::once_flag::_M_finish): Define.
* testsuite/30_threads/call_once/39909.cc: Do not require
gthreads.
* testsuite/30_threads/call_once/49668.cc: Likewise.
* testsuite/30_threads/call_once/60497.cc: Likewise.
* testsuite/30_threads/call_once/call_once1.cc: Likewise.
* testsuite/30_threads/call_once/dr2442.cc: Likewise.
* testsuite/30_threads/call_once/once_flag.cc: Add test for
constexpr constructor.
* testsuite/30_threads/call_once/66146.cc: New test.
* testsuite/30_threads/call_once/constexpr.cc: Removed.
* testsuite/30_threads/once_flag/cons/constexpr.cc: Removed.
Nathan Sidwell [Tue, 3 Nov 2020 18:21:20 +0000 (10:21 -0800)]
c++: using-decl instantiation
In streaming using decls I needed to check some assumptions. This
adds those checks to the instantiation machinery.
gcc/cp/
* pt.c (tsubst_expr): Simplify using decl instantiation, add
asserts.
Nathan Sidwell [Tue, 3 Nov 2020 18:15:54 +0000 (10:15 -0800)]
c++: Refactor clone copying
This patch sets copy_fndecl_with_name to always inform
rest_of_decl_compilation that it is not a top-level decl (it's a
member function). I also refactor build_cdtor_clones to conditionally
do the method vector updating. That happens to be a better interface
for modules to use.
gcc/cp/
* class.c (copy_fndecl_with_name): Always not top level.
(build_cdtor_clones): Add update_methods parm, use it to
conditionally update the method vec. Return void
(clone_cdtor): Adjust.
(clone_constructors_and_destructors): Adjust comment.
Uros Bizjak [Tue, 3 Nov 2020 18:13:57 +0000 (19:13 +0100)]
i386: Fix ix86_function_arg_regno_p to return correct SSE regno for 32bit TARGET_MACHO
Use up to SSE_REGPARM_MAX registers to pass function parameters
for 32bit Mach-O targets. Also, define X86_32_MMX_REGPARM_MAX
to return 0 for 32bit Mach-O targets.
2020-11-03 Uroš Bizjak <ubizjak@gmail.com>
gcc/
* config/i386/i386.c (ix86_function_arg_regno_p): Use up to
SSE_REGPARM_MAX registers to pass function parameters
for 32bit Mach-O targets.
* config/i386/i386.h (X86_32_MMX_REGPARM_MAX): New macro.
(MMX_REGPARM_MAX): Use it.
Nathan Sidwell [Tue, 3 Nov 2020 18:05:04 +0000 (10:05 -0800)]
c++: Small pt.c cleanups
Now I know about VAR_OR_FUNCTION_DECL_P I found a place to use it.
Also positively checking for a function_decl is clearer than
negatively checking for things that are not.
gcc/cp/
* pt.c (primary_template_specialization_p): Use
VAR_OR_FUNCTION_DECL_P.
(tsubst_template_decl): Check for FUNCTION_DECL, not !TYPE && !VAR
for registering a specialization.
Nathan Sidwell [Tue, 3 Nov 2020 17:06:09 +0000 (09:06 -0800)]
cpplib: EOF in pragmas
This patch moves the generation of PRAGMA_EOF earlier, to when we set
need_line, rather than when we try and get the next line. It also
prevents peeking past a PRAGMA token.
libcpp/
* lex.c (cpp_peek_token): Do not peek past CPP_PRAGMA.
(_cpp_lex_direct): Handle EOF in pragma when setting need_line,
not when needing a line.
Olivier Hainque [Tue, 3 Nov 2020 08:58:31 +0000 (08:58 +0000)]
Add dg-require-effective-target fpic to gcc.target/powerpc tests
This helps powerpc-vxworks kernel mode.
2020-11-03 Olivier Hainque <hainque@adacore.com>
gcc/testsuite/
* gcc.target/powerpc/pr67789.c: Add
dg-require-effective-target fpic.
* gcc.target/powerpc/pr83629.c: Likewise.
* gcc.target/powerpc/pr84112.c: Likewise. Remove
a superflous target test in the dg-do compile
directive while at it.
Pat Bernardi [Mon, 24 Aug 2020 14:29:32 +0000 (10:29 -0400)]
Sync the aarch64-vx7r2 libgcc config with that of Linux
This adds ${cpu_type}/t-lse and t-slibgcc-libgcc to the tmake_file
list for aarch64-vxworks7* configurations, as the Linux port does.
t-lse is needed by all triplets now anyway and the standard setting
for slibgcc makes sense as we are working on reintroducing PIC support
for RTPs on various targets. The VxWorks7 system environments are leaning
towards more and more similarilties with Linux in general, so the
closer configurations the better.
2020-11-02 Pat Bernardi <bernardi@adacore.com>
libgcc/
* config.host (aarch64-vxworks7*, tmake_file): Add
${cpu_type}/t-lse and t-slibgcc-libgcc.
Co-authored-by: Olivier Hainque <hainque@adacore.com>
Dennis Zhang [Tue, 3 Nov 2020 16:56:02 +0000 (16:56 +0000)]
aarch64: intrinsics extract half of bf16 vector
This patch implements ACLE intrinsics vget_low_bf16 and vget_high_bf16
to extract lower or higher half from a bfloat16x8 vector. The
vget_high_bf16 is done by 'dup' instruction. The vget_low_bf16 is just
to return the lower half of a vector register. Tests include both big-
and little-endian cases.
gcc/ChangeLog:
2020-11-03 Dennis Zhang <dennis.zhang@arm.com>
* config/aarch64/aarch64-simd-builtins.def (vget_lo_half): New entry.
(vget_hi_half): Likewise.
* config/aarch64/aarch64-simd.md (aarch64_vget_lo_halfv8bf): New entry.
(aarch64_vget_hi_halfv8bf): Likewise.
* config/aarch64/arm_neon.h (vget_low_bf16): New intrinsic.
(vget_high_bf16): Likewise.
gcc/testsuite/ChangeLog
* gcc.target/aarch64/advsimd-intrinsics/bf16_get.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/bf16_get-be.c: New test.
Nathan Sidwell [Tue, 3 Nov 2020 16:45:15 +0000 (08:45 -0800)]
c++: Directly fixup deferred eh-specs
eh-specifiers in a class definition are complete-definition contexts,
and we sometimes need to deferr their parsing. We create a deferred
eh specifier, which can end up persisting in the type system due to
variants being created before the deferred parse. This causes
problems in modules handling.
This patch adds fixup_deferred_exception_variants, which directly
modifies the variants of such an eh spec once parsed. As commented,
the general case is quite hard, so it doesn't deal with everything.
But I do catch the cases I encountered (from the std library).
gcc/cp/
* cp-tree.h (fixup_deferred_exception_variants): Declare.
* parser.c (cp_parser_class_specifier_1): Call it when
completing deferred parses rather than creating a variant.
(cp_parser_member_declaration): Move comment from ...
(cp_parser_noexcept_specification_opt): ... here. Refactor the
deferred parse.
* tree.c (fixup_deferred_exception_variants): New.
Nathan Sidwell [Tue, 3 Nov 2020 16:39:47 +0000 (08:39 -0800)]
c++: A couple of template instantiation cleanups
I noticed that we were handling lambda extra scope during template
instantiation in a different order to how we handle the non-template
case. Reordered that for consistency. Also some more RAII during
template instantiation.
gcc/cp/
* pt.c (tsubst_lambda_expr): Reorder extra-scope handling to match
the non-template case.
(instantiate_body): Move a couple of declarations to their
initializers.
Nathan Sidwell [Tue, 3 Nov 2020 16:35:53 +0000 (08:35 -0800)]
c++: Make extern-C mismatch an error
duplicate_decls was being lenient about extern-c mismatches, allowing
you to have two declarations in the symbol table after emitting an
error. This resulted in duplicate error messages in modules, when we
find the same problem multiple times. Let's just not let that happen.
gcc/cp/
* decl.c (duplicate_decls): Return error_mark_node fo extern-c
mismatch.
Nathan Sidwell [Tue, 3 Nov 2020 16:32:42 +0000 (08:32 -0800)]
cpplib: Fix off-by-one error
I noticed a fencepost error in the preprocessor. We should be
checking if the next char is at the limit, not the current char (which
can't be, because we're looking at it).
libcpp/
* lex.c (_cpp_clean_line): Fix DOS off-by-one error.
Tobias Burnus [Tue, 3 Nov 2020 16:46:36 +0000 (17:46 +0100)]
gcc-changelog/git_email.py: Support older unidiff modules
contrib/ChangeLog:
* gcc-changelog/git_email.py: Add unidiff_supports_renaming check.
Martin Liska [Tue, 3 Nov 2020 16:32:10 +0000 (17:32 +0100)]
Add setup.cfg for pytest.
contrib/ChangeLog:
* gcc-changelog/setup.cfg: New file.
Yang Yang [Tue, 3 Nov 2020 16:13:47 +0000 (16:13 +0000)]
PR target/96342 Change field "simdlen" into poly_uint64
This is the first patch of PR96342. In order to add support for
"omp declare simd", change the type of the field "simdlen" of
struct cgraph_simd_clone from unsigned int to poly_uint64 and
related adaptation. Since the length might be variable for the
SVE cases.
2020-11-03 Yang Yang <yangyang305@huawei.com>
gcc/ChangeLog:
* cgraph.h (struct cgraph_simd_clone): Change field "simdlen" of
struct cgraph_simd_clone from unsigned int to poly_uint64.
* config/aarch64/aarch64.c
(aarch64_simd_clone_compute_vecsize_and_simdlen): adaptation of
operations on "simdlen".
* config/i386/i386.c (ix86_simd_clone_compute_vecsize_and_simdlen):
Printf formats update.
* gengtype.c (main): Handle poly_uint64.
* omp-simd-clone.c (simd_clone_mangle): Likewise.Re
(simd_clone_adjust_return_type): Likewise.
(create_tmp_simd_array): Likewise.
(simd_clone_adjust_argument_types): Likewise.
(simd_clone_init_simd_arrays): Likewise.
(ipa_simd_modify_function_body): Likewise.
(simd_clone_adjust): Likewise.
(expand_simd_clones): Likewise.
* poly-int-types.h (vector_unroll_factor): New macro.
* poly-int.h (constant_multiple_p): Add two-argument versions.
* tree-vect-stmts.c (vectorizable_simd_clone_call): Likewise.
Richard Biener [Tue, 3 Nov 2020 14:03:41 +0000 (15:03 +0100)]
tree-optimization/97623 - limit PRE hoist insertion
This limits insert iteration caused by PRE insertions generating
hoist insertion opportunities and vice versa. The patch limits
the hoist insertion iterations to three by default.
2020-11-03 Richard Biener <rguenther@suse.de>
PR tree-optimization/97623
* params.opt (-param=max-pre-hoist-insert-iterations): New.
* doc/invoke.texi (max-pre-hoist-insert-iterations): Document.
* tree-ssa-pre.c (insert): Do at most max-pre-hoist-insert-iterations
hoist insert iterations.
Richard Biener [Tue, 3 Nov 2020 13:53:24 +0000 (14:53 +0100)]
middle-end/97579 - fix VEC_COND_EXPR ISEL optab query
This fixes a mistake in the optab query done by ISEL. It
doesn't fix the PR but shifts the ICE elsewhere.
2020-11-03 Richard Biener <rguenther@suse.de>
PR middle-end/97579
* gimple-isel.cc (gimple_expand_vec_cond_expr): Use
the correct types for the vcond_mask/vec_cmp optab queries.
Andrew MacLeod [Mon, 2 Nov 2020 22:04:23 +0000 (17:04 -0500)]
More Ranger cache tweaks
This patch splits the individual value propagation out from fill_block_cache,
and calls it from set_global_value when the global value is updated.
This ensures the "current" global value is reflected in the on-entry cache.
* gimple-range-cache.cc (ssa_global_cache::get_global_range): Return
true if there was a previous range set.
(ranger_cache::ranger_cache): Take a gimple_ranger parameter.
(ranger_cache::set_global_range): Propagate the value if updating.
(ranger_cache::propagate_cache): Renamed from iterative_cache_update.
(ranger_cache::propagate_updated_value): New. Split from:
(ranger_cache::fill_block_cache): Split out value propagator.
* gimple-range-cache.h (ssa_global_cache): Update prototypes.
(ranger_cache): Update prototypes.
Andrew MacLeod [Mon, 2 Nov 2020 18:06:46 +0000 (13:06 -0500)]
Tweaks to ranger cache
Add some bounds checking to ssa_block_ranges, and privatize the
ranges block cache and global cache, adding API points for accessing them.
* gimple-range-cache.h (block_range_cache): Add new entry point.
(ranger_cache): Privatize global abnd block cache members.
* gimple-range-cache.cc (ssa_block_ranges::set_bb_range): Add bounds
check.
(ssa_block_ranges::set_bb_varying): Ditto.
(ssa_block_ranges::get_bb_range): Ditto.
(ssa_block_ranges::bb_range_p): Ditto.
(block_range_cache::get_block_ranges): Fix formatting.
(block_range_cache::query_block_ranges): New.
(block_range_cache::get_bb_range): Use Query_block_ranges.
(block_range_cache::bb_range_p): Ditto.
(ranger_cache::dump): New.
(ranger_cache::get_global_range): New.
(ranger_cache::set_global_range): New.
* gimple-range.cc (gimple_ranger::range_of_expr): Use new API.
(gimple_ranger::range_of_stmt): Ditto.
(gimple_ranger::export_global_ranges): Ditto.
(gimple_ranger::dump): Ditto.
Marek Polacek [Thu, 29 Oct 2020 19:19:51 +0000 (15:19 -0400)]
c++: Tweaks for value_dependent_expression_p.
We may not call value_dependent_expression_p on expressions that are
not potential constant expressions, otherwise value_d could crash,
as I saw recently (in C++98). So beef up the checking in i_d_e_p.
This revealed a curious issue: when we have __PRETTY_FUNCTION__ in
a template function, we set its DECL_VALUE_EXPR to error_mark_node
(cp_make_fname_decl), so potential_c_e returns false when it gets it,
but value_dependent_expression_p handles it specially and says true.
This broke lambda-generic-pretty1.C. So take care of that.
And then also tweak uses_template_parms.
gcc/cp/ChangeLog:
* constexpr.c (potential_constant_expression_1): Treat
__PRETTY_FUNCTION__ inside a template function as
potentially-constant.
* pt.c (uses_template_parms): Call
instantiation_dependent_expression_p instead of
value_dependent_expression_p.
(instantiation_dependent_expression_p): Check
potential_constant_expression before calling
value_dependent_expression_p.
Marek Polacek [Thu, 29 Oct 2020 19:08:31 +0000 (15:08 -0400)]
c++: Disable -Winit-list-lifetime in unevaluated operand [PR97632]
Jon suggested turning this warning off when we're not actually
evaluating the operand. This patch does that.
gcc/cp/ChangeLog:
PR c++/97632
* init.c (build_new_1): Disable -Winit-list-lifetime for an unevaluated
operand.
gcc/testsuite/ChangeLog:
PR c++/97632
* g++.dg/warn/Winit-list4.C: New test.
Bernd Edlinger [Tue, 3 Nov 2020 13:20:14 +0000 (14:20 +0100)]
Cleanup of a merge mistake in fold-const.c
This removes a duplicated statement.
It was apparently introduced due to a merge mistake.
2020-11-03 Bernd Edlinger <bernd.edlinger@hotmail.de>
* fold-const.c (getbyterep): Remove duplicated statement.
Bernd Edlinger [Sun, 1 Nov 2020 06:32:20 +0000 (07:32 +0100)]
Fix PR97205
This makes sure that stack allocated SSA_NAMEs are
at least MODE_ALIGNED. Also increase the MEM_ALIGN
for the corresponding rtl objects.
gcc:
2020-11-03 Bernd Edlinger <bernd.edlinger@hotmail.de>
PR target/97205
* cfgexpand.c (align_local_variable): Make SSA_NAMEs
at least MODE_ALIGNED.
(expand_one_stack_var_at): Increase MEM_ALIGN for SSA_NAMEs.
gcc/testsuite:
2020-11-03 Bernd Edlinger <bernd.edlinger@hotmail.de>
PR target/97205
* gcc.c-torture/compile/pr97205.c: New test.
Nathan Sidwell [Tue, 3 Nov 2020 14:02:06 +0000 (06:02 -0800)]
libcpp: unbreak bootstrap
This fixes the bootstrap breakage I caused. Sorry about that.
libcpp/
* init.c (cpp_read_main_file): Use cpp_get_deps result.
zhengnannan [Tue, 3 Nov 2020 13:56:39 +0000 (13:56 +0000)]
AArch64: Add FLAG for AES/SHA/SM3/SM4 intrinsics [PR94442]
2020-11-03 Zhiheng Xie <xiezhiheng@huawei.com>
Nannan Zheng <zhengnannan@huawei.com>
gcc/ChangeLog:
* config/aarch64/aarch64-simd-builtins.def: Add proper FLAG
for AES/SHA/SM3/SM4 intrinsics.
zhengnannan [Tue, 3 Nov 2020 13:56:36 +0000 (13:56 +0000)]
AArch64: Add FLAG for compare intrinsics [PR94442]
2020-11-03 Zhiheng Xie <xiezhiheng@huawei.com>
Nannan Zheng <zhengnannan@huawei.com>
gcc/ChangeLog:
* config/aarch64/aarch64-simd-builtins.def: Add proper FLAG
for compare intrinsics.
Richard Biener [Tue, 3 Nov 2020 11:28:03 +0000 (12:28 +0100)]
Save some memory at debug stream-in time
This allows us to release references to BLOCKs by not keeping
them rooted in the external_die_map but instead remove it from
there as soon as we created the corresponding stub DIE. For
decls it doesn't help since we still keep the decl_die_table.
2020-11-03 Richard Biener <rguenther@suse.de>
* dwarf2out.c (maybe_create_die_with_external_ref): Remove
hashtable entry.
Andrea Corallo [Thu, 29 Oct 2020 10:20:23 +0000 (11:20 +0100)]
arm: Add vstN_lane_bf16 + vstNq_lane_bf16 intrisics
gcc/ChangeLog
2020-10-29 Andrea Corallo <andrea.corallo@arm.com>
* config/arm/arm_neon.h (vst2_lane_bf16, vst2q_lane_bf16)
(vst3_lane_bf16, vst3q_lane_bf16, vst4_lane_bf16)
(vst4q_lane_bf16): New intrinsics.
* config/arm/arm_neon_builtins.def: Touch it for:
__builtin_neon_vst2_lanev4bf, __builtin_neon_vst2_lanev8bf,
__builtin_neon_vst3_lanev4bf, __builtin_neon_vst3_lanev8bf,
__builtin_neon_vst4_lanev4bf,__builtin_neon_vst4_lanev8bf.
gcc/testsuite/ChangeLog
2020-10-29 Andrea Corallo <andrea.corallo@arm.com>
* gcc.target/aarch64/advsimd-intrinsics/vst2_lane_bf16_indices_1.c:
Run it also for arm-*-*.
* gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_bf16_indices_1.c:
Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vst3_lane_bf16_indices_1.c:
Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_bf16_indices_1.c:
Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vst4_lane_bf16_indices_1.c:
Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_bf16_indices_1.c:
Likewise.
* gcc.target/arm/simd/vstn_lane_bf16_1.c: New test.
Andrea Corallo [Mon, 26 Oct 2020 17:31:19 +0000 (18:31 +0100)]
arm: Add vldN_lane_bf16 + vldNq_lane_bf16 intrisics
gcc/ChangeLog
2020-10-29 Andrea Corallo <andrea.corallo@arm.com>
* config/arm/arm_neon.h (vld2_lane_bf16, vld2q_lane_bf16)
(vld3_lane_bf16, vld3q_lane_bf16, vld4_lane_bf16)
(vld4q_lane_bf16): Add intrinsics.
* config/arm/arm_neon_builtins.def: Touch for:
__builtin_neon_vld2_lanev4bf, __builtin_neon_vld2_lanev8bf,
__builtin_neon_vld3_lanev4bf, __builtin_neon_vld3_lanev8bf,
__builtin_neon_vld4_lanev4bf, __builtin_neon_vld4_lanev8bf.
* config/arm/iterators.md (VQ_HS): Add V8BF to the iterator.
gcc/testsuite/ChangeLog
2020-10-29 Andrea Corallo <andrea.corallo@arm.com>
* gcc.target/aarch64/advsimd-intrinsics/vld2_lane_bf16_indices_1.c:
Run it also for the arm backend.
* gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_bf16_indices_1.c:
Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vld3_lane_bf16_indices_1.c:
Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_bf16_indices_1.c:
Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vld4_lane_bf16_indices_1.c:
Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_bf16_indices_1.c:
Likewise.
* gcc.target/arm/simd/vldn_lane_bf16_1.c: New test.
Andrea Corallo [Thu, 29 Oct 2020 14:11:37 +0000 (15:11 +0100)]
arm: Add vst1_bf16 + vst1q_bf16 intrinsics
gcc/ChangeLog
2020-10-29 Andrea Corallo <andrea.corallo@arm.com>
* config/arm/arm_neon.h (vst1_bf16, vst1q_bf16): Add intrinsics.
* config/arm/arm_neon_builtins.def : Touch for:
__builtin_neon_vst1v4bf, __builtin_neon_vst1v8bf.
gcc/testsuite/ChangeLog
2020-10-29 Andrea Corallo <andrea.corallo@arm.com>
* gcc.target/arm/simd/vst1_bf16_1.c: New test.
Andrea Corallo [Thu, 29 Oct 2020 12:56:17 +0000 (13:56 +0100)]
arm: Add vld1_bf16 + vld1q_bf16 intrinsics
gcc/ChangeLog
2020-10-29 Andrea Corallo <andrea.corallo@arm.com>
* config/arm/arm-builtins.c (VAR14): Define macro.
* config/arm/arm_neon_builtins.def: Touch for:
__builtin_neon_vld1v4bf, __builtin_neon_vld1v8bf.
* config/arm/arm_neon.h (vld1_bf16, vld1q_bf16): Add intrinsics.
gcc/testsuite/ChangeLog
2020-10-29 Andrea Corallo <andrea.corallo@arm.com>
* gcc.target/arm/simd/vld1_bf16_1.c: New test.
Andrea Corallo [Fri, 23 Oct 2020 12:21:56 +0000 (14:21 +0200)]
arm: Add vst1_lane_bf16 + vstq_lane_bf16 intrinsics
gcc/ChangeLog
2020-10-23 Andrea Corallo <andrea.corallo@arm.com>
* config/arm/arm_neon.h (vst1_lane_bf16, vst1q_lane_bf16): Add
intrinsics.
* config/arm/arm_neon_builtins.def (STORE1LANE): Add v4bf, v8bf.
gcc/testsuite/ChangeLog
2020-10-23 Andrea Corallo <andrea.corallo@arm.com>
* gcc.target/arm/simd/vst1_lane_bf16_1.c: New testcase.
* gcc.target/arm/simd/vstq1_lane_bf16_indices_1.c: Likewise.
* gcc.target/arm/simd/vst1_lane_bf16_indices_1.c: Likewise.
Andrea Corallo [Wed, 21 Oct 2020 09:16:01 +0000 (11:16 +0200)]
arm: Add vld1_lane_bf16 + vldq_lane_bf16 intrinsics
gcc/ChangeLog
2020-10-21 Andrea Corallo <andrea.corallo@arm.com>
* config/arm/arm_neon_builtins.def: Add to LOAD1LANE v4bf, v8bf.
* config/arm/arm_neon.h (vld1_lane_bf16, vld1q_lane_bf16): Add
intrinsics.
gcc/testsuite/ChangeLog
2020-10-21 Andrea Corallo <andrea.corallo@arm.com>
* gcc.target/arm/simd/vld1_lane_bf16_1.c: New testcase.
* gcc.target/arm/simd/vld1_lane_bf16_indices_1.c: Likewise.
* gcc.target/arm/simd/vld1q_lane_bf16_indices_1.c: Likewise.
Nathan Sidwell [Tue, 3 Nov 2020 13:11:42 +0000 (05:11 -0800)]
c++: cp_tree_equal cleanups
A couple of small fixes. I noticed bind_template_template_parms was
not marking the parm a template parm (this broke some module
handling). Debugging CALL_EXPR comparisons led me to refactor
cp_tree_equal's CALL_EXPR code (and my recent fix to debug printing of
same). Finally TREE_VECS are best compared by comp_template_args. I
recall that last piece being a left over from fixes during gcc-10.
I've been using it on the modules branch since then.
gcc/cp/
* tree.c (bind_template_template_parm): Mark the parm as a
template parm.
(cp_tree_equal): Refactor CALL_EXPR. Use comp_template_args for
TREE_VECs.
Nathan Sidwell [Tue, 3 Nov 2020 13:08:18 +0000 (05:08 -0800)]
c++: rtti cleanups
Here are a few cleanups from the modules branch. Generally some RAII,
and a bit of lazy namespace pushing.
gcc/cp/
* rtti.c (init_rtti_processing): Move var decl to its init.
(get_tinfo_decl): Likewise. Break out creation to called helper
...
(get_tinfo_decl_direct): ... here.
(build_dynamic_cast_1): Move var decls to their initializers.
(tinfo_base_init): Set decl's location to BUILTINS_LOCATION.
(get_tinfo_desc): Only push ABI namespace when needed. Set type's
context.
Nathan Sidwell [Tue, 3 Nov 2020 12:59:48 +0000 (04:59 -0800)]
libcpp: dependency emission tidying
This patch cleans up the interface to the dependency generation a
little. We now only check the option in one place, and the
cpp_get_deps function returns nullptr if there are no dependencies. I
also reworded the -MT and -MQ help text to be make agnostic -- as
there are ideas about emitting, say, JSON.
libcpp/
* include/mkdeps.h: Include cpplib.h
(deps_write): Adjust first parm type.
* mkdeps.c: Include internal.h
(make_write): Adjust first parm type. Check phony option
directly.
(deps_write): Adjust first parm type.
* init.c (cpp_read_main_file): Use get_deps.
* directives.c (cpp_get_deps): Check option before initializing.
gcc/c-family/
* c.opt (MQ,MT): Reword description to be make-agnostic.
gcc/fortran/
* cpp.c (gfc_cpp_add_dep): Only add dependency if we're recording
them.
(gfc_cpp_init): Likewise for target.
Dennis Zhang [Tue, 3 Nov 2020 13:00:51 +0000 (13:00 +0000)]
aarch64: ACLE intrinsics convert BF16 to Float32
This patch enables intrinsics to convert BFloat16 scalar and vector
operands to Float32 modes. The intrinsics are implemented by shifting
each BFloat16 item 16 bits to left using shl/shll/shll2 instructions.
gcc/ChangeLog:
2020-11-03 Dennis Zhang <dennis.zhang@arm.com>
* config/aarch64/aarch64-simd-builtins.def(vbfcvt): New entry.
(vbfcvt_high, bfcvt): Likewise.
* config/aarch64/aarch64-simd.md(aarch64_vbfcvt<mode>): New entry.
(aarch64_vbfcvt_highv8bf, aarch64_bfcvtsf): Likewise.
* config/aarch64/arm_bf16.h (vcvtah_f32_bf16): New intrinsic.
* config/aarch64/arm_neon.h (vcvt_f32_bf16): Likewise.
(vcvtq_low_f32_bf16, vcvtq_high_f32_bf16): Likewise.
gcc/testsuite/ChangeLog
* gcc.target/aarch64/advsimd-intrinsics/bfcvt-compile.c
(test_vcvt_f32_bf16, test_vcvtq_low_f32_bf16): New tests.
(test_vcvtq_high_f32_bf16, test_vcvth_f32_bf16): Likewise.
Richard Biener [Tue, 3 Nov 2020 11:06:19 +0000 (12:06 +0100)]
bootstrap/97666 - fix array of bool allocation
This fixes the bad assumption that sizeof (bool) == 1
2020-11-03 Richard Biener <rguenther@suse.de>
PR bootstrap/97666
* tree-vect-slp.c (vect_build_slp_tree_2): Scale
allocation of skip_args by sizeof (bool).
Richard Biener [Tue, 3 Nov 2020 10:52:47 +0000 (11:52 +0100)]
tree-optimization/80928 - SLP vectorize nested loop induction
This adds SLP vectorization of nested inductions.
2020-11-03 Richard Biener <rguenther@suse.de>
PR tree-optimization/80928
* tree-vect-loop.c (vectorizable_induction): SLP vectorize
nested inductions.
* gcc.dg/vect/vect-outer-slp-2.c: New testcase.
* gcc.dg/vect/vect-outer-slp-3.c: Likewise.
Uros Bizjak [Tue, 3 Nov 2020 12:06:42 +0000 (13:06 +0100)]
testsuite: Fix gcc.target/i386/zero-scratch-regs-*.c scan-asm directives
Improve zero-scratch-regs-*.c scan-asm regexps
and add target selectors for 32bit targets.
2020-11-03 Uroš Bizjak <ubizjak@gmail.com>
gcc/testsuite/ChangeLog:
* gcc.target/i386/zero-scratch-regs-1.c: Add ia32 target
selector where appropriate. Improve scan-assembler regexp.
* gcc.target/i386/zero-scratch-regs-2.c: Ditto.
* gcc.target/i386/zero-scratch-regs-3.c: Ditto.
* gcc.target/i386/zero-scratch-regs-4.c: Ditto.
* gcc.target/i386/zero-scratch-regs-5.c: Ditto.
* gcc.target/i386/zero-scratch-regs-6.c: Ditto.
* gcc.target/i386/zero-scratch-regs-7.c: Ditto.
* gcc.target/i386/zero-scratch-regs-8.c: Ditto.
* gcc.target/i386/zero-scratch-regs-9.c: Ditto.
* gcc.target/i386/zero-scratch-regs-10.c: Ditto.
* gcc.target/i386/zero-scratch-regs-13.c: Ditto.
* gcc.target/i386/zero-scratch-regs-14.c: Ditto.
* gcc.target/i386/zero-scratch-regs-15.c: Ditto.
* gcc.target/i386/zero-scratch-regs-16.c: Ditto.
* gcc.target/i386/zero-scratch-regs-17.c: Ditto.
* gcc.target/i386/zero-scratch-regs-18.c: Ditto.
* gcc.target/i386/zero-scratch-regs-19.c: Ditto.
* gcc.target/i386/zero-scratch-regs-20.c: Ditto.
* gcc.target/i386/zero-scratch-regs-21.c: Ditto.
* gcc.target/i386/zero-scratch-regs-22.c: Ditto.
* gcc.target/i386/zero-scratch-regs-23.c: Ditto.
* gcc.target/i386/zero-scratch-regs-24.c: Ditto.
* gcc.target/i386/zero-scratch-regs-25.c: Ditto.
* gcc.target/i386/zero-scratch-regs-26.c: Ditto.
* gcc.target/i386/zero-scratch-regs-27.c: Ditto.
* gcc.target/i386/zero-scratch-regs-28.c: Ditto.
* gcc.target/i386/zero-scratch-regs-29.c: Ditto.
* gcc.target/i386/zero-scratch-regs-30.c: Ditto.
* gcc.target/i386/zero-scratch-regs-31.c: Ditto.
Olivier Hainque [Fri, 28 Feb 2020 16:44:57 +0000 (16:44 +0000)]
Add missing require-effective-target lto
This prevents failure of an lto test in configurations
missing LTO support, such as VxWorks for kernel mode.
2020-11-02 Olivier Hainque <hainque@adacore.com>
gcc/testsuite/
* gcc.dg/tree-ssa/pr71077.c: Add
dg-require-effective-target lto.
Olivier Hainque [Tue, 3 Nov 2020 09:51:43 +0000 (09:51 +0000)]
Add dg-require-effective-target fpic to gcc i386 tests
This change adds
/* { dg-require-effective-target fpic } */
to tests in gcc.target/i386 that do use -fpic or -fPIC
but don't currently query the target support.
This corresponds to what many other fpic tests do
and helps the vxWorks ports at least, as -fpic is
typically not supported in at least one of the two
major modes of such port (kernel vs RTP).
2020-11-03 Olivier Hainque <hainque@adacore.com>
gcc/testsuite/
* gcc.target/i386/pr45352-1.c: Add dg-require-effective-target fpic.
* gcc.target/i386/pr47602.c: Likewise.
* gcc.target/i386/pr55151.c: Likewise.
* gcc.target/i386/pr55458.c: Likewise.
* gcc.target/i386/pr56348.c: Likewise.
* gcc.target/i386/pr57097.c: Likewise.
* gcc.target/i386/pr65753.c: Likewise.
* gcc.target/i386/pr65915.c: Likewise.
* gcc.target/i386/pr66232-5.c: Likewise.
* gcc.target/i386/pr66334.c: Likewise.
* gcc.target/i386/pr66819-2.c: Likewise.
* gcc.target/i386/pr67265.c: Likewise.
* gcc.target/i386/pr81481.c: Likewise.
* gcc.target/i386/pr83994.c: Likewise.
Jan Hubicka [Tue, 3 Nov 2020 10:56:05 +0000 (11:56 +0100)]
Avoid recursion in tree-inline
gcc/ChangeLog:
2020-11-03 Jan Hubicka <hubicka@ucw.cz>
PR ipa/97578
* ipa-inline-transform.c (maybe_materialize_called_clones): New
function.
(inline_transform): Use it.
gcc/testsuite/ChangeLog:
2020-11-03 Jan Hubicka <hubicka@ucw.cz>
* gcc.c-torture/compile/pr97578.c: New test.
Richard Biener [Tue, 3 Nov 2020 09:24:02 +0000 (10:24 +0100)]
testsuite/97688 - fix check_vect () with __AVX2__
This fixes the cpuid check to always specify a subleaf zero
which is required to detect AVX2 and doesn't hurt for level one.
Without this fix we get zero runtime coverage when -mavx2 is
specified.
2020-11-03 Richard Biener <rguenther@suse.de>
PR testsuite/97688
* gcc.dg/vect/tree-vect.h (check_vect): Fix the x86 cpuid
check to always specify subleaf zero.
Richard Biener [Tue, 3 Nov 2020 08:53:11 +0000 (09:53 +0100)]
tree-optimization/97678 - fix SLP induction epilogue vectorization
This restores not tracking SLP nodes for induction initial values
in not nested context because this interferes with peeling and
epilogue vectorization.
2020-11-03 Richard Biener <rguenther@suse.de>
PR tree-optimization/97678
* tree-vect-slp.c (vect_build_slp_tree_2): Do not track
the initial values of inductions when not nested.
* tree-vect-loop.c (vectorizable_induction): Look at
PHI node initial values again for SLP and not nested
inductions. Handle LOOP_VINFO_MASK_SKIP_NITERS and cost
invariants.
* gcc.dg/vect/pr97678.c: New testcase.
Tobias Burnus [Tue, 3 Nov 2020 08:55:58 +0000 (09:55 +0100)]
Fortran: Add !GCC$ attributes DEPRECATED
gcc/fortran/ChangeLog:
* decl.c (ext_attr_list): Add EXT_ATTR_DEPRECATED.
* gfortran.h (ext_attr_id_t): Ditto.
* gfortran.texi (GCC$ ATTRIBUTES): Document it.
* resolve.c (resolve_variable, resolve_function,
resolve_call, resolve_values): Show -Wdeprecated-declarations warning.
* trans-decl.c (add_attributes_to_decl): Skip those
with no middle_end_name.
gcc/testsuite/ChangeLog:
* gfortran.dg/attr_deprecated.f90: New test.
Uros Bizjak [Tue, 3 Nov 2020 08:51:01 +0000 (09:51 +0100)]
x86: Optimize aes<aeswideklvariant>u8 a bit, fix whitespace
2020-11-03 Uroš Bizjak <ubizjak@gmail.com>
gcc/
* config/i386/sse.md (aes<aeswideklvariant>u8):
Do not use xmm_regs array. Fix whitespace.
Uros Bizjak [Tue, 3 Nov 2020 08:46:59 +0000 (09:46 +0100)]
x86: Fix comment in ix86_expand_builtin
2020-11-03 Uroš Bizjak <ubizjak@gmail.com>
gcc/
* config/i386/i386-expand.c (ix86_expand_builtin): Fix comment.
Thomas Schwinge [Thu, 22 Oct 2020 09:04:22 +0000 (11:04 +0200)]
[OpenACC] Enable inconsistent nested 'reduction' clauses checking for OpenACC 'kernels'
gcc/
* omp-low.c (scan_omp_for) <OpenACC>: Move earlier inconsistent
nested 'reduction' clauses checking.
gcc/testsuite/
* c-c++-common/goacc/nested-reductions-1-kernels.c: Extend.
* c-c++-common/goacc/nested-reductions-2-kernels.c: Likewise.
* gfortran.dg/goacc/nested-reductions-1-kernels.f90: Likewise.
* gfortran.dg/goacc/nested-reductions-2-kernels.f90: Likewise.
Thomas Schwinge [Thu, 22 Oct 2020 07:45:31 +0000 (09:45 +0200)]
[OpenACC] Split up testcases for inconsistent nested 'reduction' clauses checking
gcc/testsuite/
* c-c++-common/goacc/nested-reductions.c: Split file into...
* c-c++-common/goacc/nested-reductions-1-kernels.c: ... this...
* c-c++-common/goacc/nested-reductions-1-parallel.c: ..., this...
* c-c++-common/goacc/nested-reductions-1-routine.c: ..., and this.
* c-c++-common/goacc/nested-reductions-warn.c: Split file into...
* c-c++-common/goacc/nested-reductions-2-kernels.c: ... this...
* c-c++-common/goacc/nested-reductions-2-parallel.c: ..., this...
* c-c++-common/goacc/nested-reductions-2-routine.c: ..., and this.
* gfortran.dg/goacc/nested-reductions.f90: Split file into...
* gfortran.dg/goacc/nested-reductions-1-kernels.f90: ... this...
* gfortran.dg/goacc/nested-reductions-1-parallel.f90: ..., this...
* gfortran.dg/goacc/nested-reductions-1-routine.f90: ..., and
this.
* gfortran.dg/goacc/nested-reductions-warn.f90: Split file into...
* gfortran.dg/goacc/nested-reductions-2-kernels.f90: ... this...
* gfortran.dg/goacc/nested-reductions-2-parallel.f90: ..., this...
* gfortran.dg/goacc/nested-reductions-2-routine.f90: ..., and
this.
Jonathan Yong [Tue, 3 Nov 2020 07:47:12 +0000 (07:47 +0000)]
libstdc++: use lt_host_flags for libstdc++.la
For platforms like Mingw and Cygwin, cygwin refuses to generate the
shared library without using -no-undefined.
Attached patch makes sure the right flags are used, since libtool is
already used to link libstdc++.
libstdc++-v3/ChangeLog:
* src/Makefile.am (libstdc___la_LINK): Add lt_host_flags.
* src/Makefile.in: Regenerate.
Thomas Schwinge [Tue, 27 Oct 2020 16:14:10 +0000 (17:14 +0100)]
[Fortran] More precise location information for OpenACC 'gang', 'worker', 'vector' clauses with argument [PR92793]
gcc/fortran/
PR fortran/92793
* trans-openmp.c (gfc_trans_omp_clauses): More precise location
information for OpenACC 'gang', 'worker', 'vector' clauses with
argument.
gcc/testsuite/
PR fortran/92793
* gfortran.dg/goacc/pr92793-1.f90: Adjust.
Thomas Schwinge [Tue, 27 Oct 2020 16:13:16 +0000 (17:13 +0100)]
[OpenACC] More precise diagnostics for 'gang', 'worker', 'vector' clauses with arguments on 'loop' only allowed in 'kernels' regions
Instead of at the location of the 'loop' directive, 'error_at' the location of
the improper clause, and 'inform' at the location of the enclosing parent
compute construct/routine.
The Fortran testcases come with some XFAILing, to be resolved later.
gcc/
* omp-low.c (scan_omp_for) <OpenACC>: More precise diagnostics for
'gang', 'worker', 'vector' clauses with arguments only allowed in
'kernels' regions.
gcc/testsuite/
* c-c++-common/goacc/pr92793-1.c: Extend.
* gfortran.dg/goacc/pr92793-1.f90: Likewise.
Kewen Lin [Tue, 3 Nov 2020 02:51:47 +0000 (02:51 +0000)]
pass: Run cleanup passes before SLP [PR96789]
As the discussion in PR96789, we found that some scalar stmts
which can be eliminated by some passes after SLP, but we still
modeled their costs when trying to SLP, it could impact
vectorizer's decision. One typical case is the case in PR96789
on target Power.
As Richard suggested there, this patch is to introduce one pass
called pre_slp_scalar_cleanup which has some secondary clean up
passes, for now they are FRE and DSE. It introduces one new
TODO flags group called pending TODO flags, unlike normal TODO
flags, the pending TODO flags are passed down in the pipeline
until one of its consumers can perform the requested action.
Consumers should then clear the flags for the actions that they
have taken.
Soem compilation time statistics on all SPEC2017 INT bmks were
collected on one Power9 machine for several option sets below:
A1: -Ofast -funroll-loops
A2: -O1
A3: -O1 -funroll-loops
A4: -O2
A5: -O2 -funroll-loops
the corresponding increment rate is trivial:
A1 A2 A3 A4 A5
0.08% 0.00% -0.38% -0.10% -0.05%
Bootstrapped/regtested on powerpc64le-linux-gnu P8.
gcc/ChangeLog:
PR tree-optimization/96789
* function.h (struct function): New member unsigned pending_TODOs.
* passes.c (class pass_pre_slp_scalar_cleanup): New class.
(make_pass_pre_slp_scalar_cleanup): New function.
(pass_data_pre_slp_scalar_cleanup): New pass data.
* passes.def: (pass_pre_slp_scalar_cleanup): New pass, add
pass_fre and pass_dse as its children.
* timevar.def (TV_SCALAR_CLEANUP): New timevar.
* tree-pass.h (PENDING_TODO_force_next_scalar_cleanup): New
pending TODO flag.
(make_pass_pre_slp_scalar_cleanup): New declare.
* tree-ssa-loop-ivcanon.c (tree_unroll_loops_completely_1):
Once any outermost loop gets unrolled, flag cfun pending_TODOs
PENDING_TODO_force_next_scalar_cleanup on.
gcc/testsuite/ChangeLog:
PR tree-optimization/96789
* gcc.dg/tree-ssa/ssa-dse-28.c: Adjust.
* gcc.dg/tree-ssa/ssa-dse-29.c: Likewise.
* gcc.dg/vect/bb-slp-41.c: Likewise.
* gcc.dg/tree-ssa/pr96789.c: New test.