libreriscv.git
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lkcl [Mon, 16 Nov 2020 09:28:13 +0000 (09:28 +0000)]

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lkcl [Mon, 16 Nov 2020 09:19:14 +0000 (09:19 +0000)]

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lkcl [Mon, 16 Nov 2020 08:50:28 +0000 (08:50 +0000)]

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lkcl [Mon, 16 Nov 2020 08:43:24 +0000 (08:43 +0000)]

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lkcl [Mon, 16 Nov 2020 08:20:30 +0000 (08:20 +0000)]

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lkcl [Mon, 16 Nov 2020 08:17:39 +0000 (08:17 +0000)]

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lkcl [Mon, 16 Nov 2020 08:14:00 +0000 (08:14 +0000)]

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lkcl [Mon, 16 Nov 2020 07:58:08 +0000 (07:58 +0000)]

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lkcl [Mon, 16 Nov 2020 07:52:56 +0000 (07:52 +0000)]

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lkcl [Mon, 16 Nov 2020 07:48:07 +0000 (07:48 +0000)]

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lkcl [Mon, 16 Nov 2020 07:44:34 +0000 (07:44 +0000)]

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lkcl [Mon, 16 Nov 2020 07:40:43 +0000 (07:40 +0000)]

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lkcl [Mon, 16 Nov 2020 01:59:15 +0000 (01:59 +0000)]

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lkcl [Mon, 16 Nov 2020 01:57:52 +0000 (01:57 +0000)]

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lkcl [Mon, 16 Nov 2020 01:52:50 +0000 (01:52 +0000)]

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lkcl [Mon, 16 Nov 2020 01:49:47 +0000 (01:49 +0000)]

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lkcl [Mon, 16 Nov 2020 01:36:19 +0000 (01:36 +0000)]

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lkcl [Mon, 16 Nov 2020 01:23:28 +0000 (01:23 +0000)]

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lkcl [Mon, 16 Nov 2020 01:17:04 +0000 (01:17 +0000)]

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lkcl [Mon, 16 Nov 2020 01:09:08 +0000 (01:09 +0000)]

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lkcl [Mon, 16 Nov 2020 00:50:21 +0000 (00:50 +0000)]

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lkcl [Mon, 16 Nov 2020 00:45:33 +0000 (00:45 +0000)]

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lkcl [Mon, 16 Nov 2020 00:44:16 +0000 (00:44 +0000)]

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lkcl [Mon, 16 Nov 2020 00:38:40 +0000 (00:38 +0000)]

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lkcl [Mon, 16 Nov 2020 00:21:39 +0000 (00:21 +0000)]

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lkcl [Mon, 16 Nov 2020 00:18:33 +0000 (00:18 +0000)]

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lkcl [Sun, 15 Nov 2020 21:20:55 +0000 (21:20 +0000)]

4 years agoswap major opcodes around
Luke Kenneth Casson Leighton [Sun, 15 Nov 2020 19:52:03 +0000 (19:52 +0000)]
swap major opcodes around

4 years ago(no commit message)
lkcl [Sun, 15 Nov 2020 17:59:05 +0000 (17:59 +0000)]

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lkcl [Sun, 15 Nov 2020 16:27:45 +0000 (16:27 +0000)]

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lkcl [Sun, 15 Nov 2020 16:25:48 +0000 (16:25 +0000)]

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lkcl [Sun, 15 Nov 2020 16:22:38 +0000 (16:22 +0000)]

4 years agoadd headings for modes
Luke Kenneth Casson Leighton [Sun, 15 Nov 2020 16:14:12 +0000 (16:14 +0000)]
add headings for modes

4 years agomention mode-switching idea (to 32-bit for 1 cycle)
Luke Kenneth Casson Leighton [Sun, 15 Nov 2020 16:08:47 +0000 (16:08 +0000)]
mention mode-switching idea (to 32-bit for 1 cycle)

4 years agoadd C-Bank switching instruction
Luke Kenneth Casson Leighton [Sun, 15 Nov 2020 15:38:53 +0000 (15:38 +0000)]
add C-Bank switching instruction

4 years agotry an addi
Luke Kenneth Casson Leighton [Sun, 15 Nov 2020 12:05:57 +0000 (12:05 +0000)]
try an addi

4 years agomention idea TODO of going into 32-bit mode for 1 instruction
Luke Kenneth Casson Leighton [Sun, 15 Nov 2020 03:12:30 +0000 (03:12 +0000)]
mention idea TODO of going into 32-bit mode for 1 instruction
https://bugs.libre-soc.org/show_bug.cgi?id=238#c2

4 years agoclarify 16-bit encoding
Luke Kenneth Casson Leighton [Sun, 15 Nov 2020 03:10:44 +0000 (03:10 +0000)]
clarify 16-bit encoding

4 years agoadd fmr. minor shuffle
Luke Kenneth Casson Leighton [Sun, 15 Nov 2020 03:04:20 +0000 (03:04 +0000)]
add fmr. minor shuffle

4 years agoadd fmr. in 16-bit mode
Luke Kenneth Casson Leighton [Sun, 15 Nov 2020 02:39:58 +0000 (02:39 +0000)]
add fmr. in 16-bit mode

4 years agoadd system, spr and unallocated C16
Luke Kenneth Casson Leighton [Sun, 15 Nov 2020 02:25:12 +0000 (02:25 +0000)]
add system, spr and unallocated C16

4 years ago(no commit message)
lkcl [Sun, 15 Nov 2020 01:50:28 +0000 (01:50 +0000)]

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lkcl [Sun, 15 Nov 2020 01:16:35 +0000 (01:16 +0000)]

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lkcl [Sun, 15 Nov 2020 01:11:59 +0000 (01:11 +0000)]

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lkcl [Sat, 14 Nov 2020 23:15:00 +0000 (23:15 +0000)]

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lkcl [Sat, 14 Nov 2020 23:14:19 +0000 (23:14 +0000)]

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lkcl [Sat, 14 Nov 2020 23:13:19 +0000 (23:13 +0000)]

4 years agoadd CR operations
Luke Kenneth Casson Leighton [Sat, 14 Nov 2020 22:46:26 +0000 (22:46 +0000)]
add CR operations

4 years agomove 16 bit compressed to separate page
Luke Kenneth Casson Leighton [Sat, 14 Nov 2020 22:26:37 +0000 (22:26 +0000)]
move 16 bit compressed to separate page

4 years ago(no commit message)
lkcl [Sat, 14 Nov 2020 21:49:35 +0000 (21:49 +0000)]

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lkcl [Sat, 14 Nov 2020 21:28:00 +0000 (21:28 +0000)]

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lkcl [Sat, 14 Nov 2020 21:17:37 +0000 (21:17 +0000)]

4 years agowhitespace and update C tables
Luke Kenneth Casson Leighton [Sat, 14 Nov 2020 19:09:02 +0000 (19:09 +0000)]
whitespace and update C tables

4 years agoadd OFSC 2020 talk
Luke Kenneth Casson Leighton [Thu, 12 Nov 2020 14:40:06 +0000 (14:40 +0000)]
add OFSC 2020 talk

4 years ago(no commit message)
lkcl [Sat, 14 Nov 2020 18:28:28 +0000 (18:28 +0000)]

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lkcl [Sat, 14 Nov 2020 17:57:18 +0000 (17:57 +0000)]

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lkcl [Sat, 14 Nov 2020 03:04:54 +0000 (03:04 +0000)]

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lkcl [Sat, 14 Nov 2020 02:22:59 +0000 (02:22 +0000)]

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lkcl [Fri, 13 Nov 2020 22:03:23 +0000 (22:03 +0000)]

4 years agoAdd Tomasulo model example
Cesar_Strauss [Fri, 13 Nov 2020 10:24:23 +0000 (10:24 +0000)]
Add Tomasulo model example

4 years ago(no commit message)
lkcl [Fri, 13 Nov 2020 02:19:25 +0000 (02:19 +0000)]

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lkcl [Fri, 13 Nov 2020 02:07:06 +0000 (02:07 +0000)]

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lkcl [Fri, 13 Nov 2020 02:06:00 +0000 (02:06 +0000)]

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lkcl [Fri, 13 Nov 2020 00:11:48 +0000 (00:11 +0000)]

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lkcl [Wed, 11 Nov 2020 22:24:46 +0000 (22:24 +0000)]

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lkcl [Wed, 11 Nov 2020 21:51:46 +0000 (21:51 +0000)]

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lkcl [Wed, 11 Nov 2020 21:27:32 +0000 (21:27 +0000)]

4 years agoadd dcbz and tlbio instruction needed by mmu
Tobias Platen [Wed, 11 Nov 2020 18:48:15 +0000 (19:48 +0100)]
add dcbz and tlbio instruction needed by mmu

4 years agoadd minerva nmigen-soc example
Luke Kenneth Casson Leighton [Tue, 10 Nov 2020 16:21:51 +0000 (16:21 +0000)]
add minerva nmigen-soc example

4 years ago(no commit message)
lkcl [Mon, 9 Nov 2020 11:02:59 +0000 (11:02 +0000)]

4 years ago(no commit message)
lkcl [Mon, 9 Nov 2020 10:59:14 +0000 (10:59 +0000)]

4 years ago(no commit message)
lkcl [Mon, 9 Nov 2020 10:48:36 +0000 (10:48 +0000)]

4 years agoadd EOMA68+LibreSOC gadie section
Luke Kenneth Casson Leighton [Thu, 5 Nov 2020 19:32:12 +0000 (19:32 +0000)]
add EOMA68+LibreSOC gadie section

4 years agoadd EOMA68+LibreSOC gadie section
Luke Kenneth Casson Leighton [Thu, 5 Nov 2020 18:44:58 +0000 (18:44 +0000)]
add EOMA68+LibreSOC gadie section

4 years agoextend gaddie pitch
Luke Kenneth Casson Leighton [Thu, 5 Nov 2020 17:56:49 +0000 (17:56 +0000)]
extend gaddie pitch

4 years agoextend gaddie pitch
Luke Kenneth Casson Leighton [Thu, 5 Nov 2020 17:49:33 +0000 (17:49 +0000)]
extend gaddie pitch

4 years agoextend gaddie pitch
Luke Kenneth Casson Leighton [Thu, 5 Nov 2020 17:49:22 +0000 (17:49 +0000)]
extend gaddie pitch

4 years agoadd gaddie pitch section for LibreSOC
Luke Kenneth Casson Leighton [Thu, 5 Nov 2020 17:32:15 +0000 (17:32 +0000)]
add gaddie pitch section for LibreSOC

4 years agoupdate nlnet FAQ
Luke Kenneth Casson Leighton [Thu, 5 Nov 2020 14:36:54 +0000 (14:36 +0000)]
update nlnet FAQ

4 years agoupdate FAQ
Luke Kenneth Casson Leighton [Thu, 5 Nov 2020 11:57:13 +0000 (11:57 +0000)]
update FAQ

4 years agoadd name tag to FAQ
Luke Kenneth Casson Leighton [Thu, 5 Nov 2020 11:50:11 +0000 (11:50 +0000)]
add name tag to FAQ

4 years agoadd name tag to FAQ
Luke Kenneth Casson Leighton [Thu, 5 Nov 2020 11:49:50 +0000 (11:49 +0000)]
add name tag to FAQ

4 years agoadd name tag to FAQ
Luke Kenneth Casson Leighton [Thu, 5 Nov 2020 11:49:06 +0000 (11:49 +0000)]
add name tag to FAQ

4 years agoadd to nlnet FAQ
Luke Kenneth Casson Leighton [Wed, 4 Nov 2020 18:55:29 +0000 (18:55 +0000)]
add to nlnet FAQ

4 years ago(no commit message)
colepoirier@1ec9c8c87c85f09e4718cd80e0605065e33975f0 [Wed, 4 Nov 2020 18:27:54 +0000 (18:27 +0000)]

4 years agoadd to NLnet FAQ
Luke Kenneth Casson Leighton [Wed, 4 Nov 2020 15:54:55 +0000 (15:54 +0000)]
add to NLnet FAQ

4 years agoadd to NLnet FAQ
Luke Kenneth Casson Leighton [Wed, 4 Nov 2020 15:49:33 +0000 (15:49 +0000)]
add to NLnet FAQ

4 years agoshow tab on imag
Luke Kenneth Casson Leighton [Wed, 4 Nov 2020 15:29:11 +0000 (15:29 +0000)]
show tab on imag

4 years agoupdate FPGA connector images
Luke Kenneth Casson Leighton [Wed, 4 Nov 2020 15:26:35 +0000 (15:26 +0000)]
update FPGA connector images

4 years agoadd circuit refs
Luke Kenneth Casson Leighton [Wed, 4 Nov 2020 15:26:26 +0000 (15:26 +0000)]
add circuit refs

4 years agochange to use 3.3v on VERSA X3
Luke Kenneth Casson Leighton [Wed, 4 Nov 2020 15:22:53 +0000 (15:22 +0000)]
change to use 3.3v on VERSA X3

4 years agoadd NLnet FAQ
Luke Kenneth Casson Leighton [Wed, 4 Nov 2020 15:21:23 +0000 (15:21 +0000)]
add NLnet FAQ

4 years ago(no commit message)
colepoirier@1ec9c8c87c85f09e4718cd80e0605065e33975f0 [Wed, 4 Nov 2020 01:39:13 +0000 (01:39 +0000)]

4 years agoHDL_wokflow update ulx3s jtag jumper wire connection images to be
Cole Poirier [Wed, 4 Nov 2020 01:37:45 +0000 (17:37 -0800)]
HDL_wokflow update ulx3s jtag jumper wire connection images to be
smaller

4 years agoHDL_workflow/ECP5_FPGA provide two images showing different orientation
Cole Poirier [Wed, 4 Nov 2020 01:09:32 +0000 (17:09 -0800)]
HDL_workflow/ECP5_FPGA provide two images showing different orientation
of stlinkv2

4 years ago(no commit message)
colepoirier@1ec9c8c87c85f09e4718cd80e0605065e33975f0 [Wed, 4 Nov 2020 00:58:45 +0000 (00:58 +0000)]

4 years ago(no commit message)
colepoirier@1ec9c8c87c85f09e4718cd80e0605065e33975f0 [Wed, 4 Nov 2020 00:58:13 +0000 (00:58 +0000)]

4 years agoupdate photo for stlinkv2 JTAG wires in HDL_Workflow/ECP5_FPGA
Cole Poirier [Wed, 4 Nov 2020 00:55:59 +0000 (16:55 -0800)]
update photo for stlinkv2 JTAG wires in HDL_Workflow/ECP5_FPGA

4 years ago(no commit message)
colepoirier@1ec9c8c87c85f09e4718cd80e0605065e33975f0 [Wed, 4 Nov 2020 00:27:06 +0000 (00:27 +0000)]

4 years ago(no commit message)
colepoirier@1ec9c8c87c85f09e4718cd80e0605065e33975f0 [Wed, 4 Nov 2020 00:21:42 +0000 (00:21 +0000)]