Andrew Waterman [Mon, 7 Jul 2014 22:17:16 +0000 (15:17 -0700)]
Use precompiled headers to speed up compilation
Andrew Waterman [Mon, 7 Jul 2014 21:03:27 +0000 (14:03 -0700)]
Minor refactoring
Christopher Celio [Fri, 13 Jun 2014 10:52:48 +0000 (03:52 -0700)]
Commit log now prints while interrupts are enabled.
- Previous behavior was to print the commit log only in user code.
Andrew Waterman [Fri, 13 Jun 2014 09:42:54 +0000 (02:42 -0700)]
Only print commit log if instruction commits
Andrew Waterman [Thu, 12 Jun 2014 21:16:27 +0000 (14:16 -0700)]
Set status.u64 to true on boot
This isn't required by the ISA but it matches existing HW.
Andrew Waterman [Thu, 24 Apr 2014 23:01:33 +0000 (16:01 -0700)]
fix disassembly of bnez and friends
Stephen Twigg [Thu, 3 Apr 2014 23:54:34 +0000 (16:54 -0700)]
Merge branch 'tm'
Stephen Twigg [Thu, 3 Apr 2014 23:52:48 +0000 (16:52 -0700)]
Sync encoding in opcodes
Stephen Twigg [Thu, 3 Apr 2014 23:52:34 +0000 (16:52 -0700)]
Add ut_fclass_s/d hwacha (unused until encoding sync)
Andrew Waterman [Tue, 18 Mar 2014 21:38:07 +0000 (14:38 -0700)]
Support RV32 RDTIMEH/RDCYCLEH/RDINSTRETH
Andrew Waterman [Sat, 15 Mar 2014 23:48:16 +0000 (16:48 -0700)]
speed up compilation a bit
Andrew Waterman [Wed, 12 Mar 2014 02:07:08 +0000 (19:07 -0700)]
New FP encoding
Andrew Waterman [Fri, 7 Mar 2014 02:23:38 +0000 (18:23 -0800)]
Add fclass.{s|d} instructions
Yunsup Lee [Sun, 2 Mar 2014 08:49:32 +0000 (00:49 -0800)]
add hwacha vfmsv instructions
Yunsup Lee [Tue, 25 Feb 2014 11:44:34 +0000 (03:44 -0800)]
add extensions to riscv-dis for better disassembly
Andrew Waterman [Sat, 15 Feb 2014 01:31:41 +0000 (17:31 -0800)]
Renumber uarch CSRs into custom CSR space
Andrew Waterman [Fri, 14 Feb 2014 02:46:42 +0000 (18:46 -0800)]
Fix I$ simulator not making forward progress
Andrew Waterman [Wed, 12 Feb 2014 09:32:11 +0000 (01:32 -0800)]
Fix commit log when !debug
Andrew Waterman [Tue, 11 Feb 2014 03:00:16 +0000 (19:00 -0800)]
Revert to old AUIPC definition
Andrew Waterman [Fri, 7 Feb 2014 09:15:49 +0000 (01:15 -0800)]
Clear EVEC LSBs, which kindly prevents a segfault
Andrew Waterman [Thu, 6 Feb 2014 22:03:07 +0000 (14:03 -0800)]
Fix disassembly of JAL
Yunsup Lee [Thu, 6 Feb 2014 19:24:39 +0000 (11:24 -0800)]
commit missing definitions for uarch counters
Quan Nguyen [Tue, 4 Feb 2014 04:21:19 +0000 (20:21 -0800)]
Move half precision instructions, add vfmsv, vfmvv
Andrew Waterman [Sat, 1 Feb 2014 01:21:37 +0000 (17:21 -0800)]
Fix linking on Darwin
Christopher Celio [Wed, 29 Jan 2014 01:06:27 +0000 (17:06 -0800)]
Disasm now translates xor x0,x0,x0 as a machine-generated bubble ("-").
It is very convenient for pipeline trace viewing to differentiate
between compiler NOPs and pipeline bubbles.
Andrew Waterman [Tue, 28 Jan 2014 11:38:28 +0000 (03:38 -0800)]
Force extension loaders to be linked in
Andrew Waterman [Mon, 27 Jan 2014 05:50:31 +0000 (21:50 -0800)]
Enable runtime loading of dynamic library with --extlib
Andrew Waterman [Mon, 27 Jan 2014 05:48:57 +0000 (21:48 -0800)]
Prefer libraries located in current directory
Andrew Waterman [Mon, 27 Jan 2014 00:26:39 +0000 (16:26 -0800)]
Eliminate hwacha <-> riscv circular dependence
We now split out the spike executable into another subproject,
which depends on both rocket and hwacha
Andrew Waterman [Mon, 27 Jan 2014 00:26:25 +0000 (16:26 -0800)]
Link subproject dynamic libraries correctly
Andrew Waterman [Sun, 26 Jan 2014 02:31:32 +0000 (18:31 -0800)]
Merge softfloat_riscv into softfloat
They really aren't independent libraries.
Andrew Waterman [Fri, 24 Jan 2014 09:35:13 +0000 (01:35 -0800)]
Require libdl for dynamic linking at runtime
Andrew Waterman [Fri, 24 Jan 2014 09:34:50 +0000 (01:34 -0800)]
Disassemble amoxor
Andrew Waterman [Fri, 24 Jan 2014 09:23:08 +0000 (01:23 -0800)]
Build and use shared libraries only
Andrew Waterman [Fri, 24 Jan 2014 09:09:05 +0000 (01:09 -0800)]
Build and use shared libraries
Andrew Waterman [Fri, 24 Jan 2014 09:08:40 +0000 (01:08 -0800)]
Handle CSR permissions correctly
Andrew Waterman [Wed, 22 Jan 2014 00:20:58 +0000 (16:20 -0800)]
Use auto-generated trap cause numbers
Quan Nguyen [Tue, 21 Jan 2014 04:33:22 +0000 (20:33 -0800)]
Merge branch 'confprec'
Conflicts:
hwacha/hwacha.mk.in
Andrew Waterman [Thu, 16 Jan 2014 08:09:27 +0000 (00:09 -0800)]
Initialize tohost and fromhost to zero
Surprising we got away without doing this for so long
Andrew Waterman [Tue, 14 Jan 2014 00:42:02 +0000 (16:42 -0800)]
Improve performance for branchy code
We now use a heavily unrolled loop as the software I$, which allows the
host machine's branch target prediction to associate target PCs with
unique-ish host PCs.
Andrew Waterman [Tue, 17 Dec 2013 18:18:47 +0000 (10:18 -0800)]
Speed things up quite a bit
Andrew Waterman [Mon, 9 Dec 2013 23:55:52 +0000 (15:55 -0800)]
New RDCYCLE encoding
Quan Nguyen [Sat, 30 Nov 2013 04:21:36 +0000 (20:21 -0800)]
Remove debug printf in vsetprec
Quan Nguyen [Sat, 30 Nov 2013 04:10:46 +0000 (20:10 -0800)]
Add vsetprec instruction prototype
Andrew Waterman [Mon, 25 Nov 2013 12:42:03 +0000 (04:42 -0800)]
Update to new privileged ISA
Quan Nguyen [Mon, 25 Nov 2013 05:59:52 +0000 (21:59 -0800)]
Merge branch 'master' of github.com:ucb-bar/riscv-isa-sim into HEAD
Yunsup Lee [Thu, 21 Nov 2013 22:42:32 +0000 (14:42 -0800)]
fix slli/slliw encoding bug
Yunsup Lee [Wed, 6 Nov 2013 05:03:23 +0000 (21:03 -0800)]
add accelerator disabled cause
Yunsup Lee [Wed, 6 Nov 2013 05:01:34 +0000 (21:01 -0800)]
correctly trap when SR_EA is disabled
Albert Ou [Tue, 5 Nov 2013 07:25:00 +0000 (23:25 -0800)]
Fix declaration of half-precision instructions
Albert Ou [Tue, 5 Nov 2013 06:33:20 +0000 (22:33 -0800)]
Re-add Hwacha header file
Albert Ou [Tue, 5 Nov 2013 06:31:01 +0000 (22:31 -0800)]
Implement "half-baked" half-precision instruction subset for Hwacha
Albert Ou [Tue, 5 Nov 2013 06:26:53 +0000 (22:26 -0800)]
Merge branch 'master' of github.com:ucb-bar/riscv-isa-sim into confprec
Yunsup Lee [Tue, 29 Oct 2013 06:49:08 +0000 (23:49 -0700)]
include stdexcept
Andrew Waterman [Tue, 29 Oct 2013 03:37:39 +0000 (20:37 -0700)]
Pass target machine's return code back to OS
Quan Nguyen [Mon, 28 Oct 2013 06:02:23 +0000 (23:02 -0700)]
Add missing fcvt opcodes through riscv-opcodes
Yunsup Lee [Tue, 22 Oct 2013 01:53:02 +0000 (18:53 -0700)]
clarify vxcptsave/vxctkill semantics
Yunsup Lee [Sat, 19 Oct 2013 05:28:23 +0000 (22:28 -0700)]
implement vxcptsave/vxcptrestore
Yunsup Lee [Sat, 19 Oct 2013 02:22:08 +0000 (19:22 -0700)]
clean up SR_EA, the enable accelerator bit in status reg
Yunsup Lee [Sat, 19 Oct 2013 02:19:00 +0000 (19:19 -0700)]
more hwacha supervisor stuff
Yunsup Lee [Sat, 19 Oct 2013 00:34:54 +0000 (17:34 -0700)]
refactor disassembler, and add hwacha disassembler
Yunsup Lee [Fri, 18 Oct 2013 19:04:46 +0000 (12:04 -0700)]
can't execute frsr/fssr on ut
Yunsup Lee [Fri, 18 Oct 2013 19:02:59 +0000 (12:02 -0700)]
or into control thread's fp exceptions
Quan Nguyen [Fri, 18 Oct 2013 06:47:14 +0000 (23:47 -0700)]
Add empty opcode header files for half-precision
* Update riscv/opcodes.h through the riscv-opcodes repository.
Yunsup Lee [Fri, 18 Oct 2013 02:44:53 +0000 (19:44 -0700)]
catch trap_illegal_instruction in hwacha
Yunsup Lee [Fri, 18 Oct 2013 02:34:26 +0000 (19:34 -0700)]
add hwacha exception support
Yunsup Lee [Fri, 18 Oct 2013 02:32:55 +0000 (19:32 -0700)]
fix custom-1 rocc encoding
Yunsup Lee [Wed, 16 Oct 2013 22:10:12 +0000 (15:10 -0700)]
fix maxvl calc logic
Yunsup Lee [Wed, 16 Oct 2013 21:27:12 +0000 (14:27 -0700)]
use reset virtual method
Yunsup Lee [Wed, 16 Oct 2013 21:26:59 +0000 (14:26 -0700)]
use uint32_t for vl
Yunsup Lee [Wed, 16 Oct 2013 21:26:13 +0000 (14:26 -0700)]
fix missing null check when there's no extension
Yunsup Lee [Wed, 16 Oct 2013 21:11:18 +0000 (14:11 -0700)]
revamp hwacha; now runs in physical mode
Stephen Twigg [Tue, 15 Oct 2013 07:30:46 +0000 (00:30 -0700)]
Propogate the reset call to the extensions as well. Add reset function to extensions (demonstration in dummy acc)
Stephen Twigg [Tue, 15 Oct 2013 07:21:00 +0000 (00:21 -0700)]
Fix bug where xs2 was not being properly respected.
Yunsup Lee [Thu, 10 Oct 2013 19:07:30 +0000 (12:07 -0700)]
commit configure script; new configure option --enable-commitlog
Christopher Celio [Fri, 27 Sep 2013 09:17:19 +0000 (02:17 -0700)]
Added commit logging (--enable-commitlog). Also fixed disasm bug.
Andrew Waterman [Fri, 27 Sep 2013 07:15:35 +0000 (00:15 -0700)]
Use WRITE_RD/WRITE_FRD macros to write registers
Andrew Waterman [Fri, 27 Sep 2013 03:53:36 +0000 (20:53 -0700)]
Bye, CB
Scott Beamer [Mon, 23 Sep 2013 22:49:23 +0000 (15:49 -0700)]
fixes compile bug for not being able to find std::logic_error
Andrew Waterman [Mon, 23 Sep 2013 22:47:50 +0000 (15:47 -0700)]
Fix Scott's deadlock
Not Scott's fault, I mean
Stephen Twigg [Sun, 22 Sep 2013 09:21:13 +0000 (02:21 -0700)]
Adjust rocc_inst_t to properly extract fields due to the new ISA encoding.
Andrew Waterman [Sat, 21 Sep 2013 13:40:54 +0000 (06:40 -0700)]
Update ISA encoding and AUIPC semantics
Andrew Waterman [Sun, 15 Sep 2013 11:27:07 +0000 (04:27 -0700)]
Add helper disassembly program
Andrew Waterman [Sun, 15 Sep 2013 11:26:35 +0000 (04:26 -0700)]
ISA changes
Andrew Waterman [Wed, 11 Sep 2013 11:13:27 +0000 (04:13 -0700)]
Add AMOXOR
Andrew Waterman [Wed, 11 Sep 2013 10:12:11 +0000 (03:12 -0700)]
Implement zany immediates
Andrew Waterman [Tue, 10 Sep 2013 09:07:08 +0000 (02:07 -0700)]
Don't tick HTIF as often
Andrew Waterman [Tue, 10 Sep 2013 09:06:56 +0000 (02:06 -0700)]
Add rd field to JAL; drop J
Andrew Waterman [Sun, 18 Aug 2013 11:14:16 +0000 (04:14 -0700)]
Renumber PCRs
Andrew Waterman [Tue, 13 Aug 2013 07:54:21 +0000 (00:54 -0700)]
Add test program for dummy rocc
Should move this elsewhere
Andrew Waterman [Tue, 13 Aug 2013 07:51:07 +0000 (00:51 -0700)]
Implement RoCC and add a dummy RoCC
Enable it with --extension=dummy
Andrew Waterman [Mon, 12 Aug 2013 02:10:51 +0000 (19:10 -0700)]
Instructions are no longer member functions
Andrew Waterman [Thu, 8 Aug 2013 03:13:33 +0000 (20:13 -0700)]
Ignore JALR's effective address LSB
Andrew Waterman [Wed, 7 Aug 2013 01:00:30 +0000 (18:00 -0700)]
Disentangle some header files
Andrew Waterman [Wed, 7 Aug 2013 01:00:18 +0000 (18:00 -0700)]
Rename MTFSR/MFFSR to FSSR/FRSR
Andrew Waterman [Wed, 7 Aug 2013 00:59:48 +0000 (17:59 -0700)]
Swap J and JALR encoding
Quan Nguyen [Thu, 1 Aug 2013 04:33:25 +0000 (21:33 -0700)]
Fix eret (again)
* Set SR_S if SR_PS is set, not the other way around
(that is, set SR_S if SR_PS is not set).
Andrew Waterman [Wed, 31 Jul 2013 20:37:33 +0000 (13:37 -0700)]
Fix dumb ERET bug
Andrew Waterman [Mon, 29 Jul 2013 02:46:18 +0000 (19:46 -0700)]
Don't flush TLB on PTBR writes (only FATC)
Andrew Waterman [Sat, 27 Jul 2013 03:25:18 +0000 (20:25 -0700)]
New supervisor mode