Eddie Hung [Fri, 12 Apr 2019 23:30:53 +0000 (16:30 -0700)]
Merge remote-tracking branch 'origin/master' into xaig
Eddie Hung [Fri, 12 Apr 2019 23:29:14 +0000 (16:29 -0700)]
Use -map instead of -symbols for aiger
Eddie Hung [Fri, 12 Apr 2019 23:17:48 +0000 (16:17 -0700)]
ci_bits and co_bits now a list, order is important for ABC
Eddie Hung [Fri, 12 Apr 2019 23:17:12 +0000 (16:17 -0700)]
Also cope with duplicated CIs
Eddie Hung [Fri, 12 Apr 2019 21:13:11 +0000 (14:13 -0700)]
WIP
Eddie Hung [Tue, 9 Apr 2019 17:09:43 +0000 (10:09 -0700)]
Comment out
Eddie Hung [Tue, 9 Apr 2019 17:06:44 +0000 (10:06 -0700)]
Add support for synth_xilinx -abc9 and ignore abc9 -dress opt
Eddie Hung [Fri, 12 Apr 2019 19:27:07 +0000 (12:27 -0700)]
Cope with an output having same name as an input (i.e. CO)
Eddie Hung [Fri, 12 Apr 2019 19:21:48 +0000 (12:21 -0700)]
Merge remote-tracking branch 'origin/master' into xaig
Eddie Hung [Fri, 12 Apr 2019 18:52:45 +0000 (11:52 -0700)]
Merge pull request #928 from litghost/add_xc7_sim_models
Add additional cells sim models for core 7-series primitives.
Eddie Hung [Fri, 12 Apr 2019 17:36:05 +0000 (10:36 -0700)]
PI before CI
Eddie Hung [Fri, 12 Apr 2019 16:46:07 +0000 (09:46 -0700)]
Merge remote-tracking branch 'origin/master' into xc7mux
Keith Rothman [Fri, 12 Apr 2019 16:30:49 +0000 (09:30 -0700)]
Remove BUFGCTRL, BUFHCE and LUT6_2 from cells_xtra.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
Clifford Wolf [Fri, 12 Apr 2019 12:57:36 +0000 (14:57 +0200)]
Merge pull request #933 from dh73/master
Fixing issues in CycloneV cell sim
Clifford Wolf [Fri, 12 Apr 2019 12:57:01 +0000 (14:57 +0200)]
Merge pull request #932 from YosysHQ/eddie/fixdlatch
Recognise default entry in case even if all cases covered (fix for #931)
Diego [Fri, 12 Apr 2019 00:59:03 +0000 (19:59 -0500)]
Fixing issues in CycloneV cell sim
Eddie Hung [Thu, 11 Apr 2019 23:25:59 +0000 (16:25 -0700)]
Fix ordering of when to insert zero index
Eddie Hung [Thu, 11 Apr 2019 23:21:01 +0000 (16:21 -0700)]
Merge remote-tracking branch 'origin/pmux2shiftx' into xc7mux
Eddie Hung [Thu, 11 Apr 2019 23:20:43 +0000 (16:20 -0700)]
More unused
Eddie Hung [Thu, 11 Apr 2019 23:18:45 +0000 (16:18 -0700)]
Merge remote-tracking branch 'origin/pmux2shiftx' into xc7mux
Eddie Hung [Thu, 11 Apr 2019 23:18:01 +0000 (16:18 -0700)]
Remove unused
Eddie Hung [Thu, 11 Apr 2019 23:17:09 +0000 (16:17 -0700)]
Fixes
Eddie Hung [Thu, 11 Apr 2019 22:52:04 +0000 (15:52 -0700)]
WIP
Eddie Hung [Thu, 11 Apr 2019 22:09:13 +0000 (15:09 -0700)]
Spelling fixes
Eddie Hung [Thu, 11 Apr 2019 22:03:40 +0000 (15:03 -0700)]
Add default entry to testcase
Eddie Hung [Thu, 11 Apr 2019 19:34:51 +0000 (12:34 -0700)]
Recognise default entry in case even if all cases covered (#931)
Eddie Hung [Thu, 11 Apr 2019 17:48:14 +0000 (10:48 -0700)]
Fix cells_map.v some more
Eddie Hung [Thu, 11 Apr 2019 17:08:05 +0000 (10:08 -0700)]
More fine tuning
Eddie Hung [Thu, 11 Apr 2019 17:04:58 +0000 (10:04 -0700)]
Fix cells_map.v
Eddie Hung [Thu, 11 Apr 2019 16:25:19 +0000 (09:25 -0700)]
Fix typo
Eddie Hung [Thu, 11 Apr 2019 16:13:39 +0000 (09:13 -0700)]
Juggle opt calls in synth_xilinx
Eddie Hung [Thu, 11 Apr 2019 01:07:11 +0000 (18:07 -0700)]
Merge branch 'xaig' into xc7mux
Eddie Hung [Thu, 11 Apr 2019 01:06:33 +0000 (18:06 -0700)]
Add non-input bits driven by unrecognised cells as ci_bits
Eddie Hung [Thu, 11 Apr 2019 01:05:09 +0000 (18:05 -0700)]
WIP for cells_map.v -- maybe working?
Eddie Hung [Wed, 10 Apr 2019 23:15:23 +0000 (16:15 -0700)]
Try splitting $shiftx with Y_WIDTH > 1 into Y_WIDTH = 1
Eddie Hung [Wed, 10 Apr 2019 21:51:10 +0000 (14:51 -0700)]
Fix for when B_SIGNED = 1
Eddie Hung [Wed, 10 Apr 2019 21:48:58 +0000 (14:48 -0700)]
Update doc for synth_xilinx
Eddie Hung [Wed, 10 Apr 2019 21:03:09 +0000 (14:03 -0700)]
Merge branch 'xaig' into xc7mux
Eddie Hung [Wed, 10 Apr 2019 21:02:23 +0000 (14:02 -0700)]
parse_aiger() to rename all $lut cells after "clean"
Eddie Hung [Wed, 10 Apr 2019 19:36:06 +0000 (12:36 -0700)]
ff_map.v after abc
Eddie Hung [Wed, 10 Apr 2019 16:02:42 +0000 (09:02 -0700)]
Tidy up
Eddie Hung [Wed, 10 Apr 2019 15:50:31 +0000 (08:50 -0700)]
Move map_cells to before map_luts
Eddie Hung [Wed, 10 Apr 2019 15:49:55 +0000 (08:49 -0700)]
WIP for $shiftx to wide mux
Eddie Hung [Wed, 10 Apr 2019 15:49:39 +0000 (08:49 -0700)]
Update LUT delays
Eddie Hung [Wed, 10 Apr 2019 15:32:53 +0000 (08:32 -0700)]
synth_* with -retime option now calls abc with -D 1 as well
Eddie Hung [Wed, 10 Apr 2019 15:31:40 +0000 (08:31 -0700)]
Revert "abc -dff now implies "-D 0" otherwise retiming doesn't happen"
This reverts commit
19271bd996a79cb4be1db658fcf18227ee0a1dff.
Eddie Hung [Wed, 10 Apr 2019 15:31:35 +0000 (08:31 -0700)]
Revert ""&nf -D 0" fails => use "-D 1" instead"
This reverts commit
3c253818cab2013dc4db55732d3e21cfa0dc3f19.
Eddie Hung [Wed, 10 Apr 2019 15:23:00 +0000 (08:23 -0700)]
Merge remote-tracking branch 'origin/master' into eddie/fix_retime
Eddie Hung [Tue, 9 Apr 2019 21:33:37 +0000 (14:33 -0700)]
Add cells.lut to techlibs/xilinx/
Eddie Hung [Tue, 9 Apr 2019 21:32:39 +0000 (14:32 -0700)]
synth_xilinx to call abc with -lut +/xilinx/cells.lut
Eddie Hung [Tue, 9 Apr 2019 21:32:10 +0000 (14:32 -0700)]
Add delays to cells.box
Eddie Hung [Tue, 9 Apr 2019 21:31:31 +0000 (14:31 -0700)]
Add "-lut <file>" support to abc9
Keith Rothman [Tue, 9 Apr 2019 18:43:19 +0000 (11:43 -0700)]
Fix LUT6_2 definition.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
Eddie Hung [Tue, 9 Apr 2019 18:01:46 +0000 (11:01 -0700)]
synth_xilinx with abc9 to use -box
Eddie Hung [Tue, 9 Apr 2019 17:58:58 +0000 (10:58 -0700)]
Add techlibs/xilinx/cells.box
Eddie Hung [Tue, 9 Apr 2019 17:58:06 +0000 (10:58 -0700)]
Add "-box" option to abc9
Eddie Hung [Tue, 9 Apr 2019 17:32:58 +0000 (10:32 -0700)]
Add 'setundef -zero' call prior to aigmap in abc9
Eddie Hung [Tue, 9 Apr 2019 17:09:43 +0000 (10:09 -0700)]
Comment out
Eddie Hung [Tue, 9 Apr 2019 17:06:44 +0000 (10:06 -0700)]
Add support for synth_xilinx -abc9 and ignore abc9 -dress opt
Zachary Snow [Tue, 9 Apr 2019 16:28:32 +0000 (12:28 -0400)]
support repeat loops with constant repeat counts outside of constant functions
Keith Rothman [Tue, 9 Apr 2019 16:01:53 +0000 (09:01 -0700)]
Add additional cells sim models for core 7-series primatives.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
Eddie Hung [Mon, 8 Apr 2019 23:46:33 +0000 (16:46 -0700)]
Fix a few typos
Eddie Hung [Mon, 8 Apr 2019 23:40:17 +0000 (16:40 -0700)]
More space fixing
Eddie Hung [Mon, 8 Apr 2019 23:37:22 +0000 (16:37 -0700)]
Fix spacing
Eddie Hung [Mon, 8 Apr 2019 23:31:59 +0000 (16:31 -0700)]
Merge branch 'master' into xaig
Eddie Hung [Mon, 8 Apr 2019 23:24:20 +0000 (16:24 -0700)]
$_XILINX_SHREG_ to preserve src attribute
Eddie Hung [Mon, 8 Apr 2019 23:22:07 +0000 (16:22 -0700)]
Update CHANGELOG
Eddie Hung [Mon, 8 Apr 2019 23:07:52 +0000 (16:07 -0700)]
Merge branch 'undo_pr895' into xc7srl
Eddie Hung [Mon, 8 Apr 2019 23:05:24 +0000 (16:05 -0700)]
Undo #895 by instead setting an attribute
Eddie Hung [Mon, 8 Apr 2019 22:57:07 +0000 (15:57 -0700)]
Cope with undoing #895
Clifford Wolf [Mon, 8 Apr 2019 19:14:05 +0000 (21:14 +0200)]
Merge pull request #919 from YosysHQ/multiport_transp
memory_bram: Fix multiport make_transp
Eddie Hung [Mon, 8 Apr 2019 19:01:06 +0000 (12:01 -0700)]
Revert "Remove handling for $pmux, since #895"
This reverts commit
aa693d5723ef1438d42cd35a26673703b1eff79f.
David Shah [Sun, 7 Apr 2019 15:56:31 +0000 (16:56 +0100)]
memory_bram: Fix multiport make_transp
Signed-off-by: David Shah <dave@ds0.me>
Benedikt Tutzer [Sun, 7 Apr 2019 08:11:35 +0000 (10:11 +0200)]
Suppress error from the compiler run during libboost-python* detection
Eddie Hung [Sat, 6 Apr 2019 00:35:49 +0000 (17:35 -0700)]
Call shregmap twice -- once for variable, another for fixed
Eddie Hung [Fri, 5 Apr 2019 23:30:17 +0000 (16:30 -0700)]
Merge branch 'eddie/fix_retime' into xc7srl
Eddie Hung [Fri, 5 Apr 2019 23:28:46 +0000 (16:28 -0700)]
Add retime test
Eddie Hung [Fri, 5 Apr 2019 23:28:14 +0000 (16:28 -0700)]
Fix S0 -> S1
Eddie Hung [Fri, 5 Apr 2019 23:20:43 +0000 (16:20 -0700)]
Move dffinit til after abc
Eddie Hung [Fri, 5 Apr 2019 22:46:18 +0000 (15:46 -0700)]
Merge branch 'eddie/fix_retime' into xc7srl
Eddie Hung [Fri, 5 Apr 2019 22:39:05 +0000 (15:39 -0700)]
Move techamp t:$_DFF_?N? to before abc call
Eddie Hung [Fri, 5 Apr 2019 22:31:54 +0000 (15:31 -0700)]
Retry
Eddie Hung [Fri, 5 Apr 2019 22:30:19 +0000 (15:30 -0700)]
"&nf -D 0" fails => use "-D 1" instead
Eddie Hung [Fri, 5 Apr 2019 22:15:13 +0000 (15:15 -0700)]
Resolve @daveshah1 comment, update synth_xilinx help
Eddie Hung [Fri, 5 Apr 2019 21:43:06 +0000 (14:43 -0700)]
synth_xilinx to techmap FFs after abc call, otherwise -retime fails
Eddie Hung [Fri, 5 Apr 2019 21:42:25 +0000 (14:42 -0700)]
abc -dff now implies "-D 0" otherwise retiming doesn't happen
Eddie Hung [Fri, 5 Apr 2019 19:55:52 +0000 (12:55 -0700)]
techmap inside map_cells stage
Clifford Wolf [Fri, 5 Apr 2019 15:31:49 +0000 (17:31 +0200)]
Add "read_ilang -lib"
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Benedikt Tutzer [Fri, 5 Apr 2019 09:56:01 +0000 (11:56 +0200)]
Autodetect Python paths and boost python libraries for different distributions
Clifford Wolf [Thu, 4 Apr 2019 16:10:10 +0000 (18:10 +0200)]
Added missing argument checking to "mutate" command
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Eddie Hung [Thu, 4 Apr 2019 15:13:34 +0000 (08:13 -0700)]
Merge branch 'map_cells_before_map_luts' into xc7srl
Eddie Hung [Thu, 4 Apr 2019 15:13:10 +0000 (08:13 -0700)]
Missing techmap entry in help
Eddie Hung [Thu, 4 Apr 2019 15:10:40 +0000 (08:10 -0700)]
Use soft-logic, not LUT3 instantiation
Eddie Hung [Thu, 4 Apr 2019 14:54:42 +0000 (07:54 -0700)]
Merge branch 'map_cells_before_map_luts' into xc7srl
Eddie Hung [Thu, 4 Apr 2019 14:48:13 +0000 (07:48 -0700)]
synth_xilinx to map_cells before map_luts
Eddie Hung [Thu, 4 Apr 2019 14:41:40 +0000 (07:41 -0700)]
Cleanup comments
Eddie Hung [Thu, 4 Apr 2019 14:39:19 +0000 (07:39 -0700)]
t:$dff* -> t:$dff t:$dffe
Benedikt Tutzer [Thu, 4 Apr 2019 08:35:01 +0000 (10:35 +0200)]
Used PyImport_ImportModule instead of PyImport_Import to avoid the explicit conversion to a python string
Benedikt Tutzer [Thu, 4 Apr 2019 07:51:14 +0000 (09:51 +0200)]
Removed link to experimental filesystem library
Benedikt Tutzer [Thu, 4 Apr 2019 07:24:50 +0000 (09:24 +0200)]
Changed filesystem dependency to boost instead of experimental std library