mesa.git
8 years agodraw: fix pstipple and aaline stages wrt sampler_views/samplers
Roland Scheidegger [Thu, 17 Dec 2015 04:58:58 +0000 (05:58 +0100)]
draw: fix pstipple and aaline stages wrt sampler_views/samplers

Those stages only really work for OGL-style texturing (so number of samplers
and views mostly the same, certainly for the max values).
These get often set up all at once, thus there might be max number of both
even if all of them are just NULL. We must not set the max number of samplers
and views to the same value since that will lead to terrible things if a driver
supports more views than samplers (and the state tracker set up all the views).
(This will not make these stages magically work if a shader uses dx10-style
texturing, they might still replace an actually used sview in that case.)

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
8 years agoswrast: move two global defines to the only place where they are used
Miklós Máté [Tue, 15 Dec 2015 23:05:42 +0000 (00:05 +0100)]
swrast: move two global defines to the only place where they are used

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
8 years agomesa: improve debug log in atifragshader
Miklós Máté [Tue, 15 Dec 2015 23:05:41 +0000 (00:05 +0100)]
mesa: improve debug log in atifragshader

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
8 years agoprogram: fix comment about the fog formula
Miklós Máté [Tue, 15 Dec 2015 23:05:40 +0000 (00:05 +0100)]
program: fix comment about the fog formula

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
8 years agomesa: Don't leak ATIfs instructions in DeleteFragmentShader
Miklós Máté [Tue, 15 Dec 2015 23:05:34 +0000 (00:05 +0100)]
mesa: Don't leak ATIfs instructions in DeleteFragmentShader

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Cc: "11.0 11.1" <mesa-stable@lists.freedesktop.org>
8 years agoconfigura.ac: fix test for SSE4.1 assembler support
Oded Gabbay [Tue, 15 Dec 2015 10:05:22 +0000 (12:05 +0200)]
configura.ac: fix test for SSE4.1 assembler support

This patch modifies the SSE4.1 test in configure.ac to use a global
variable to initialize vector variables. In addition, we now return the
value of the computation instead of 0.

This is done so gcc 4.9 (and lower) won't optimize the SSE4.1 assembly
instructions (when using -O1 and higher), because then the configure test
might incorrectly pass even though the assembler doesn't support the
SSE4.1 instructions (the test will pass because the compiler does support the intrinsics).

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91806
Cc: "11.0 11.1" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
8 years agoconfigure: check for python2.7 for PYTHON2
Jonathan Gray [Sun, 6 Dec 2015 05:11:05 +0000 (16:11 +1100)]
configure: check for python2.7 for PYTHON2

Check for a 'python2.7' binary, 'python' and 'python2' are not
provided by the OpenBSD python 2.7.x packages.

Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Cc: "11.0 11.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
8 years agoconfigure.ac: use pkg-config for libelf
Jonathan Gray [Wed, 9 Dec 2015 05:55:01 +0000 (16:55 +1100)]
configure.ac: use pkg-config for libelf

Use PKG_CHECK_MODULES to get the flags to link libelf

v2: keep AC_CHECK_LIB as a fallback for elfutils provided
libelf that doesn't install a pkg-config file.

Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Cc: "11.0 11.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
8 years agoi965/screen: Allow OpenGLES 3.1 for gen8+
Jordan Justen [Tue, 15 Dec 2015 23:53:20 +0000 (15:53 -0800)]
i965/screen: Allow OpenGLES 3.1 for gen8+

OpenGLES 3.1 cannot be enabled for gen 7 (Ivy Bridge, Haswell) since
they are still missing ARB_stencil_texturing.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Marta Lofstedt <marta.lofstedt@intel.com>
8 years agoi965: Enable compute shaders in more cases for OpenGLES 3.1
Jordan Justen [Tue, 15 Dec 2015 23:51:25 +0000 (15:51 -0800)]
i965: Enable compute shaders in more cases for OpenGLES 3.1

Previously we were checking the desktop OpenGL ARB_compute_shader
requirements, but for OpenGLES 3.1, the requirements are lower.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Marta Lofstedt <marta.lofstedt@intel.com>
8 years agomain/version: Don't require ARB_compute_shader for OpenGLES 3.1
Jordan Justen [Tue, 15 Dec 2015 23:47:30 +0000 (15:47 -0800)]
main/version: Don't require ARB_compute_shader for OpenGLES 3.1

The OpenGL ARB_compute_shader extension specfication requires at least
1024 for GL_MAX_COMPUTE_WORK_GROUP_INVOCATIONS, whereas OpenGLES 3.1
only required 128.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
8 years agomain: Allow compute shaders to be compiled with OpenGLES 3.1
Jordan Justen [Tue, 15 Dec 2015 23:44:11 +0000 (15:44 -0800)]
main: Allow compute shaders to be compiled with OpenGLES 3.1

Previous OpenGLES 3.1 testing had been done when ARB_compute_shader
was overridden to enabled.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Marta Lofstedt <marta.lofstedt@intel.com>
8 years agomain: Add MESA_VERBOSE=api for LinkProgram & UseProgram
Jordan Justen [Tue, 15 Dec 2015 23:43:17 +0000 (15:43 -0800)]
main: Add MESA_VERBOSE=api for LinkProgram & UseProgram

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
8 years agoir_to_mesa: Skip useless comparison instructions.
Matt Turner [Fri, 4 Dec 2015 00:41:36 +0000 (16:41 -0800)]
ir_to_mesa: Skip useless comparison instructions.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
8 years agoglsl: Remove inverse() from GLSL 1.20 and 1.30.
Kenneth Graunke [Wed, 16 Dec 2015 08:56:39 +0000 (00:56 -0800)]
glsl: Remove inverse() from GLSL 1.20 and 1.30.

I apparently regressed this when rewriting the built-ins using
ir_builder, in 76d2f73643f.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93387
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Matt Turner <mattst88@gmail.com>
8 years agonv50: free memory allocated by the prog which reads MP perf counters
Samuel Pitoiset [Wed, 16 Dec 2015 21:54:30 +0000 (22:54 +0100)]
nv50: free memory allocated by the prog which reads MP perf counters

This fixes a memory leak introduced in 6a9c151
("nv50: add compute-related MP perf counters on G84+")

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "11.1" <mesa-stable@lists.freedesktop.org>
8 years agost/osmesa: add OSMesaCreateContextAttribs() function
Brian Paul [Tue, 15 Dec 2015 22:34:52 +0000 (15:34 -0700)]
st/osmesa: add OSMesaCreateContextAttribs() function

As with the previous commit, except for gallium.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
8 years agoosmesa: add new OSMesaCreateContextAttribs function
Brian Paul [Tue, 15 Dec 2015 22:33:54 +0000 (15:33 -0700)]
osmesa: add new OSMesaCreateContextAttribs function

This allows specifying a GL profile and version so one can get a core-
profile context.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
8 years agosvga: don't use debug code in update_state() in release builds
Brian Paul [Mon, 14 Dec 2015 16:32:48 +0000 (09:32 -0700)]
svga: don't use debug code in update_state() in release builds

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
8 years agonv50,nvc0: free memory allocated by performance metrics
Samuel Pitoiset [Wed, 16 Dec 2015 21:44:17 +0000 (22:44 +0100)]
nv50,nvc0: free memory allocated by performance metrics

The destroy_query() helper was actually never called. This fixes
a memory leak while monitoring performance metrics.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "11.1" <mesa-stable@lists.freedesktop.org>
8 years agonvc0: free memory allocated by the prog which reads MP perf counters
Samuel Pitoiset [Wed, 16 Dec 2015 20:47:27 +0000 (21:47 +0100)]
nvc0: free memory allocated by the prog which reads MP perf counters

This fixes a long time ago memory leak (even before all my query
related changes).

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "11.0 11.1" <mesa-stable@lists.freedesktop.org>
8 years agonvc0: fix metric-achieved_occupancy calculation on Kepler
Samuel Pitoiset [Wed, 16 Dec 2015 20:18:03 +0000 (21:18 +0100)]
nvc0: fix metric-achieved_occupancy calculation on Kepler

The maximum number of resident warps per multiprocessor is 64 on
Kepler instead of 48 on Fermi.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
8 years agost/va: remove fence handling v3
Christian König [Tue, 8 Dec 2015 13:28:13 +0000 (14:28 +0100)]
st/va: remove fence handling v3

It's nonsense to drain the pipeline like this.

v2: keep the drain for DMA-buf exports.
v3: flush before the export and after compositing and add TODO comment.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Julien Isorce <j.isorce@samsung.com>
Tested-by: Julien Isorce <j.isorce@samsung.com>
8 years agoRevert "i965: Use MESA_FORMAT_B8G8R8X8_SRGB for RGB visuals"
Neil Roberts [Wed, 16 Dec 2015 14:53:13 +0000 (14:53 +0000)]
Revert "i965: Use MESA_FORMAT_B8G8R8X8_SRGB for RGB visuals"

This reverts commit 839793680f99b8387bee9489733d5071c10f3ace.

The patch was breaking DRI3 because driGLFormatToImageFormat does not
handle MESA_FORMAT_B8G8R8X8_SRGB which ended up making it fail to
create the renderbuffer and it would later crash. It's not trivial to
add this format because there is no __DRI_IMAGE_FORMAT nor
__DRI_IMAGE_FOURCC define for the format either. I'm not sure how
difficult adding this would be and whether adding a new format would
require some sort of new version for DRI. Seeing as this might take a
while to fix I think it makes sense to just revert the patch in the
meantime in order to avoid regressing master.

It is also not handled in intel_gles3_srgb_workaround and there may be
other cases where it breaks.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93388
Acked-by: Jason Ekstrand <jason.ekstrand@intel.com>
8 years agoi965: Fix crash when calling glViewport with no surface bound
Neil Roberts [Tue, 8 Dec 2015 16:35:57 +0000 (16:35 +0000)]
i965: Fix crash when calling glViewport with no surface bound

If EGL_KHR_surfaceless_context is used then glViewport can be called
with NULL for the draw and read surfaces. This was previously causing
a crash because the i965 driver tries to use this point to invalidate
the surfaces and it was derferencing the NULL pointer.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93257
Cc: Nanley Chery <nanley.g.chery@intel.com>
Cc: "11.1" <mesa-stable@lists.freedesktop.org>
Tested-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
8 years agomesa/blit: Don't require the same format for mulitisample blits
Neil Roberts [Wed, 4 Nov 2015 14:52:07 +0000 (15:52 +0100)]
mesa/blit: Don't require the same format for mulitisample blits

Previously the GL spec required that whenever glBlitFramebuffer is
used with either buffer being multisampled, the internal formats must
match. However the GL 4.4 spec was later changed to remove this
restriction. In the section entitled “Changes in the released
Specification of July 22, 2013” it says:

“Relax BlitFramebuffer in section 18.3.1 so that format conversion can
 take place during multisample blits, since drivers already allow this
 and some apps depend on it.”

If most drivers already allowed this in earlier versions I think it's
safe to assume that this is a spec bug and it should also be allowed
in all versions.

This patch just removes the restriction on desktop GL. For GLES there
are conformance tests that assert the previous behaviour so it is
probably safer to leave it in.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92706
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
8 years agost/va: retrieve size from the temporary img variable
Julien Isorce [Tue, 15 Dec 2015 09:01:07 +0000 (09:01 +0000)]
st/va: retrieve size from the temporary img variable

"image" is not ready yet since it will be set at
the end of the function by: *image = *img;

Signed-off-by: Julien Isorce <j.isorce@samsung.com>
Reviewed-by: Christian K<C3><B6>nig <christian.koenig@amd.com>
8 years agodraw: handle edge flags in llvm path
Roland Scheidegger [Tue, 15 Dec 2015 17:02:48 +0000 (18:02 +0100)]
draw: handle edge flags in llvm path

We just ignored them altogether. While this feature is rather old-fashioned
supporting it is actually rather trivial.
This fixes the associated piglit tests (2 gl-1.0-edgeflag, 2 gl-2.0-edgeflag
and all (7) of point-vertex-id).

v2: comment fixes, and make the use of the edgeflag in clipmask consistent
with when it's actually there (should be impossible to hit a case where the
difference would actually matter but still...)

Reviewed-by: Brian Paul <brianp@vmware.com>
8 years agodraw: don't set start_instance and instance id for pt emit
Roland Scheidegger [Tue, 15 Dec 2015 17:13:28 +0000 (18:13 +0100)]
draw: don't set start_instance and instance id for pt emit

This just adds confusion, these parameters are used when fetching vertices
by translate, but certainly not when emitting hw vertices for drivers, they
make no sense there (setting them has no consequences otherwise since there
won't be any elements with instance_divisor set). So just set them to 0 (the
draw_pipe_vbuf code for emitting vertices when the draw pipeline is run
already does exactly that).
Also while here do some whitespace cleanup.

Reviewed-by: Brian Paul <brianp@vmware.com>
8 years agonir/lower_system_values: Refactor and use the builder.
Jason Ekstrand [Tue, 15 Dec 2015 02:56:59 +0000 (18:56 -0800)]
nir/lower_system_values: Refactor and use the builder.

Now that we have a helper in the builder for system values and a helper in
core NIR to get the intrinsic opcode, there's really no point in having
things split out into a helper function.  This commit "modernizes" this
pass to use helpers better and look more like newer passes.

Reviewed-by: Eric Anholt <eric@anholt.net>
8 years agonir/builder: Add a load_system_value helper
Jason Ekstrand [Tue, 15 Dec 2015 02:46:16 +0000 (18:46 -0800)]
nir/builder: Add a load_system_value helper

While we're at it, go ahead and make nir_lower_clip use it.

Reviewed-by: Eric Anholt <eric@anholt.net>
8 years agonir/lower_system_values: Stop supporting non-SSA
Jason Ekstrand [Tue, 15 Dec 2015 02:18:03 +0000 (18:18 -0800)]
nir/lower_system_values: Stop supporting non-SSA

The one user of this (i965) only ever calls it while in SSA form.

Reviewed-by: Eric Anholt <eric@anholt.net>
8 years agonvc0: remove old comment related to metric calculations
Samuel Pitoiset [Tue, 15 Dec 2015 21:47:05 +0000 (22:47 +0100)]
nvc0: remove old comment related to metric calculations

I forgot to remove it when I refactored all performance metrics.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
8 years agovc4: Add support for dumping executed commands to a file.
Eric Anholt [Tue, 14 Oct 2014 11:35:47 +0000 (12:35 +0100)]
vc4: Add support for dumping executed commands to a file.

The VC4_DEBUG=cl,qpu is nice and all, but I want to be able to get more
detailed dumps, and to replay the same exact commands in simulation.  For
that I need a dump with all of the VBOs, shaders, shader recs, etc.  This
dump can be parsed by vc4-gpu-tools.

For now this is only doable from simulator mode, because otherwise we
don't have access to the RCL contents generated by the kernel.

8 years agovc4: Import updated vc4_drm.h with hang state.
Eric Anholt [Mon, 2 Nov 2015 20:54:06 +0000 (12:54 -0800)]
vc4: Import updated vc4_drm.h with hang state.

8 years agovc4: Only update vc4->msaa when the framebuffer changes.
Eric Anholt [Mon, 14 Dec 2015 23:31:40 +0000 (15:31 -0800)]
vc4: Only update vc4->msaa when the framebuffer changes.

Any update here should have been the same as in
vc4_set_framebuffer_state(), except for the point where vc4_blit.c
temporarily sets different state for its different buffers.

8 years agovc4: Don't consider nr_samples==1 surfaces to be MSAA.
Eric Anholt [Mon, 14 Dec 2015 23:22:55 +0000 (15:22 -0800)]
vc4: Don't consider nr_samples==1 surfaces to be MSAA.

This is apparently a weirdness of gallium -- nr_samples==1 is occasionally
used and means the same thing as nr_samples==0.  Fixes a bunch of
ARB_framebuffer_srgb blit cases in piglit.

8 years agovc4: Fix min() wrapper definition for the simulator's kernel code.
Eric Anholt [Mon, 14 Dec 2015 20:25:28 +0000 (12:25 -0800)]
vc4: Fix min() wrapper definition for the simulator's kernel code.

8 years agovc4: Warn instead of abort()ing on exec ioctl failures.
Eric Anholt [Sat, 12 Dec 2015 03:06:09 +0000 (19:06 -0800)]
vc4: Warn instead of abort()ing on exec ioctl failures.

It's really harsh to abort() the X Server because of a momentary failure
(particularly -ENOMEM).  I don't see a way to pass an -ENOMEM up the stack
from here, but we can at least log to stderr before proceeding on.

Cc: "11.1" <mesa-stable@lists.freedesktop.org>
8 years agodocs: Replace sourceforge logo with a text link
Andreas Boll [Thu, 26 Nov 2015 19:06:07 +0000 (20:06 +0100)]
docs: Replace sourceforge logo with a text link

Fixes the following Lintian (Debian package checker) error:

privacy-breach-logo

  usr/share/doc/mesa-common-dev/contents.html
    (http://sourceforge.net/sflogo.php?group_id=3&amp;type=1)
  usr/share/doc/mesa-common-dev/thanks.html
    (http://sourceforge.net/sflogo.php?group_id=3&amp;type=1)

The extended description of this tag is:

    This package creates a potential privacy breach by fetching a logo
at runtime.

    Before using a local copy you should check that the logo is suitable
for main. You can get help with determining this by posting a link to
the logo and a copy of, or a link to, the logo copyright and license
information to the debian-legal mailing list.

    Please replace any scripts, images, or other remote resources with
non-remote resources. It is preferable to replace them with text and
links but local copies of the remote resources are also acceptable as
long as they don't also make calls to remote services. Please ensure
that the remote resources are suitable for Debian main before making
local copies of them.

    Severity: serious, Certainty: possible

    Check: files, Type: binary, udeb

Signed-off-by: Andreas Boll <andreas.boll.dev@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
8 years agoradeonsi: fix perfcounter selection for SI_PC_MULTI_BLOCK layouts
Nicolai Hähnle [Sun, 13 Dec 2015 21:46:21 +0000 (16:46 -0500)]
radeonsi: fix perfcounter selection for SI_PC_MULTI_BLOCK layouts

The incorrectly computed register count caused lockups.

Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
8 years agogallium/radeon: remove unnecessary test in r600_pc_query_add_result
Nicolai Hähnle [Fri, 11 Dec 2015 20:55:20 +0000 (15:55 -0500)]
gallium/radeon: remove unnecessary test in r600_pc_query_add_result

This test is a left-over of the initial development. It is unneeded and
misleading, so let's get rid of it.

Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
8 years agomesa/main: use BITSET_FOREACH_SET in perf_monitor_result_size
Nicolai Hähnle [Sat, 12 Dec 2015 20:20:33 +0000 (15:20 -0500)]
mesa/main: use BITSET_FOREACH_SET in perf_monitor_result_size

This should make the code both faster and slightly clearer.

Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
8 years agodocs: add news item and link release notes for 11.1.0
Emil Velikov [Tue, 15 Dec 2015 15:05:40 +0000 (15:05 +0000)]
docs: add news item and link release notes for 11.1.0

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
8 years agodocs: add sha256 checksums for 11.0.1
Emil Velikov [Tue, 15 Dec 2015 14:59:56 +0000 (14:59 +0000)]
docs: add sha256 checksums for 11.0.1

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 525f3c2c28cd083b37e1f6a27f503af1c4781141)

8 years agodocs: Update 11.1.0 release notes
Emil Velikov [Mon, 14 Dec 2015 23:02:50 +0000 (23:02 +0000)]
docs: Update 11.1.0 release notes

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 5a616125acf0ac043d2d44b7a8e804739d55014e)

8 years agofreedreno/a4xx: fix fragcoord.z + fragdepth
Rob Clark [Sun, 13 Dec 2015 18:28:59 +0000 (13:28 -0500)]
freedreno/a4xx: fix fragcoord.z + fragdepth

It seems like disabling earlyz on a4xx also, by defaults, disables
fragcoord.z to the FS.  For frag shaders that both read fragcoord(.z)
and write fragdepth, we need to set some extra bits to prevent a
lockup.

This lets us get rid of the hack of disabling fragcoord.z (which
prevented 0ad from lockups, but resulted in rendering corruption).  Also
fixes fbo-depth-sample-compare.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
8 years agofreedreno: update generated headers
Rob Clark [Sun, 13 Dec 2015 18:24:48 +0000 (13:24 -0500)]
freedreno: update generated headers

Signed-off-by: Rob Clark <robclark@freedesktop.org>
8 years agofreedreno/ir3/cmdline: don't dump nir by default
Rob Clark [Sun, 13 Dec 2015 18:25:01 +0000 (13:25 -0500)]
freedreno/ir3/cmdline: don't dump nir by default

By default we only want the disasm dumped, which we get anyways.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
8 years agost/va: remove nonesense HEVC picture id handling
Christian König [Fri, 4 Dec 2015 12:11:28 +0000 (13:11 +0100)]
st/va: remove nonesense HEVC picture id handling

The picture id in this case is a VA-API surface handle, checking
for a certain value can't be correct.

Signed-off-by: Christian König <christian.koenig@amd.com>
8 years agoi965: Allocate URB space for HS and DS stages when required.
Chris Forbes [Tue, 9 Sep 2014 09:30:48 +0000 (21:30 +1200)]
i965: Allocate URB space for HS and DS stages when required.

v2: (by Ken, incorporating feedback from Matt Turner):
- Rewrite the push constant allocation code to be clearer.
- Only apply the minimum VS entries workaround on Gen 8.

v3: (by Ken)
- Fix a bug in v2 where we failed to allocate the full push constant
  space when the number of enabled stages didn't divide the available
  push constant space evenly.  (Any left over space is now allocated
  to the PS, as it was in v1.)
- Fix an off-by-one error in v2's number of enabled stages calculation.
- Use DIV_ROUND_UP for nicer formatting.
- Line wrapping fixes.

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
8 years agodocs: mark input/output block locations as DONE
Timothy Arceri [Sun, 13 Dec 2015 05:06:44 +0000 (16:06 +1100)]
docs: mark input/output block locations as DONE

Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
8 years agoglsl: add support for explicit locations inside interface blocks
Timothy Arceri [Mon, 30 Nov 2015 23:34:18 +0000 (10:34 +1100)]
glsl: add support for explicit locations inside interface blocks

This change also adds explicit location support for structs and interfaces which
is currently missing in Mesa but is allowed with SSO and GLSL 1.50+.

Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
8 years agoglsl: simplify interface matching
Timothy Arceri [Wed, 2 Dec 2015 06:53:19 +0000 (17:53 +1100)]
glsl: simplify interface matching

This makes the code easier to follow, should be more efficient
and will makes it easier to add matching via explicit locations
in the following patch.

This patch also replaces the hash table with the newer
resizable hash table this should be more suitable as the table
is likely to only contain a small number of entries.

Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
8 years agodraw: remove clip_vertex from vertex header
Roland Scheidegger [Fri, 11 Dec 2015 23:50:54 +0000 (00:50 +0100)]
draw: remove clip_vertex from vertex header

vertex header had both clip_pos and clip_vertex.
We only really need one (clip_pos) because the draw llvm shader would
overwrite the position output from the vs with the viewport transformed.
However, we don't really need the second one, which was only really used
for gl_ClipVertex - if the shader didn't have that the values were just
duplicated to both clip_pos and clip_vertex. So, just use this from the vs
output instead when we actually need it.
Also change clip debug to output both the data from clip_pos and the
clipVertex output (if available).
Makes some things more complex, some things less complex, but seems more
easy to understand what clipping actually does (and what values it uses
to do its magic).

Reviewed-by: Brian Paul <brianp@vmware.com
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
8 years agodraw: use clip_pos, not clip_vertex for the fake guardband xy point clipping
Roland Scheidegger [Fri, 11 Dec 2015 22:41:55 +0000 (23:41 +0100)]
draw: use clip_pos, not clip_vertex for the fake guardband xy point clipping

Seems obvious now this should use the data from position and not clip_vertex
(albeit might not really make a difference).

Reviewed-by: Brian Paul <brianp@vmware.com
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
8 years agodraw: rename vertex header members
Roland Scheidegger [Fri, 11 Dec 2015 22:29:59 +0000 (23:29 +0100)]
draw: rename vertex header members

clip -> clip_vertex and pre_clip_pos -> clip_pos.
Looks more obvious to me what these values actually represent (so use
something resembling the vs output names).

Reviewed-by: Brian Paul <brianp@vmware.com
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
8 years agodraw: don't pretend have_clipdist is per-vertex
Roland Scheidegger [Fri, 11 Dec 2015 22:14:30 +0000 (23:14 +0100)]
draw: don't pretend have_clipdist is per-vertex

This is just for code cleanup, conceptually the have_clipdist really
isn't per-vertex state, so don't put it there (just dependent on the
shader). Even though there wasn't really any overhead associated with
this, we shouldn't store random shader information in the vertex header.

Reviewed-by: Brian Paul <brianp@vmware.com
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
8 years agodraw: use position not clipVertex output for xyz view volume clipping
Roland Scheidegger [Fri, 11 Dec 2015 21:49:01 +0000 (22:49 +0100)]
draw: use position not clipVertex output for xyz view volume clipping

I'm pretty sure this should use position (i.e. pre_clip_pos) and not
the output from clipVertex. Albeit piglit doesn't care. It is what we
use in the clip test, and it is what every other driver does (as they
don't even have clipVertex output and lower the additional planes to
clip distances).

Reviewed-by: Brian Paul <brianp@vmware.com
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
8 years agoi965: Use DIV_ROUND_UP() in gen7_urb.c code.
Kenneth Graunke [Mon, 30 Nov 2015 23:37:44 +0000 (15:37 -0800)]
i965: Use DIV_ROUND_UP() in gen7_urb.c code.

This is a newer convention, which we prefer over ALIGN(x, n) / n.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
8 years agoi965: Make TES inputs match TCS outputs.
Kenneth Graunke [Thu, 10 Dec 2015 05:42:56 +0000 (21:42 -0800)]
i965: Make TES inputs match TCS outputs.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
8 years agoi965: Force VS -> TCS varyings to use the SSO VUE map layout.
Kenneth Graunke [Thu, 10 Dec 2015 05:42:21 +0000 (21:42 -0800)]
i965: Force VS -> TCS varyings to use the SSO VUE map layout.

The compact VUE map only works when varying packing is in use.
Unfortunately, varying packing is disabled for TCS inputs.

This is needed to fix Piglit's tcs-input-read-array-interface test.

v2: Make lines fit in 80 columns (caught by Jordan Justen).

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
8 years agoi965: Handle TCS outputs and TES inputs.
Kenneth Graunke [Thu, 10 Dec 2015 05:41:35 +0000 (21:41 -0800)]
i965: Handle TCS outputs and TES inputs.

TCS outputs and TES inputs both refer to a common "patch URB entry"
shared across all invocations.  First, there are some number of
per-patch entries.  Then, there are per-vertex entries accessed via
an offset for the variable and a stride times the vertex index.

Because these calculations need to be done in both the vec4 and scalar
backends, it's simpler to just compute the offset calculations in NIR.
It doesn't necessarily make much sense to use per-vertex intrinsics
afterwards, but that at least means we don't lose the per-patch vs.
per-vertex information.

v2: Use is_input/is_output helpers (suggested by Jordan Justen).

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
8 years agoi965: Handle TCS inputs and TES outputs.
Kenneth Graunke [Thu, 10 Dec 2015 05:39:27 +0000 (21:39 -0800)]
i965: Handle TCS inputs and TES outputs.

TES outputs work exactly like VS outputs, so we can simply add a case
statement for those.

TCS inputs are very similar to geometry shaders - they're arrays of
per-vertex data.  We use the same method I used for the scalar GS
backend.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
8 years agoi965: Add tessellation shader VUE map code.
Kenneth Graunke [Tue, 10 Nov 2015 09:17:04 +0000 (01:17 -0800)]
i965: Add tessellation shader VUE map code.

Based on a patch by Chris Forbes, but largely rewritten by Ken.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
8 years agoi965: Fix partial variable access for geometry shaders in SSO mode.
Kenneth Graunke [Thu, 10 Dec 2015 02:26:19 +0000 (18:26 -0800)]
i965: Fix partial variable access for geometry shaders in SSO mode.

Without varying packing, if a VS writes a compound variable, and the GS
only reads part of it, the base location of the variable may not
actually be in the VUE map.

To cope with this, we do lowering in terms of varying slots, add any
constant offsets to the base, and then do the VUE map remapping.  This
ensures we only look up VUE map entries for slots which actually exist.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
8 years agoi965: Separate base offset/constant offset combining from remapping.
Kenneth Graunke [Wed, 9 Dec 2015 10:37:52 +0000 (02:37 -0800)]
i965: Separate base offset/constant offset combining from remapping.

My tessellation branch has two additional remap functions.  I don't want
to replicate this logic there.

v2: Handle inputs/outputs separately (suggested by Jason Ekstrand).

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
8 years agonir: Fix number of indices on shared variable store intrinsics.
Kenneth Graunke [Mon, 14 Dec 2015 09:45:55 +0000 (01:45 -0800)]
nir: Fix number of indices on shared variable store intrinsics.

Shared variables and input reworks landed around the same time.
Presumably, this was some sort of mistake in rebase conflict resolution.

This really only affects the num_indices field in nir_intrinsic_infos,
which is rarely used.  However, it's used by the printer.

Found by inspection.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
8 years agometa/generate_mipmap: Work-around GLES 1.x problem with GL_DRAW_FRAMEBUFFER
Ian Romanick [Thu, 3 Dec 2015 20:22:23 +0000 (12:22 -0800)]
meta/generate_mipmap: Work-around GLES 1.x problem with GL_DRAW_FRAMEBUFFER

GL_DRAW_FRAMEBUFFER does not exist in OpenGL ES 1.x, and since
_mesa_meta_begin hasn't been called yet, we have to work-around API
difficulties.  The whole reason that GL_DRAW_FRAMEBUFFER is used instead
of GL_FRAMEBUFFER is that the read framebuffer may be different.  This
is moot in OpenGL ES 1.x.

I have another patch series that would also fix this (by removing the
calls to _mesa_BindFramebuffer and friends), but it's not quite ready
yet... and I think it may be a bit heavy for some stable branches.
Consider this a stop-gap fix.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93215
Cc: "11.0 11.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
8 years agonvc0: check return value of nvc0_program_validate()
Samuel Pitoiset [Mon, 14 Dec 2015 17:07:33 +0000 (18:07 +0100)]
nvc0: check return value of nvc0_program_validate()

Spotted by Coverity.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
8 years agonv50: check return value of nouveau_object_new()
Samuel Pitoiset [Mon, 14 Dec 2015 16:51:59 +0000 (17:51 +0100)]
nv50: check return value of nouveau_object_new()

When ret == 0, obj is not NULL. Spotted by Coverity.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
8 years agonv50,nvc0: make use of unreachable() when invalid texture target happens
Samuel Pitoiset [Mon, 14 Dec 2015 16:51:57 +0000 (17:51 +0100)]
nv50,nvc0: make use of unreachable() when invalid texture target happens

Spotted by Coverity.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
8 years agost/va: handle default post process regions
Christian König [Mon, 7 Dec 2015 19:21:57 +0000 (20:21 +0100)]
st/va: handle default post process regions

Avoid referencing NULL pointers.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Julien Isorce <j.isorce@samsung.com>
Tested-by: Julien Isorce <j.isorce@samsung.com>
8 years agost/va: fix unused variable warning
Christian König [Mon, 7 Dec 2015 19:36:21 +0000 (20:36 +0100)]
st/va: fix unused variable warning

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Julien Isorce <j.isorce@samsung.com>
8 years agost/va: clean up post process includes
Christian König [Sat, 5 Dec 2015 12:42:28 +0000 (13:42 +0100)]
st/va: clean up post process includes

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Julien Isorce <j.isorce@samsung.com>
Tested-by: Julien Isorce <j.isorce@samsung.com>
8 years agost/va: cleanup filter color standard handling
Christian König [Fri, 4 Dec 2015 13:25:10 +0000 (14:25 +0100)]
st/va: cleanup filter color standard handling

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Julien Isorce <j.isorce@samsung.com>
Tested-by: ulien Isorce <j.isorce@samsung.com>
8 years agometa: clear_state structure cleanup
Tapani Pälli [Fri, 11 Dec 2015 08:45:28 +0000 (10:45 +0200)]
meta: clear_state structure cleanup

Remove unused variables from clear_state and use a hardcoded location
for color uniform to get rid of 2 more variables. Modify shaders to use
explicit location for vertex attribute too as extension is enabled.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
8 years agoglsl: assign varying locations to tess shaders when doing SSO
Ilia Mirkin [Sun, 13 Dec 2015 08:23:13 +0000 (03:23 -0500)]
glsl: assign varying locations to tess shaders when doing SSO

GRID Autosport uses SSO shaders. When a tessellation evaluation shader
is passed through this, it triggers assertion failures down the line
with unassigned varying locations. Make sure to do this when the first
shader in the pipeline is not a vertex shader.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Cc: "11.0 11.1" <mesa-stable@lists.freedesktop.org>
8 years agoi965: Use MESA_FORMAT_B8G8R8X8_SRGB for RGB visuals
Neil Roberts [Fri, 11 Dec 2015 12:32:18 +0000 (12:32 +0000)]
i965: Use MESA_FORMAT_B8G8R8X8_SRGB for RGB visuals

Previously if the visual didn't have an alpha channel then it would
pick a format that is not sRGB-capable. I don't think there's any
reason not to always have an sRGB-capable visual. Since 28090b30 there
are now visuals advertised without an alpha channel which means that
games that don't request alpha bits in the config would end up without
an sRGB-capable visual. This was breaking supertuxkart which assumes
the winsys buffer is always sRGB-capable.

The previous code always used an RGBA format if the visual config
itself was marked as sRGB-capable regardless of whether the visual has
alpha bits. I think we don't actually advertise any sRGB-capable
visuals (but we just use sRGB formats anyway) so it shouldn't make any
difference. However this patch also changes it to use RGBX if an
sRGB-capable visual is requested without alpha bits for consistency.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92759
Cc: "11.0 11.1" <mesa-stable@lists.freedesktop.org>
Cc: Ilia Mirkin <imirkin@alum.mit.edu>
Suggested-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
8 years agoi965: Add B8G8R8X8_SRGB to the alpha format override
Neil Roberts [Fri, 11 Dec 2015 12:32:17 +0000 (12:32 +0000)]
i965: Add B8G8R8X8_SRGB to the alpha format override

brw_init_surface_formats overrides the render format for RGBX formats
which aren't supported for rendering so that they internally use RGBA
instead. However, B8G8R8X8_SRGB was missing so it wasn't marked as a
renderable format. This patch just adds it.

Cc: "11.0 11.1" <mesa-stable@lists.freedesktop.org>
Cc: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
8 years agoi965: Add MESA_FORMAT_B8G8R8X8_SRGB to brw_format_for_mesa_format
Neil Roberts [Fri, 11 Dec 2015 12:32:16 +0000 (12:32 +0000)]
i965: Add MESA_FORMAT_B8G8R8X8_SRGB to brw_format_for_mesa_format

This will be used in a subsequent patch as the format for RGB visuals.

Cc: "11.0 11.1" <mesa-stable@lists.freedesktop.org>
Cc: Ilia Mirkin <imirkin@alum.mit.edu>
Suggested-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
8 years agogk104/ir: simplify and fool-proof texbar algorithm
Ilia Mirkin [Thu, 10 Dec 2015 23:19:44 +0000 (18:19 -0500)]
gk104/ir: simplify and fool-proof texbar algorithm

With the current algorithm, we only look at tex uses. However there's a
write-after-write hazard where we might decide to, on some path, not use
a texture's output at all, but instead to write a different value to
that register. However without the barrier, the texture might complete
later and overwrite that value.

This fixes Unreal Elemental demo on GK110/GK208, flightgear on GK10x,
and likely other random-looking failures.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "11.1" <mesa-stable@lists.freedesktop.org>
8 years agonv50/ir: combine sequences of conversions
Ilia Mirkin [Thu, 10 Dec 2015 20:24:47 +0000 (15:24 -0500)]
nv50/ir: combine sequences of conversions

In some cases shaders want non-default rounding when converting float to
integer. This can be done in one go, so merge the two ops. This comes up
in the packUnorm4x8 & co functions, as well as a few random shaders.
Overall shader-db impact is minimal, helping a handful of witcher2 and
other misc shaders.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
8 years agonv50/ir: manually optimize multiplication expansion logic
Ilia Mirkin [Fri, 11 Dec 2015 05:40:15 +0000 (00:40 -0500)]
nv50/ir: manually optimize multiplication expansion logic

The conversion of 32-bit integer multiplies into 16-bit ones happens
after the regular optimization loop. However it's fairly common to
multiply by a small integer, rendering some of the expansion pointless.

Firstly, propagate immediates when possible into mul ops, secondly just
remove the ops when they are unnecessary.

Including the change to generate imad immediates, the effect is:

total instructions in shared programs : 6365463 -> 6351898 (-0.21%)
total gprs used in shared programs    : 728684 -> 728684 (0.00%)
total local used in shared programs   : 9904 -> 9904 (0.00%)
total bytes used in shared programs   : 44001576 -> 44036120 (0.08%)

                local        gpr       inst      bytes
    helped           0           0        3288           4
      hurt           0           0           0         842

It's easy for this to hurt bytes since we end up always generating the
8-byte form, while we can't always get rid of the immediate in question.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
8 years agonv50/ir: fix imul emission in the presence of an immediate
Ilia Mirkin [Fri, 11 Dec 2015 05:39:47 +0000 (00:39 -0500)]
nv50/ir: fix imul emission in the presence of an immediate

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
8 years agonv50/ir: teach post-ra immediate folding into mad about integers
Ilia Mirkin [Fri, 11 Dec 2015 03:50:31 +0000 (22:50 -0500)]
nv50/ir: teach post-ra immediate folding into mad about integers

There will usually be a split before the mad op, peer through that and
pick out the right word of the immediate.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
8 years agonv50/ir: add short imad support
Ilia Mirkin [Fri, 11 Dec 2015 02:20:32 +0000 (21:20 -0500)]
nv50/ir: add short imad support

Support emission of the short imad, but also include it in the various
logic that tries to make it possible to emit.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
8 years agonv50/ir: can't have predication and immediates
Ilia Mirkin [Thu, 10 Dec 2015 17:18:51 +0000 (12:18 -0500)]
nv50/ir: can't have predication and immediates

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "11.0 11.1" <mesa-stable@lists.freedesktop.org>
8 years agonv50/ir: fix texture grad for cubemaps
Ilia Mirkin [Wed, 9 Dec 2015 06:47:19 +0000 (01:47 -0500)]
nv50/ir: fix texture grad for cubemaps

We were ignoring the partial derivatives on the last dim.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
8 years agonv50/ir: fix assumption that prog->maxGPR is in 32-bit reg units
Ilia Mirkin [Wed, 9 Dec 2015 04:55:18 +0000 (23:55 -0500)]
nv50/ir: fix assumption that prog->maxGPR is in 32-bit reg units

On NV50, we use 16-bit reg units (to make it all work with half-regs). A
few places assumed that it was always in 32-bit units.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
8 years agogallium/ddebug: regularly log the total number of draw calls
Nicolai Hähnle [Tue, 8 Dec 2015 22:56:23 +0000 (17:56 -0500)]
gallium/ddebug: regularly log the total number of draw calls

This helps in the use of GALLIUM_DDEBUG_SKIP: first run a target application
with skip set to a very large number and note how many draw calls happen
before the bug. Then re-run, skipping the corresponding number of calls.
Despite the additional run, this can still be much faster than not skipping
anything.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
8 years agogallium/ddebug: add GALLIUM_DDEBUG_SKIP option
Nicolai Hähnle [Tue, 8 Dec 2015 11:49:12 +0000 (06:49 -0500)]
gallium/ddebug: add GALLIUM_DDEBUG_SKIP option

When we know that hangs occur only very late in a reproducible run (e.g.
apitrace), we can save a lot of debugging time by skipping the flush and hang
detection for earlier draw calls.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
8 years agollvmpipe: fix layer/vp input into fs when not written by prior stages
Roland Scheidegger [Wed, 9 Dec 2015 03:56:15 +0000 (04:56 +0100)]
llvmpipe: fix layer/vp input into fs when not written by prior stages

ARB_fragment_layer_viewport requires that if a fs reads layer or viewport
index but it wasn't output by gs (or vs with other extensions), then it reads
0. This never worked for llvmpipe, and is surprisingly non-trivial to fix.
The problem is the mechanism to handle non-existing outputs in draw is rather
crude, it will simply redirect them to whatever is at output 0, thus later
stages will just get garbage. So, rather than trying to fix this up (which
looks non-trivial), fix this up in llvmpipe setup by detecting this case there
and output a fixed zero directly.
While here, also optimize the hw vertex layout a bit - previously if the gs
outputted layer (or vp) and the fs read those inputs, we'd add them twice
to the vertex layout, which is unnecessary.
And do some minor cleanup, slots don't require that many bits, there was some
bogus (but harmless) float/int mixup for psize slot too, make the slots all
unsigned (we always put pos at pos zero thus everything else has to be positive
if it exists), and make sure they are properly initialized (layer and vp index
slot were not which looked fishy as they might not have got set back to zero
when changing from a gs which outputs them to one which does not).

This fixes the failures in piglit's arb_fragment_layer_viewport group
(3 each for layer and vp).

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
8 years agosvga: avoid emitting redundant SetSamplers() commands
Brian Paul [Thu, 10 Dec 2015 21:55:33 +0000 (14:55 -0700)]
svga: avoid emitting redundant SetSamplers() commands

This greatly reduces the number of SetSamplers() commands for some
applications.

Reviewed-by: José Fonseca <jfonseca@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
8 years agosvga: avoid emitting redundant SetIndexBuffer commands
Brian Paul [Wed, 9 Dec 2015 19:54:35 +0000 (12:54 -0700)]
svga: avoid emitting redundant SetIndexBuffer commands

Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Reviewed-by: José Fonseca <jfonseca@vmware.com>
8 years agost/mesa: trivial indentation fix
Brian Paul [Thu, 10 Dec 2015 19:25:22 +0000 (12:25 -0700)]
st/mesa: trivial indentation fix

8 years agoutil/blitter: minor formatting fixes
Brian Paul [Thu, 10 Dec 2015 19:25:04 +0000 (12:25 -0700)]
util/blitter: minor formatting fixes

8 years agoi965/fs: Use the correct source for local memory load offsets
Jason Ekstrand [Fri, 11 Dec 2015 19:59:53 +0000 (11:59 -0800)]
i965/fs: Use the correct source for local memory load offsets

The offset for loads is in src[0].  This was a copy+paste error in the
nir_intrinsic_load/store refactoring.  This commit fixes a segfault in
ES31-CTS.compute_shader.work-group-size.  I have no idea how piglit failed
to catch this...

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93348
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
8 years agoi965: Add Gen8+ tessellation control shader state (3DSTATE_HS).
Kenneth Graunke [Thu, 12 Nov 2015 07:22:06 +0000 (23:22 -0800)]
i965: Add Gen8+ tessellation control shader state (3DSTATE_HS).

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
8 years agoi965: Add Gen7+ tessellation engine state (3DSTATE_TE).
Kenneth Graunke [Thu, 12 Nov 2015 07:15:23 +0000 (23:15 -0800)]
i965: Add Gen7+ tessellation engine state (3DSTATE_TE).

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>