lkcl [Fri, 31 Jul 2020 11:13:13 +0000 (12:13 +0100)]
lkcl [Fri, 31 Jul 2020 11:08:17 +0000 (12:08 +0100)]
lkcl [Fri, 31 Jul 2020 11:08:02 +0000 (12:08 +0100)]
lkcl [Fri, 31 Jul 2020 10:44:49 +0000 (11:44 +0100)]
Cole Poirier [Thu, 30 Jul 2020 18:02:43 +0000 (11:02 -0700)]
Update 3d_gpu/180nm_single_core_test_asic_memlayout_F1 to F2, Data[0:15]
is now Data[0:127]
programmerjake [Wed, 29 Jul 2020 17:07:59 +0000 (18:07 +0100)]
lkcl [Tue, 28 Jul 2020 20:52:34 +0000 (21:52 +0100)]
Cole Poirier [Tue, 28 Jul 2020 20:22:19 +0000 (13:22 -0700)]
Merge branch 'master' of git.libre-soc.org:libreriscv
Cole Poirier [Tue, 28 Jul 2020 20:21:38 +0000 (13:21 -0700)]
Add svg version of 180nm_single_core_test_asic_memlayout to wiki
Cole Poirier [Tue, 28 Jul 2020 18:44:49 +0000 (11:44 -0700)]
Add section to HDL_workflow/coriolis2 documenting how to use soclayou
repo
lkcl [Mon, 27 Jul 2020 12:41:31 +0000 (13:41 +0100)]
Luke Kenneth Casson Leighton [Mon, 27 Jul 2020 11:40:43 +0000 (12:40 +0100)]
mtmsrd pseudocode accidentally from v3.1B - returning to v3.0B
Samuel A. Falvo II [Sun, 26 Jul 2020 22:44:30 +0000 (15:44 -0700)]
Status update
Luke Kenneth Casson Leighton [Sat, 25 Jul 2020 21:25:41 +0000 (22:25 +0100)]
argh actually const is too long because of hex digits
Luke Kenneth Casson Leighton [Sat, 25 Jul 2020 21:18:18 +0000 (22:18 +0100)]
whoops one extra bit on the overflow test in mullw/mulld
Cole Poirier [Fri, 24 Jul 2020 23:06:28 +0000 (16:06 -0700)]
Merge branch 'master' of git.libre-soc.org:libreriscv
Cole Poirier [Fri, 24 Jul 2020 23:05:57 +0000 (16:05 -0700)]
Add nmigen-soc to HDL_workflow wiki doc
lkcl [Fri, 24 Jul 2020 22:19:11 +0000 (23:19 +0100)]
Cole Poirier [Fri, 24 Jul 2020 21:36:22 +0000 (14:36 -0700)]
Merge branch 'master' of git.libre-soc.org:libreriscv
Merge lkcl comment about needing recent pip3
Cole Poirier [Fri, 24 Jul 2020 21:23:12 +0000 (14:23 -0700)]
Change pia pip install to use --user option so not need sudo
programmerjake [Fri, 24 Jul 2020 21:14:13 +0000 (22:14 +0100)]
lkcl [Fri, 24 Jul 2020 21:06:02 +0000 (22:06 +0100)]
Cole Poirier [Fri, 24 Jul 2020 20:52:14 +0000 (13:52 -0700)]
Bring HDL_workflow/coriolis2 up to date with automated setup script dev-env-setup/coriolis2-chrrot
Cole Poirier [Fri, 24 Jul 2020 20:49:46 +0000 (13:49 -0700)]
Document in HDL_workflow how to build and install power_instruction_analyzer(pia)
Luke Kenneth Casson Leighton [Fri, 24 Jul 2020 10:07:49 +0000 (11:07 +0100)]
[0*64] should have been [0]*64
https://bugs.libre-soc.org/show_bug.cgi?id=439#c1
lkcl [Wed, 22 Jul 2020 12:02:55 +0000 (13:02 +0100)]
rfid, etc. do not take a LEV field
lkcl [Tue, 21 Jul 2020 20:21:07 +0000 (21:21 +0100)]
lkcl [Mon, 20 Jul 2020 11:22:22 +0000 (12:22 +0100)]
lkcl [Mon, 20 Jul 2020 10:25:10 +0000 (11:25 +0100)]
lkcl [Mon, 20 Jul 2020 10:24:29 +0000 (11:24 +0100)]
Samuel A. Falvo II [Fri, 17 Jul 2020 23:00:34 +0000 (16:00 -0700)]
Status update
lkcl [Fri, 17 Jul 2020 19:12:57 +0000 (20:12 +0100)]
lkcl [Wed, 15 Jul 2020 20:32:32 +0000 (21:32 +0100)]
Luke Kenneth Casson Leighton [Wed, 15 Jul 2020 14:54:27 +0000 (15:54 +0100)]
overflow detection in mullw and mulld off-by-one
Luke Kenneth Casson Leighton [Wed, 15 Jul 2020 12:21:21 +0000 (13:21 +0100)]
missed bracket
Luke Kenneth Casson Leighton [Wed, 15 Jul 2020 12:19:35 +0000 (13:19 +0100)]
add inline code and clarification
Luke Kenneth Casson Leighton [Wed, 15 Jul 2020 10:34:25 +0000 (11:34 +0100)]
add backticks back in, they look pretty
Luke Kenneth Casson Leighton [Wed, 15 Jul 2020 10:33:41 +0000 (11:33 +0100)]
remove code "hack" css
Luke Kenneth Casson Leighton [Wed, 15 Jul 2020 10:33:03 +0000 (11:33 +0100)]
add inline comments
Samuel A. Falvo II [Wed, 15 Jul 2020 01:30:33 +0000 (18:30 -0700)]
pathname update
Samuel A. Falvo II [Wed, 15 Jul 2020 01:24:52 +0000 (18:24 -0700)]
Notes on formal proofs.
lkcl [Tue, 14 Jul 2020 19:36:05 +0000 (20:36 +0100)]
lkcl [Tue, 14 Jul 2020 15:14:17 +0000 (16:14 +0100)]
lkcl [Tue, 14 Jul 2020 12:01:20 +0000 (13:01 +0100)]
lkcl [Tue, 14 Jul 2020 10:09:04 +0000 (11:09 +0100)]
Luke Kenneth Casson Leighton [Mon, 13 Jul 2020 18:03:42 +0000 (19:03 +0100)]
add mtmsrd pseudocode
Luke Kenneth Casson Leighton [Mon, 13 Jul 2020 13:09:33 +0000 (14:09 +0100)]
use sh field as-is in shift-immediate instructions
Luke Kenneth Casson Leighton [Mon, 13 Jul 2020 10:12:37 +0000 (11:12 +0100)]
add OP_EXTSWSLI csv entries
lkcl [Sun, 12 Jul 2020 23:30:04 +0000 (00:30 +0100)]
lkcl [Sun, 12 Jul 2020 22:56:01 +0000 (23:56 +0100)]
lkcl [Sun, 12 Jul 2020 22:53:48 +0000 (23:53 +0100)]
lkcl [Sun, 12 Jul 2020 22:50:50 +0000 (23:50 +0100)]
lkcl [Sun, 12 Jul 2020 22:44:49 +0000 (23:44 +0100)]
Luke Kenneth Casson Leighton [Sun, 12 Jul 2020 20:54:53 +0000 (21:54 +0100)]
whoops set wrong field on lwbrx when adding cix
Luke Kenneth Casson Leighton [Sun, 12 Jul 2020 20:00:46 +0000 (21:00 +0100)]
whoops wrong field
Luke Kenneth Casson Leighton [Sun, 12 Jul 2020 19:48:01 +0000 (20:48 +0100)]
add CIX mode in LDST field
Luke Kenneth Casson Leighton [Sun, 12 Jul 2020 12:10:53 +0000 (13:10 +0100)]
add first version fixedldstcache instruction pseudocodeg
Luke Kenneth Casson Leighton [Sun, 12 Jul 2020 11:56:54 +0000 (12:56 +0100)]
add l*cix / st*cix opcodes to minor_31
Luke Kenneth Casson Leighton [Sat, 11 Jul 2020 10:23:45 +0000 (11:23 +0100)]
overflow test MSBs not LSBs
Luke Kenneth Casson Leighton [Sat, 11 Jul 2020 10:17:54 +0000 (11:17 +0100)]
whoops indices too long
Luke Kenneth Casson Leighton [Sat, 11 Jul 2020 10:16:55 +0000 (11:16 +0100)]
use if syntax
Luke Kenneth Casson Leighton [Sat, 11 Jul 2020 10:14:19 +0000 (11:14 +0100)]
missing brackets
Luke Kenneth Casson Leighton [Sat, 11 Jul 2020 10:13:09 +0000 (11:13 +0100)]
add overflow to mullw
Luke Kenneth Casson Leighton [Fri, 10 Jul 2020 21:01:38 +0000 (22:01 +0100)]
alter to actual behaviour
Luke Kenneth Casson Leighton [Fri, 10 Jul 2020 19:47:53 +0000 (20:47 +0100)]
use MULS, DIVS and MODS in pseudocode to indicate signed ops
Samuel A. Falvo II [Fri, 10 Jul 2020 04:22:59 +0000 (21:22 -0700)]
Tried markdown link syntax but didn't work
Samuel A. Falvo II [Fri, 10 Jul 2020 04:20:49 +0000 (21:20 -0700)]
Create personal page.
Luke Kenneth Casson Leighton [Thu, 9 Jul 2020 08:45:33 +0000 (09:45 +0100)]
add samuel to about us
Luke Kenneth Casson Leighton [Tue, 7 Jul 2020 14:48:40 +0000 (15:48 +0100)]
make attn OP_ATTN and set NOP to pipeline NONE
lkcl [Tue, 7 Jul 2020 11:32:29 +0000 (12:32 +0100)]
lkcl [Tue, 7 Jul 2020 11:25:13 +0000 (12:25 +0100)]
lkcl [Tue, 7 Jul 2020 11:15:58 +0000 (12:15 +0100)]
lkcl [Tue, 7 Jul 2020 11:11:32 +0000 (12:11 +0100)]
Yehowshua [Mon, 6 Jul 2020 21:27:22 +0000 (22:27 +0100)]
Organize Documentation
Luke Kenneth Casson Leighton [Mon, 6 Jul 2020 04:35:56 +0000 (05:35 +0100)]
shorten comment
Luke Kenneth Casson Leighton [Mon, 6 Jul 2020 04:15:26 +0000 (05:15 +0100)]
whoops deleted X-Form
Luke Kenneth Casson Leighton [Mon, 6 Jul 2020 04:11:40 +0000 (05:11 +0100)]
add OP_MTMSR
Luke Kenneth Casson Leighton [Sat, 4 Jul 2020 13:03:23 +0000 (14:03 +0100)]
move mtmsr and mtspr to trap and spr pipelines
Luke Kenneth Casson Leighton [Sat, 4 Jul 2020 09:29:51 +0000 (10:29 +0100)]
add link to 2nd image with div added
Luke Kenneth Casson Leighton [Fri, 3 Jul 2020 19:41:19 +0000 (20:41 +0100)]
add xdc2020
Luke Kenneth Casson Leighton [Thu, 2 Jul 2020 23:00:46 +0000 (00:00 +0100)]
update image
Luke Kenneth Casson Leighton [Thu, 2 Jul 2020 18:20:06 +0000 (19:20 +0100)]
add image of 180nm ASIC
Luke Kenneth Casson Leighton [Wed, 1 Jul 2020 16:40:14 +0000 (17:40 +0100)]
bit 58 not bit 88
Luke Kenneth Casson Leighton [Wed, 1 Jul 2020 16:13:46 +0000 (17:13 +0100)]
add temporary OP_SC, really needs separate minor_17.csv
Luke Kenneth Casson Leighton [Wed, 1 Jul 2020 16:08:55 +0000 (17:08 +0100)]
correct OP_RFID minor_19 code
Luke Kenneth Casson Leighton [Wed, 1 Jul 2020 12:56:56 +0000 (13:56 +0100)]
add 180nm task list
projects / libreriscv.git / log