gem5.git
16 years agostyle: This file hugely violated the M5 style.
Nathan Binkert [Tue, 9 Sep 2008 01:03:52 +0000 (18:03 -0700)]
style: This file hugely violated the M5 style.
Remove a bunch of unused cruft from the interface while we're at it

16 years agoX86: Fix the microcode for sign/zero extending moves that use high byte registers.
Gabe Black [Wed, 3 Sep 2008 04:52:54 +0000 (00:52 -0400)]
X86: Fix the microcode for sign/zero extending moves that use high byte registers.

16 years agoDevice: Fix bug in DmaPort::recvRetry. The interface attempts to send the same packet...
Clint Smullen [Tue, 26 Aug 2008 06:37:26 +0000 (02:37 -0400)]
Device: Fix bug in DmaPort::recvRetry. The interface attempts to send the same packet again.
It doesn't cause a problem currently, however with a different Memory Object it could cause
problems

16 years agoIGbE: Patches I neglected to apply before pushing the previous igbe changeset
Ali Saidi [Sun, 24 Aug 2008 19:27:49 +0000 (15:27 -0400)]
IGbE: Patches I neglected to apply before pushing the previous igbe changeset

16 years agoCPU: Get rid of two more duplicated CPU params.
Gabe Black [Wed, 20 Aug 2008 04:59:09 +0000 (21:59 -0700)]
CPU: Get rid of two more duplicated CPU params.

16 years agoChanged BaseCPU::ProfileEvent's interval member to be of type Tick. This was done...
Richard Strong [Mon, 18 Aug 2008 17:50:58 +0000 (10:50 -0700)]
Changed BaseCPU::ProfileEvent's interval member to be of type Tick. This was done to be consistent with its
python type of a latency.  In addition, the multiple definitions of profile in the different cpu models caused
problems for intialization of the interval value. If a child class's profile value was defined, the parent
BaseCPU::ProfileEvent interval field would be initialized with a garbage value. The fix was to remove the
multiple redifitions of profile in the child CPU classes.

16 years agoAdd the ability to specify a think time before descriptor fetch/writeback starts...
Ali Saidi [Wed, 13 Aug 2008 21:41:58 +0000 (17:41 -0400)]
Add the ability to specify a think time before descriptor fetch/writeback starts/ends as well as after read/write dmas

16 years agoAdd the ability for a DMA to tack on an extra delay after the DMA is actually finished.
Ali Saidi [Wed, 13 Aug 2008 21:41:56 +0000 (17:41 -0400)]
Add the ability for a DMA to tack on an extra delay after the DMA is actually finished.

16 years agoMore subtle fixes to how interrupts are supposed to work in the device. Fix postedInt...
Ali Saidi [Wed, 13 Aug 2008 20:30:30 +0000 (16:30 -0400)]
More subtle fixes to how interrupts are supposed to work in the device. Fix postedInterrupts statistics.

16 years agoReturn an UnimpFault for an ITB translation of an uncachable address. We don't suppor...
Ali Saidi [Wed, 13 Aug 2008 20:29:59 +0000 (16:29 -0400)]
Return an UnimpFault for an ITB translation of an uncachable address. We don't support fetching from uncached addresses in Alpha and it means that a speculative fetch can clobber device registers.

16 years agostyle
Nathan Binkert [Mon, 11 Aug 2008 21:47:49 +0000 (14:47 -0700)]
style

16 years agoparams: Get rid of the remnants of the old style parameter configuration stuff.
Nathan Binkert [Mon, 11 Aug 2008 19:22:17 +0000 (12:22 -0700)]
params: Get rid of the remnants of the old style parameter configuration stuff.

16 years agoparams: Convert the CPU objects to use the auto generated param structs.
Nathan Binkert [Mon, 11 Aug 2008 19:22:16 +0000 (12:22 -0700)]
params: Convert the CPU objects to use the auto generated param structs.
A whole bunch of stuff has been converted to use the new params stuff, but
the CPU wasn't one of them.  While we're at it, make some things a bit
more stylish. Most of the work was done by Gabe, I just cleaned stuff up
a bit more at the end.

16 years agoMake time format in 'started' line same as 'compiled'.
Steve Reinhardt [Mon, 4 Aug 2008 05:46:46 +0000 (01:46 -0400)]
Make time format in 'started' line same as 'compiled'.
Also make -B output consistent with normal header, and
only include actual build options.

16 years agoGet rid of outputStream... wasn't really being used
Steve Reinhardt [Mon, 4 Aug 2008 05:45:12 +0000 (01:45 -0400)]
Get rid of outputStream... wasn't really being used
(except for warn()) and new -r/-e options make it
not worth fixing.

16 years agoMinor fix for test/SConscript... forgot to 'qref' before 'qdel', argh.
Steve Reinhardt [Mon, 4 Aug 2008 05:01:35 +0000 (01:01 -0400)]
Minor fix for test/SConscript... forgot to 'qref' before 'qdel', argh.

16 years agoMake test/SConscript use new redirection options.
Steve Reinhardt [Mon, 4 Aug 2008 04:48:11 +0000 (00:48 -0400)]
Make test/SConscript use new redirection options.

16 years agoAdd -r/-e options to redirect stdout/stderr.
Steve Reinhardt [Mon, 4 Aug 2008 04:40:31 +0000 (00:40 -0400)]
Add -r/-e options to redirect stdout/stderr.
Better than using shell since it automatically uses -d directory
for output files (creating it as needed).

16 years agosockets: Add a function to disable all listening sockets.
Nathan Binkert [Mon, 4 Aug 2008 01:19:55 +0000 (18:19 -0700)]
sockets: Add a function to disable all listening sockets.
When invoking several copies of m5 on the same machine at the same
time, there can be a race for TCP ports for the terminal connections
or remote gdb.  Expose a function to disable those ports, and have the
regression scripts disable them.  There are some SimObjects that have
no other function than to be used with ports (NativeTrace and
EtherTap), so they will panic if the ports are disabled.

16 years agolibm5: Create a libm5 static library for embedding m5.
Nathan Binkert [Mon, 4 Aug 2008 01:19:54 +0000 (18:19 -0700)]
libm5: Create a libm5 static library for embedding m5.

This should allow m5 to be more easily embedded into other simulators.
The m5 binary adds a simple main function which then calls into the m5
libarary to start the simulation. In order to make this work
correctly, it was necessary embed python code directly into the
library instead of the zipfile hack.  This is because you can't just
append the zipfile to the end of a library the way you can a binary.
As a result, Python files that are part of the m5 simulator are now
compile, marshalled, compressed, and then inserted into the library's
data section with a certain symbol name.  Additionally, a new Importer
was needed to allow python to get at the embedded python code.

Small additional changes include:
- Get rid of the PYTHONHOME stuff since I don't think anyone ever used
it, and it just confuses things.  Easy enough to add back if I'm wrong.
- Create a few new functions that are key to initializing and running
the simulator: initSignals, initM5Python, m5Main.

The original code for creating libm5 was inspired by a patch Michael
Adler, though the code here was done by me.

16 years agosyscall: Avoid a compiler warning which turns into a bug.
Nathan Binkert [Mon, 4 Aug 2008 01:19:53 +0000 (18:19 -0700)]
syscall: Avoid a compiler warning which turns into a bug.
Simply cast the result to an int and life is good.

16 years agoMake default PhysicalMemory latency slightly more realistic.
Steve Reinhardt [Sun, 3 Aug 2008 22:13:29 +0000 (18:13 -0400)]
Make default PhysicalMemory latency slightly more realistic.
Also update stats to reflect change.

16 years agoX86: Make hint nops consume their modrm byte.
Gabe Black [Sun, 3 Aug 2008 21:43:24 +0000 (14:43 -0700)]
X86: Make hint nops consume their modrm byte.

16 years agokill unused code
Nathan Binkert [Sun, 3 Aug 2008 03:42:15 +0000 (20:42 -0700)]
kill unused code

16 years agoscons: Get rid of generate.py in the build system.
Nathan Binkert [Thu, 31 Jul 2008 15:01:38 +0000 (08:01 -0700)]
scons: Get rid of generate.py in the build system.
I decided that separating some of the scons code into generate.py was
just a bad idea because it caused the dependency system to get all
messed up.  If separation is the right way to go in the future, we
should probably use the sconscript mechanism, not the mechanism that I
just removed.

16 years agoregress: update regressions for tty emulation fix.
Nathan Binkert [Thu, 24 Jul 2008 23:31:54 +0000 (16:31 -0700)]
regress: update regressions for tty emulation fix.

16 years agosyscall: Fix TTY emulation in fstat() user-mode simulation for fd 1 (stdout).
Michael Adler [Thu, 24 Jul 2008 23:31:33 +0000 (16:31 -0700)]
syscall: Fix TTY emulation in fstat() user-mode simulation for fd 1 (stdout).
The code didn't set S_IFCHR in the st_mode

16 years agoprocess: separate stderr from stdout
Michael Adler [Wed, 23 Jul 2008 21:41:34 +0000 (14:41 -0700)]
process: separate stderr from stdout
- Add the option of redirecting stderr to a file. With the old
behaviour, stderr would follow stdout if stdout was to a file, but
stderr went to the host stderr if stdout went to the host stdout.  The
new default maintains stdout and stderr going to the host.  Now the
two can specify different files, but they will share a file descriptor
if the name of the files is the same.
- Add --output and --errout options to se.py to go with --input.

16 years agosyscalls: Add a bunch of missing system calls.
Michael Adler [Wed, 23 Jul 2008 21:41:33 +0000 (14:41 -0700)]
syscalls: Add a bunch of missing system calls.
readlink, umask, truncate, ftruncate, mkdir, and getcwd.

16 years agoRemoteGDB: add an m5 command line option for setting or disabling remote gdb.
Michael Adler [Wed, 23 Jul 2008 21:41:33 +0000 (14:41 -0700)]
RemoteGDB: add an m5 command line option for setting or disabling remote gdb.

16 years agotests: There's a small unknown stats difference in 20.parser, accept it.
Nathan Binkert [Tue, 22 Jul 2008 21:01:33 +0000 (17:01 -0400)]
tests: There's a small unknown stats difference in 20.parser, accept it.
Hopefully if the difference pops back up, we can figure out what it was

16 years agoMips was missing a few stats
Nathan Binkert [Tue, 22 Jul 2008 21:00:45 +0000 (17:00 -0400)]
Mips was missing a few stats

16 years agotests: update config.ini and stdout for the various tests.
Nathan Binkert [Tue, 22 Jul 2008 21:00:18 +0000 (17:00 -0400)]
tests: update config.ini and stdout for the various tests.
These files were a bit too out of date and resulted in a bit of confusion.

16 years agoGet rid of useless m5_assert macro.
Steve Reinhardt [Tue, 15 Jul 2008 18:38:51 +0000 (14:38 -0400)]
Get rid of useless m5_assert macro.
Its only purpose was to print the cycle number but that already
happens in the SIGABRT handler.  No one used it anyway.

16 years agoUse ReadResp instead of LoadLockedResp for LoadLockedReq responses.
Steve Reinhardt [Tue, 15 Jul 2008 18:38:51 +0000 (14:38 -0400)]
Use ReadResp instead of LoadLockedResp for LoadLockedReq responses.

16 years agoAdd missing newlines to Bus DPRINTFs.
Steve Reinhardt [Tue, 15 Jul 2008 18:38:51 +0000 (14:38 -0400)]
Add missing newlines to Bus DPRINTFs.

16 years agom5ops: clean up the m5ops stuff.
Nathan Binkert [Fri, 11 Jul 2008 15:52:50 +0000 (08:52 -0700)]
m5ops: clean up the m5ops stuff.
- insert warnings for deprecated m5ops
- reserve opcodes for Ali's stuff
- remove code for stuff that has been deprecated forever
- simplify m5op_alpha

16 years agostyle: fix indentation and formatting of the pseudo insts.
Nathan Binkert [Fri, 11 Jul 2008 15:52:50 +0000 (08:52 -0700)]
style: fix indentation and formatting of the pseudo insts.

16 years agoeventq: change the event datastructure back to LIFO.
Nathan Binkert [Fri, 11 Jul 2008 15:48:50 +0000 (08:48 -0700)]
eventq: change the event datastructure back to LIFO.

The status quo is preferred since it is less likely that people will
rely on LIFO than FIFO, and when we move to a parallelized M5, no
ordering between events of the same time/priority will be guaranteed.

16 years agoeventq: new eventq data structure. The new data structure is singly
Nathan Binkert [Fri, 11 Jul 2008 15:38:31 +0000 (08:38 -0700)]
eventq: new eventq data structure.  The new data structure is singly
linked list sorted by time and priority.  For things of the same time
and priority, a second, circularly linked list maintains the data
structure.  Events of the same time and priority are now inserted in
FIFO order instead of LIFO order.  This dramatically improves the
performance of systems that schedule multiple events at the same time.

The FIFO order version is not preferred to LIFO (because it may cause
people to rely on it), but I'm going to commit it anyway and
immediately commit the preferred LIFO version on top.

16 years agoeventq: Clean up the Event class so that it uses fewer bytes. This
Nathan Binkert [Fri, 11 Jul 2008 04:35:42 +0000 (21:35 -0700)]
eventq: Clean up the Event class so that it uses fewer bytes. This
will hopefullly allow it to fit in a cache line.

16 years agoFix cases where RADV interrupt timer is used and make ITR interrupt moderation not...
Ali Saidi [Tue, 1 Jul 2008 14:30:08 +0000 (10:30 -0400)]
Fix cases where RADV interrupt timer is used and make ITR interrupt moderation not always delay if no interrupts have been posted for the ITR value.

16 years agoRemove delVirtPort() and make getVirtPort() only return cached version.
Ali Saidi [Tue, 1 Jul 2008 14:25:07 +0000 (10:25 -0400)]
Remove delVirtPort() and make getVirtPort() only return cached version.

16 years agoChange everything to use the cached virtPort rather than created their own each time.
Ali Saidi [Tue, 1 Jul 2008 14:24:19 +0000 (10:24 -0400)]
Change everything to use the cached virtPort rather than created their own each time.
This appears to work, but I don't want to commit it until it gets tested a lot more.
I haven't deleted the functionality in this patch that will come later, but one question
is how to enforce encourage objects that call getVirtPort() to not cache the virtual port
since if the CPU changes out from under them it will be worse than useless. Perhaps a null
function like delVirtPort() is still useful in that case.

16 years agoMake the cached virtPort have a thread context so it can do everything that a newly...
Ali Saidi [Tue, 1 Jul 2008 14:24:16 +0000 (10:24 -0400)]
Make the cached virtPort have a thread context so it can do everything that a newly created one can.

16 years agoAfter a checkpoint (and thus a stats reset), the not_idle_fraction/notIdleFraction...
Ali Saidi [Tue, 1 Jul 2008 14:24:09 +0000 (10:24 -0400)]
After a checkpoint (and thus a stats reset), the not_idle_fraction/notIdleFraction statistic is really wrong.
The notIdleFraction statistic isn't updated when the statistics reset, probably because the cpu Status information
was pulled into the atomic and timing cpus. This changeset pulls Status back into the BaseSimpleCPU object. Anyone
care to comment on the odd naming of the Status instance? It shouldn't just be status because that is confusing
with Port::Status, but _status seems a bit strage too.

16 years agoAutomated merge after backout.
Steve Reinhardt [Sat, 28 Jun 2008 17:20:00 +0000 (13:20 -0400)]
Automated merge after backout.

16 years agoBacked out changeset 94a7bb476fca: caused memory leak.
Steve Reinhardt [Sat, 28 Jun 2008 17:19:38 +0000 (13:19 -0400)]
Backed out changeset 94a7bb476fca: caused memory leak.

16 years agoAutomated merge with http://repo.m5sim.org/m5-stable
Ali Saidi [Tue, 24 Jun 2008 19:51:12 +0000 (15:51 -0400)]
Automated merge with repo.m5sim.org/m5-stable

16 years agoCheckpoinging/SWIG: Undo part of changeset 5464 since it broke checkpointing.
Ali Saidi [Tue, 24 Jun 2008 19:48:45 +0000 (15:48 -0400)]
Checkpoinging/SWIG: Undo part of changeset 5464 since it broke checkpointing.

16 years agoSimObject: Add in missing includes of <string> and fix minor style problem.
Gabe Black [Sat, 21 Jun 2008 18:23:58 +0000 (14:23 -0400)]
SimObject: Add in missing includes of <string> and fix minor style problem.

16 years agoMake bus address conflict error more informative
Steve Reinhardt [Sat, 21 Jun 2008 05:06:27 +0000 (01:06 -0400)]
Make bus address conflict error more informative

16 years agoGenerate more useful error messages for unconnected ports.
Steve Reinhardt [Sat, 21 Jun 2008 05:04:43 +0000 (01:04 -0400)]
Generate more useful error messages for unconnected ports.
Force all non-default ports to provide a name and an
owner in the constructor.

16 years agoimported patch sim_object_params.diff
Nathan Binkert [Wed, 18 Jun 2008 19:07:15 +0000 (12:07 -0700)]
imported patch sim_object_params.diff

16 years agoAtomicSimpleCPU: Separate data stalls from instruction stalls.
Nathan Binkert [Wed, 18 Jun 2008 17:15:21 +0000 (10:15 -0700)]
AtomicSimpleCPU: Separate data stalls from instruction stalls.
Separate simulation of icache stalls and dat stalls.

16 years agotests: update tests for slight changes in nsgige posted interrupts
Nathan Binkert [Wed, 18 Jun 2008 15:00:53 +0000 (11:00 -0400)]
tests: update tests for slight changes in nsgige posted interrupts

16 years agoEthernet: share statistics between all ethernet devices and apply some
Nathan Binkert [Wed, 18 Jun 2008 05:22:44 +0000 (22:22 -0700)]
Ethernet: share statistics between all ethernet devices and apply some
of those statistics to the e1000 model.

16 years agoinet: initialization fixes.
Nathan Binkert [Wed, 18 Jun 2008 05:14:12 +0000 (22:14 -0700)]
inet: initialization fixes.
Make sure variables are properly initialized and also make sure that
truth testing works properly.

16 years agoPacketFifo: Get slack out of the EthPacketData structure. This allows
Nathan Binkert [Wed, 18 Jun 2008 04:34:27 +0000 (21:34 -0700)]
PacketFifo: Get slack out of the EthPacketData structure.  This allows
a packet to exist in multiple FIFOs if desired.

16 years agoThreadState: Ensure that kernelStats is properly initialized
Nathan Binkert [Wed, 18 Jun 2008 04:11:20 +0000 (21:11 -0700)]
ThreadState: Ensure that kernelStats is properly initialized

16 years agorename MipsConsole to MipsBackdoor
Nathan Binkert [Wed, 18 Jun 2008 03:39:51 +0000 (20:39 -0700)]
rename MipsConsole to MipsBackdoor

--HG--
rename : src/dev/mips/MipsConsole.py => src/dev/mips/MipsBackdoor.py
rename : src/dev/mips/console.cc => src/dev/mips/backdoor.cc
rename : src/dev/mips/console.hh => src/dev/mips/backdoor.hh

16 years agorename AlphaConsole to AlphaBackdoor
Nathan Binkert [Wed, 18 Jun 2008 03:36:39 +0000 (20:36 -0700)]
rename AlphaConsole to AlphaBackdoor

--HG--
rename : src/dev/alpha/AlphaConsole.py => src/dev/alpha/AlphaBackdoor.py
rename : src/dev/alpha/console.cc => src/dev/alpha/backdoor.cc
rename : src/dev/alpha/console.hh => src/dev/alpha/backdoor.hh

16 years agoChange the default output filename for the terminal so it's more obvious.
Nathan Binkert [Wed, 18 Jun 2008 03:30:37 +0000 (20:30 -0700)]
Change the default output filename for the terminal so it's more obvious.

--HG--
rename : tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/console.system.sim_console => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/system.terminal
rename : tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/console.system.sim_console => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/system.terminal
rename : tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/console.system.sim_console => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/system.terminal
rename : tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/console.system.sim_console => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/system.terminal
rename : tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/console.drivesys.sim_console => tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/drivesys.terminal
rename : tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/console.testsys.sim_console => tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/testsys.terminal

16 years agoRename SimConsole to Terminal since it makes more sense
Nathan Binkert [Wed, 18 Jun 2008 03:29:06 +0000 (20:29 -0700)]
Rename SimConsole to Terminal since it makes more sense

--HG--
rename : src/dev/SimConsole.py => src/dev/Terminal.py
rename : src/dev/simconsole.cc => src/dev/terminal.cc
rename : src/dev/simconsole.hh => src/dev/terminal.hh

16 years agophysmem: Add a null option to physical memory so it doesn't store data.
Nathan Binkert [Mon, 16 Jun 2008 04:39:29 +0000 (21:39 -0700)]
physmem:  Add a null option to physical memory so it doesn't store data.

16 years agoport: Clean up default port setup and port switchover code.
Nathan Binkert [Mon, 16 Jun 2008 04:34:32 +0000 (21:34 -0700)]
port: Clean up default port setup and port switchover code.

16 years agoparams: Prevent people from setting attributes on vector params.
Nathan Binkert [Mon, 16 Jun 2008 04:26:33 +0000 (21:26 -0700)]
params: Prevent people from setting attributes on vector params.

16 years agoadd compile flags to m5
Nathan Binkert [Mon, 16 Jun 2008 03:56:35 +0000 (20:56 -0700)]
add compile flags to m5

16 years agoCommand line option to print out List of SimObjects and their parameters
Nathan Binkert [Sun, 15 Jun 2008 04:51:08 +0000 (21:51 -0700)]
Command line option to print out List of SimObjects and their parameters

16 years agomain: add .m5/options.py processing. This file is processed before
Nathan Binkert [Sun, 15 Jun 2008 04:16:00 +0000 (21:16 -0700)]
main: add .m5/options.py processing.  This file is processed before
arguments are parsed so that they can change the default options for
various config parameters.

16 years agoAdd .m5 configuration directory
Nathan Binkert [Sun, 15 Jun 2008 04:15:59 +0000 (21:15 -0700)]
Add .m5 configuration directory

16 years agopython: Separate the options parsing stuff. Remove options parsing stuff from
Nathan Binkert [Sun, 15 Jun 2008 04:15:58 +0000 (21:15 -0700)]
python: Separate the options parsing stuff.  Remove options parsing stuff from
main.py so things are a bit more obvious.

16 years agoparams: Fix the memory bandwidth parameter
Nathan Binkert [Sun, 15 Jun 2008 03:42:45 +0000 (20:42 -0700)]
params: Fix the memory bandwidth parameter

16 years agoparams: Fix floating point parameters
Nathan Binkert [Sun, 15 Jun 2008 03:39:31 +0000 (20:39 -0700)]
params: Fix floating point parameters

16 years agopython: Move various utility classes into a new m5.util package so
Nathan Binkert [Sun, 15 Jun 2008 03:19:49 +0000 (20:19 -0700)]
python: Move various utility classes into a new m5.util package so
they're all in the same place.  This also involves having just one
jobfile.py and moving it into the utils directory to avoid
duplication.  Lots of improvements to the utility as well.

--HG--
rename : src/python/m5/attrdict.py => src/python/m5/util/attrdict.py
rename : util/pbs/jobfile.py => src/python/m5/util/jobfile.py
rename : src/python/m5/util.py => src/python/m5/util/misc.py
rename : src/python/m5/multidict.py => src/python/m5/util/multidict.py
rename : util/stats/orderdict.py => src/python/m5/util/orderdict.py

16 years agoMemReq: Add option to reset the time on a request.
Nathan Binkert [Sun, 15 Jun 2008 02:39:01 +0000 (19:39 -0700)]
MemReq: Add option to reset the time on a request.

16 years agoAdd hg commands for style check so you can check at times other than commit
Nathan Binkert [Sun, 15 Jun 2008 02:37:26 +0000 (19:37 -0700)]
Add hg commands for style check so you can check at times other than commit

16 years agoFix various SWIG warnings
Nathan Binkert [Sat, 14 Jun 2008 19:57:21 +0000 (12:57 -0700)]
Fix various SWIG warnings

16 years agoAdd missing dependencies on .i files
Nathan Binkert [Sat, 14 Jun 2008 19:10:50 +0000 (12:10 -0700)]
Add missing dependencies on .i files

16 years agoscons: proper fix for hg version stuff
Nathan Binkert [Sat, 14 Jun 2008 17:30:18 +0000 (10:30 -0700)]
scons: proper fix for hg version stuff

16 years agoscons: fix program_info.cc generation
Nathan Binkert [Sat, 14 Jun 2008 00:34:22 +0000 (17:34 -0700)]
scons: fix program_info.cc generation

16 years agoAutomated merge with ssh://m5sim.org//repo/m5
Steve Reinhardt [Fri, 13 Jun 2008 05:59:10 +0000 (01:59 -0400)]
Automated merge with ssh://m5sim.org//repo/m5

16 years agoGet rid of bogus bus assertion.
Steve Reinhardt [Fri, 13 Jun 2008 05:33:49 +0000 (01:33 -0400)]
Get rid of bogus bus assertion.
It runs out that if a MemObject turns around and does a send in its
receive callback, and there are other sends already scheduled, then
it could observe a state where it's not at the head of the list but
the bus's sendEvent is not scheduled (because we're still in the
middle of processing the prior sendEvent).

16 years agoGet rid of bogus cache assertion.
Steve Reinhardt [Fri, 13 Jun 2008 05:29:20 +0000 (01:29 -0400)]
Get rid of bogus cache assertion.
I was asserting that the only reason you would defer targets is if
a write came in while you had an outstanding read miss, but there's
another case where you could get a read access after you've snooped
an invalidation and buffered it because it applies to a prior
outstanding miss.

16 years agoScripts: Check for the appropriate build type as soon as possible.
Ali Saidi [Fri, 13 Jun 2008 05:09:06 +0000 (01:09 -0400)]
Scripts: Check for the appropriate build type as soon as possible.

16 years agoHG: Add compiled hg revision and date to the standard M5 output.
Ali Saidi [Fri, 13 Jun 2008 05:09:04 +0000 (01:09 -0400)]
HG: Add compiled hg revision and date to the standard M5 output.

16 years agoAlpha: Get rid of an old include of a non-existant file.
Gabe Black [Thu, 12 Jun 2008 05:54:21 +0000 (01:54 -0400)]
Alpha: Get rid of an old include of a non-existant file.

16 years agoParams: Allow nested namespaces in cxx_namespace
Gabe Black [Thu, 12 Jun 2008 05:00:29 +0000 (01:00 -0400)]
Params: Allow nested namespaces in cxx_namespace

16 years agoX86: Make the cpuid processor identifier return a real string.
Gabe Black [Thu, 12 Jun 2008 05:00:19 +0000 (01:00 -0400)]
X86: Make the cpuid processor identifier return a real string.

16 years agoX86: Make the code compile as 32 bit.
Gabe Black [Thu, 12 Jun 2008 05:00:05 +0000 (01:00 -0400)]
X86: Make the code compile as 32 bit.

16 years agoParams: Remove an unnecessary include.
Gabe Black [Thu, 12 Jun 2008 04:59:58 +0000 (00:59 -0400)]
Params: Remove an unnecessary include.

16 years agoX86: Make the e820 table manually or automatically configurable from python.
Gabe Black [Thu, 12 Jun 2008 04:58:36 +0000 (00:58 -0400)]
X86: Make the e820 table manually or automatically configurable from python.

16 years agoX86: Make the disassembly for halt conform with the other microops.
Gabe Black [Thu, 12 Jun 2008 04:58:27 +0000 (00:58 -0400)]
X86: Make the disassembly for halt conform with the other microops.

16 years agoX86: Implement and hook up STI and CLI instructions.
Gabe Black [Thu, 12 Jun 2008 04:58:19 +0000 (00:58 -0400)]
X86: Implement and hook up STI and CLI instructions.

16 years agoX86: Make sure there's something to catch when the kernel messes with ports "behind...
Gabe Black [Thu, 12 Jun 2008 04:58:13 +0000 (00:58 -0400)]
X86: Make sure there's something to catch when the kernel messes with ports "behind" the pci config magic ports.

16 years agoX86: Make the platform object initialize channel 0 of the PIT.
Gabe Black [Thu, 12 Jun 2008 04:56:54 +0000 (00:56 -0400)]
X86: Make the platform object initialize channel 0 of the PIT.

16 years agoX86: Hook the speaker device to the pit device.
Gabe Black [Thu, 12 Jun 2008 04:56:17 +0000 (00:56 -0400)]
X86: Hook the speaker device to the pit device.

16 years agoTimer: Fill out the periodic modes a little.
Gabe Black [Thu, 12 Jun 2008 04:56:07 +0000 (00:56 -0400)]
Timer: Fill out the periodic modes a little.

16 years agoDev: Seperate the 8254 timer from tsunami and use it in that and the PC.
Gabe Black [Thu, 12 Jun 2008 04:54:48 +0000 (00:54 -0400)]
Dev: Seperate the 8254 timer from tsunami and use it in that and the PC.

16 years agoBitUnion: Take out namespace declaration so bitunions can be declared inside classes.
Gabe Black [Thu, 12 Jun 2008 04:54:32 +0000 (00:54 -0400)]
BitUnion: Take out namespace declaration so bitunions can be declared inside classes.