doxygen: Correct TAGFILE linkage of main

core.doxy was renamed to main.doxy, along with output folder in
the below 2004 commit.

Correct the other modules' TAGFILE linkage to find the main folder.

  commit 3ef972f538e1ff207f5919a8068bf14af18fb270
  Author: Brian Paul <brian.paul@tungstengraphics.com>
  Date:   Sun May 16 22:07:02 2004 +0000

      Replaced 'core' with 'main'.
      Other minor updates.

Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
Acked-by: Emil Velikov <emil.velikov@collabora.com>

doxygen: Update .gitignore

The last of these output directories was removed in 2007.

  commit c2e0570831ae130fce1fa374bebe25bb9c561e29
  Author: Jerome Glisse <glisse@freedesktop.org>
  Date:   Fri Feb 16 23:18:56 2007 +0100

      Update doxygen doc to reflet vbo changes.

      Update doxygen doc, array_cache no longuer exist,
      new shiny vbo modules is there. Tested on unix,
      but i think i didn't broke that bat :).

  commit 3ef972f538e1ff207f5919a8068bf14af18fb270
  Author: Brian Paul <brian.paul@tungstengraphics.com>
  Date:   Sun May 16 22:07:02 2004 +0000

      Replaced 'core' with 'main'.
      Other minor updates.

  commit 69db632a9df035cdc852cc64fb14038919929a70
  Author: Jose Fonseca <j_r_fonseca@yahoo.co.uk>
  Date:   Thu May 1 23:32:54 2003 +0000

      Move the Doxygen configuration files into the usual places and integrate with the build system.

Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
Acked-by: Emil Velikov <emil.velikov@collabora.com>

doxygen: Remove references to miniglx

miniglx was removed in February 2010. Clean up remaining
unnecessary doxygen references.

  commit a9e36696837b2c31ecee4017a0adffbd987c1eff
  Author: Kristian Høgsberg <krh@bitplanet.net>
  Date:   Thu Feb 25 16:17:04 2010 -0500

      Remove remaining miniglx references

Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
Acked-by: Emil Velikov <emil.velikov@collabora.com>

doxygen: Fix doxygen/gbm.doxy TAGFILES

There has never been a doxygen/gbm_setup output folder.

Appears to have been a copy-paste error from original commit
in 245341f406bbdf23fec3d8ea8ad95c147c11ad1c.

Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
Acked-by: Emil Velikov <emil.velikov@collabora.com>

doxygen: Correct TAGFILE relative paths

Per Doxygen documentation, to combine external documentation (stored in
a *.tag file) with a project the TAGFILES option should be set in the
configuration file.

  A tag file typically only contains a relative location of the
  documentation from the point where doxygen was run. So when
  you include a tag file in other project you have to specify
  where the external documentation is located in relation this
  project.

  You can do this in the configuration file by assigning the
  (relative) location to the tag files specified after the
  TAGFILES configuration option.

  If you use a relative path it should be relative with respect
  to the directory where the HTML output of your project is
  generated; so a relative path from the HTML output directory
  of a project to the HTML output of the other project that is
  linked to.

Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
Acked-by: Emil Velikov <emil.velikov@collabora.com>

doxygen: Fix doxygen/glapi.doxy

The src/mesa/glapi folder was relocated in the below commit.
Amend the doxygen/glapi.doxy INPUT setting accordingly.

Whilst here, in addition this change also avoids a bug in the
consolidated Doxygen output caused by doxygen/glapi.doxy inadvertently
overwriting doxygen/swrast.tag via its GENERATE_TAGFILE setting.

This bug depended upon the specific order each *.tag was built.

   commit 296adbd545b8efd38c9ed508166b2de2764a444b
   Author: Chia-I Wu <olv@lunarg.com>
   Date:   Mon Apr 26 12:56:44 2010 +0800

       glapi: Move to src/mapi/.

       Move glapi to src/mapi/{glapi,es1api,es2api}.

Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
Acked-by: Emil Velikov <emil.velikov@collabora.com>

doxygen: Remove src/mesa/shader/ references

Mesa has not had a src/mesa/shader/ folder since Mesa 7.9 removed it
in October 2010, as part of a revised GLSL compiler written by Intel.

Remove doxygen/shader.doxy and consequential changes made throughout.

In addition to removing an unnecessary Doxygen doxyfile, this change also
avoids a bug in the consolidated Doxygen output caused by
doxygen/shader.doxy inadvertently overwriting doxygen/swrast.tag via its
GENERATE_TAGFILE setting.

This bug depended upon the specific order each *.tag was built.

Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
Acked-by: Emil Velikov <emil.velikov@collabora.com>

gallium/radeon: add an env variable to force a level of aniso filtering

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

llvmpipe: Test rounding of x.5.

Leverage nearbyintif function, which should be available on all C99
implementations.

Trivial.

gallivm: use llvm.nearbyint instead of llvm.round.

We used to use sse roundps intrinsic directly, but switched to use the llvm
intrinsics for rounding with e4f01da15d8c6ce3e8c77ff3ff3d2ce2574a3f7b.
However, llvm semantics follows standard math lib round function which is
specced to do roundNearestAwayFromZero but we really want roundNearestEven
(moreoever, using round generates atrocious code since the cpu can't do it
directly and it results in scalar calls to libm __roundf).
So, use llvm.nearbyint instead, which does exactly the right thing, and even
has the advantage of being available with llvm 3.3 too. (I've verified it
actually generates a roundps instruction with llvm 3.3.)

This fixes https://bugs.freedesktop.org/show_bug.cgi?id=94909

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>

nv50/ra: `isinf()` is in namespace `std` since C++11.

This fixes a compile error while building Nouveau with C++11 enabled (and
glibc >= 2.23). This happens if SWR is enabled, as it forces C++11.

Signed-off-by: Pierre Moreau <pierre.morrow@free.fr>
Signed-off-by: Jose Fonseca <jfonseca@vmware.com>
https://bugs.freedesktop.org/show_bug.cgi?id=94907

scons: Allow building with Address Sanitizer.

libasan is never linked to shared objects (which doesn't go well with
-z,defs).  It must either be linked to the main executable, or (more
practically for OpenGL drivers) be pre-loaded via LD_PRELOAD.

Otherwise works.

I didn't find anything with llvmpipe.  I suspect the fact that the
JIT compiled code isn't instrumented means there are lots of errors it
can't catch.

But for non-JIT drivers, the Address/Leak Sanitizers seem like a faster
alternative to Valgrind.

Usage (Ubuntu 15.10):

   scons asan=1 libgl-xlib
   export LD_LIBRARY_PATH=$PWD/build/linux-x86_64-debug/gallium/targets/libgl-xlib
   LD_PRELOAD=libasan.so.2 any-opengl-application

Acked-by: Roland Scheidegger <sroland@vmware.com>

mesa: Change an error code in glSamplerParameterI[iu]v().

This is supposed to be INVALID_OPERATION in ES.  We already did this
for the fv/iv variants, but not Iiv/Iuv, which are new in ES 3.2 (or
extensions).

Fixes:
ES31-CTS.texture_border_clamp.samplerparameteri_non_gen_sampler_error

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

softpipe: Free tgsi.image elements on context destruction.

Courtesy of address sanitizer.

[airlied: free buffers as well]
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

softpipe: Enable ARB_framebuffer_no_attachments

Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

vc4: Work around hardware limits on the number of verts in a single draw.

Fixes rendering failures in glmark2's refract and
bump:render-mode=high-poly demos, and partially in its terrain demo.

softpipe: avoid buffer overflow

Signed-off-by: Dave Airlie <airlied@redhat.com>

tgsi: fix buffer overflow

Increase r to four channels as rgba is written to it
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

swr: handle pci cap requests

Reviewed-by: George Kyriazis <george.kyriazis@intel.com>

swr: support samplers in vertex shaders

Reviewed-by: George Kyriazis <george.kyriazis@intel.com>

radeonsi: enable GLSL 4.20 and therefore OpenGL 4.2

This is the last necessary bit for OpenGL 4.2 support. All driver-specific
functionality has already been implemented as part of extensions.

Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>

va: check null context in vlVaDestroyContext

Signed-off-by: Iurie Salomov <iurcic@gmail.com>
Reviewed-by: Julien Isorce <j.isorce@samsung.com>

nir/clone: Copy bit size when cloning registers

Reported-by: Mark Janes <mark.a.janes@intel.com>
Reviewed-by: Eduardo Lima Mitev <elima@igalia.com>

radeonsi: fix a critical SI hang since PIPELINESTAT_START/STOP was added

For some reason unknown to me, SI hangs if the event is written after
CONTEXT_CONTROL.

glsl: Don't copy propagate or tree graft precise values.

This is kind of a hack.  We currently track precise requirements
by decorating ir_variables.  Propagating or grafting the RHS of an
assignment to a precise value into some other expression tree can
lose those decorations.

In the long run, it might be better to replace these ir_variable
decorations with an "exact" decoration on ir_expression nodes,
similar to what NIR does.

In the short run, this is probably good enough.  It preserves
enough information for glsl_to_nir to generate "exact" decorations,
and NIR will then handle optimizing these expressions reasonably.

Fixes ES31-CTS.gpu_shader5.precise_qualifier.

v2: Drop invariant handling, as it shouldn't be necessary (caught
    by Jason Ekstrand).

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

i965/tiled_memcpy: Fix rgba8_copy_16_aligned_dst() typo

Copy and paste error in commit eafeb8db66dae7619ff3cb039706b990d718cba7:

    i965/tiled_memcpy: Unroll bytes==64 case.

Signed-off-by: Kristian Høgsberg Kristensen <kristian.h.kristensen@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>

glsl/linker: Recurse on struct fields when adding shader variables

ARB_program_interface_query requires that we add struct fields
recursively down to basic types.

Fixes 52 struct test cases in dEQP-GLES31.functional.program_interface_query.*

Signed-off-by: Kristian Høgsberg Kristensen <kristian.h.kristensen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

glsl/linker: Pass name and type through to create_shader_variable()

No functional change here, but this now lets us recurse throught structs
in add_shader_variable().

Signed-off-by: Kristian Høgsberg Kristensen <kristian.h.kristensen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

glsl/linker: Pass absolute location to add_shader_variable()

This lets us pass in the absolution location of a variable instead of
computing it in add_shader_variable() based on variable location and
bias. This is in preparation for recursing into struct variables.

Signed-off-by: Kristian Høgsberg Kristensen <kristian.h.kristensen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

glsl/linker: Add add_shader_variable() helper

This consolidates the combination of create_shader_variable() and
add_program_resource() into a new helper function. No functional
difference, but we'll expand add_shader_variable() in the next few
commits.

Signed-off-by: Kristian Høgsberg Kristensen <kristian.h.kristensen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/tiled_memcpy: Unroll bytes==64 case.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>

i965/tiled_memcpy: Provide SSE2 for RGBA8 <-> BGRA8 swizzle.

The existing code uses SSSE3, and because it isn't compiled in a
separate file compiled with that, it is usually not used (that, of
course, could be fixed...), whereas SSE2 is always present with 64-bit
builds.  This should be pretty much as fast as the pshufb version,
albeit those code paths aren't really used on chips without llc in any
case.

v2: fix andnot argument order, add comments
v3: use pshuflw/hw instead of shifts (suggested by Matt Turner), cut comments
v4: [mattst88] Rebase

Reviewed-by: Matt Turner <mattst88@gmail.com>

i965/tiled_memcpy: Move SSSE3 code back into inline functions.

This will make adding SSE2 code a lot cleaner.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>

i965/tiled_memcpy: Optimize RGBA -> BGRA swizzle.

Replaces four byte loads and four byte stores with a load, bswap,
rotate, store; or a movbe, rotate, store.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>

radeonsi: fix bounds check in si_create_vertex_elements

This was triggered by
dEQP-GLES3.functional.vertex_array_objects.all_attributes

Cc: "11.1 11.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

docs: mark atomic counters and SSBOs as done for radeonsi

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>

radeonsi: enable shader buffer pipe caps

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>

radeonsi: add shader buffer support to TGSI_OPCODE_RESQ

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>

radeonsi: add shader buffer support to TGSI_OPCODE_STORE

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>

radeonsi: add shader buffer support to TGSI_OPCODE_LOAD

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>

radeonsi: add shader buffer support to TGSI_OPCODE_ATOM*

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>

radeonsi: add offset parameter to buffer_append_args

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>

radeonsi: adjust buffer_append_args to take a 128 bit resource

Move the buffer resource extraction code out into its own function.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>

radeonsi: preload shader buffers in shaders

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>

radeonsi: implement set_shader_buffers

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>

radeonsi: move resetting of constant buffers into a separate function

This will be re-used for shader buffers.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>

dri/i965: fix incorrect rgbFormat in intelCreateBuffer().

It is incorrect to assume that pixel format is always in BGR byte order.
We need to check bitmask parameters (such as |redMask|) to determine whether
the RGB or BGR byte order is requested.

v2: reformat code to stay within 80 character per line limit.
v3: just fix the byte order problem first and investigate SRGB later.
v4: rebased on top of the GLES3 sRGB workaround fix.
v5: rebased on top of the GLES3 sRGB workaround fix v2.

Signed-off-by: Haixia Shi <hshi@chromium.org>
Reviewed-by: Stéphane Marchesin <marcheu@chromium.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

glsl: Reject illegal qualifiers on atomic counter uniforms.

This fixes

dEQP-GLES31.functional.uniform_location.negative.atomic_fragment
dEQP-GLES31.functional.uniform_location.negative.atomic_vertex

Both of which have lines like

layout(location = 3, binding = 0, offset = 0) uniform atomic_uint uni0;

The ARB_explicit_uniform_location spec makes a very tangential mention
regarding atomic counters, but location isn't something that makes sense
with them.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>

glsl: Add a method to print error messages for illegal qualifiers.

Suggested by Timothy Arceri a while back on mesa-dev:
https://lists.freedesktop.org/archives/mesa-dev/2016-February/107735.html

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Acked-by: Matt Turner <mattst88@gmail.com>

xlib: fix memory leak on Display close

The XMesaVisual instances freed in the visuals table on display close
are being freed with a free() call, instead of XMesaDestroyVisual(),
causing a memory leak.

Signed-off-by: John Sheu <sheu@google.com>
Reviewed-by: Brian Paul <brianp@vmware.com>

st/mesa: Replace GLvoid with void

GLvoid was used before in OpenGL but it has changed to just using void.
All GLvoids in mesa's state tracker has been changed to void in this patch.

Tested this with piglit and no problems were found. No compiler warnings.

Signed-off-by: Jakob Sinclair <sinclair.jakob@openmailbox.org>
Reviewed-by: Brian Paul <brianp@vmware.com>

radeonsi: Mark ARB_robust_buffer_access_behavior as supported.

Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

gallium: Add capability for ARB_robust_buffer_access_behavior.

Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>

mesa: Expose the ARB_robust_buffer_access_behavior extension.

Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

main: rework the compatibility check of visuals in glXMakeCurrent

Now it follows the compatibility criteria listed in section 2.1 of
the GLX 1.4 specification.
This is needed for post-process effects in SW:KotOR.

Signed-off-by: Miklós Máté <mtmkls@gmail.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>

swr: [rasterizer core] warning cleanup

Acked-by: Brian Paul <brianp@vmware.com>

swr: [rasterizer] Put in rudimentary garbage collection for the global arena allocator

- Check for unused blocks every few frames or every 64K draws
- Delete data unused since the last check if total unused data is > 20MB

Doesn't seem to cause a perf degridation

Acked-by: Brian Paul <brianp@vmware.com>

swr: [rasterizer core] Put DRAW_CONTEXT on a diet

No need for 256 pointers per DC.

Acked-by: Brian Paul <brianp@vmware.com>

swr: [rasterizer core] Add experimental support for hyper-threaded front-end

Acked-by: Brian Paul <brianp@vmware.com>

swr: [rasterizer] Avoid segv in thread creation on machines with non-consecutive NUMA topology.

Acked-by: Brian Paul <brianp@vmware.com>

swr: [rasterizer core] Replace all naked OSALIGN macro uses with OSALIGNSIMD / OSALIGNLINE

Future proofing

Acked-by: Brian Paul <brianp@vmware.com>

swr: [rasterizer] Ensure correct alignment of stack variables used as vectors

Acked-by: Brian Paul <brianp@vmware.com>

swr: [rasterizer core] Quantize depth to depth buffer precision prior to depth test/write.

Fixes z-fighting issues.

Acked-by: Brian Paul <brianp@vmware.com>

swr: [rasterizer common] win32 build fixups

Acked-by: Brian Paul <brianp@vmware.com>

swr: [rasterizer core] Affinitize thread scratch space to numa node of worker

Acked-by: Brian Paul <brianp@vmware.com>

swr: [rasterizer] Misc fixes identified by static code analysis

No perf loss detected

Acked-by: Brian Paul <brianp@vmware.com>

st/mesa: fix memleak in glDrawPixels cache code

If the glDrawPixels size changed, we leaked the previously cached
texture, if there was one.  This patch fixes the reference counting,
adds a refcount assertion check, and better handles potential malloc()
failures.

Tested with a modified version of the drawpix Mesa demo which changed
the image size for each glDrawPixels call.

Cc: "11.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: José Fonseca <jfonseca@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>

gallium: Use STATIC_ASSERT whenever possible.

Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>

softpipe: Use STATIC_ASSERT whenever possible.

Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>

svga: Use STATIC_ASSERT whenever possible.

Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>

mesa: Use STATIC_ASSERT whenever possible.

Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>

r600g: use common scissor and viewport code

It's the same as radeonsi. This adds guard band support to r600g.

Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Grigori Goronzy <greg@chown.ath.cx>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

gallium/radeon: add R600/Evergreen/Cayman support to common viewport code

Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Grigori Goronzy <greg@chown.ath.cx>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: move scissor and viewport states into gallium/radeon

Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Grigori Goronzy <greg@chown.ath.cx>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: use guard band clipping

Guard band clipping speeds up rasterization for primitives that are
partially off-screen.  This change in particular results in small
framerate improvements in a wide range of games.

Started by Grigori Goronzy <greg@chown.ath.cx>.

Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Grigori Goronzy <greg@chown.ath.cx>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: compute scissor from viewport in set_viewport_states

and clamp it right before emitting. This is a prerequisite for computing
the guard band.

Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Grigori Goronzy <greg@chown.ath.cx>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

gallium/radeon: set GTT WC on tiled textures

Just for consistency. This should have no effect, because OpenGL textures
always go to VRAM.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>

gallium/radeon: relax requirements on VRAM placements on APUs

This makes Tonga with vramlimit=128 2x faster in Heaven.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>

winsys/amdgpu: remove hack for low VRAM configuration

A better solution will be used.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>

r600g: disable aniso filtering for non-mipmap textures on EG

this is the default behavior of the closed driver when running on VI

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

r600g: clean up aniso state translation

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: disable aniso filtering for non-mipmap textures on SI-CI

The closed driver does this, but it looks at base_level and last_level
and uses a conditional assignment, which LLVM can't generate on SGPRs.

That led me to invent this solution that abuses the image descriptor.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: clean up aniso state translation

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: enable some sampler fields to match the closed driver

copied from the Vulkan driver

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

gallium/radeon: fix maximum texture anisotropy setup

We were overdoing it for non-power-of-two values.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

gallium/radeon: never choose a linear tiling for DB surfaces

Just for consistency. This is actually not a problem, because both addrlib
and radeon check and fix this.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

gallium/radeon: removing dead code for sharing stencil buffers

This is a remnant of the times when the DDX was allocating depth-stencil
buffers for windows. Now, st/dri allocates them and doesn't share them.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: allow clearing buffers >= 4 GB

Only CMASK and DCC clears can use this, because only textures can be so
large.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

gallium/radeon: allow allocating textures >= 4 GB

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

winsys/radeon: fix printing allocation failures

print as unsigned instead of signed

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

winsys/amdgpu: add support for 64-bit buffer sizes

v2: fail in radeon_winsys_bo_create if size > 32 bits

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

pb_buffer: switch pb_buffer::size to 64 bits

being able to allocate more than 4 GB may be useful

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

gallium/radeon: remove R600_QUERY_HW_FLAG_TIMER

not used anymore

Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

gallium/radeon: merge timer and non-timer query lists

All of them are paused only between IBs.

Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

r600g: don't manually stop queries for blitter

r600_set_active_query_state does it better.

Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

r600g: add pausing pipeline & streamout queries into set_active_query_state

Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

r600g: implement set_active_query_state for pausing occlusion queries

Use ZPASS_INCREMENT_DISABLE everywhere.

Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

r600g: simplify r600_set_occlusion_query_state

The caller does the same checking.

Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

gallium/radeon: move pipeline stat context flags to common code

Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

r600g: fix typo in r600 register definitions

Acked-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>