binutils-gdb.git
7 years agoMIPS16/opcodes: Correct 64-bit macros' ISA membership
Maciej W. Rozycki [Tue, 20 Dec 2016 01:53:03 +0000 (01:53 +0000)]
MIPS16/opcodes: Correct 64-bit macros' ISA membership

Limit the DDIV, DDIVU, DREM, DREMU and DSUBU macros to the MIPS III
rather than MIPS I ISA.  These macros expand to machine code sequences
including 64-bit instructions which require a 64-bit ISA.  Entries for
those instructions are already correctly marked, however the marking is
ignored if entries are used in the process of macro expansion rather
than directly, making it possible to indirectly produce 64-bit machine
code even when output requested has been limited to a 32-bit ISA.

opcodes/
* mips16-opc.c (mips16_opcodes): Set membership to I3 rather
than I1 for the "ddiv", "ddivu", "drem", "dremu" and "dsubu"
INSN_MACRO entries.

gas/
* testsuite/gas/mips/mips16-macro.l: New list test.
* testsuite/gas/mips/mips.exp: Run the new test.

7 years agoMIPS16/opcodes: Correct I64/SDRASP opcode's ISA membership
Maciej W. Rozycki [Tue, 20 Dec 2016 01:50:24 +0000 (01:50 +0000)]
MIPS16/opcodes: Correct I64/SDRASP opcode's ISA membership

Limit the `SD ra, offset(sp)' instruction (I64/SDRASP major/minor
opcode) to the MIPS III rather than MIPS I ISA.  This is a 64-bit
instruction requiring a 64-bit ISA.  This bug has been there since
forever.

opcodes/
* mips16-opc.c (mips16_opcodes): Set membership to I3 rather
than I1 for the SP-relative "sd"/$ra entry (SDRASP minor
opcode).

gas/
* testsuite/gas/mips/mips16-sdrasp.d: New test.
* testsuite/gas/mips/mips16-sdrasp.l: New stderr output.
* testsuite/gas/mips/mips16-sdrasp.s: New test source.
* testsuite/gas/mips/mips.exp: Run the new test.

7 years agoMIPS/GAS/testsuite: Correct NewABI test selection
Maciej W. Rozycki [Tue, 20 Dec 2016 01:49:02 +0000 (01:49 +0000)]
MIPS/GAS/testsuite: Correct NewABI test selection

Make sure all tests that require NewABI support are only run with
`has_newabi' targets, removing numerous `mips-sgi-irix5' failures.

gas/
* testsuite/gas/mips/mips.exp: Limit remaining tests that
require NewABI support to `has_newabi' targets.

7 years agoUpdate testsuite Makefile with missing dependencies.
Cary Coutant [Tue, 20 Dec 2016 09:03:55 +0000 (01:03 -0800)]
Update testsuite Makefile with missing dependencies.

2016-12-20  Cary Coutant  <ccoutant@gmail.com>

gold/
* testsuite/Makefile.am: Add missing dependencies on gcctestdir/ld
or ../ld-new.
* testsuite/Makefile.in: Regenerate.

7 years agoFix read-beyond-end-of-buffer error in script parsing.
Cary Coutant [Tue, 20 Dec 2016 03:19:46 +0000 (19:19 -0800)]
Fix read-beyond-end-of-buffer error in script parsing.

2016-12-19  Cary Coutant  <ccoutant@gmail.com>

gold/
PR gold/20949
* script.cc (Lex::get_token): Don't look ahead past NUL characters.

7 years agoCorrect assembler mnemonic for RISC-V aqrl AMOs
Andrew Waterman [Mon, 19 Dec 2016 06:53:54 +0000 (22:53 -0800)]
Correct assembler mnemonic for RISC-V aqrl AMOs

sc is a misnomer, because they aren't inherently sc.

* riscv-opc.c (riscv_opcodes): Rename the "*.sc" instructions to
"*.aqrl".

7 years agoFix disassembly of RISC-V CSR instructions under -Mno-aliases
Andrew Waterman [Mon, 19 Dec 2016 06:53:53 +0000 (22:53 -0800)]
Fix disassembly of RISC-V CSR instructions under -Mno-aliases

This fixes https://github.com/riscv/riscv-binutils-gdb/issues/36.

* riscv-opc.c (riscv_opcodes): Mark the rd* and csr* aliases as
INSN_ALIAS.

7 years agoAdd canonical JALR for RISC-V
Andrew Waterman [Mon, 19 Dec 2016 06:53:52 +0000 (22:53 -0800)]
Add canonical JALR for RISC-V

    jalr rd,offset(rs1)

rather than

    jalr rd,rs1,offset

This matches the format of other instructions.

* riscv-opc.c (riscv_opcodes): Change jr and jalr to "o(s)"
format.

7 years agoDon't define RISC-V .p2align
Andrew Waterman [Mon, 19 Dec 2016 06:53:51 +0000 (22:53 -0800)]
Don't define RISC-V .p2align

* config/tc-riscv.c (riscv_pseudo_table): Remove "align",
"p2align", and "balign".
(s_align): Remove.
(riscv_handle_align): New function.
(riscv_frag_align_code): Likewise.
(riscv_make_nops): Likewise.
* config/tc-riscv.h (MAX_MEM_FOR_RS_ALIGN_CODE): Change to 7.
(HANDLE_ALIGN): Define.
(md_do_align): Define.
(riscv_handle_align): Declare.
(riscv_frag_align_code): Likewise.

7 years agoRe-work RISC-V gas flags: now we just support -mabi and -march
Andrew Waterman [Mon, 19 Dec 2016 06:53:50 +0000 (22:53 -0800)]
Re-work RISC-V gas flags: now we just support -mabi and -march

We've decided to standardize on two flags for RISC-V: "-march" sets the
target architecture (which determines which instructions can be
generated), and "-mabi" sets the target ABI.  We needed to rework this
because the old flag set didn't support soft-float or single-float ABIs,
and didn't support an x32-style ABI on RISC-V.

Additionally, we've changed the behavior of the -march flag: it's now a
lot stricter and only parses things we can actually understand.
Additionally, it's now lowercase-only: the rationale is that while the
RISC-V ISA manual specifies that ISA strings are case-insensitive, in
Linux-land things are usually case-sensitive.  Since this flag can be
used to determine library paths, we didn't want to bake some
case-insensitivity in there that would case trouble later.

This patch implements these two new flags and removes the old flags that
could conflict with these.  There wasn't a RISC-V release before, so we
want to just support a clean flag set.

include/
* elf/riscv.h (EF_RISCV_SOFT_FLOAT): Don't define.
(EF_RISCV_FLOAT_ABI, EF_RISCV_FLOAT_ABI_SOFT): Define.
(EF_RISCV_FLOAT_ABI_SINGLE, EF_RISCV_FLOAT_ABI_DOUBLE): Define.
(EF_RISCV_FLOAT_ABI_QUAD): Define.
bfd/
* elfnn-riscv.c (_bfd_riscv_elf_merge_private_bfd_data): Use
EF_RISCV_FLOAT_ABI_SOFT instead of EF_RISCV_SOFT_FLOAT.
binutils/
* readelf.c (get_machine_flags): Use
EF_RISCV_FLOAT_ABI_{SOFT,SINGLE,DOBULE,QUAD) instead of
EF_RISCV_{SOFT,HARD}_FLOAT.
gas/
* config/tc-riscv.h (xlen): Delete.
* config/tc-riscv.c (xlen): Make static.
(abi_xlen): New variable.
(options): Replace OPTION_{M32,M64,MSOFT_FLOAT,MHARD_FLOAT,MRVC}
with OPTION_MABI.
(md_longopts): Likewise.
(md_parse_option): Likewise.
(riscv_elf_final_processing): Likewise.
* doc/as.texinfo (Target RISC-V options): Likewise.
* doc/c-riscv.texi (OPTIONS): Likewise.
* config/tc-riscv.c (float_mode): Removed.
(float_abi): New type, specifies the floating-point ABI.
(riscv_set_abi): New function.
(riscv_add_subset): Only allow lower-case ISA names and require
them to start with "rv".
(riscv_after_parse_args): Likewise.
opcodes/
* riscv-dis.c (riscv_disassemble_insn): Default to the ELF's
XLEN when none is provided.

7 years agoFix an integer overflow in RISC-V relocation handling
Andrew Waterman [Mon, 19 Dec 2016 06:53:49 +0000 (22:53 -0800)]
Fix an integer overflow in RISC-V relocation handling

* elfnn-riscv.c (bfd_riscv_get_max_alignment): Return bfd_vma
instead of unsigned int.

7 years agoRework RISC-V relocations
Andrew Waterman [Mon, 19 Dec 2016 06:53:48 +0000 (22:53 -0800)]
Rework RISC-V relocations

Before this commit we didn't cleanly support CFI directives because the
internal offsets used to get relaxed which broke them.  This patch
significantly reworks how we handle linker relaxations:

 * DWARF is now properly supported

 * There is a ".option norelax" to disable relaxations, for when users
   write assembly that can't be relaxed (if it's to be later patched up,
   for example).

 * There is an additional _RELAX relocation that specifies when previous
   relocations can be relaxed.

We're in the process of documenting the RISC-V ELF ABI, which will
include documentation of our relocations

  https://github.com/riscv/riscv-elf-psabi-doc/blob/master/riscv-elf.md

but we expect that this relocation set will remain ABI compatible in the
future (ie, it's safe to release).

Thanks to Kuan-Lin Chen for figuring out how to correctly relax the
debug info!

include/
* elf/riscv.h: Add R_RISCV_TPREL_I through R_RISCV_SET32.
bfd/
* reloc.c (BFD_RELOC_RISCV_TPREL_I): New relocation.
(BFD_RELOC_RISCV_TPREL_S): Likewise.
(BFD_RELOC_RISCV_RELAX): Likewise.
(BFD_RELOC_RISCV_CFA): Likewise.
(BFD_RELOC_RISCV_SUB6): Likewise.
(BFD_RELOC_RISCV_SET8): Likewise.
(BFD_RELOC_RISCV_SET8): Likewise.
(BFD_RELOC_RISCV_SET16): Likewise.
(BFD_RELOC_RISCV_SET32): Likewise.
* elfnn-riscv.c (perform_relocation): Handle the new
relocations.
(_bfd_riscv_relax_tls_le): Likewise.
(_bfd_riscv_relax_align): Likewise.
(_bfd_riscv_relax_section): Likewise.
(howto_table): Likewise.
(riscv_reloc_map): Likewise.
(relax_func_t): New type.
(_bfd_riscv_relax_call): Add reserve_size argument, which
controls the maximal offset pessimism.  Correct type of max_alignment.
(_bfd_riscv_relax_lui): Likewise.
(_bfd_riscv_relax_tls_le): Likewise.
(_bfd_riscv_relax_align): Likewise.
(_bfd_riscv_relax_section): Compute the required reserve size
when relocating and use it to when calling relax_func.
* bfd-in2.h: Regenerate.
* libbfd.h: Likewise.
gas/
* config/tc-riscv.c (riscv_set_options): Add relax.
(riscv_opts): Likewise.
(s_riscv_option): Add relax and norelax.
(riscv_apply_const_reloc): New function.
(append_insn): Move constant relocation handling to
riscv_apply_const_reloc.
(md_pcrel_from): Likewise.
(parse_relocation): Skip BFD_RELOC_UNUSED.
(md_pcrel_from): Handle BFD_RELOC_RISCV_SUB6,
BFD_RELOC_RISCV_RELAX, BFD_RELOC_RISCV_CFA.
(md_apply_fix): Likewise.
(riscv_pre_output_hook): New function.
* config/tc-riscv.h (md_pre_output_hook): Define.
(riscv_pre_output_hook): Declare.
(DWARF_CIE_DATA_ALIGNMENT): Always -4.

7 years agoFormatting changes for RISC-V
Andrew Waterman [Mon, 19 Dec 2016 06:53:47 +0000 (22:53 -0800)]
Formatting changes for RISC-V

This is a mixed bag of format changes:

 * Replacing constants with macros (0xffffffff with MINUS_ONE, for
   example).  There's one technically functional change in here (some
   MINUS_ONEs are changed to 0), but it only changes the behavior of an
   otherwise-unused field.
 * Using 0 instead of 0x0 in the relocation table.
 * There were some missing spaces before parens, the spaces have been
   added.
 * A handful of comments are now more descriptive.
 * A bunch of whitespace-only changes, mostly alignment and brace
   newlines.

bfd/
* elfnn-riscv.c: Formatting and comment fixes throughout.
* elfxx-riscv.c: Likewise.
(howto_table): Change the src_mask field from MINUS_ONE to 0 for
R_RISCV_TLS_DTPMOD32, R_RISCV_TLS_DTPMOD64, R_RISCV_TLS_DTPREL32,
R_RISCV_TLS_DTPREL64, R_RISCV_TLS_TPREL32, R_RISCV_TLS_TPREL64.
opcodes/
* riscv-opc.c: Formatting fixes.
gas/
* config/tc-riscv.c: Formatting and comment fixes throughout.

7 years agoImprove RISC-V LD error message
Palmer Dabbelt [Mon, 19 Dec 2016 06:53:46 +0000 (22:53 -0800)]
Improve RISC-V LD error message

I recently ran into this error message and found it's not helpful: it
just tells me some temporary file can't be linked.  This slightly
improved one at least tells me it's because of an elf32/elf64 conflict.

* elfnn-riscv.c (_bfd_riscv_elf_merge_private_bfd_data): Improve
error message when linking elf32 and elf64.

7 years agoAdd opcodes RISC-V dependencies
Alan Modra [Tue, 20 Dec 2016 01:18:21 +0000 (11:48 +1030)]
Add opcodes RISC-V dependencies

* Makefile.am (TARGET_LIBOPCODES_CFILES): Add riscv files.
* Makefile.in: Regenerate.
* po/POTFILES.in: Regenerate.

7 years agoFix problem where linker does not place .note sections according to script.
Cary Coutant [Tue, 20 Dec 2016 00:37:48 +0000 (16:37 -0800)]
Fix problem where linker does not place .note sections according to script.

gold/
PR gold/14676
PR gold/20983
* layout.h (Layout::choose_output_section): Add match_input_spec
parameter. Adjust all callers.
* layout.cc (Layout::choose_output_section): Likewise.  Pass
match_input_spec to Script_sections::output_section_name().
(Layout::create_note): Pass true for match_input_spec.
* script-sections.h (Script_sections::output_section_name): Add
match_input_spec parameter.
* script-sections.cc (Sections_element::output_section_name): Likewise.
(Output_section_definition::output_section_name): Likewise.
(Script_sections::output_section_name): Likewise.

7 years agoAutomatic date update in version.in
GDB Administrator [Tue, 20 Dec 2016 00:00:32 +0000 (00:00 +0000)]
Automatic date update in version.in

7 years agoFix an internal error in the constructor of Target_arm.
Igor Kudrin [Mon, 19 Dec 2016 23:23:59 +0000 (15:23 -0800)]
Fix an internal error in the constructor of Target_arm.

gold/
* arm.cc (Target_arm::Target_arm): Move initialization code ...
(Target_arm::do_select_as_default_target): ... to here.
* testsuite/Makefile.am (arm_target_lazy_init): New test case.
* testsuite/Makefile.in: Regenerate.
* testsuite/arm_target_lazy_init.s: New source file.
* testsuite/arm_target_lazy_init.t: New linker script.

7 years agoFix forced allocation of common (-d) during -r links.
Cary Coutant [Mon, 19 Dec 2016 18:37:23 +0000 (10:37 -0800)]
Fix forced allocation of common (-d) during -r links.

If the .bss section has other data in it besides common allocations,
gold was subtracting the wrong section start address from the symbol
value.

gold/
PR gold/20976
* symtab.cc (Symbol_table::sized_write_globals): Use address of
output section, not input section.
* testsuite/Makefile.am (pr20976): New test case.
* testsuite/Makefile.in: Regenerate.
* testsuite/pr20976.c: New source file.

7 years agoClean up gdb.gdb/selftest.exp
Yao Qi [Mon, 19 Dec 2016 15:00:32 +0000 (15:00 +0000)]
Clean up gdb.gdb/selftest.exp

I recently see the test fails like this,

(gdb) PASS: gdb.gdb/selftest.exp: step over argv initialization
list^M
487       std::vector<struct cmdarg> cmdarg_vec;^M
(gdb) FAIL: gdb.gdb/selftest.exp: unknown source line (after step over argv initialization)

step^M
std::vector<cmdarg, std::allocator<cmdarg> >::vector (this=0x7fffffffdc10) at ../../binutils-gdb/gdb/main.c:487^M
487       std::vector<struct cmdarg> cmdarg_vec;^M
(gdb) FAIL: gdb.gdb/selftest.exp: step into xmalloc call

These fails are caused by using std::vector in commit
f60ee22ea1d62f7004511ec65a3ad76890032d88.  selttest.exp should match
the source code of GDB.  It is a maintenance pain, so this patch
removes do_steps_and_nexts.

gdb/testsuite:

2016-12-19  Yao Qi  <yao.qi@linaro.org>

* gdb.gdb/selftest.exp (do_steps_and_nexts): Remove.
(test_with_self): Don't call do_steps_and_nexts, and remove
code about stepping into xmalloc.

7 years agobfd/elf32-arm.c: Rename 'popcount' to 'elf32_arm_popcount'
Christian Groessler [Mon, 19 Dec 2016 12:56:22 +0000 (13:56 +0100)]
bfd/elf32-arm.c: Rename 'popcount' to 'elf32_arm_popcount'

bfd/elf32_arm.c contains a function 'popcount' which conflicts
with a function of the same name in NetBSD's libc.
This change also changes popcount's 'sum' variable to signed
since the function returns a signed integer.

bfd/
* elf32-arm.c (elf32_arm_popcount): Rename from 'popcount'.  Make
'sum' local variable signed.

7 years agoMIPS/opcodes: Only examine ELF file structures if SYMTAB_AVAILABLE
Maciej W. Rozycki [Mon, 19 Dec 2016 11:35:14 +0000 (11:35 +0000)]
MIPS/opcodes: Only examine ELF file structures if SYMTAB_AVAILABLE

Correct commit 640c0ccdc980 ("some objdump -M options, better reg
dumps"), <https://sourceware.org/ml/binutils/2002-12/msg00706.html>, and
only execute code setting up disassembler options based on ELF file
structures if SYMTAB_AVAILABLE is set.

opcodes/
* mips-dis.c (set_default_mips_dis_options) [SYMTAB_AVAILABLE]:
Only examine ELF file structures here.

7 years agoMIPS/opcodes: Only call `bfd_mips_elf_get_abiflags' if BFD64
Maciej W. Rozycki [Mon, 19 Dec 2016 11:32:05 +0000 (11:32 +0000)]
MIPS/opcodes: Only call `bfd_mips_elf_get_abiflags' if BFD64

Complement commit 5e7fc731f80e ("MIPS/opcodes: Also set disassembler's
ASE flags from ELF structures") and fix an `--enable-targets=all' GDB
build regression on 32-bit hosts where the MIPS target is a secondary:

../opcodes/libopcodes.a(mips-dis.o): In function `set_default_mips_dis_options':
mips-dis.c:(.text+0x906): undefined reference to `bfd_mips_elf_get_abiflags'
collect2: error: ld returned 1 exit status
make[2]: *** [gdb] Error 1

by avoiding making a call to the `bfd_mips_elf_get_abiflags' function,
which is not available, because there is no MIPS/ELF BFD included in
32-bit BFD builds.  This call is only made from a conditional code block
guarded by a check against `bfd_target_elf_flavour', which is dead in
such a configuration, however cannot be optimized away by the compiler.
Also some other MIPS BFDs may be available, such as a.out, ECOFF or PE,
so the disassembler has to remain functional.

opcodes/
* mips-dis.c (set_default_mips_dis_options) [BFD64]: Only call
`bfd_mips_elf_get_abiflags' here.

7 years agoAutomatic date update in version.in
GDB Administrator [Mon, 19 Dec 2016 00:00:21 +0000 (00:00 +0000)]
Automatic date update in version.in

7 years agoAutomatic date update in version.in
GDB Administrator [Sun, 18 Dec 2016 00:00:24 +0000 (00:00 +0000)]
Automatic date update in version.in

7 years agoAutomatic date update in version.in
GDB Administrator [Sat, 17 Dec 2016 00:00:25 +0000 (00:00 +0000)]
Automatic date update in version.in

7 years agoDarwin: Fix gdb compilation.
Bernhard Heckel [Thu, 15 Dec 2016 13:04:11 +0000 (14:04 +0100)]
Darwin: Fix gdb compilation.

Due to changes introduced by
commit 4d01a485d29732b19743e8b138897f3509e071b0
('struct expression *' -> gdb::unique_xmalloc_ptr<expression>)
compilation is broken on Darwin.

../gdb/darwin-nat-info.c:733:8: error: assigning to 'struct expression *'
from incompatible type
'expression_up' (aka 'std::__1::unique_ptr<expression, gdb::xfree_deleter<expression> >')
expr = parse_expression (exp);

Beside compilation, memory leak was solved as 'make_clean_up' was not called in previous
version.

2016-12-16  Bernhard Heckel  <bernhard.heckel@intel.com>

gdb/Changelog:
* darwin-nat-info.c (info_mach_region_command): Use expression_up.

7 years agoFix compile time warning building arm-dis.c
Nick Clifton [Fri, 16 Dec 2016 10:59:36 +0000 (10:59 +0000)]
Fix compile time warning building arm-dis.c

7 years agoImplement and document --gc-keep-exported
fincs [Fri, 16 Dec 2016 03:12:02 +0000 (13:42 +1030)]
Implement and document --gc-keep-exported

include/
* bfdlink.h (struct bfd_link_info): Add gc_keep_exported.
bfd/
* elflink.c (bfd_elf_gc_mark_dynamic_ref_symbol): Add handling
for info->gc_keep_exported.
(bfd_elf_gc_sections): Likewise.
ld/
* ld.texinfo: Document --gc-keep-exported.
* ldlex.h (enum option_values): Add OPTION_GC_KEEP_EXPORTED.
* lexsup.c (parse_args): Add handling for --gc-keep-exported.

7 years agoAutomatic date update in version.in
GDB Administrator [Fri, 16 Dec 2016 00:00:26 +0000 (00:00 +0000)]
Automatic date update in version.in

7 years agoLinking non-ELF file broken by PR20908 fix
Alan Modra [Thu, 15 Dec 2016 10:59:44 +0000 (21:29 +1030)]
Linking non-ELF file broken by PR20908 fix

PR ld/20968
PR ld/20908
* elflink.c (bfd_elf_final_link): Revert 2016-12-02 change.  Move
reloc counting code later after ELF flavour test.

7 years agoAutomatic date update in version.in
GDB Administrator [Thu, 15 Dec 2016 00:00:24 +0000 (00:00 +0000)]
Automatic date update in version.in

7 years agoMAINTAINERS: Add myself as a MIPS maintainer
Maciej W. Rozycki [Wed, 14 Dec 2016 22:17:05 +0000 (22:17 +0000)]
MAINTAINERS: Add myself as a MIPS maintainer

* MAINTAINERS (Maintainers for particular sims): Add myself as
a MIPS maintainer.

7 years agoMIPS/opcodes: Also set disassembler's ASE flags from ELF structures
Maciej W. Rozycki [Wed, 14 Dec 2016 21:49:56 +0000 (21:49 +0000)]
MIPS/opcodes: Also set disassembler's ASE flags from ELF structures

Respect any ASE flags recorded in ELF file structures for the purpose of
selecting instructions to be disassembled, preventing code from being
hex-dumped even though having been clearly indicated as valid at the
assembly time.  Use date from the MIPS ABI flags structure if present,
and otherwise there may be an MDMX ASE flag set in the ELF file header.
For backwards compatibility only set extra flags and do not clear any,
preserving all previously set by the architecture selected to be
disassembled for.

include/
* elf/mips.h (Elf_Internal_ABIFlags_v0): Also declare struct
typedef as `elf_internal_abiflags_v0'.

bfd/
* bfd-in.h (elf_internal_abiflags_v0): New struct declaration.
(bfd_mips_elf_get_abiflags): New prototype.
* elfxx-mips.c (bfd_mips_elf_get_abiflags): New function.
* bfd-in2.h: Regenerate.

opcodes/
* mips-dis.c (mips_convert_abiflags_ases): New function.
(set_default_mips_dis_options): Also infer ASE flags from ELF
file structures.

binutils/
* testsuite/binutils-all/mips/mips-ase-1.d: New test.
* testsuite/binutils-all/mips/mips-ase-2.d: New test.
* testsuite/binutils-all/mips/mips-ase-3.d: New test.
* testsuite/binutils-all/mips/mips-ase-1.s: New test source.
* testsuite/binutils-all/mips/mips-ase-2.s: New test source.
* testsuite/binutils-all/mips/mips.exp: Run the new tests.

7 years agoMIPS/opcodes: Reorder ELF file header flag handling in disassembler
Maciej W. Rozycki [Wed, 14 Dec 2016 21:27:00 +0000 (21:27 +0000)]
MIPS/opcodes: Reorder ELF file header flag handling in disassembler

Move ELF file header flag interpretation code, used to set disassembler
options, beyond architecture setup.  No functional change as the effects
of both code sections are disjoint from each other, but this provides
for a further expansion of ELF file header flag interpretation.

opcodes/
* mips-dis.c (set_default_mips_dis_options): Reorder ELF file
header flag interpretation code.

7 years agoMIPS16/GAS: Fix assertion failures with relocations on 16-bit instructions
Maciej W. Rozycki [Wed, 14 Dec 2016 21:20:01 +0000 (21:20 +0000)]
MIPS16/GAS: Fix assertion failures with relocations on 16-bit instructions

Complement commit c9775dde3277 ("MIPS16: Add R_MIPS16_PC16_S1 branch
relocation support)" and report an assembly error when a relocation is
required for an instruction, currently a branch only, that has been
forced to use its unextended encoding, either with the use of an
explicit `.t' mnemonic suffix, or by means of `.set noautoextend' being
active, fixing an assertion failure currently caused instead.

gas/
* config/tc-mips.c (md_convert_frag): Report an error instead of
asserting on `ext'.
* testsuite/gas/mips/mips16-branch-unextended-1.d: New test.
* testsuite/gas/mips/mips16-branch-unextended-2.d: New test.
* testsuite/gas/mips/mips16-branch-unextended-1.s: New test
source.
* testsuite/gas/mips/mips16-branch-unextended-2.s: New test.
* testsuite/gas/mips/mips16-branch-unextended.l: New stderr
output.
* testsuite/gas/mips/mips.exp: Run the new tests.

7 years agoMIPS16: Fix SP-relative SD instruction annotation
Maciej W. Rozycki [Wed, 14 Dec 2016 21:18:16 +0000 (21:18 +0000)]
MIPS16: Fix SP-relative SD instruction annotation

Fix the annotation of SP-relative SD instructions incorrectly marked as
reading from the PC rather than SP, which in turn prevented their 16-bit
forms from being scheduled into jump delay slots.  This bug has been
there since forever.

opcodes/
* mips16-opc.c (mips16_opcodes): Set RD_SP rather than RD_PC in
`pinfo2' with SP-relative "sd" entries.

gas/
* testsuite/gas/mips/mips16-sprel-swap.d: New test.
* testsuite/gas/mips/mips16-sprel-swap.s: New test source.
* testsuite/gas/mips/mips.exp: Run the new test.

7 years agoMIPS16/opcodes: Fix and clarify MIPS16e commentary
Maciej W. Rozycki [Wed, 14 Dec 2016 21:14:33 +0000 (21:14 +0000)]
MIPS16/opcodes: Fix and clarify MIPS16e commentary

Correct the note about JALRC/JRC being compact jumps rather than
branches, and add a reference from where the remaining MIPS16e additions
live and the jumps used to be too, complementing commit ceb94aa50d68
("Update insn_mo when converting to a MIPS16e compact jump"),
<https://sourceware.org/ml/binutils/2011-06/msg00369.html>.

opcodes/
* mips16-opc.c (mips16_opcodes): Update comments on MIPS16e
compact jumps.

7 years agold: aarch64: fix TLS relaxation where TCB_SIZE is used
Yury Norov [Sat, 3 Dec 2016 13:20:43 +0000 (18:50 +0530)]
ld: aarch64: fix TLS relaxation where TCB_SIZE is used

TCB_SIZE is 2*sizeof(void *), which is 0x10 for lp64, and 0x8 for
ilp32. During relaxation, ld goes to do a replace:
bl   __tls_get_addr => add R0, R0, TCB_SIZE

But actual implementation is:
bfd_putl32 (0x91004000, contents + rel->r_offset + 4);

Which is equivalent of add x0, x0, 0x10. This is wrong for ilp32.

The possible fix for it is:
bfd_putl32 (0x91000000 | (TCB_SIZE<<10), contents + rel->r_offset + 4);

But ilp32 also needs w-registers, so it's simpler to put proper
instruction in #if/#else condition.

There are 2 such relaxations in elfNN_aarch64_tls_relax(), and so 2 new
tests added for ilp32 mode to test it.

Yury

* bfd/elfnn-aarch64.c: fix TLS relaxations for ilp32 where
TCB_SIZE is used.
* ld/testsuite/ld-aarch64/aarch64-elf.exp: Add tests for the case.
* ld/testsuite/ld-aarch64/tls-relax-ld-le-small-ilp32.d: New file.
* ld/testsuite/ld-aarch64/tls-relax-ld-le-tiny-ilp32.d: New file.

Signed-off-by: Yury Norov <ynorov@caviumnetworks.com>
7 years agoRevert "bfd: aarch64: fix word and arrdess size declaration in ilp32 mode"
Yury Norov [Wed, 14 Dec 2016 06:27:42 +0000 (11:57 +0530)]
Revert "bfd: aarch64: fix word and arrdess size declaration in ilp32 mode"

This reverts commit a02c3512655cc2c8ad68e4b656959b7d284acc7d.

7 years agoRevert "ld: aarch64: fix TLS relaxation where TCB_SIZE is used"
Yury Norov [Wed, 14 Dec 2016 06:26:54 +0000 (11:56 +0530)]
Revert "ld: aarch64: fix TLS relaxation where TCB_SIZE is used"

This reverts commit 6650f7bd18f8161b9f666d3e65a6346e23a9d85f.

7 years agobfd: aarch64: fix word and arrdess size declaration in ilp32 mode
Yury Norov [Fri, 9 Dec 2016 15:47:01 +0000 (21:17 +0530)]
bfd: aarch64: fix word and arrdess size declaration in ilp32 mode

7 years agold: aarch64: fix TLS relaxation where TCB_SIZE is used
Yury Norov [Sat, 3 Dec 2016 13:20:43 +0000 (18:50 +0530)]
ld: aarch64: fix TLS relaxation where TCB_SIZE is used

TCB_SIZE is 2*sizeof(void *), which is 0x10 for lp64, and 0x8 for
ilp32. During relaxation, ld goes to do a replace:
bl   __tls_get_addr => add R0, R0, TCB_SIZE

But actual implementation is:
bfd_putl32 (0x91004000, contents + rel->r_offset + 4);

Which is equivalent of add x0, x0, 0x10. This is wrong for ilp32.

The possible fix for it is:
bfd_putl32 (0x91000000 | (TCB_SIZE<<10), contents + rel->r_offset + 4);

But ilp32 also needs w-registers, so it's simpler to put proper
instruction in #if/#else condition.

THere are 2 such relaxations in elfNN_aarch64_tls_relax(), and so 2 new
tests added for ilp32 mode to test it.

Yury

7 years agoAutomatic date update in version.in
GDB Administrator [Wed, 14 Dec 2016 00:00:23 +0000 (00:00 +0000)]
Automatic date update in version.in

7 years agoAdd --orphan-handling option.
Cary Coutant [Tue, 13 Dec 2016 21:01:13 +0000 (13:01 -0800)]
Add --orphan-handling option.

gold/
PR gold/20749
* options.h (--orphan-handling): New option.
(General_options::Orphan_handling): New enum.
(General_options::orphan_handling_enum): New method.
(General_options::set_orphan_handling_enum): New method.
(General_options::orphan_handling_enum_): New data member.
* options.cc (General_options::General_options): Initialize new member.
(General_options::finalize): Convert --orphan-handling argument to enum.
* script-sections.cc (Script_sections::output_section_name): Check it.

7 years agoDo not use linker script to place static relocation sections.
Cary Coutant [Tue, 13 Dec 2016 19:49:22 +0000 (11:49 -0800)]
Do not use linker script to place static relocation sections.

gold/
PR gold/20522
* layout.cc (Layout::choose_output_section): Add is_reloc parameter.
Adjust all callers.  Do not use linker script for is_reloc sections.
(Layout::layout_reloc): Pass is_reloc == true.
* layout.h (Layout::choose_output_section): Add is_reloc parameter.

7 years ago[Binutils][AARCH64]Remove Cn register for coprocessor CRn, CRm field
Renlin Li [Tue, 13 Dec 2016 12:37:18 +0000 (12:37 +0000)]
[Binutils][AARCH64]Remove Cn register for coprocessor CRn, CRm field

The internal CN register representation for coprocessor fields used in aarch64
sys, sysl instructions are removed in this patch.

After the change, those fields are represented as immediate. Related checks are
added as well.

opcodes/

* aarch64-opc.c (aarch64_opnd_qualifiers): New CR value range
qualifier.
(operand_general_constraint_met_p): Remove case for CP_REG.
(aarch64_print_operand): Print CRn, CRm operand using imm field.
* aarch64-tbl.h (QL_SYS): Use CR qualifier.
(QL_SYSL): Likewise.
(aarch64_opcode_table): Change CRn, CRm operand class and type.
* aarch64-opc-2.c : Regenerate.
* aarch64-asm-2.c : Likewise.
* aarch64-dis-2.c : Likewise.

include/

* opcode/aarch64.h (aarch64_operand_class): Remove
AARCH64_OPND_CLASS_CP_REG.
(enum aarch64_opnd): Change AARCH64_OPND_Cn to AARCH64_OPND_CRn,
AARCH64_OPND_Cm to AARCH64_OPND_CRm.
(aarch64_opnd_qualifier): Define AARCH64_OPND_QLF_CR qualifier.

gas/

* config/tc-aarch64.c (AARCH64_REG_TYPES): Remove CN register.
(get_reg_expected_msg): Remove CN register case.
(parse_operands): rewrite parser for CRn, CRm operand.
(reg_names): Remove CN register.
* testsuite/gas/aarch64/diagnostic.s: Add a new test case.
* testsuite/gas/aarch64/diagnostic.l: Adjust error message.

7 years agoPE linker script improvements.
Nick Clifton [Tue, 13 Dec 2016 17:05:20 +0000 (17:05 +0000)]
PE linker script improvements.

PR ld/19254
* scripttempl/pe.sc (.fini): KEEP this section.
(.gcc_except_table): Likewise.
(.pdata): Also accept .pdata*.

7 years agoFix aarch64 sim bug with adds64, and add testcases for last 3 bug fixes.
Jim Wilson [Tue, 13 Dec 2016 16:35:31 +0000 (08:35 -0800)]
Fix aarch64 sim bug with adds64, and add testcases for last 3 bug fixes.

sim/aarch64
* simulator.c (NEG, POS): Move before set_flags_for_add64.
(set_flags_for_add64): Replace with a modified copy of
set_flags_for_sub64.

sim/testsuite/sim/aarch64
* testutils.inc (pass): Move .Lpass to start.
(fail): Move .Lfail to start.  Return 1 instead of 0.
(start): Moved .Lpass and .Lfail to here.
* adds.s: New.
* fstur.s: New.
* tbnz.s: New.

7 years ago[AArch64] Recognize R_AARCH64_P32_ABS32 as 32-bit relocation in readelf
Jiong Wang [Tue, 13 Dec 2016 12:52:59 +0000 (12:52 +0000)]
[AArch64] Recognize R_AARCH64_P32_ABS32 as 32-bit relocation in readelf

binutils/
* readelf.c (is_32bit_abs_reloc): Recognize R_AARCH64_P32_ABS32.

7 years ago[AArch64] Make LD testcases support ILP32 mode
Jiong Wang [Tue, 13 Dec 2016 12:50:17 +0000 (12:50 +0000)]
[AArch64] Make LD testcases support ILP32 mode

ld/
* testsuite/ld-aarch64/aarch64-elf.exp (aarch64_choose_lp64_emul): New
function.
(run_dump_test_lp64): New function which pass LP64 mode options to both
assembler and linker when building test binary.
(aarch64elftests): Remove eh-frame-merge test.
(eh-frame-merge-lp64): Restrict eh-frame-merge test to LP64 only.
(run_dump_test): Migrate to run_dump_test_lp64 if the test source was
written for LP64 only.
* testsuite/ld-aarch64/erratum843419.d: Support ILP32 mode.
* testsuite/ld-aarch64/farcall-b-defsym.d: Likewise.
* testsuite/ld-aarch64/farcall-b-plt.d: Likewise.
* testsuite/ld-aarch64/farcall-b.d: Likewise.
* testsuite/ld-aarch64/farcall-bl-defsym.d: Likewise.
* testsuite/ld-aarch64/farcall-bl-plt.d: Likewise.
* testsuite/ld-aarch64/farcall-bl.d: Likewise.
* testsuite/ld-aarch64/ifunc-15.d: Likewise.
* testsuite/ld-aarch64/ifunc-16.d: Likewise.
* testsuite/ld-aarch64/ifunc-5a-local.d: Likewise.
* testsuite/ld-aarch64/ifunc-5a.d: Likewise.
* testsuite/ld-aarch64/ifunc-5b-local.d: Likewise.
* testsuite/ld-aarch64/ifunc-5b.d: Likewise.
* testsuite/ld-aarch64/ifunc-5r-local.d: Likewise.
* testsuite/ld-aarch64/ifunc-6a.d: Likewise.
* testsuite/ld-aarch64/ifunc-6b.d: Likewise.
* testsuite/ld-aarch64/ifunc-7a.d: Likewise.
* testsuite/ld-aarch64/ifunc-7b.d: Likewise.
* testsuite/ld-aarch64/ifunc-8.d: Likewise.
* testsuite/ld-aarch64/limit-b.d: Likewise.
* testsuite/ld-aarch64/limit-bl.d: Likewise.

7 years ago[AArch64] Make GAS testcases support ILP32 mode
Jiong Wang [Tue, 13 Dec 2016 12:46:35 +0000 (12:46 +0000)]
[AArch64] Make GAS testcases support ILP32 mode

gas/
* gas/testsuite/gas/aarch64/addsub.d: Support ILP32 mode.
* gas/testsuite/gas/aarch64/advsimd-across.d: Likewise.
* gas/testsuite/gas/aarch64/advsimd-armv8_3.d: Likewise.
* gas/testsuite/gas/aarch64/advsimd-fp16.d: Likewise.
* gas/testsuite/gas/aarch64/advsimd-misc.d: Likewise.
* gas/testsuite/gas/aarch64/advsisd-copy.d: Likewise.
* gas/testsuite/gas/aarch64/advsisd-misc.d: Likewise.
* gas/testsuite/gas/aarch64/alias.d: Likewise.
* gas/testsuite/gas/aarch64/armv8-ras-1.d: Likewise.
* gas/testsuite/gas/aarch64/b_1.d: Likewise.
* gas/testsuite/gas/aarch64/beq_1.d: Likewise.
* gas/testsuite/gas/aarch64/bitfield-dump: Likewise.
* gas/testsuite/gas/aarch64/bitfield-no-aliases.d: Likewise.
* gas/testsuite/gas/aarch64/codealign.d: Likewise.
* gas/testsuite/gas/aarch64/codealign_1.d: Likewise.
* gas/testsuite/gas/aarch64/crc32-directive.d: Likewise.
* gas/testsuite/gas/aarch64/crc32.d: Likewise.
* gas/testsuite/gas/aarch64/crypto-directive.d: Likewise.
* gas/testsuite/gas/aarch64/crypto.d: Likewise.
* gas/testsuite/gas/aarch64/dwarf.d: Likewise.
* gas/testsuite/gas/aarch64/float-fp16.d: Likewise.
* gas/testsuite/gas/aarch64/floatdp2.d: Likewise.
* gas/testsuite/gas/aarch64/fp-armv8_3.d: Likewise.
* gas/testsuite/gas/aarch64/fp-const0-parse.d: Likewise.
* gas/testsuite/gas/aarch64/fp_cvt_int.d: Likewise.
* gas/testsuite/gas/aarch64/fpmov.d: Likewise.
* gas/testsuite/gas/aarch64/inst-directive.d: Likewise.
* gas/testsuite/gas/aarch64/ldr_1.d: Likewise.
* gas/testsuite/gas/aarch64/ldst-exclusive-armv8_3.d: Likewise.
* gas/testsuite/gas/aarch64/ldst-exclusive.d: Likewise.
* gas/testsuite/gas/aarch64/ldst-reg-imm-post-ind.d: Likewise.
* gas/testsuite/gas/aarch64/ldst-reg-imm-pre-ind.d: Likewise.
* gas/testsuite/gas/aarch64/ldst-reg-pair.d: Likewise.
* gas/testsuite/gas/aarch64/ldst-reg-reg-offset.d: Likewise.
* gas/testsuite/gas/aarch64/ldst-reg-uns-imm.d: Likewise.
* gas/testsuite/gas/aarch64/ldst-reg-unscaled-imm.d: Likewise.
* gas/testsuite/gas/aarch64/lor-directive.d: Likewise.
* gas/testsuite/gas/aarch64/lor.d: Likewise.
* gas/testsuite/gas/aarch64/lse-atomic.d: Likewise.
* gas/testsuite/gas/aarch64/mapmisc.d: Likewise.
* gas/testsuite/gas/aarch64/mov-no-aliases.d: Likewise.
* gas/testsuite/gas/aarch64/mov.d: Likewise.
* gas/testsuite/gas/aarch64/movi.d: Likewise.
* gas/testsuite/gas/aarch64/movw_label.d: Likewise.
* gas/testsuite/gas/aarch64/msr.d: Likewise.
* gas/testsuite/gas/aarch64/neon-fp-cvt-int.d: Likewise.
* gas/testsuite/gas/aarch64/neon-frint.d: Likewise.
* gas/testsuite/gas/aarch64/neon-ins.d: Likewise.
* gas/testsuite/gas/aarch64/neon-not.d: Likewise.
* gas/testsuite/gas/aarch64/neon-vfp-reglist-post.d: Likewise.
* gas/testsuite/gas/aarch64/neon-vfp-reglist.d: Likewise.
* gas/testsuite/gas/aarch64/no-aliases.d: Likewise.
* gas/testsuite/gas/aarch64/optional.d: Likewise.
* gas/testsuite/gas/aarch64/pac.d: Likewise.
* gas/testsuite/gas/aarch64/pan-directive.d: Likewise.
* gas/testsuite/gas/aarch64/pan.d: Likewise.
* gas/testsuite/gas/aarch64/rdma-directive.d: Likewise.
* gas/testsuite/gas/aarch64/rdma.d: Likewise.
* gas/testsuite/gas/aarch64/reloc-dtprel_g0.d: Likewise.
* gas/testsuite/gas/aarch64/reloc-dtprel_g0_nc.d: Likewise.
* gas/testsuite/gas/aarch64/reloc-dtprel_g1.d: Likewise.
* gas/testsuite/gas/aarch64/reloc-dtprel_hi12.d: Likewise.
* gas/testsuite/gas/aarch64/reloc-dtprel_lo12-1.d: Likewise.
* gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc.d: Likewise.
* gas/testsuite/gas/aarch64/reloc-tlsldm-1.d: Likewise.
* gas/testsuite/gas/aarch64/reloc-tlsldm-page-1.d: Likewise.
* gas/testsuite/gas/aarch64/reloc-tlsldm_lo12_nc-1.d: Likewise.
* gas/testsuite/gas/aarch64/shifted.d: Likewise.
* gas/testsuite/gas/aarch64/sve.d: Likewise.
* gas/testsuite/gas/aarch64/symbol.d: Likewise.
* gas/testsuite/gas/aarch64/sysreg-1.d: Likewise.
* gas/testsuite/gas/aarch64/sysreg-2.d: Likewise.
* gas/testsuite/gas/aarch64/sysreg-3.d: Likewise.
* gas/testsuite/gas/aarch64/sysreg.d: Likewise.
* gas/testsuite/gas/aarch64/system-2.d: Likewise.
* gas/testsuite/gas/aarch64/system-3.d: Likewise.
* gas/testsuite/gas/aarch64/system.d: Likewise.
* gas/testsuite/gas/aarch64/tbz_1.d: Likewise.
* gas/testsuite/gas/aarch64/tlbi_op.d: Likewise.
* gas/testsuite/gas/aarch64/tls.d: Likewise.
* gas/testsuite/gas/aarch64/uao-directive.d: Likewise.
* gas/testsuite/gas/aarch64/uao.d: Likewise.
* gas/testsuite/gas/aarch64/virthostext-directive.d: Likewise.
* gas/testsuite/gas/aarch64/virthostext.d: Likewise.
* gas/testsuite/gas/aarch64/adr_1.d: Restrict test under -mabi=lp64.
* gas/testsuite/gas/aarch64/int-insns.d: Likewise.
* gas/testsuite/gas/aarch64/programmer-friendly.d: Likewise.
* gas/testsuite/gas/aarch64/reloc-data.d: Likewise.
* gas/testsuite/gas/aarch64/reloc-dtprel_g1_nc.d: Likewise.
* gas/testsuite/gas/aarch64/reloc-dtprel_g2.d: Likewise.
* gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst16.d: Likewise.
* gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst32.d: Likewise.
* gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst64.d: Likewise.
* gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst8.d: Likewise.
* gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst16.d: Likewise.
* gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst32.d: Likewise.
* gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst64.d: Likewise.
* gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst8.d: Likewise.
* gas/testsuite/gas/aarch64/reloc-gotoff_g0_nc.d: Likewise.
* gas/testsuite/gas/aarch64/reloc-gotoff_g1.d: Likewise.
* gas/testsuite/gas/aarch64/reloc-gottprel_g0_nc.d: Likewise.
* gas/testsuite/gas/aarch64/reloc-gottprel_g1.d: Likewise.
* gas/testsuite/gas/aarch64/reloc-insn.d: Likewise.
* gas/testsuite/gas/aarch64/reloc-tlsdesc_off_g0_nc.d: Likewise.
* gas/testsuite/gas/aarch64/reloc-tlsdesc_off_g1.d: Likewise.
* gas/testsuite/gas/aarch64/reloc-tlsgd_g0_nc.d: Likewise.
* gas/testsuite/gas/aarch64/reloc-tlsgd_g1.d: Likewise.
* gas/testsuite/gas/aarch64/tail_padding.d: Likewise.
* gas/testsuite/gas/aarch64/tls-desc.d: Likewise.

7 years agoAdd a 'Past Maintainers' section to the MAINTAINERS file. Retire Mark Mitchell's...
Nick Clifton [Tue, 13 Dec 2016 11:19:23 +0000 (11:19 +0000)]
Add a 'Past Maintainers' section to the MAINTAINERS file.  Retire Mark Mitchell's name to this section.

* MAINTAINERS (Past Maintainers): New section.  Move Mark
Mitchell's name here.

7 years agoWhen using linker scripts, place linker-generated sections by the output section...
Cary Coutant [Tue, 13 Dec 2016 02:51:29 +0000 (18:51 -0800)]
When using linker scripts, place linker-generated sections by the output section name.

2016-12-12  Igor Kudrin  <ikudrin@accesssoftek.com>
    Cary Coutant  <ccoutant@gmail.com>

gold/
PR gold/14676
* script-sections.cc (Output_section_definition::output_section_name):
For linker-generated sections, compare with output section name.
* testsuite/Makefile.am (script_test_13): New test.
* testsuite/Makefile.in: Regenerate.
* testsuite/script_test_13.c: New source file.
* testsuite/script_test_13.sh: New script.
* testsuite/script_test_13.t: New linker script.

7 years agoFix edge cases in orphan section placement.
Cary Coutant [Tue, 13 Dec 2016 01:52:09 +0000 (17:52 -0800)]
Fix edge cases in orphan section placement.

There were still some cases I found where orphan section placement
was screwy -- where the script has no output section description for
either .data or .bss, a .bss orphan section ends up getting placed
before the .data section. In addition, if there is an output section
description for a data section not named .data (e.g., .rela.dyn),
the orphan .bss gets placed before it. This patch cleans that up,
by tracking the last allocated section even as we're adding orphans.

I've also improved segment layout in the absence of a PHDRS clause.
A zero-length NOBITS section will no longer force a new segment
when followed by a PROGBITS section.

2016-12-12  Cary Coutant  <ccoutant@gmail.com>

gold/
* script-sections.cc (Orphan_section_placement::update_last_alloc):
New method.
(Orphan_section_placement::find_place): Place orphan .data section
after either RODATA or TEXT.
(Script_sections::place_orphan): Call update_last_alloc for allocated
sections.
(Script_sections::create_segments): Improve handling of BSS.

7 years agoAutomatic date update in version.in
GDB Administrator [Tue, 13 Dec 2016 00:00:25 +0000 (00:00 +0000)]
Automatic date update in version.in

7 years agoDon't add PHDR for objcopy/strip or ld script specifying PHDRS
Alan Modra [Mon, 12 Dec 2016 23:00:06 +0000 (09:30 +1030)]
Don't add PHDR for objcopy/strip or ld script specifying PHDRS

HPPA64 needs to add a DT_PHDR header for shared libs.  That's fine
when linking but shouldn't happen for strip/objcopy.  Also PHDR must
come first so there's no need to look at all program headers.

bfd/
* elf64-hppa.c (elf64_hppa_modify_segment_map): Don't add PHDR
for objcopy/strip or when a ld script specifies PHDRS.
ld/
* testsuite/ld-elf/nobits-1.d: Remove xfail for hppa64.
* testsuite/ld-elf/note-1.d: Likewise.
* testsuite/ld-elf/note-2.d: Likewise.

7 years agoDon't fudge p_vaddr when PHDR in segment
Alan Modra [Mon, 12 Dec 2016 22:59:47 +0000 (09:29 +1030)]
Don't fudge p_vaddr when PHDR in segment

RX does horrible fudges to PT_LOAD p_vaddr, that affect the testsuite
and mean the target won't support dynamic objects.  The latter
probably doesn't matter too much since RX is an embedded target, but
it's easy to stop some of the fudges in order to reduce special cases
for RX in the testsuite.  The changes make sense in isolation too.

bfd/
* elf32-rx.c (elf32_rx_modify_program_headers): Don't adjust
segments that include the ELF file header or program headers.
ld/
* testsuite/ld-elf/flags1.d: Run for RX.
* testsuite/ld-scripts/phdrs.exp: Likewise.
* testsuite/ld-scripts/pr14962.d: Likewise.
* testsuite/ld-scripts/pr14962-2.d: Likewise.

7 years ago[GOLD] Allow for larger alignment in script_test_15
Alan Modra [Mon, 12 Dec 2016 22:59:26 +0000 (09:29 +1030)]
[GOLD] Allow for larger alignment in script_test_15

PowerPC64 aligns .got to a 256 byte boundary.  This tends to bump the
data segment file size.

PR gold/16711
* testsuite/script_test_15a.sh: Allows larger p_filesz.
* testsuite/script_test_15b.sh: Likewise.
* testsuite/script_test_15c.sh: Likewise.

7 years ago[GOLD] Adjust testcase for PowerPC64
Alan Modra [Mon, 12 Dec 2016 22:51:56 +0000 (09:21 +1030)]
[GOLD] Adjust testcase for PowerPC64

Since the linker created .TOC. symbol is placed at roughly .got+32k,
.toc input sections must be placed in or after .got if .toc entries
are accessed using 16-bit signed offset relocs.  crt1.o contains such
a relocation.

PR gold/20717
* testsuite/pr20717.t: Add .got output section containing .toc.

7 years agoPort c++/78252 from GCC
Nathan Sidwell [Mon, 12 Dec 2016 17:52:37 +0000 (12:52 -0500)]
Port c++/78252 from GCC

PR c++/78252
* cp-demangle.c (struct d_print_info): Add is_lambda_arg field.
(d_print_init): Initialize it.
(d_print_comp_inner) <DEMANGLE_COMPONENT_TEMPLATE_PARAM>: Check
is_lambda_arg for auto.
<DEMANGLE_COMPONENT_REFERENCE,
DEMANGLE_COMPONENT_RVALUE_REFERENCE>: Skip smashing check when
is_lambda_arg.
<DEMANGLE_COMPONENT_LAMBDA>: Increment is_lambda_arg around arg
printing.
* testsuite/demangle-expected: Add lambda auto mangling cases.

7 years agoRemove assert on exec_bfd in cris_delayed_get_disassembler
Yao Qi [Mon, 12 Dec 2016 09:09:43 +0000 (09:09 +0000)]
Remove assert on exec_bfd in cris_delayed_get_disassembler

cris_delayed_get_disassembler has an assert that exec_bfd can't be
NULL, but this assert can be triggered like this,

(gdb) set architecture cris
The target architecture is assumed to be cris
(gdb) disassemble 0x0,+4
Dump of assembler code from 0x0 to 0x4:
   0x00000000:
../../binutils-gdb/gdb/cris-tdep.c:3798: internal-error: int cris_delayed_get_disassembler(bfd_vma, disassemble_info*): Assertion `exec_bfd != NULL' failed.
A problem internal to GDB has been detected,
further debugging may prove unreliable.

however, cris_get_disassembler does have code to handle the case that
bfd is NULL,

  /* If there's no bfd in sight, we return what is valid as input in all
     contexts if fed back to the assembler: disassembly *with* register
     prefix.  Unfortunately this will be totally wrong for v32.  */
  if (abfd == NULL)
    return print_insn_cris_with_register_prefix;

This patch is to remove this assert.

gdb:

2016-12-12  Yao Qi  <yao.qi@linaro.org>

PR tdep/20955
* cris-tdep.c (cris_delayed_get_disassembler): Remove the
assert.

7 years agoHandle memory error in print_insn_rx
Yao Qi [Mon, 12 Dec 2016 09:03:34 +0000 (09:03 +0000)]
Handle memory error in print_insn_rx

Nowadays, memory error in rx disassembly is not handled, so if I
start a fresh GDB, and disassemble,

(gdb) set architecture rx
The target architecture is assumed to be rx
(gdb) disassemble 0x0,+4
Dump of assembler code from 0x0 to 0x4:
   0x00000000: brk
   0x00000001: brk
   0x00000002: brk
   0x00000003: brk

the output is wrong.  This patch adds code to call dis->memory_error_func
on memory error, and longjmp to print_insn_rx.  With this patch applied,

(gdb) set architecture rx
The target architecture is assumed to be rx
(gdb) disassemble 0,+4
Dump of assembler code from 0x0 to 0x4:
   0x00000000: Cannot access memory at address 0x0

opcodes:

2016-12-12  Yao Qi  <yao.qi@linaro.org>

* rx-dis.c: Include <setjmp.h>
(struct private): New.
(rx_get_byte): Check return value of read_memory_func, and
call memory_error_func and OPCODES_SIGLONGJMP on error.
(print_insn_rx): Call OPCODES_SIGSETJMP.

7 years agoHandle memory error in print_insn_rl78_common
Yao Qi [Mon, 12 Dec 2016 09:03:34 +0000 (09:03 +0000)]
Handle memory error in print_insn_rl78_common

Nowadays, memory error in rl78 disassembly is not handled, so if I
start a fresh GDB, and disassemble,

(gdb) set architecture rl78
The target architecture is assumed to be rl78
(gdb) disassemble 0x0,+4
Dump of assembler code from 0x0 to 0x4:
   0x00000000: nop
   0x00000001: nop
   0x00000002: nop
   0x00000003: nop

the output is wrong.  This patch adds code to call dis->memory_error_func
on memory error, and longjmp to print_insn_rl78_common.  With this
patch applied,

(gdb) set architecture rl78
The target architecture is assumed to be rl78
(gdb) disassemble 0,+4
Dump of assembler code from 0x0 to 0x4:
   0x00000000: Cannot access memory at address 0x0

opcodes:

2016-12-12  Yao Qi  <yao.qi@linaro.org>

* rl78-dis.c: Include <setjmp.h>.
(struct private): New.
(rl78_get_byte): Check return value of read_memory_func, and
call memory_error_func and OPCODES_SIGLONGJMP on error.
(print_insn_rl78_common): Call OPCODES_SIGJMP.

7 years agoFix earlier ChangeLog entry to give Igor credit, add testcases.
Igor Kudrin [Mon, 12 Dec 2016 04:31:09 +0000 (20:31 -0800)]
Fix earlier ChangeLog entry to give Igor credit, add testcases.

2016-12-01  Cary Coutant  <ccoutant@gmail.com>
    Igor Kudrin  <ikudrin@accesssoftek.com>

PR gold/20717
* script-sections.cc (Script_sections): Set *keep to false when
no match.

2016-12-11  Igor Kudrin  <ikudrin@accesssoftek.com>

PR gold/20717
* testsuite/Makefile.am (pr20717): New test.
* testsuite/Makefile.in: Regenerate.
* testsuite/pr20717.c: New test source file.
* testsuite/pr20717.sh: New test script.
* testsuite/pr20717.t: New test linker script.

7 years agoFix problems with bss handling in linker scripts.
Cary Coutant [Mon, 12 Dec 2016 01:31:25 +0000 (17:31 -0800)]
Fix problems with bss handling in linker scripts.

PR 16711 noted that gold allocates file space for BSS sections when using
a linker script. I've fixed that by rewriting set_section_addresses and
set_section_list_addresses to track the file offset separate from the
current virtual address, so that BSS sections do not move the file offset.
Now, if a series of BSS sections come at the end of a segment, we do not
allocate file space; but if a script forces them into the middle of a
segment, we will still allocate file space (matching Gnu ld behavior).
I've also added a warning when that happens.

That exposed another problem where orphan .bss sections were sometimes
placed in the middle of a segment. For example, if the script mentions
the .got section, but both .data and .bss are orphans, gold would put
both .data and .bss in front of .got. I've fixed that by ensuring that
orphan BSS sections are always placed after all other allocated sections.

It also exposed a problem where the SUBALIGN property is not handled
properly. The ld manual clearly states that it should override input section
alignment, whether greater or less than the given alignment, but gold would
only increase an input section's alignment. Gold would also place the output
section based on its original alignment before the SUBALIGN property took
effect, leading to a misaligned output section (where the input section
was properly aligned in memory, but was not aligned relative to the start
of the section), in violation of the ELF/gABI spec. I've fixed that by
making sure that the SUBALIGN property overrides the internal alignment of
the input sections as well as the external alignment of the output section.
This affected the behavior of script_test_2, which was written to expect
a misaligned section.

The net effect is, I think, improved compatibility with the BFD linker.
There are still cases where orphan placement differs, but the differences
should be rarer and less important. ALIGN and SUBALIGN behavior is closer,
but still not an exact match -- I still found cases where ld would create
a misaligned output section, and where gold will properly align it.

gold/
PR gold/16711
* output.cc (Output_section::set_final_data_size): Calculate data size
based on relative offset rather than file offset.
(Output_segment::set_section_addresses): Track file offset separately
from address offset.
(Output_segment::set_section_list_addresses): Add pfoff parameter.
Track file offset separately.  Don't move file offset for BSS
sections.
* output.h (Output_segment::set_section_list_addresses): Add pfoff
parameter.
* script-sections.cc (Orphan_section_placement): Add PLACE_LAST_ALLOC.
(Orphan_section_placement::Orphan_section_placement): Initialize it.
(Orphan_section_placement::output_section_init): Track last allocated
section.
(Orphan_section_placement::find_place): Place BSS after last allocated
section.
(Output_section_element_input::set_section_addresses): Always override
input section alignment when SUBALIGN is specified.
(Output_section_definition::set_section_addresses): Override alignment
of output section when SUBALIGN is specified.

* testsuite/Makefile.am (script_test_15a, script_test_15b)
(script_test_15c): New test cases.
* testsuite/Makefile.in: Regenerate.
* testsuite/script_test_2.cc: Adjust expected layout.
* testsuite/script_test_15.c: New source file.
* testsuite/script_test_15a.sh: New shell script.
* testsuite/script_test_15a.t: New linker script.
* testsuite/script_test_15b.sh: New shell script.
* testsuite/script_test_15b.t: New linker script.
* testsuite/script_test_15c.sh: New shell script.
* testsuite/script_test_15c.t: New linker script.

7 years agoRegenerate Makefile.in to get rid of annoying diffs caused by non-deterministic automake.
Cary Coutant [Mon, 12 Dec 2016 00:40:11 +0000 (16:40 -0800)]
Regenerate Makefile.in to get rid of annoying diffs caused by non-deterministic automake.

* Makefile.in: Regenerate.

7 years agoAutomatic date update in version.in
GDB Administrator [Mon, 12 Dec 2016 00:00:21 +0000 (00:00 +0000)]
Automatic date update in version.in

7 years agoAutomatic date update in version.in
GDB Administrator [Sun, 11 Dec 2016 00:00:23 +0000 (00:00 +0000)]
Automatic date update in version.in

7 years agoAutomatic date update in version.in
GDB Administrator [Sat, 10 Dec 2016 00:00:21 +0000 (00:00 +0000)]
Automatic date update in version.in

7 years agoMIPS16: Remove unused `>' operand code
Maciej W. Rozycki [Fri, 9 Dec 2016 23:11:40 +0000 (23:11 +0000)]
MIPS16: Remove unused `>' operand code

This code has never been used throughout the repository history, and
likely not before either, as due to the assymetry of MIPS16 instruction
set encoding there are no 32-bit shift operations having their immediate
shift count placed in the position of the usual `rx' instruction field.

gas/
* config/tc-mips.c (mips16_macro_build) <'>'>: Remove case.

include/
* opcode/mips.h: Remove references to `>' operand code.

opcodes/
* mips16-opc.c (decode_mips16_operand) <'>'>: Remove cases.

7 years agoMIPS16/opcodes: Use hexadecimal interpretation for the `e' operand code
Maciej W. Rozycki [Fri, 9 Dec 2016 22:50:07 +0000 (22:50 +0000)]
MIPS16/opcodes: Use hexadecimal interpretation for the `e' operand code

Make the `e' operand code used with raw EXTEND instructions use the
hexadecimal rather than decimal format, for consistency with what is
actually produced by code in `print_insn_mips16' dedicated to EXTEND
disassembly.  Due to that special handling the operand code is only
interpreted for assembly however, which accepts either format either
way, so there is no functional change here.

opcodes/
* mips16-opc.c (decode_mips16_operand) <'e'>: Use HINT rather
than UINT.

gas/
* testsuite/gas/mips/mips16-extend.d: New test.
* testsuite/gas/mips/mips16-extend.s: New test source.
* testsuite/gas/mips/mips.exp: Run the new test.

7 years agoMIPS16/opcodes: Reformat raw EXTEND and undecoded output
Maciej W. Rozycki [Fri, 9 Dec 2016 22:27:00 +0000 (22:27 +0000)]
MIPS16/opcodes: Reformat raw EXTEND and undecoded output

Use a tab rather than a space to separate `extend' and its uninterpreted
argument output, like with regular instructions.  Separate hexadecimal
halves of undecoded extended instructions output with a space instead of
presenting them concatenated.

opcodes/
* mips-dis.c (print_insn_mips16): Use a tab rather than a space
to separate `extend' and its uninterpreted argument output.
Separate hexadecimal halves of undecoded extended instructions
output.

binutils/
* testsuite/binutils-all/mips/mips16-extend-noinsn.d: New test.
* testsuite/binutils-all/mips/mips16-extend-noinsn.s: New test
source.
* testsuite/binutils-all/mips/mips.exp: Run the new test.

7 years agogdb: Remove support for obsolete OSABIs and a.out
Pedro Alves [Fri, 9 Dec 2016 16:08:49 +0000 (16:08 +0000)]
gdb: Remove support for obsolete OSABIs and a.out

gdb/ChangeLog:
2016-12-09  Pedro Alves  <palves@redhat.com>

* Makefile.in (ALL_TARGET_OBS): Remove vax-obsd-tdep.o.
* alpha-fbsd-tdep.c (_initialize_alphafbsd_tdep): Adjust.
* alpha-nbsd-tdep.c: Move comment to _initialize_alphanbsd_tdep.
(alphanbsd_core_osabi_sniffer): Delete.
(_initialize_alphanbsd_tdep): No longer handle a.out.
* alpha-obsd-tdep.c (_initialize_alphaobsd_tdep): Adjust.
* amd64-fbsd-tdep.c (_initialize_amd64fbsd_tdep): Adjust.
* amd64-nbsd-tdep.c (_initialize_amd64nbsd_tdep): Adjust.
* amd64-obsd-tdep.c (amd64obsd_supply_regset)
(amd64obsd_combined_regset)
(amd64obsd_iterate_over_regset_sections, amd64obsd_core_init_abi):
Delete.
(_initialize_amd64obsd_tdep): Don't handle a.out.
* arm-nbsd-nat.c (struct md_core, fetch_core_registers)
(arm_netbsd_core_fns): Delete.
(_initialize_arm_netbsd_nat): Don't register arm_netbsd_core_fns.
* arm-nbsd-tdep.c (arm_netbsd_aout_init_abi)
(arm_netbsd_aout_osabi_sniffer): Delete.
(_initialize_arm_netbsd_tdep): Don't handle a.out.
* arm-obsd-tdep.c (armobsd_core_osabi_sniffer): Delete.
(_initialize_armobsd_tdep): Don't handle a.out.
* arm-tdep.c (arm_gdbarch_init): Remove bfd_target_aout_flavour
case.
* breakpoint.c (disable_breakpoints_in_unloaded_shlib): Remove
SunOS a.out handling.
* configure.tgt (vax-*-netbsd* | vax-*-knetbsd*-gnu): Remove
vax-obsd-tdep.o from gdb_target_objs.
(vax-*-openbsd*): Likewise.
(*-*-freebsd*): Adjust default gdb_osabi.
(*-*-openbsd*): Likewise.
* dbxread.c (block_address_function_relative): Delete.
(dbx_symfile_read): Remove reference to
block_address_function_relative.
(dbx_symfile_read): Don't call read_dbx_dynamic_symtab.
(read_dbx_dynamic_symtab): Delete.
(process_one_symbol): Remove references to
block_address_function_relative.
* defs.h (GDB_OSABI_FREEBSD_AOUT, GDB_OSABI_NETBSD_AOUT): Remove.
(GDB_OSABI_FREEBSD_ELF): Rename to ...
(GDB_OSABI_FREEBSD): ... this.
(GDB_OSABI_NETBSD_ELF): Rename to ...
(GDB_OSABI_NETBSD): ... this.
(GDB_OSABI_OPENBSD_ELF): Rename to ...
(GDB_OSABI_OPENBSD): ... this.
(GDB_OSABI_HPUX_ELF, GDB_OSABI_HPUX_SOM): Remove.
* fbsd-tdep.c: Adjust comment.
* hppa-nbsd-tdep.c (_initialize_hppanbsd_tdep): Adjust.
* hppa-obsd-tdep.c (GDB_OSABI_NETBSD_CORE): Delete.
(hppaobsd_core_osabi_sniffer): Delete.
(_initialize_hppabsd_tdep): Don't handle a.out.
* hppa-tdep.c (hppa_stub_frame_unwind_cache): Don't handle
GDB_OSABI_HPUX_SOM.
(hppa_gdbarch_init): Likewise.
* i386-bsd-tdep.c (i386bsd_aout_osabi_sniffer)
(i386bsd_core_osabi_sniffer, _initialize_i386bsd_tdep): Delete.
* i386-fbsd-tdep.c (i386fbsdaout_init_abi): Delete.  Merge bits
with ...
(i386fbsd_init_abi): ... this.
(_initialize_i386fbsd_tdep): Don't handle a.out.
* i386-nbsd-tdep.c (_initialize_i386nbsd_tdep): Adjust.
* i386-obsd-tdep.c (i386obsd_aout_supply_regset)
(i386obsd_aout_gregset)
(i386obsd_aout_iterate_over_regset_sections): Delete.
(i386obsd_init_abi): Merge with i386obsd_elf_init_abi.
(i386obsd_aout_init_abi): Delete.
(_initialize_i386obsd_tdep): Don't handle a.out.
* m68k-bsd-tdep.c (m68kobsd_sigtramp_cache_init)
(m68kobsd_sigtramp): Delete.
(m68kbsd_init_abi): Merge with ...
(m68kbsd_elf_init_abi): ... this, and delete it.
(m68kbsd_aout_init_abi): Delete.
(m68kbsd_aout_osabi_sniffer, m68kbsd_core_osabi_sniffer): Delete.
(_initialize_m68kbsd_tdep): Don't handle a.out.
* mips-nbsd-tdep.c (_initialize_mipsnbsd_tdep): Adjust.
* mips64-obsd-tdep.c (_initialize_mips64obsd_tdep): Adjust.
* osabi.c (gdb_osabi_names): Remove "a.out" entries.  Drop "ELF"
suffixes.  Remove "HP-UX" entries.
(generic_elf_osabi_sniff_abi_tag_sections): Adjust.
(generic_elf_osabi_sniffer): No longer handle GDB_OSABI_HPUX_ELF.
Adjust.
(_initialize_ppcfbsd_tdep): Adjust.
* ppc-nbsd-tdep.c (_initialize_ppcnbsd_tdep): Adjust.
* ppc-obsd-tdep.c (GDB_OSABI_NETBSD_CORE)
(ppcobsd_core_osabi_sniffer): Delete.
(_initialize_ppcobsd_tdep): Don't handle a.out.
* rs6000-tdep.c (rs6000_gdbarch_init): Adjust.
* sh-nbsd-tdep.c (GDB_OSABI_NETBSD_CORE)
(shnbsd_core_osabi_sniffer): Delete.
(_initialize_shnbsd_tdep): Don't handle a.out.
* solib.c (clear_solib): Don't handle SunOS/a.out.
* sparc-nbsd-tdep.c (sparc32nbsd_init_abi): Make extern.
(sparc32nbsd_aout_init_abi): Delete.
(sparc32nbsd_elf_init_abi): Merged into sparc32nbsd_init_abi.
(sparcnbsd_aout_osabi_sniffer): Delete.
(GDB_OSABI_NETBSD_CORE, sparcnbsd_core_osabi_sniffer): Delete.
(_initialize_sparcnbsd_tdep): No longer handle a.out.
* sparc-obsd-tdep.c (sparc32obsd_init_abi)
(_initialize_sparc32obsd_tdep): Adjust.
* sparc-tdep.h (sparc32nbsd_elf_init_abi): Rename to ...
(sparc32nbsd_init_abi): ... this.
* sparc64-fbsd-tdep.c (_initialize_sparc64fbsd_tdep): Adjust.
* sparc64-nbsd-tdep.c (_initialize_sparc64nbsd_tdep): Adjust.
* sparc64-obsd-tdep.c (_initialize_sparc64obsd_tdep): Adjust.
* stabsread.c: Update comment.
* symmisc.c (print_objfile_statistics): Don't mention "a.out" in
output.
* vax-nbsd-tdep.c (_initialize_vaxnbsd_tdep): Adjust.
* vax-obsd-tdep.c: Delete file.

7 years agoAdd ChangeLog entries
Yao Qi [Fri, 9 Dec 2016 15:44:48 +0000 (15:44 +0000)]
Add ChangeLog entries

ChangeLog entries are missed in my two previous commits.

7 years agoCreate tdep->rx_psw_type and tdep->rx_fpsw_type lazily
Yao Qi [Fri, 9 Dec 2016 15:27:43 +0000 (15:27 +0000)]
Create tdep->rx_psw_type and tdep->rx_fpsw_type lazily

I build GDB with all targets enabled, and "set architecture rx",
GDB crashes,

(gdb) set architecture rx

Program received signal SIGSEGV, Segmentation fault.
append_flags_type_flag (type=0x20cc360, bitpos=bitpos@entry=0, name=name@entry=0xd27529 "C") at ../../binutils-gdb/gdb/gdbtypes.c:4926
4926    name);
(gdb) bt 10
 #0  append_flags_type_flag (type=0x20cc360, bitpos=bitpos@entry=0, name=name@entry=0xd27529 "C") at ../../binutils-gdb/gdb/gdbtypes.c:4926
 #1  0x00000000004ce725 in rx_gdbarch_init (info=..., arches=<optimized out>) at ../../binutils-gdb/gdb/rx-tdep.c:1051
 #2  0x00000000006b05a4 in gdbarch_find_by_info (info=...) at ../../binutils-gdb/gdb/gdbarch.c:5269
 #3  0x000000000060eee4 in gdbarch_update_p (info=...) at ../../binutils-gdb/gdb/arch-utils.c:557
 #4  0x000000000060f8a8 in set_architecture (ignore_args=<optimized out>, from_tty=1, c=<optimized out>) at ../../binutils-gdb/gdb/arch-utils.c:531
 #5  0x0000000000593d0b in do_set_command (arg=<optimized out>, arg@entry=0x20bee81 "rx ", from_tty=from_tty@entry=1, c=c@entry=0x20b1540)
    at ../../binutils-gdb/gdb/cli/cli-setshow.c:455
 #6  0x00000000007665c3 in execute_command (p=<optimized out>, p@entry=0x20bee70 "set architecture rx ", from_tty=1) at ../../binutils-gdb/gdb/top.c:666
 #7  0x00000000006935f4 in command_handler (command=0x20bee70 "set architecture rx ") at ../../binutils-gdb/gdb/event-top.c:577
 #8  0x00000000006938d8 in command_line_handler (rl=<optimized out>) at ../../binutils-gdb/gdb/event-top.c:767
 #9  0x0000000000692c2c in gdb_rl_callback_handler (rl=0x20be7f0 "") at ../../binutils-gdb/gdb/event-top.c:200

The cause is that we want to access some builtin types in gdbarch init, but
it is not initialized yet.  I fix it by creating the type when it is to be
used.  We've already done this in sparc, sparc64 and m68k.

gdb:

2016-12-09  Yao Qi  <yao.qi@linaro.org>

PR tdep/20954
* rx-tdep.c (rx_psw_type): New function.
(rx_fpsw_type): New function.
(rx_register_type): Call rx_psw_type and rx_fpsw_type.
(rx_gdbarch_init): Move code to rx_psw_type and
rx_fpsw_type.

gdb/testsuite:

2016-12-09  Yao Qi  <yao.qi@linaro.org>

* gdb.base/all-architectures.exp.in: Remove kfail for "rx".

7 years agoCreate tdep->rl78_psw_type lazily
Yao Qi [Fri, 9 Dec 2016 15:27:43 +0000 (15:27 +0000)]
Create tdep->rl78_psw_type lazily

I build GDB for all targets enabled.  When I "set architecture rl78",
GDB crashes,

(gdb) set architecture rl78

Program received signal SIGSEGV, Segmentation fault.
append_flags_type_flag (type=0x20cc0e0, bitpos=bitpos@entry=0, name=name@entry=0x11dba3f "CY") at ../../binutils-gdb/gdb/gdbtypes.c:4926
4926    name);
(gdb) bt 10
 #0  append_flags_type_flag (type=0x20cc0e0, bitpos=bitpos@entry=0, name=name@entry=0x11dba3f "CY") at ../../binutils-gdb/gdb/gdbtypes.c:4926
 #1  0x00000000004aaca8 in rl78_gdbarch_init (info=..., arches=<optimized out>) at ../../binutils-gdb/gdb/rl78-tdep.c:1410
 #2  0x00000000006b05a4 in gdbarch_find_by_info (info=...) at ../../binutils-gdb/gdb/gdbarch.c:5269
 #3  0x000000000060eee4 in gdbarch_update_p (info=...) at ../../binutils-gdb/gdb/arch-utils.c:557
 #4  0x000000000060f8a8 in set_architecture (ignore_args=<optimized out>, from_tty=1, c=<optimized out>) at ../../binutils-gdb/gdb/arch-utils.c:531
 #5  0x0000000000593d0b in do_set_command (arg=<optimized out>, arg@entry=0x20be851 "rl78", from_tty=from_tty@entry=1, c=c@entry=0x20b1540)
    at ../../binutils-gdb/gdb/cli/cli-setshow.c:455
 #6  0x00000000007665c3 in execute_command (p=<optimized out>, p@entry=0x20be840 "set architecture rl78", from_tty=1) at ../../binutils-gdb/gdb/top.c:666
 #7  0x00000000006935f4 in command_handler (command=0x20be840 "set architecture rl78") at ../../binutils-gdb/gdb/event-top.c:577
 #8  0x00000000006938d8 in command_line_handler (rl=<optimized out>) at ../../binutils-gdb/gdb/event-top.c:767
 #9  0x0000000000692c2c in gdb_rl_callback_handler (rl=0x20be890 "") at ../../binutils-gdb/gdb/event-top.c:200

The cause is that we want to access some builtin types in gdbarch init, but
it is not initialized yet.  I fix it by creating the type when it is to be
used.  We've already done this in sparc, sparc64 and m68k.

gdb:

2016-12-09  Yao Qi  <yao.qi@linaro.org>

PR tdep/20953
* rl78-tdep.c (rl78_psw_type): New function.
(rl78_register_type): Call rl78_psw_type.
(rl78_gdbarch_init): Move code to rl78_psw_type.

gdb/testsuite:

2016-12-09  Yao Qi  <yao.qi@linaro.org>

* gdb.base/all-architectures.exp.in: Remove kfail for rl78.

7 years agoAdd test that exercises all bfd architecture, osabi, endian, etc. combinations
Pedro Alves [Fri, 9 Dec 2016 14:59:09 +0000 (14:59 +0000)]
Add test that exercises all bfd architecture, osabi, endian, etc. combinations

This adds a test that exposes several problems fixed by earlier
patches:

#1 - Buffer overrun when host/target formats match, but sizes don't.
     https://sourceware.org/ml/gdb-patches/2016-03/msg00125.html

#2 - Missing handling for FR-V FR300.
     https://sourceware.org/ml/gdb-patches/2016-03/msg00117.html

#3 - BFD architectures with spaces in their names (v850).
     https://sourceware.org/ml/binutils/2016-03/msg00108.html

#4 - The OS ABI names with spaces issue.
     https://sourceware.org/ml/gdb-patches/2016-03/msg00116.html

#5 - Bogus HP/PA long double format.
     https://sourceware.org/ml/gdb-patches/2016-03/msg00122.html

#6 - Cris big endian internal error.
     https://sourceware.org/ml/gdb-patches/2016-03/msg00126.html

#7 - Several PowerPC bfd archs/machines not handled by gdb.
     https://sourceware.org/bugzilla/show_bug.cgi?id=19797

And hopefully helps catch others in the future.

This started out as a test that simply did,

 gdb -ex "print 1.0L"

to exercise #1 above.

Then to cover both 32-bit target / 64-bit host and the converse, I
thought of having the testcase print the floats twice, once with the
architecture set to "i386" and then to "i386:x86-64".  This way it
wouldn't matter whether gdb was built as 32-bit or a 64-bit program.

Then I thought that other archs might have similar host/target
floatformat conversion issues as well.  Instead of hardcoding some
architectures in the test file, I thought we could just iterate over
all bfd architectures and OS ABIs supported by the gdb build being
tested.  This is what then exposed all the other problems listed
above...

With an --enable-targets=all, this exercises over 14 thousand
combinations.  If left in a single test file, it all consistenly runs
in under a minute on my machine (An Intel i7-4810MQ @ 2.8 MHZ running
Fedora 23).  Split in 8 chunks, as in this commit, it runs in around
25 seconds, with make -j8.

To avoid flooding the gdb.sum file, it avoids calling "pass" on each
tested combination/iteration.  I'm explicitly not implementing that by
passing an empty message to gdb_test / gdb_test_multiple, because I
still want a FAIL to be logged in gdb.sum.  So instead this puts the
internal passes in the gdb.log file, only, prefixed "IPASS:", for
internal pass.  TBC, if some iteration fails, it'll still show up as
FAIL in gdb.sum.  If this is an approach that takes on, I can see us
extending the common bits to support it for all testcases.

gdb/testsuite/ChangeLog:
2016-12-09  Pedro Alves  <palves@redhat.com>

* gdb.base/all-architectures-0.exp: New file.
* gdb.base/all-architectures-1.exp: New file.
* gdb.base/all-architectures-2.exp: New file.
* gdb.base/all-architectures-3.exp: New file.
* gdb.base/all-architectures-4.exp: New file.
* gdb.base/all-architectures-5.exp: New file.
* gdb.base/all-architectures-6.exp: New file.
* gdb.base/all-architectures-7.exp: New file.
* gdb.base/all-architectures.exp.in: New file.

7 years agoUse code cache in aarch64 prologue analyzer
Yao Qi [Fri, 9 Dec 2016 09:51:20 +0000 (09:51 +0000)]
Use code cache in aarch64 prologue analyzer

This patch change aarch prologue analyzer using code cache, in order
to improve the performance of remote debugging.

gdb.perf/skip-prologue.exp (measured by wall-time) is improved when
the program is compiled without debug information.

Original Patched Original Patched
without dbg without dbg with dbg with dbg

/ 11.1635239124 9.99472999573 9.65339517593 9.66648793221
-fstack-protector-all 11.2560930252 9.338118 9.63896489143 9.59474396706

gdb:

2016-12-9  Yao Qi  <yao.qi@linaro.org>

* aarch64-tdep.c (instruction_reader::read): Call
read_code_unsigned_integer instead of
read_memory_unsigned_integer.

7 years agoUse code cache in arm prologue analyzer
Yao Qi [Fri, 9 Dec 2016 09:51:20 +0000 (09:51 +0000)]
Use code cache in arm prologue analyzer

This patch change arm prologue analyzer using code cache, in order
to improve the performance of remote debugging.

gdb.perf/skip-prologue.exp (measured by wall-time) is improved a lot,

Original Patched Original Patched
without dbg without dbg with dbg with dbg

-marm 14.166741848 9.32852292061   11.4908499718   9.16302204132
-marm    14.6705040932   9.34849786758   18.2788009644   9.14823913574
\-fstack-protector-all
-mthumb 34.4391930103 10.6062178612  13.7886838913 10.3094120026
-mthumb
\-fstack-protector-all 34.9310460091 10.6413481236 25.3875930309 10.6294929981

gdb:

2016-12-09  Yao Qi  <yao.qi@linaro.org>

* arm-tdep.c (skip_prologue_function): Call
read_code_unsigned_integer instead of
read_memory_unsigned_integer.
(thumb_analyze_prologue): Likewise.
(arm_analyze_load_stack_chk_guard): Likewise.
(arm_skip_stack_protector): Likewise.
(arm_analyze_prologue):Likewise.
(extend_buffer_earlier): Call target_read_code instead
of target_read_memory.
(arm_adjust_breakpoint_address): Likewise.

7 years agoCompile gdb.perf/skip-prologue.c with and without debug info
Yao Qi [Fri, 9 Dec 2016 09:51:20 +0000 (09:51 +0000)]
Compile gdb.perf/skip-prologue.c with and without debug info

gdb.perf/skip-prologue.exp is intended to measure the performance of
skipping prologue with prologue analysis by setting breakpoints.
However, if program is compiled with debug info, GDB is smart to
skip prologue by line table from debug info, so prologue analysis
is not exercised at all.

This patch adds a parameter COMPILE to specify compiling with
debug information, otherwise, it is compiled without debug
information.

gdb/testsuite:

2016-12-09  Yao Qi  <yao.qi@linaro.org>

* gdb.perf/skip-prologue.exp: Add parameter COMPILE.

7 years agoHurd: Adjust to changes to "push pruning old threads down to the target"
Thomas Schwinge [Wed, 25 May 2016 16:54:40 +0000 (18:54 +0200)]
Hurd: Adjust to changes to "push pruning old threads down to the target"

For "info threads", we currently run into:

    $ gdb/gdb -q -nw -nx --batch -ex start -ex info\ threads bfd/doc/chew
    Temporary breakpoint 1 at 0x80486e0: file ../../../W._C._Handy/bfd/doc/chew.c, line 1535.
    [New Thread 10656.5]

    Thread 4 hit Temporary breakpoint 1, main (ac=1, av=0x102cd84) at ../../../W._C._Handy/bfd/doc/chew.c:1535
    1535    {
      Id   Target Id         Frame
      1    bogus thread id 1 Can't fetch registers from thread bogus thread id 1: No such thread

Before commit e8032dde10b743253125d7defb5f5503b21c1d26,
gdb/thread.c:update_thread_list used to call prune_threads, after that change
it doesn't anymore, and we don't implement the to_update_thread_list target
method where the prune_threads call got moved.  For now, apply a fix, related
to commit c82f56d9d760a9b4034eeaac44f2f0fa5779ff69 "Hurd: Adjust to
startup-with-shell changes", which restores the previous behavior:

      Id   Target Id         Frame
    * 4    Thread 10688.4    main (ac=1, av=0x102cd84) at ../../../W._C._Handy/bfd/doc/chew.c:1535
      5    Thread 10688.5    0x0106096c in ?? () from /lib/i386-gnu/libc.so.0.3

Not perfect, but at least better.

gdb/
* gnu-nat.c (gnu_create_inferior): After startup_inferior, call
prune_threads.

7 years agoAvoid PATH_MAX usage
Thomas Schwinge [Thu, 8 Dec 2016 17:42:03 +0000 (18:42 +0100)]
Avoid PATH_MAX usage

On GNU/Hurd, there is no "#define PATH_MAX", so this failed to build.

gdb/
* inferior.c (print_selected_inferior): Avoid PATH_MAX usage.

7 years agoAutomatic date update in version.in
GDB Administrator [Fri, 9 Dec 2016 00:00:25 +0000 (00:00 +0000)]
Automatic date update in version.in

7 years agoMIPS16/opcodes: Fix off-by-one indentation in `print_mips16_insn_arg'
Maciej W. Rozycki [Thu, 8 Dec 2016 23:29:37 +0000 (23:29 +0000)]
MIPS16/opcodes: Fix off-by-one indentation in `print_mips16_insn_arg'

opcodes/
* mips-dis.c (print_mips16_insn_arg): Remove extraneous
indentation space across.

7 years agoMIPS16/opcodes: Fix PC-relative operation delay-slot adjustment
Maciej W. Rozycki [Thu, 8 Dec 2016 23:29:01 +0000 (23:29 +0000)]
MIPS16/opcodes: Fix PC-relative operation delay-slot adjustment

Complement commit dd8b7c222e0e ("MIPS: mips16e jalrc/jrc opcodes"),
<https://sourceware.org/ml/binutils/2005-07/msg00349.html>, and stop the
disassembler making a delay-slot adjustment for PC-relative operations
following either MIPS16e compact jumps, or undefined RR/J(AL)R(C)
encodings that have the `l' (link) and `ra' (source register is `ra')
bits set both at a time.  Adjust code description for accuracy.  Add a
suitable test case.

opcodes/
* mips-dis.c (print_mips16_insn_arg): Avoid delay-slot
adjustment for PC-relative operations following MIPS16e compact
jumps or undefined RR/J(AL)R(C) encodings.

binutils/
* testsuite/binutils-all/mips/mips16-pcrel.d: New test.
* testsuite/binutils-all/mips/mips16-pcrel.s: New test source.
* testsuite/binutils-all/mips/mips.exp: Run the new test.

7 years agoARC/GAS: Correct a `spaces' global shadowing error
Maciej W. Rozycki [Thu, 8 Dec 2016 22:55:42 +0000 (22:55 +0000)]
ARC/GAS: Correct a `spaces' global shadowing error

Fix a commit a9752fdf8398 ("[ARC] Sync cpu names with the ones accepted
by GCC.") build regression:

cc1: warnings being treated as errors
.../gas/config/tc-arc.c: In function 'arc_show_cpu_list':
.../gas/config/tc-arc.c:3452: error: declaration of 'spaces' shadows a global declaration
.../gas/../include/libiberty.h:248: error: shadowed declaration is here
make[4]: *** [tc-arc.o] Error 1

in a way following commit 91d6fa6a035c ("Add -Wshadow to the gcc command
line options used when compiling the binutils.").

gas/
* config/tc-arc.c (arc_show_cpu_list): Rename `spaces' local
variable to `space_buf'.

7 years agoARM/GAS: Correct an `index' global shadowing error
Maciej W. Rozycki [Thu, 8 Dec 2016 22:53:39 +0000 (22:53 +0000)]
ARM/GAS: Correct an `index' global shadowing error

Fix a commit 008a97eff0ca ("[GAS][ARM]Generate unpredictable warning for
pc used in data processing instructions with register-shifted register
operand.") build regression:

cc1: warnings being treated as errors
.../gas/config/tc-arm.c: In function 'encode_arm_shift':
.../gas/config/tc-arm.c:7439: error: declaration of 'index' shadows a global declaration
/usr/include/string.h:303: error: shadowed declaration is here
make[4]: *** [tc-arm.o] Error 1

in a way following commit 91d6fa6a035c ("Add -Wshadow to the gcc command
line options used when compiling the binutils.").

gas/
* config/tc-arm.c (encode_arm_shift): Rename `index' local
variable to `op_index'.

7 years agoAArch64/opcodes: Correct another `index' global shadowing error
Maciej W. Rozycki [Thu, 8 Dec 2016 22:51:44 +0000 (22:51 +0000)]
AArch64/opcodes: Correct another `index' global shadowing error

Fix a commit c2c4ff8d52a2 ("[AArch64] Add ARMv8.3 FCMLA and FCADD
instructions") build regression:

cc1: warnings being treated as errors
.../opcodes/aarch64-dis.c: In function 'aarch64_ext_sve_addr_rr_lsl':
.../opcodes/aarch64-dis.c:1324: error: declaration of 'index' shadows a global declaration
/usr/include/string.h:303: error: shadowed declaration is here
make[4]: *** [aarch64-asm.lo] Error 1

in a way following commit 91d6fa6a035c ("Add -Wshadow to the gcc command
line options used when compiling the binutils.").

opcodes/
* aarch64-asm.c (aarch64_ins_reglane): Rename `index' local
variable to `reglane_index'.

7 years agoFix crash when disassembling invalid range on powerpc vle
Luis Machado [Thu, 8 Dec 2016 13:25:09 +0000 (07:25 -0600)]
Fix crash when disassembling invalid range on powerpc vle

I got a report of a gdb crash for vle and further investigation showed an
attempt to disassemble an invalid memory range.  I tracked the crash down
to the code in get_powerpc_dialect, where we fail to make sure we have a
valid section pointer before dereferencing it.

There is no such problem for rs6000-based disassembling.

opcodes/ChangeLog:

2016-12-08  Luis Machado  <lgustavo@codesourcery.com>

* ppc-dis.c (get_powerpc_dialect): Check NULL info->section.

7 years agoAlways use a hex prefix when displaying the alignment of program headers.
Etienne Buira [Thu, 8 Dec 2016 12:52:21 +0000 (12:52 +0000)]
Always use a hex prefix when displaying the alignment of program headers.

* readelf.c (process_program_headers): Always use hex prefix when
displaying the segment alignment.

7 years ago[GOLD] Don't assert in powerpc stub_table
Alan Modra [Thu, 8 Dec 2016 05:38:29 +0000 (16:08 +1030)]
[GOLD] Don't assert in powerpc stub_table

A branch in a non-exec section that needs a stub can lead to this
assertion.

* powerpc.cc (Powerpc_relobj::stub_table): Return NULL rather
then asserting.

7 years ago[GOLD] fix typo in --stub-group-multi help
Alan Modra [Thu, 8 Dec 2016 00:19:28 +0000 (10:49 +1030)]
[GOLD] fix typo in --stub-group-multi help

* options.h (--stub-group-multi): Fix typo.

7 years agosync binutils config/ with gcc
Alan Modra [Wed, 7 Dec 2016 23:20:17 +0000 (09:50 +1030)]
sync binutils config/ with gcc

config/
* acx.m4: Import from gcc.
* bootstrap-asan.mk: Likewise.
* multi.m4: Likewise.
/
* configure: Regnerate.
gas/
* configure: Regnerate.
ld/
* configure: Regnerate.
libiberty/
* configure: Regnerate.
zlib/
* configure: Regnerate.

7 years agoPR20932, Internal error during record link assignment
Alan Modra [Wed, 7 Dec 2016 23:21:00 +0000 (09:51 +1030)]
PR20932, Internal error during record link assignment

PR ld/20932
* elflink.c (bfd_elf_record_link_assignment): Handle warning symbols.

7 years agoHurd: In the CLI, use parse_thread_id instead of global_thread_id_to_ptid
Simon Marchi [Thu, 8 Dec 2016 08:45:59 +0000 (09:45 +0100)]
Hurd: In the CLI, use parse_thread_id instead of global_thread_id_to_ptid

Follow-up to commit 14f6890677849172a4b13779acd9089c9baa3a81.
global_thread_id_to_ptid expects global thread numbers, which are nowadays only
used in MI, never presented to the user in the CLI.  Since this is a CLI
command, it should accept the inferior-qualified format instead.

gdb/
* gnu-nat.c (set_sig_thread_cmd): Use parse_thread_id instead of
global_thread_id_to_ptid.

7 years agoHurd, C++: Mach/Hurd headers and MIG stubs are not yet fit for C++
Thomas Schwinge [Mon, 5 Dec 2016 10:59:03 +0000 (11:59 +0100)]
Hurd, C++: Mach/Hurd headers and MIG stubs are not yet fit for C++

..., so handle these in "C" mode still:

gdb/
* config/i386/i386gnu.mh (%_S.o %_U.o): Add "-x c" to
"COMPILE.post".
* gnu-nat.c: #include Mach/Hurd headers before all others.  Wrap
Mach/Hurd headers and MIG stubs' prototypes in 'extern "C"'.
* i386-gnu-nat.c: Likewise.

7 years agoHurd, C++: kern_return_t vs. error_t
Thomas Schwinge [Fri, 25 Nov 2016 10:02:17 +0000 (11:02 +0100)]
Hurd, C++: kern_return_t vs. error_t

GNU/Hurd uses its own "typedef enum __error_t_codes error_t;"
([glibc]/sysdeps/mach/hurd/bits/errno.h), contrary to the default
"typedef int error_t;" ([glibc]/stdlib/errno.h).

The Mach/Hurd RPCs return kern_return_t values, for which, upon assigning them
to an error_t variable, GCC in C++ mode tells us "error: invalid conversion
from 'kern_return_t {aka int}' to 'error_t {aka __error_t_codes}'".  Instead of
casting all these RPC return values to "error_t", just use "kern_return_t"
variables:

gdb/
* gnu-nat.c (proc_get_exception_port, proc_set_exception_port)
(INF_RESUME_MSGPORT_RPC, proc_get_state, _proc_get_exc_port)
(proc_steal_exc_port, proc_restore_exc_port, make_proc)
(inf_startup, inf_set_pid, inf_validate_procinfo)
(inf_validate_task_sc, inf_set_traced, inf_validate_procs)
(inf_signal, inf_continue, gnu_wait, S_exception_raise_request)
(do_mach_notify_dead_name, S_proc_wait_reply)
(S_msg_sig_post_untraced_reply, S_msg_sig_post_reply)
(port_msgs_queued, gnu_read_inferior, gnu_write_inferior)
(gnu_find_memory_regions, steal_exc_port, thread_takeover_sc_cmd)
(flush_inferior_icache): Instead of "error_t" use "kern_return_t".
* i386-gnu-nat.c (fetch_fpregs, store_fpregs, i386_gnu_dr_get)
(i386_gnu_dr_set): Likewise.

7 years agoHurd, C++: Avoid "const char *" to "char *" casts
Thomas Schwinge [Fri, 25 Nov 2016 14:16:13 +0000 (15:16 +0100)]
Hurd, C++: Avoid "const char *" to "char *" casts

... by a bit of code refactoring:

gdb/
* gnu-nat.c (set_task_pause_cmd, set_signals_cmd)
(set_exceptions_cmd): Add variants taking an "int arg" instead of
a "char *".  Make the "char *" variants use the former.
(set_noninvasive_cmd): Also use the "int arg" variants.

7 years agoHurd, C++: Avoid GNU C nested functions
Thomas Schwinge [Fri, 25 Nov 2016 13:56:01 +0000 (14:56 +0100)]
Hurd, C++: Avoid GNU C nested functions

..., which C++ doesn't allow, so...

gdb/
* gnu-nat.c (gnu_create_inferior): Move nested "trace_me"
function...
(gnu_ptrace_me): ... here.